mraa: update to version 0.6.0

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>

.gitignore

@@ -11,3 +11,11 @@ build/
 # Temp files
 *.swp
 *~
+
+# npmpub files
+src/mraajsJAVASCRIPT_wrap.cxx
+src/version.c
+package.json
+binding.gyp
+READMEFIRST
+npm-debug.log

CMakeLists.txt

@@ -3,9 +3,12 @@ project (mraa)
 
 FIND_PACKAGE (Threads)
 
-set (CMAKE_CXX_FLAGS_DEBUG "${CMAKE_CXX_FLAGS_DEBUG} -Wall -fno-omit-frame-pointer -DDEBUG")
+set (CMAKE_CXX_FLAGS_DEBUG "${CMAKE_CXX_FLAGS_DEBUG} -Wall -fno-omit-frame-pointer")
 set (CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -Wall")
-set (CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS} -DDEBUG")
+set (LIB_INSTALL_DIR "lib${LIB_SUFFIX}" CACHE PATH "Installation path for libraries")
+
+# Set CMAKE_LIB_INSTALL_DIR if not defined
+include(GNUInstallDirs)
 
 # Appends the cmake/modules path to MAKE_MODULE_PATH variable.
 set (CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}/cmake/modules ${CMAKE_MODULE_PATH})
@@ -15,10 +18,10 @@ include (GetGitRevisionDescription)
 git_describe (VERSION "--tags")
 if ("x_${VERSION}" STREQUAL "x_GIT-NOTFOUND")
   message (WARNING " - Install git to compile a production libmraa!")
-  set (VERSION "v0.5.0-dirty")
+  set (VERSION "v0.6.0-dirty")
 endif ()
 
-message (INFO " - MRAA Version ${VERSION}")
+message (INFO " - libmraa Version ${VERSION}")
 
 #parse the version information into pieces.
 string (REGEX REPLACE "^v([0-9]+)\\..*" "\\1" VERSION_MAJOR "${VERSION}")
@@ -53,6 +56,19 @@ option (BUILDSWIGPYTHON "Build swig python modules." ON)
 option (BUILDSWIGNODE "Build swig node modules." ON)
 option (IPK "Generate IPK using CPack" OFF)
 
+include (TargetArch)
+target_architecture (DETECTED_ARCH)
+message( INFO " - Target arch is ${DETECTED_ARCH}")
+
+if (DETECTED_ARCH STREQUAL "i586" OR DETECTED_ARCH STREQUAL "x86_64"
+    OR DETECTED_ARCH STREQUAL "i386")
+  set (X86PLAT ON)
+elseif (DETECTED_ARCH MATCHES "arm.*")
+  set (ARMPLAT ON)
+else ()
+  message(FATAL_ERROR "Only x86 and arm platforms currently supported")
+endif()
+
 if (GTEST)
   enable_testing ()
   add_subdirectory (tests)
@@ -72,10 +88,6 @@ if (BUILDDOC)
 endif ()
 
 if (IPK)
-  include (TargetArch)
-  target_architecture (DETECTED_ARCH)
-  message( INFO " - Target arch is ${DETECTED_ARCH}")
-
   set(CPACK_GENERATOR "DEB" "TGZ")
   set(OPKG_ARCH ${DETECTED_ARCH})
   set(CPACK_BINARY_DIR ${CMAKE_BINARY_DIR})

README.md

@@ -1,9 +1,12 @@
-MRAA - Low Level Skeleton Library for Communication on GNU/Linux platforms
+libmraa - Low Level Skeleton Library for Communication on GNU/Linux platforms
 ==============
 
-Library in C/C++ to interface with Galileo & other Intel platforms, in a
-structured and sane API with port names/numbering that match boards & with
-bindings to javascript & python.
+Libmraa is a C/C++ library with bindings to javascript & python to interface
+with the IO on Galileo, Edison & other platforms, with a structured and sane
+API where port names/numbering matches the board that you are on. Use of
+libmraa does not tie you to specific hardware with board detection done at
+runtime you can create portable code that will work across the supported
+platforms.
 
 The intent is to make it easier for developers and sensor manufacturers to map
 their sensors & actuators on top of supported hardware and to allow control of
@@ -12,9 +15,17 @@ low level communication protocol by high level languages & constructs.
 Supported Boards
 ================
 
+X86
+---
 * [Galileo Gen 1 - Rev D](../master/docs/galileorevd.md)
 * [Galileo Gen 2 - Rev H](../master/docs/galileorevh.md)
 * [Edison](../master/docs/edison.md)
+* [Intel DE3815](../master/docs/intel_de3815.md)
+* [Minnowboard Max](../master/docs/minnow_max.md)
+
+ARM
+---
+* [Raspberry Pi - Model B](../master/docs/raspberry_pi_b.md)
 
 Installing on your board
 ========
@@ -39,6 +50,14 @@ Examples
 
 See the [examples](../../tree/master/examples) available for various languages
 
+Debugging
+=========
+
+Sometimes it just doesn't want to work, let us try and help you, you can file
+issues in github or join us in #mraa on freenode IRC, hang around for a little
+while because we're not necessarily on 24/7, but we'll get back to you! Have a
+glance at our [debugging](../master/docs/debugging.md) page too.
+
 C/C++ API Documentation
 ===========
 

api/mraa/aio.hpp

@@ -24,6 +24,7 @@
 
 #pragma once
 
+#include <stdexcept>
 #include "aio.h"
 
 namespace mraa {
@@ -45,6 +46,9 @@ class Aio {
          */
         Aio(unsigned int pin) {
             m_aio = mraa_aio_init(pin);
+            if (m_aio == NULL) {
+                throw std::invalid_argument("Invalid AIO pin specified - do you have an ADC?");
+            }
         }
         /**
          * Aio destructor

api/mraa/common.h

@@ -26,6 +26,8 @@
 
 #include "types.h"
 
+#define MRAA_PLATFORM_NAME_MAX_SIZE 64
+
 /** @file
  *
  * This file defines the basic shared values for libmraa
@@ -41,152 +43,6 @@ extern "C" {
  */
 typedef unsigned int mraa_boolean_t;
 
-/**
- * Enum representing different possible modes for a pin.
- */
-typedef enum {
-    MRAA_PIN_VALID       = 0, /**< Pin Valid */
-    MRAA_PIN_GPIO        = 1, /**< General Purpose IO */
-    MRAA_PIN_PWM         = 2, /**< Pulse Width Modulation */
-    MRAA_PIN_FAST_GPIO   = 3, /**< Faster GPIO */
-    MRAA_PIN_SPI         = 4, /**< SPI */
-    MRAA_PIN_I2C         = 5, /**< I2C */
-    MRAA_PIN_AIO         = 6, /**< Analog in */
-    MRAA_PIN_UART        = 7  /**< UART */
-} mraa_pinmodes_t;
-
-/**
- * A bitfield representing the capabilities of a pin.
- */
-typedef struct {
-    /*@{*/
-    mraa_boolean_t valid:1;     /**< Is the pin valid at all */
-    mraa_boolean_t gpio:1;      /**< Is the pin gpio capable */
-    mraa_boolean_t pwm:1;       /**< Is the pin pwm capable */
-    mraa_boolean_t fast_gpio:1; /**< Is the pin fast gpio capable */
-    mraa_boolean_t spi:1;       /**< Is the pin spi capable */
-    mraa_boolean_t i2c:1;       /**< Is the pin i2c capable */
-    mraa_boolean_t aio:1;       /**< Is the pin analog input capable */
-    mraa_boolean_t uart:1;       /**< Is the pin uart capable */
-    /*@}*/
-} mraa_pincapabilities_t;
-
-/**
- * A Structure representing a multiplexer and the required value
- */
-typedef struct {
-    /*@{*/
-    unsigned int pin;   /**< Raw GPIO pin id */
-    unsigned int value; /**< Raw GPIO value */
-    /*@}*/
-} mraa_mux_t;
-
-typedef struct {
-    mraa_boolean_t complex_pin:1;
-    mraa_boolean_t output_en:1;
-    mraa_boolean_t output_en_high:1;
-    mraa_boolean_t pullup_en:1;
-    mraa_boolean_t pullup_en_hiz:1;
-} mraa_pin_cap_complex_t;
-
-typedef struct {
-    /*@{*/
-    unsigned int pinmap; /**< sysfs pin */
-    unsigned int parent_id; /** parent chip id */
-    unsigned int mux_total; /** Numfer of muxes needed for operation of pin */
-    mraa_mux_t mux[6]; /** Array holding information about mux */
-    unsigned int output_enable; /** Output Enable GPIO, for level shifting */
-    unsigned int pullup_enable; /** Pull-Up enable GPIO, inputs */
-    mraa_pin_cap_complex_t complex_cap;
-    /*@}*/
-} mraa_pin_t;
-
-typedef struct {
-    /*@{*/
-    char mem_dev[32]; /**< Memory device to use /dev/uio0 etc */
-    unsigned int mem_sz; /** Size of memory to map */
-    unsigned int bit_pos; /** Position of value bit */
-    mraa_pin_t gpio; /** GPio context containing none mmap info */
-    /*@}*/
-} mraa_mmap_pin_t;
-
-/**
- * A Structure representing a physical Pin.
- */
-typedef struct {
-    /*@{*/
-    char name[8];                      /**< Pin's real world name */
-    mraa_pincapabilities_t capabilites; /**< Pin Capabiliites */
-    mraa_pin_t gpio; /**< GPIO structure */
-    mraa_pin_t pwm;  /**< PWM structure */
-    mraa_pin_t aio;  /**< Anaglog Pin */
-    mraa_mmap_pin_t mmap; /**< GPIO through memory */
-    mraa_pin_t i2c;  /**< i2c bus/pin */
-    mraa_pin_t spi;  /**< spi bus/pin */
-    mraa_pin_t uart;  /**< uart module/pin */
-    /*@}*/
-} mraa_pininfo_t;
-
-/**
- * A Structure representing the physical properties of a i2c bus.
- */
-typedef struct {
-    /*@{*/
-    unsigned int bus_id; /**< ID as exposed in the system */
-    unsigned int scl; /**< i2c SCL */
-    unsigned int sda; /**< i2c SDA */
-    /*@}*/
-} mraa_i2c_bus_t;
-
-/**
- * A Structure representing the physical properties of a spi bus.
- */
-typedef struct {
-    /*@{*/
-    unsigned int bus_id; /**< The Bus ID as exposed to the system. */
-    unsigned int slave_s; /**< Slave select */
-    mraa_boolean_t three_wire; /**< Is the bus only a three wire system */
-    unsigned int sclk; /**< Serial Clock */
-    unsigned int mosi; /**< Master Out, Slave In. */
-    unsigned int miso; /**< Master In, Slave Out. */
-    unsigned int cs; /**< Chip Select, used when the board is a spi slave */
-    /*@}*/
-} mraa_spi_bus_t;
-
-/**
- * A Structure representing a uart device.
- */
-typedef struct {
-    /*@{*/
-    unsigned int index; /**< ID as exposed in the system */
-    int rx; /**< uart rx */
-    int tx; /**< uart tx */
-    /*@}*/
-} mraa_uart_dev_t;
-
-/**
- * A Structure representing a platform/board.
- */
-typedef struct {
-    /*@{*/
-    unsigned int phy_pin_count; /**< The Total IO pins on board */
-    unsigned int gpio_count; /**< GPIO Count */
-    unsigned int aio_count;  /**< Analog side Count */
-    unsigned int i2c_bus_count; /**< Usable i2c Count */
-    mraa_i2c_bus_t  i2c_bus[12]; /**< Array of i2c */
-    unsigned int def_i2c_bus; /**< Position in array of default i2c bus */
-    unsigned int spi_bus_count; /**< Usable spi Count */
-    mraa_spi_bus_t spi_bus[12];       /**< Array of spi */
-    unsigned int def_spi_bus; /**< Position in array of defult spi bus */
-    unsigned int adc_raw; /**< ADC raw bit value */
-    unsigned int adc_supported; /**< ADC supported bit value */
-    unsigned int def_uart_dev; /**< Position in array of defult uart */
-    unsigned int uart_dev_count; /**< Usable spi Count */
-    mraa_uart_dev_t uart_dev[6]; /**< Array of UARTs */
-    mraa_pininfo_t* pins;     /**< Pointer to pin array */
-    /*@}*/
-} mraa_board_t;
-
 /**
  * Initialise MRAA
  *
@@ -235,7 +91,6 @@ unsigned int mraa_adc_raw_bits();
  */
 unsigned int mraa_adc_supported_bits();
 
-
 /**
  * Sets the log level to use from 0-7 where 7 is very verbose. These are the
  * syslog log levels, see syslog(3) for more information on the levels.
@@ -244,6 +99,54 @@ unsigned int mraa_adc_supported_bits();
  */
 mraa_result_t mraa_set_log_level(int level);
 
+/**
+ * Return the Platform's Name, If no platform detected return NULL
+ *
+ * @return platform name
+ */
+char* mraa_get_platform_name();
+
+/**
+ * This function attempts to set the mraa process to a given priority and the
+ * scheduler to SCHED_RR. Highest * priority is typically 99 and minimum is 0.
+ * This function * will set to MAX if * priority is > MAX. Function will return
+ * -1 on failure.
+ *
+ * @param priority Value from typically 0 to 99
+ * @return The priority value set
+ */
+int mraa_set_priority(const unsigned int priority);
+
+/** Get the version string of mraa autogenerated from git tag
+ *
+ * The version returned may not be what is expected however it is a reliable
+ * number associated with the git tag closest to that version at build time
+ *
+ * @return version string from version.h
+ */
+const char* mraa_get_version();
+
+/**
+ * Print a textual representation of the mraa_result_t
+ *
+ * @param result the result to print
+ */
+void mraa_result_print(mraa_result_t result);
+
+/**
+ * Get platform type, board must be initialised.
+ *
+ * @return mraa_platform_t Platform type enum
+ */
+mraa_platform_t mraa_get_platform_type();
+
+/**
+ * Get platform pincount, board must be initialised.
+ *
+ * @return uint of physical pin count on the in-use platform
+ */
+unsigned int mraa_get_pin_count();
+
 #ifdef __cplusplus
 }
 #endif

api/mraa/common.hpp

@@ -44,7 +44,7 @@ namespace mraa {
  *
  * @return libmraa version (e.g. v0.4.0-20-gb408207)
  */
-std::string getVersion()
+inline std::string getVersion()
 {
     std::string ret = mraa_get_version();
     return ret;
@@ -59,7 +59,7 @@ std::string getVersion()
  * @param priority Value from typically 0 to 99
  * @return The priority value set
  */
-int setPriority(const unsigned int priority)
+inline int setPriority(const unsigned int priority)
 {
     return mraa_set_priority(priority);
 }
@@ -69,7 +69,7 @@ int setPriority(const unsigned int priority)
  *
  * @return mraa_platform_t Platform type enum
  */
-mraa_platform_t getPlatformType()
+inline mraa_platform_t getPlatformType()
 {
     return mraa_get_platform_type();
 }
@@ -79,7 +79,7 @@ mraa_platform_t getPlatformType()
  *
  * @param result the result to print
  */
-void printError(mraa_result_t result)
+inline void printError(mraa_result_t result)
 {
     mraa_result_print(result);
 }
@@ -91,7 +91,7 @@ void printError(mraa_result_t result)
  * @param mode the mode to be tested.
  * @return boolean if the mode is supported, 0=false.
  */
-bool pinModeTest(int pin, mraa_pinmodes_t mode)
+inline bool pinModeTest(int pin, mraa_pinmodes_t mode)
 {
     return (bool) mraa_pin_mode_test(pin,mode);
 }
@@ -101,7 +101,7 @@ bool pinModeTest(int pin, mraa_pinmodes_t mode)
  *
  * @return raw bits being read from kernel module. Zero if no ADC
  */
-unsigned int adcRawBits()
+inline unsigned int adcRawBits()
 {
     return mraa_adc_raw_bits();
 }
@@ -111,18 +111,40 @@ unsigned int adcRawBits()
  *
  * @return return actual bit size the adc value should be understood as.
  */
-unsigned int adcSupportedBits()
+inline unsigned int adcSupportedBits()
 {
     return mraa_adc_supported_bits();
 }
 
+/**
+ * Return Platform Name. Returns NULL if no platform inited.
+ *
+ * @return platform name
+ */
+inline std::string getPlatformName()
+{
+    std::string ret_val(mraa_get_platform_name());
+    return ret_val;
+}
+
+/**
+ * Return count of physical pins on the running platform
+ *
+ * @return uint of physical pins.
+ */
+inline unsigned int getPinCount()
+{
+    return mraa_get_pin_count();
+}
+
 /**
  * Sets the log level to use from 0-7 where 7 is very verbose. These are the
  * syslog log levels, see syslog(3) for more information on the levels.
  *
+ * @param level
  * @return Result of operation
  */
-mraa_result_t setLogLevel(int level)
+inline mraa_result_t setLogLevel(int level)
 {
     return mraa_set_log_level(level);
 }

api/mraa/gpio.h

@@ -70,7 +70,9 @@ typedef enum {
  */
 typedef enum {
     MRAA_GPIO_OUT    = 0, /**< Output. A Mode can also be set */
-    MRAA_GPIO_IN     = 1  /**< Input */
+    MRAA_GPIO_IN     = 1,  /**< Input */
+    MRAA_GPIO_OUT_HIGH = 2, /**< Output. Init High */
+    MRAA_GPIO_OUT_LOW = 3 /**< Output. Init Low */
 } gpio_dir_t;
 
 /**
@@ -157,7 +159,8 @@ mraa_result_t mraa_gpio_dir(mraa_gpio_context dev, gpio_dir_t dir);
 mraa_result_t mraa_gpio_close(mraa_gpio_context dev);
 
 /**
- * Read the Gpio value.
+ * Read the Gpio value. This can be 0 or 1. A resonse of -1 means that there
+ * was a fatal error.
  *
  * @param dev The Gpio context
  * @return Result of operation
@@ -191,6 +194,22 @@ mraa_result_t mraa_gpio_owner(mraa_gpio_context dev, mraa_boolean_t owner);
  */
 mraa_result_t mraa_gpio_use_mmaped(mraa_gpio_context dev, mraa_boolean_t mmap);
 
+/**
+ * Get a pin number of the gpio
+ *
+ * @param dev The Gpio context
+ * @return Pin number
+ */
+int mraa_gpio_get_pin(mraa_gpio_context dev);
+
+/**
+ * Get a gpio number as used within sysfs
+ *
+ * @param dev The Gpio context
+ * @return gpio number
+ */
+int mraa_gpio_get_pin_raw(mraa_gpio_context dev);
+
 #ifdef __cplusplus
 }
 #endif

api/mraa/gpio.hpp

@@ -25,6 +25,7 @@
 #pragma once
 
 #include "gpio.h"
+#include <stdexcept>
 
 namespace mraa {
 
@@ -34,7 +35,7 @@ namespace mraa {
  * Gpio Output modes
  */
 typedef enum {
-    MODE_STRONG   = 0, /**< No interrupt on Gpio */
+    MODE_STRONG   = 0, /**< Default. Strong High and Low */
     MODE_PULLUP   = 1, /**< Interupt on rising & falling */
     MODE_PULLDOWN = 2, /**< Interupt on rising only */
     MODE_HIZ      = 3  /**< Interupt on falling only */
@@ -44,8 +45,10 @@ typedef enum {
  * Gpio Direction options
  */
 typedef enum {
-    DIR_OUT = 0, /**< Output. A Mode can also be set */
-    DIR_IN  = 1  /**< Input */
+    DIR_OUT      = 0, /**< Output. A Mode can also be set */
+    DIR_IN       = 1, /**< Input */
+    DIR_OUT_HIGH = 2, /**< Output. Init High */
+    DIR_OUT_LOW  = 3  /**< Output. Init Low */
 } Dir;
 
 /**
@@ -80,12 +83,20 @@ class Gpio {
          * you so this may not always work as expected.
          */
         Gpio(int pin, bool owner=true, bool raw=false) {
-            if (raw)
+            if (raw) {
                 m_gpio = mraa_gpio_init_raw(pin);
-            else
+            }
+            else {
                 m_gpio = mraa_gpio_init(pin);
-            if (!owner)
+            }
+
+            if (m_gpio == NULL) {
+                throw std::invalid_argument("Invalid GPIO pin specified");
+            }
+
+            if (!owner) {
                 mraa_gpio_owner(m_gpio, 0);
+            }
         }
         /**
          * Gpio object destructor, this will only unexport the gpio if we where
@@ -174,6 +185,19 @@ class Gpio {
         mraa_result_t useMmap(bool enable) {
             return mraa_gpio_use_mmaped(m_gpio, (mraa_boolean_t) enable);
         }
+        /**
+         * Get pin number of Gpio. If raw param is True will return the
+         * number as used within sysfs
+         *
+         * @param raw (optional) get the raw gpio number.
+         * @return Pin number
+         */
+        int getPin(bool raw = false) {
+            if (raw) {
+                return mraa_gpio_get_pin_raw(m_gpio);
+            }
+            return mraa_gpio_get_pin(m_gpio);
+        }
     private:
         mraa_gpio_context m_gpio;
 };

api/mraa/i2c.h

@@ -61,7 +61,7 @@ typedef struct _i2c* mraa_i2c_context;
 mraa_i2c_context mraa_i2c_init(int bus);
 
 /**
- * Initialise i2c context, passing in spi bus to use.
+ * Initialise i2c context, passing in the i2c bus to use.
  *
  * @param bus The i2c bus to use i.e. /dev/i2c-2 would be "2"
  * @return i2c context or NULL
@@ -69,16 +69,17 @@ mraa_i2c_context mraa_i2c_init(int bus);
 mraa_i2c_context mraa_i2c_init_raw(unsigned int bus);
 
 /**
- * Sets the frequency of the i2c context
+ * Sets the frequency of the i2c context. Most platforms do not support this.
  *
  * @param dev The i2c context
- * @param hz The bus frequency in hertz
+ * @param mode The bus mode
  * @return Result of operation
  */
-mraa_result_t mraa_i2c_frequency(mraa_i2c_context dev, int hz);
+mraa_result_t mraa_i2c_frequency(mraa_i2c_context dev, mraa_i2c_mode_t mode);
 
 /**
- * Read from an i2c context
+ * Simple bulk read from an i2c context, this will always begin with the i2c
+ * offset 0x0
  *
  * @param dev The i2c context
  * @param data pointer to the byte array to read data in to
@@ -88,7 +89,8 @@ mraa_result_t mraa_i2c_frequency(mraa_i2c_context dev, int hz);
 int mraa_i2c_read(mraa_i2c_context dev, uint8_t *data, int length);
 
 /**
- * Read a single byte from the i2c context
+ * Simple read for a single byte from the i2c context, this will always begin
+ * with the i2c offset 0x0
  *
  * @param dev The i2c context
  * @return The result of the read or -1 if failed
@@ -96,7 +98,26 @@ int mraa_i2c_read(mraa_i2c_context dev, uint8_t *data, int length);
 uint8_t mraa_i2c_read_byte(mraa_i2c_context dev);
 
 /**
- * Write to an i2c context
+ * Read a single byte from i2c context, from designated register
+ *
+ * @param dev The i2c context
+ * @param command The register
+ * @return The result of the read or -1 if failed
+ */
+uint8_t mraa_i2c_read_byte_data(mraa_i2c_context dev, const uint8_t command);
+
+/**
+ * Read a single word from i2c context, from designated register
+ *
+ * @param dev The i2c context
+ * @param command The register
+ * @return The result of the read or -1 if failed
+ */
+uint16_t mraa_i2c_read_word_data(mraa_i2c_context dev, const uint8_t command);
+
+/**
+ * Write length bytes to the bus, the first byte in the array is the
+ * command/register to write
  *
  * @param dev The i2c context
  * @param data pointer to the byte array to be written
@@ -106,7 +127,7 @@ uint8_t mraa_i2c_read_byte(mraa_i2c_context dev);
 mraa_result_t mraa_i2c_write(mraa_i2c_context dev, const uint8_t *data, int length);
 
 /**
- * Write a single byte to an i2c context
+ * Write a single byte to an i2c context, always at offset 0x0
  *
  * @param dev The i2c context
  * @param data The byte to write
@@ -114,6 +135,26 @@ mraa_result_t mraa_i2c_write(mraa_i2c_context dev, const uint8_t *data, int leng
  */
 mraa_result_t mraa_i2c_write_byte(mraa_i2c_context dev, const uint8_t data);
 
+/**
+ * Write a single byte to an i2c context
+ *
+ * @param dev The i2c context
+ * @param data The byte to write
+ * @param command The register
+ * @return Result of operation
+ */
+mraa_result_t mraa_i2c_write_byte_data(mraa_i2c_context dev, const uint8_t data, const uint8_t command);
+
+/**
+ * Write a single word to an i2c context
+ *
+ * @param dev The i2c context
+ * @param data The word to write
+ * @param command The register
+ * @return Result of operation
+ */
+mraa_result_t mraa_i2c_write_word_data(mraa_i2c_context dev, const uint16_t data, const uint8_t command);
+
 /**
  * Sets the i2c context address.
  *
@@ -123,7 +164,7 @@ mraa_result_t mraa_i2c_write_byte(mraa_i2c_context dev, const uint8_t data);
  *   general call address.
  * @return Result of operation
  */
-mraa_result_t mraa_i2c_address(mraa_i2c_context dev, int address);
+mraa_result_t mraa_i2c_address(mraa_i2c_context dev, uint8_t address);
 
 /**
  * De-inits an mraa_i2c_context device

api/mraa/i2c.hpp

@@ -25,6 +25,7 @@
 #pragma once
 
 #include "i2c.h"
+#include <stdexcept>
 
 namespace mraa {
 
@@ -48,11 +49,17 @@ class I2c {
          * @param raw Whether to disable pinmapper for your board
          */
         I2c(int bus, bool raw=false) {
-            if (raw)
+            if (raw) {
                 m_i2c = mraa_i2c_init_raw(bus);
-            else
+            }
+            else {
                 m_i2c = mraa_i2c_init(bus);
+            }
+            if (m_i2c == NULL) {
+                throw std::invalid_argument("Invalid i2c bus");
+            }
         }
+
         /**
          * Closes the I2c Bus used. This does not guarrantee the bus will not
          * be usable by anyone else or communicates this disconnect to any
@@ -61,17 +68,19 @@ class I2c {
         ~I2c() {
             mraa_i2c_stop(m_i2c);
         }
+
         /**
          * Sets the i2c Frequency for communication. Your board may not support
          * the set frequency. Anyone can change this at any time and this will
          * affect every slave on the bus
          *
-         * @param hz Frequency to set the bus to in hz
+         * @param mode Frequency to set the bus to
          * @return Result of operation
          */
-        mraa_result_t frequency(int hz) {
-            return mraa_i2c_frequency(m_i2c, hz);
+        mraa_result_t frequency(mraa_i2c_mode_t mode) {
+            return mraa_i2c_frequency(m_i2c, mode);
         }
+
         /**
          * Set the slave to talk to, typically called before every read/write
          * operation
@@ -79,72 +88,92 @@ class I2c {
          * @param address Communicate to the i2c slave on this address
          * @return Result of operation
          */
-        mraa_result_t address(int address) {
+        mraa_result_t address(uint8_t address) {
             return mraa_i2c_address(m_i2c, address);
         }
+
         /**
          * Read exactly one byte from the bus
          *
          * @return char read from the bus
          */
-        unsigned char read() {
-            return (unsigned char) mraa_i2c_read_byte(m_i2c);
-        }
-        /**
-         * Read mutliple bytes from the bus
-         *
-         * @param data Buffer to write into
-         * @param length Size of read
-         * @return length of the read or 0 if failed
-         */
-        int read(char *data, size_t length) {
-            return mraa_i2c_read(m_i2c, (uint8_t*) data, (int) length);
-        }
-	/**
-	 * Read length bytes from the bus, and return as a std::string note
-	 * that this is not a null terminated string
-	 *
-	 * @param length Size of read to make
-	 * @return pointer to std::string
-	 */
-        std::string read(size_t length) {
-            char* data = (char*) malloc(sizeof(char) * length);
-            mraa_i2c_read(m_i2c, (uint8_t*) data, (int) length);
-            std::string str(data, (int) length);
-            free(data);
-            return str;
-        }
-        /**
-         * Write one byte to the bus
-         *
-         * @param data Buffer to send on the bus
-         * @param length Size of buffer to send
-         * @return Result of operation
-         */
-        mraa_result_t write(char* data, size_t length) {
-            return mraa_i2c_write(m_i2c, (const unsigned char *)data, (int) length);
+        uint8_t readByte() {
+            return (uint8_t) mraa_i2c_read_byte(m_i2c);
         }
 
         /**
-         * Write to an i2c register
+	 * Read length bytes from the bus into *data pointer
+         *
+         * @param data Data to read into
+         * @param length Size of read in bytes to make
+         * @return length of read, should match length
+         */
+        int read(uint8_t *data, int length) {
+            return mraa_i2c_read(m_i2c, data, length);
+        }
+
+        /**
+         * Read byte from an i2c register
+         *
+         * @param reg Register to read from
+         * @return char read from register
+         */
+        uint8_t readReg(uint8_t reg) {
+            return mraa_i2c_read_byte_data(m_i2c, reg);
+        }
+
+        /**
+         * Read word from an i2c register
+         *
+         * @param reg Register to read from
+         * @return char read from register
+         */
+        uint16_t readWordReg(uint8_t reg) {
+            return mraa_i2c_read_word_data(m_i2c, reg);
+        }
+
+        /**
+         * Write a byte on the bus
+         *
+         * @param data The byte to send on the bus
+         * @return Result of operation
+         */
+        mraa_result_t writeByte(uint8_t data) {
+            return mraa_i2c_write_byte(m_i2c, data);
+        }
+
+        /**
+         * Write length bytes to the bus, the first byte in the array is the
+         * command/register to write
+         *
+         * @param data Buffer to send on the bus, first byte is i2c command
+         * @param length Size of buffer to send
+         * @return Result of operation
+         */
+        mraa_result_t write(const uint8_t* data, int length) {
+            return mraa_i2c_write(m_i2c, data, length);
+        }
+
+        /**
+         * Write a byte to an i2c register
          *
          * @param reg Register to write to
          * @param data Value to write to register
          * @return Result of operation
          */
-        mraa_result_t writeReg(char reg, char data) {
-            const unsigned char buf[2] = {(unsigned char) reg, (unsigned char) data};
-            return mraa_i2c_write(m_i2c, buf, 2);
+        mraa_result_t writeReg(uint8_t reg, uint8_t data) {
+            return mraa_i2c_write_byte_data(m_i2c, data, reg);
         }
 
         /**
-         * Write multiple bytes to the bus
+         * Write a word to an i2c register
          *
-         * @param data The byte to send on the bus
+         * @param reg Register to write to
+         * @param data Value to write to register
          * @return Result of operation
          */
-        mraa_result_t write(char data) {
-            return mraa_i2c_write_byte(m_i2c, data);
+        mraa_result_t writeWordReg(uint8_t reg, uint16_t data) {
+            return mraa_i2c_write_word_data(m_i2c, data, reg);
         }
     private:
         mraa_i2c_context m_i2c;

api/mraa/pwm.hpp

@@ -25,6 +25,7 @@
 #pragma once
 
 #include "pwm.h"
+#include <stdexcept>
 
 namespace mraa {
 
@@ -41,18 +42,26 @@ class Pwm {
          * instanciates a PWM object on a pin
          *
          * @param pin the pin number used on your board
-         * @param chipid the pwmchip to use, use only in raw mode
          * @param owner if you are the owner of the pin the destructor will
+         * @param chipid the pwmchip to use, use only in raw mode
          * unexport the pin from sysfs, default behaviour is you are the owner
          * if the pinmapper exported it
          */
-        Pwm(int pin, int chipid=-1, bool owner = true) {
-            if (chipid == -1)
+        Pwm(int pin, bool owner=true, int chipid=-1) {
+            if (chipid == -1) {
                 m_pwm = mraa_pwm_init(pin);
-            else
+            }
+            else {
                 m_pwm = mraa_pwm_init_raw(pin, chipid);
-            if (!owner)
+            }
+
+            if (m_pwm == NULL) {
+                throw std::invalid_argument("Error initialising PWM on pin");
+            }
+
+            if (!owner) {
                 mraa_pwm_owner(m_pwm, 0);
+            }
         }
         /**
          * Pwm destructor

api/mraa/spi.h

@@ -26,7 +26,7 @@
 
 /**
  * @file
- * @brief System Packet Interface
+ * @brief Serial Peripheral Interface
  *
  * This file defines the spi interface for libmraa. A Spi object in libmraa
  * represents a spidev device. Linux spidev devices are created per spi bus and
@@ -48,7 +48,7 @@ extern "C" {
 #include "common.h"
 
 /**
- * MRAA supported platform types
+ * MRAA SPI Modes
  */
 typedef enum {
     MRAA_SPI_MODE0 = 0, /**< CPOL = 0, CPHA = 0, Clock idle low, data is clocked in on rising edge, output data (change) on falling edge */
@@ -70,6 +70,15 @@ typedef struct _spi* mraa_spi_context;
  */
 mraa_spi_context mraa_spi_init(int bus);
 
+/**
+ * Initialise SPI_context without any board configuration, selects a bus and a mux.
+ *
+ * @param bus Bus to use as listed by spidev
+ * @param cs Chip select to use as listed in spidev
+ * @return Spi context or NULL
+ */
+mraa_spi_context mraa_spi_init_raw(unsigned int bus, unsigned int cs);
+
 /**
  * Set the SPI device mode. see spidev 0-3.
  *
@@ -96,7 +105,7 @@ mraa_result_t mraa_spi_frequency(mraa_spi_context dev, int hz);
 uint8_t mraa_spi_write(mraa_spi_context dev, uint8_t data);
 
 /** Write Buffer of bytes to the SPI device. The pointer return has to be
- * free'd by the caller.
+ * free'd by the caller. It will return a NULL pointer in cases of error.
  *
  * @param dev The Spi context
  * @param data to send
@@ -105,6 +114,17 @@ uint8_t mraa_spi_write(mraa_spi_context dev, uint8_t data);
  */
 uint8_t* mraa_spi_write_buf(mraa_spi_context dev, uint8_t* data, int length);
 
+/** Transfer Buffer of bytes to the SPI device. Both send and recv buffers
+ * are passed in
+ *
+ * @param dev The Spi context
+ * @param data to send
+ * @param rxbuf buffer to recv data back, may be NULL
+ * @param length elements within buffer, Max 4096
+ * @return Result of operation
+ */
+mraa_result_t mraa_spi_transfer_buf(mraa_spi_context dev, uint8_t* data, uint8_t* rxbuf, int length);
+
 /**
  * Change the SPI lsb mode
  *

api/mraa/spi.hpp

@@ -25,11 +25,23 @@
 #pragma once
 
 #include "spi.h"
+#include <stdexcept>
 
 namespace mraa {
 
 /**
- * @brief API to System Packet Interface
+ * MRAA SPI Modes
+ */
+typedef enum {
+    SPI_MODE0 = 0, /**< CPOL = 0, CPHA = 0, Clock idle low, data is clocked in on rising edge, output data (change) on falling edge */
+    SPI_MODE1 = 1, /**< CPOL = 0, CPHA = 1, Clock idle low, data is clocked in on falling edge, output data (change) on rising edge */
+    SPI_MODE2 = 2, /**< CPOL = 1, CPHA = 0, Clock idle low, data is clocked in on falling edge, output data (change) on rising edge */
+    SPI_MODE3 = 3, /**< CPOL = 1, CPHA = 1, Clock idle low, data is clocked in on rising, edge output data (change) on falling edge */
+} Spi_Mode;
+
+
+  /**
+ * @brief API to Serial Peripheral Interface
  *
  * This file defines the SPI interface for libmraa
  *
@@ -44,22 +56,29 @@ class Spi {
          */
         Spi(int bus) {
             m_spi = mraa_spi_init(bus);
+
+            if (m_spi == NULL) {
+                throw std::invalid_argument("Error initialising SPI bus");
+            }
         }
+
         /**
          * Closes spi bus
          */
         ~Spi() {
             mraa_spi_stop(m_spi);
         }
+
         /**
          * Set the SPI device mode. see spidev0-3
          *
          * @param mode the mode. See Linux spidev doc
          * @return Result of operation
          */
-        mraa_result_t mode(mraa_spi_mode_t mode) {
-            return mraa_spi_mode(m_spi, mode);
+        mraa_result_t mode(Spi_Mode mode) {
+            return mraa_spi_mode(m_spi, (mraa_spi_mode_t) mode);
         }
+
         /**
          * Set the SPI device operating clock frequency
          *
@@ -69,25 +88,45 @@ class Spi {
         mraa_result_t frequency(int hz) {
             return mraa_spi_frequency(m_spi, hz);
         }
+
         /**
          * Write single byte to the SPI device
          *
          * @param data the byte to send
          * @return data received on the miso line
          */
-        char write(char data) {
-            return (char) mraa_spi_write(m_spi, (uint8_t) data);
+        uint8_t writeByte(uint8_t data) {
+            return mraa_spi_write(m_spi, (uint8_t) data);
         }
+
         /**
-         * Write buffer of bytes to SPI device
+         * Write buffer of bytes to SPI device The pointer return has to be
+	 * free'd by the caller. It will return a NULL pointer in cases of
+	 * error
+         *
+         * @param txBuf buffer to send
+         * @param length size of buffer to send
+         * @return uint8_t* data received on the miso line. Same length as passed in
+         */
+        uint8_t* write(uint8_t* txBuf, int length) {
+            return mraa_spi_write_buf(m_spi, txBuf, length);
+        }
+
+#ifndef SWIG
+        /**
+         * Transfer data to and from SPI device Receive pointer may be null if
+         * return data is not needed.
          *
          * @param data buffer to send
+         * @param rxBuf buffer to optionally receive data from spi device
          * @param length size of buffer to send
-         * @return char* data received on the miso line. Same length as passed in
+         * @return Result of operation
          */
-        char* write(char* data, size_t length) {
-            return (char*) mraa_spi_write_buf(m_spi, (uint8_t *) data, (int) length);
+        mraa_result_t transfer(uint8_t* txBuf, uint8_t* rxBuf, int length) {
+            return mraa_spi_transfer_buf(m_spi, txBuf, rxBuf, length);
         }
+#endif
+
         /**
          * Change the SPI lsb mode
          *
@@ -97,6 +136,7 @@ class Spi {
         mraa_result_t lsbmode(bool lsb) {
             return mraa_spi_lsbmode(m_spi, (mraa_boolean_t) lsb);
         }
+
         /**
          * Set bits per mode on transaction, default is 8
          *
@@ -106,7 +146,8 @@ class Spi {
         mraa_result_t bitPerWord(unsigned int bits) {
             return mraa_spi_bit_per_word(m_spi, bits);
         }
-            private:
-                mraa_spi_context m_spi;
-        };
+
+    private:
+        mraa_spi_context m_spi;
+};
 }

api/mraa/types.h

@@ -40,10 +40,105 @@ typedef enum {
     MRAA_INTEL_GALILEO_GEN1 = 0, /**< The Generation 1 Galileo platform (RevD) */
     MRAA_INTEL_GALILEO_GEN2 = 1, /**< The Generation 2 Galileo platform (RevG/H) */
     MRAA_INTEL_EDISON_FAB_C = 2, /**< The Intel Edison (FAB C) */
+    MRAA_INTEL_DE3815 = 3, /**< The Intel DE3815 Baytrail NUC */
+    MRAA_INTEL_MINNOWBOARD_MAX = 4, /**< The Intel Minnow Board Max */
+    MRAA_RASPBERRY_PI_B = 5, /**< The Raspberry PI Model B */
 
     MRAA_UNKNOWN_PLATFORM = 99 /**< An unknown platform type, typically will load INTEL_GALILEO_GEN1 */
 } mraa_platform_t;
 
+/**
+ * Intel edison miniboard numbering enum
+ */
+typedef enum {
+    MRAA_INTEL_EDISON_MINIBOARD_J17_1 = 0,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_5 = 4,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_7 = 6,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_8 = 7,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_9 = 8,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_10 = 9,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_11 = 10,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_12 = 11,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_14 = 13,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_1 = 14,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_2 = 15,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_6 = 19,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_7 = 20,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_8 = 21,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_10 = 23,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_11 = 24,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_12 = 25,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_13 = 26,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_4 = 31,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_5 = 32,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_6 = 33,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_8 = 35,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_9 = 36,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_10 = 37,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_11 = 38,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_12 = 39,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_13 = 40,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_14 = 41,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_3 = 44,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_4 = 45,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_5 = 46,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_6 = 47,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_7 = 48,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_8 = 49,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_9 = 50,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_10 = 51,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_11 = 52,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_12 = 53,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_13 = 54,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_14 = 55
+} mraa_intel_edison_miniboard_t;
+
+/**
+ * Intel Edison raw GPIO numbering enum
+ */
+typedef enum {
+    MRAA_INTEL_EDISON_GP182 = 0,
+    MRAA_INTEL_EDISON_GP135 = 4,
+    MRAA_INTEL_EDISON_GP27 = 6,
+    MRAA_INTEL_EDISON_GP20 = 7,
+    MRAA_INTEL_EDISON_GP28 = 8,
+    MRAA_INTEL_EDISON_GP111 = 0,
+    MRAA_INTEL_EDISON_GP109 = 10,
+    MRAA_INTEL_EDISON_GP115 = 11,
+    MRAA_INTEL_EDISON_GP128 = 13,
+    MRAA_INTEL_EDISON_GP13 = 14,
+    MRAA_INTEL_EDISON_GP165 = 15,
+    MRAA_INTEL_EDISON_GP19 = 19,
+    MRAA_INTEL_EDISON_GP12 = 20,
+    MRAA_INTEL_EDISON_GP183 = 21,
+    MRAA_INTEL_EDISON_GP110 = 23,
+    MRAA_INTEL_EDISON_GP114 = 24,
+    MRAA_INTEL_EDISON_GP129 = 25,
+    MRAA_INTEL_EDISON_GP130 = 26,
+    MRAA_INTEL_EDISON_GP44 = 31,
+    MRAA_INTEL_EDISON_GP46 = 32,
+    MRAA_INTEL_EDISON_GP48 = 33,
+    MRAA_INTEL_EDISON_GP131 = 35,
+    MRAA_INTEL_EDISON_GP14 = 36,
+    MRAA_INTEL_EDISON_GP40 = 37,
+    MRAA_INTEL_EDISON_GP43 = 38,
+    MRAA_INTEL_EDISON_GP77 = 39,
+    MRAA_INTEL_EDISON_GP82 = 40,
+    MRAA_INTEL_EDISON_GP83 = 41,
+    MRAA_INTEL_EDISON_GP134 = 44,
+    MRAA_INTEL_EDISON_GP45 = 45,
+    MRAA_INTEL_EDISON_GP47 = 46,
+    MRAA_INTEL_EDISON_GP49 = 47,
+    MRAA_INTEL_EDISON_GP15 = 48,
+    MRAA_INTEL_EDISON_GP84 = 49,
+    MRAA_INTEL_EDISON_GP42 = 50,
+    MRAA_INTEL_EDISON_GP41 = 51,
+    MRAA_INTEL_EDISON_GP78 = 52,
+    MRAA_INTEL_EDISON_GP79 = 53,
+    MRAA_INTEL_EDISON_GP80 = 54,
+    MRAA_INTEL_EDISON_GP81 = 55
+} mraa_intel_edison_t;
+
 /**
  * MRAA return codes
  */
@@ -66,38 +161,27 @@ typedef enum {
 } mraa_result_t;
 
 /**
- * This function attempts to set the mraa process to a given priority and the
- * scheduler to SCHED_RR. Highest * priority is typically 99 and minimum is 0.
- * This function * will set to MAX if * priority is > MAX. Function will return
- * -1 on failure.
- *
- * @param priority Value from typically 0 to 99
- * @return The priority value set
+ * Enum representing different possible modes for a pin.
  */
-int mraa_set_priority(const unsigned int priority);
-
-/** Get the version string of mraa autogenerated from git tag
- *
- * The version returned may not be what is expected however it is a reliable
- * number associated with the git tag closest to that version at build time
- *
- * @return version string from version.h
- */
-const char* mraa_get_version();
+typedef enum {
+    MRAA_PIN_VALID       = 0, /**< Pin Valid */
+    MRAA_PIN_GPIO        = 1, /**< General Purpose IO */
+    MRAA_PIN_PWM         = 2, /**< Pulse Width Modulation */
+    MRAA_PIN_FAST_GPIO   = 3, /**< Faster GPIO */
+    MRAA_PIN_SPI         = 4, /**< SPI */
+    MRAA_PIN_I2C         = 5, /**< I2C */
+    MRAA_PIN_AIO         = 6, /**< Analog in */
+    MRAA_PIN_UART        = 7  /**< UART */
+} mraa_pinmodes_t;
 
 /**
- * Print a textual representation of the mraa_result_t
- *
- * @param result the result to print
+ * Enum reprensenting different i2c speeds/modes
  */
-void mraa_result_print(mraa_result_t result);
-
-/**
- * Get platform type, board must be initialised.
- *
- * @return mraa_platform_t Platform type enum
- */
-mraa_platform_t mraa_get_platform_type();
+typedef enum {
+    MRAA_I2C_STD =  0, /**< up to 100Khz */
+    MRAA_I2C_FAST = 1, /**< up to 400Khz */
+    MRAA_I2C_HIGH = 2  /**< up to 3.4Mhz */
+} mraa_i2c_mode_t;
 
 #ifdef __cplusplus
 }

api/mraa/uart.h

@@ -54,6 +54,15 @@ typedef struct _uart* mraa_uart_context;
  */
 mraa_uart_context mraa_uart_init(int uart);
 
+/**
+ * Get Char pointer with tty device path within Linux
+ * For example. Could point to "/dev/ttyS0"
+ *
+ * @param dev uart context
+ * @return char pointer of device path
+ */
+char* mraa_uart_get_dev_path(mraa_uart_context dev);
+
 #ifdef __cplusplus
 }
 #endif

api/mraa/uart.hpp

@@ -25,6 +25,7 @@
 #pragma once
 
 #include "uart.h"
+#include <stdexcept>
 
 namespace mraa {
 
@@ -43,6 +44,10 @@ class Uart {
          */
         Uart(int uart) {
             m_uart = mraa_uart_init(uart);
+
+            if (m_uart == NULL) {
+                throw std::invalid_argument("Error initialising UART");
+            }
         }
         /**
          * Uart destructor
@@ -50,6 +55,17 @@ class Uart {
         ~Uart() {
             return;
         }
+
+        /**
+         * Get string with tty device path within Linux
+         * For example. Could point to "/dev/ttyS0"
+         *
+         * @return char pointer of device path
+         */
+        std::string getDevicePath() {
+            std::string ret_val(mraa_uart_get_dev_path(m_uart));
+            return ret_val;
+        }
     private:
         mraa_uart_context m_uart;
 };

cmake/Toolchains/oe-sdk_cross.cmake

@@ -0,0 +1,19 @@
+# this toolchain file comes from gnuradio project
+
+set( CMAKE_SYSTEM_NAME Linux )
+#set( CMAKE_C_COMPILER  $ENV{CC} )
+#set( CMAKE_CXX_COMPILER  $ENV{CXX} )
+string(REGEX MATCH "sysroots/([a-zA-Z0-9]+)" CMAKE_SYSTEM_PROCESSOR $ENV{SDKTARGETSYSROOT})
+string(REGEX REPLACE "sysroots/" "" CMAKE_SYSTEM_PROCESSOR ${CMAKE_SYSTEM_PROCESSOR})
+set( CMAKE_CXX_FLAGS $ENV{CXXFLAGS}  CACHE STRING "" FORCE )
+set( CMAKE_C_FLAGS $ENV{CFLAGS} CACHE STRING "" FORCE ) #same flags for C sources
+set( CMAKE_LDFLAGS_FLAGS ${CMAKE_CXX_FLAGS} CACHE STRING "" FORCE ) #same flags for C sources
+set( CMAKE_LIBRARY_PATH ${OECORE_TARGET_SYSROOT}/usr/lib )
+set( CMAKE_FIND_ROOT_PATH $ENV{OECORE_TARGET_SYSROOT} $ENV{OECORE_NATIVE_SYSROOT} )
+set( CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER )
+set( CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY )
+set( CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY )
+set( CMAKE_INSTALL_PREFIX $ENV{OECORE_TARGET_SYSROOT}/usr CACHE STRING "" FORCE)
+set( ORC_INCLUDE_DIRS $ENV{OECORE_TARGET_SYSROOT}/usr/include/orc-0.4 )
+set( ORC_LIBRARY_DIRS $ENV{OECORE_TARGET_SYSROOT}/usr/lib )
+

cmake/modules/Copyright.txt

@@ -0,0 +1,57 @@
+CMake - Cross Platform Makefile Generator
+Copyright 2000-2015 Kitware, Inc.
+Copyright 2000-2011 Insight Software Consortium
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+* Redistributions of source code must retain the above copyright
+  notice, this list of conditions and the following disclaimer.
+
+* Redistributions in binary form must reproduce the above copyright
+  notice, this list of conditions and the following disclaimer in the
+  documentation and/or other materials provided with the distribution.
+
+* Neither the names of Kitware, Inc., the Insight Software Consortium,
+  nor the names of their contributors may be used to endorse or promote
+  products derived from this software without specific prior written
+  permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+------------------------------------------------------------------------------
+
+The above copyright and license notice applies to distributions of
+CMake in source and binary form.  Some source files contain additional
+notices of original copyright by their contributors; see each source
+for details.  Third-party software packages supplied with CMake under
+compatible licenses provide their own copyright notices documented in
+corresponding subdirectories.
+
+------------------------------------------------------------------------------
+
+CMake was initially developed by Kitware with the following sponsorship:
+
+ * National Library of Medicine at the National Institutes of Health
+   as part of the Insight Segmentation and Registration Toolkit (ITK).
+
+ * US National Labs (Los Alamos, Livermore, Sandia) ASC Parallel
+   Visualization Initiative.
+
+ * National Alliance for Medical Image Computing (NAMIC) is funded by the
+   National Institutes of Health through the NIH Roadmap for Medical Research,
+   Grant U54 EB005149.
+
+ * Kitware, Inc.

cmake/modules/LICENSE.LGPL

@@ -0,0 +1,504 @@
+		  GNU LESSER GENERAL PUBLIC LICENSE
+		       Version 2.1, February 1999
+
+ Copyright (C) 1991, 1999 Free Software Foundation, Inc.
+ 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+[This is the first released version of the Lesser GPL.  It also counts
+ as the successor of the GNU Library Public License, version 2, hence
+ the version number 2.1.]
+
+			    Preamble
+
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+
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+
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+    modify it under the terms of the GNU Lesser General Public
+    License as published by the Free Software Foundation; either
+    version 2.1 of the License, or (at your option) any later version.
+
+    This library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Lesser General Public License for more details.
+
+    You should have received a copy of the GNU Lesser General Public
+    License along with this library; if not, write to the Free Software
+    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
+
+Also add information on how to contact you by electronic and paper mail.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the library, if
+necessary.  Here is a sample; alter the names:
+
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the
+  library `Frob' (a library for tweaking knobs) written by James Random Hacker.
+
+  <signature of Ty Coon>, 1 April 1990
+  Ty Coon, President of Vice
+
+That's all there is to it!
+
+

cmake/modules/TargetArch.cmake

@@ -2,6 +2,13 @@
 # https://qt.gitorious.org/qt/qtbase/blobs/master/src/corelib/global/qprocessordetection.h
 # Currently handles arm (v5, v6, v7), x86 (32/64), ia64, and ppc (32/64)
 
+# This file is under the terms of the GNU Lesser General Public License version
+# 2.1 as published by the Free Software Foundation and appearing in the file
+# LICENSE.LGPL included in the packaging of this file. Please review the
+# following information to ensure the GNU Lesser General Public License version
+# 2.1 requirements will be met:
+# http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
+
 # Regarding POWER/PowerPC, just as is noted in the Qt source,
 # "There are many more known variants/revisions that we do not handle/detect."
 

docs/building.md

@@ -2,12 +2,19 @@ Building libmraa                         {#building}
 ===============
 
 libmraa uses cmake in order to make compilation relatively painless. Cmake runs
-build out of tree so the recommended way is to clone from git and make a build/ directory.
+build out of tree so the recommended way is to clone from git and make a build/
+directory.
 
-You'll need swig version 3.0.1+, currently I'm using
-8d226e39dc7a958013ff9ffd15e231ef206ba265 from the swig master branch. This is
-only required for javascript support and can be disabled with a cmake define
-(see below).
+## Build dependencies
+Not all these are required but if you're unsure of what you're doing this is
+what you'll need:
+* swig 3.0.4+
+* git
+* python 2.7 or 3.4+ (you'll need not just the interpreter but python-dev)
+* nodejs 0.10.x (you'll need not just the interneter but nodejs-dev)
+* cmake 2.8.8+
+
+## Basic build steps
 
 ~~~~~~~~~~~~~{.sh}
 mkdir build
@@ -16,19 +23,78 @@ cmake ..
 make
 ~~~~~~~~~~~~~
 
-Our cmake configure has a number of options, `cmake -i` will ask you all sorts
-of interesting questions, you can disable swig modules, build documentation
-etc...
+If this goes wrong and you have all the dependencies installed, then please
+file an issue with the full output of `cmake ..` and `make` or however far you
+got.
 
-Few recommended options:
+## Configuration flags
+
+Our cmake configure has a number of options, cmake-gui or ccmake (cmake -i is
+no longer with us :() can show you all the options. A few of the more common
+ones are listed below - note that when the option starts with CMAKE_ it's an
+option that is made available by cmake and will be similar in all cmake
+projects. You need to add them after `cmake` but before `..`.
+
+A few recommended options:
 Changing install path from /usr/local to /usr
--DCMAKE_INSTALL_PREFIX:PATH=/usr
+ -DCMAKE_INSTALL_PREFIX:PATH=/usr
 
-Building debug build:
--DCMAKE_BUILD_TYPE=DEBUG
+Building debug build - adds -g and disables optimisations - this will force a full rebuild:
+ -DCMAKE_BUILD_TYPE=DEBUG
 
 Using clang instead of gcc:
- -DCMAKE_C_COMPILER=/usr/bin/clang -DCMAKE_CXX_COMPILER=/usr/bin/clang
+ -DCMAKE_C_COMPILER=/usr/bin/clang -DCMAKE_CXX_COMPILER=/usr/bin/clang++
 
-Building with an older version of swig (swig 2.0+) requires the disabling of javascript:
+Building with an older version of swig (swig < 3.0.2) requires the disabling of javascript:
  -DBUILDSWIGNODE=OFF
+
+Disabling python module building
+ -DBUILDSWIGPYTHON=OFF
+
+Building doc, this will require sphinx & doxygen
+ -BUILDDOC=ON
+
+## Dependancies continued
+
+You'll need at least swig version 3.0.2 and we recommend 3.0.4 to build the
+javascript & python modules. If your version of SWIG is older than this then
+please see below for disabling SWIGNODE otherwise you will get a weird build
+failure when building the js module. The python module builds with swig 2.x.
+
+The basic build steps are as follow, we'll assume you're building from git,
+note that if you compile with git installed your version of mraa will be tagged
+-dirty. This simply means git wasn't installed or that you where building form
+a tarball. You can modify build/src/version.c before running make if this is
+incorrect. The instructions listed here all assume that build/ is an empty dir
+that lives inside the cloned repository of mraa.
+
+If you have multiple versions of python then mraa can get confused, we
+recommend using virtualenv to select which version of python you want. We test
+2.7 the most but swig will generate valid 3.x python code but we do not
+generally support building both at once.
+
+## Using a yocto/oe toolchain
+
+In order to compile with a yocto/oe toolchain use the following toolchain file.
+This works well on the edison 1.6 SDK. First source the environment file, then
+use our cmake toolchain file.
+
+~~~~~~~~~~~~~{.sh}
+source /opt/poky-edison/1.6/environment-setup-core2-32-poky-linux
+mkdir build
+cmake -DCMAKE_TOOLCHAIN_FILE=../cmake/Toolchains/oe-sdk_cross.cmake ..
+make
+~~~~~~~~~~~~~
+
+## Using coverity
+
+Static analysis is routinely performed using coverity on libmraa's codebase.
+This is the procedure to submit a build to coverity. You'll need to install
+coverity-submit for your OS.
+
+~~~~~~~~~~~~~{.sh}
+mkdir covbuild/ && cd covbuild
+cmake -DBUILDDOC=OFF -DBUILDSWIG=OFF ..
+cov-build --dir cov-int make
+tar caf mraa.tar.bz2 cov-int
+~~~~~~~~~~~~~

docs/contributing.md

@@ -15,3 +15,59 @@ on github.
 If you'd rather not use github you are more than welcome to send git formatted
 patches to brendan.le.foll@intel.com.
 
+Basic rules
+-----------
+- Your code must build
+- Commits must have a sign-off line by at least yourself
+- Commits must be named <file/module>: Some decent description
+- Try not to break master. In any commit.
+- Try to split commits up logically, you will be asked to rebase them if they
+  are not.
+- Try to stick to the established coding style regardless of your personal feeling for it!
+
+Code signing
+------------
+
+The sign-off is a simple line at the end of the explanation for the
+patch, which certifies that you wrote it or otherwise have the right to pass it
+on as an open-source patch.  The rules are pretty simple: if you can certify
+the below:
+
+        Developer's Certificate of Origin 1.1
+
+        By making a contribution to this project, I certify that:
+
+        (a) The contribution was created in whole or in part by me and I
+            have the right to submit it under the open source license
+            indicated in the file; or
+
+        (b) The contribution is based upon previous work that, to the best
+            of my knowledge, is covered under an appropriate open source
+            license and I have the right under that license to submit that
+            work with modifications, whether created in whole or in part
+            by me, under the same open source license (unless I am
+            permitted to submit under a different license), as indicated
+            in the file; or
+
+        (c) The contribution was provided directly to me by some other
+            person who certified (a), (b) or (c) and I have not modified
+            it.
+
+        (d) I understand and agree that this project and the contribution
+            are public and that a record of the contribution (including all
+            personal information I submit with it, including my sign-off) is
+            maintained indefinitely and may be redistributed consistent with
+            this project or the open source license(s) involved.
+
+then you just add a line saying
+
+	Signed-off-by: Random J Developer <random@developer.example.org>
+
+Using your real name (sorry, no pseudonyms or anonymous contributions.)
+
+Where to find us
+----------------
+
+Hop onto the freenode network on IRC and join #mraa. Please be patient as we're
+not always online.
+

docs/debugging.md

@@ -0,0 +1,30 @@
+Debugging libmraa                         {#debugging}
+=================
+
+This page contains a few debugging tip, when filing an issue please go through
+this list as if you don't it's the first thing we'll have to ask you to do.
+
+### Version
+
+Getting the exact version of libmraa you're running is really important to us.
+The best way to get this is to call mraa_get_version() or mraa.getVersion(). If
+mraa returns x.x.x-dirty then your version was not built from a git tree or you
+built out of tree (see our building doc) - or you don't have git installed.
+
+### Syslog
+
+mraa logs pretty much everything that goes wrong to syslog, these days it'll go
+to the systemd journal usually so check with `sudo journalctl -f` whilst
+running your app or check all libmraa messages with `journalctl -t libmraa`.
+Grab all the messages from the initialisation message right up to your last
+one, using a pastebin is always a good idea, I like dpaste.com. If your system
+does not have systemd likely your log is in /var/log/messages or similar.
+
+### Common Errors
+
+* Not running as root
+* Incorrect IO numbers, mraa uses physical connector pin numbering see your
+  platform doc for details
+* Unsuported platform
+* Using the wrong pin, check pin capabilities
+

docs/edison.md

@@ -1,11 +1,19 @@
 Intel Edison                            {#edison}
 =============
 
-Edison is a dual core Silvermont Atom clocked at 500MHz. The Edison
-also features 4GB of storage, 1GB ram and onboard wifi and bluetooth.
+Intel(R) Edison is a dual core Silvermont Atom(TM) clocked at 500MHz. The
+Edison also features 4GB of storage, 1GB ram and onboard wifi and bluetooth.
 
-Currently the Arduino breakout board is supported by libmraa.
+Currently Supported boards:
+- Intel Arduino board
+- Intel breakout board
 
+UART
+----
+On both the Arduino board and the breakout board, The avaible UART interface is on /dev/ttyMFD1
+
+Intel Arduino board
+-------------------
 The Edison used with the Arduino board has the following limitations
 in libmraa:
 
@@ -14,3 +22,72 @@ in libmraa:
 - SPI exposed is also used for the ADC. Try not to use your own CS.
 - ADC kernel module will return 12bit number but the ADC itself only has an
   accuracy of 10bits. This ADC is only included on the arduino board.
+- AIO pins are treated as 0-5 in mraa_aio_init() but as 14-19 for everything
+  else. Therefore use mraa_gpio_init(14) to use A0 as a Gpio
+
+Intel(R) breakout board
+-----------------------
+
+- Both I2C buses are avaible 1 & 6
+- IO on the miniboard is 1.8V
+
+Please see the following table on how the physical pins map to mraa pin numbers
+
+| MRAA Number | Physical Pin | Edison Pin    | Notes                   | Pinmode0 | Pinmode1   | Pinmode2 |
+|-------------|--------------|---------------|-------------------------|----------|------------|----------|
+| 0           | J17-1        | GP182         |                         | GPIO-182 | PWM2       |          |
+| 1           | J17-2        | NC            | Nothing from mraa       |          |            |          |
+| 2           | J17-3        | NC            | Nothing from mraa       |          |            |          |
+| 3           | J17-4        | VIN           | Nothing from mraa       |          |            |          |
+| 4           | J17-5        | GP135         |                         | GPIO-135 | UART       |          |
+| 5           | J17-6        | RCVR_MODE     | Nothing from mraa       |          |            |          |
+| 6           | J17-7        | GP27          |                         | GPIO-27  | I2C-6-SCL  |          |
+| 7           | J17-8        | GP20          |                         | GPIO-20  | I2C-1-SDA  |          |
+| 8           | J17-9        | GP28          |                         | GPIO-28  | I2C-6-SDA  |          |
+| 9           | J17-10       | GP111         |                         | GPIO-111 | SPI-5-CS1  |          |
+| 10          | J17-11       | GP109         |                         | GPIO-109 | SPI-5-SCK  |          |
+| 11          | J17-12       | GP115         |                         | GPIO-115 | SPI-5-MOSI |          |
+| 12          | J17-13       | OSC_CLK_OUT_0 | Nothing from mraa/check |          |            |          |
+| 13          | J17-14       | GP128         |                         | GPIO-128 | UART-1-CTS |          |
+| 14          | J18-1        | GP13          |                         | GPIO-13  | PWM1       |          |
+| 15          | J18-2        | GP165         |                         | GPIO-165 |            |          |
+| 16          | J18-3        | GPI_PWRBTN_N  | Nothing from mraa       |          |            |          |
+| 17          | J18-4        | MSIC_SLP_CLK2 | Nothing from mraa       |          |            |          |
+| 18          | J18-5        | V_VBAT_BKUP   | Nothing from mraa       |          |            |          |
+| 19          | J18-6        | GP19          |                         | GPIO-19  | I2C-1-SCL  |          |
+| 20          | J18-7        | GP12          | PWM0                    | GPIO-12  | PWM0       |          |
+| 21          | J18-8        | GP183         | PWM3                    | GPIO-183 | PWM3       |          |
+| 22          | J18-9        | NC            | Nothing from mraa       |          |            |          |
+| 23          | J18-10       | GP110         |                         | GPIO-110 | SPI-5-CS0  |          |
+| 24          | J18-11       | GP114         |                         | GPIO-114 | SPI-5-MISO |          |
+| 25          | J18-12       | GP129         |                         | GPIO-129 | UART-1-RTS |          |
+| 26          | J18-13       | GP130         |                         | GPIO-130 | UART-1-RX  |          |
+| 27          | J18-14       | FW_RCVR       | Nothing from mraa       |          |            |          |
+| 28          | J19-1        | NC            | Nothing from mraa       |          |            |          |
+| 29          | J19-2        | V_V1P80       | Nothing from mraa       |          |            |          |
+| 30          | J19-3        | GND           | Nothing from mraa       |          |            |          |
+| 31          | J19-4        | GP44          |                         | GPIO-44  |            |          |
+| 32          | J19-5        | GP46          |                         | GPIO-46  |            |          |
+| 33          | J19-6        | GP48          |                         | GPIO-48  |            |          |
+| 34          | J19-7        | RESET_OUT     | Nothing from mraa       |          |            |          |
+| 35          | J19-8        | GP131         |                         | GPIO-131 | UART-1-TX  |          |
+| 36          | J19-9        | GP14          |                         | GPIO-14  |            |          |
+| 37          | J19-10       | GP40          |                         | GPIO-40  | SSP2_CLK   |          |
+| 38          | J19-11       | GP43          |                         | GPIO-43  | SSP2_TXD   |          |
+| 39          | J19-12       | GP77          |                         | GPIO-77  | SD         |          |
+| 40          | J19-13       | GP82          |                         | GPIO-82  | SD         |          |
+| 41          | J19-14       | GP83          |                         | GPIO-83  | SD         |          |
+| 42          | J20-1        | V_VSYS        | Nothing from mraa       |          |            |          |
+| 43          | J20-2        | V_V3P30       | Nothing from mraa       |          |            |          |
+| 44          | J20-3        | GP134         |                         |          |            |          |
+| 45          | J20-4        | GP45          |                         | GPIO-45  |            |          |
+| 46          | J20-5        | GP47          |                         | GPIO-47  |            |          |
+| 47          | J20-6        | GP49          |                         | GPIO-49  |            |          |
+| 48          | J20-7        | GP15          |                         | GPIO-15  |            |          |
+| 49          | J20-8        | GP84          |                         | GPIO-84  | SD         |          |
+| 50          | J20-9        | GP42          |                         | GPIO-42  | SSP2_RXD   |          |
+| 51          | J20-10       | GP41          |                         | GPIO-41  | SSP2_FS    |          |
+| 52          | J20-11       | GP78          |                         | GPIO-78  | SD         |          |
+| 53          | J20-12       | GP79          |                         | GPIO-79  | SD         |          |
+| 54          | J20-13       | GP80          |                         | GPIO-80  | SD         |          |
+| 55          | J20-14       | GP81          |                         | GPIO-81  | SD         |          |

docs/galileorevd.md

@@ -1,7 +1,7 @@
 Galileo Gen 1 - Rev D                            {#galileorevd}
 =====================
 
-Galileo is a microcontroller board based on the Intel® Quark SoC X1000
+Galileo is a microcontroller board based on the Intel(R) Quark(TM) SoC X1000
 Application Processor, a 32-bit Intel Pentium-class system on a chip.
 
 The rev D board has the following limitations in libmraa:
@@ -9,3 +9,5 @@ The rev D board has the following limitations in libmraa:
 - gpio register access via /dev/uio is limited to pin2 and 3
 - gpio interupts will only work on GPIO_EDGE_BOTH
 - adc kernel module will return 12bit number. MRAA defaults shift this to 10bits
+- AIO pins are treated as 0-5 in mraa_aio_init() but as 14-19 for everything
+  else. Therefore use mraa_gpio_init(14) to use A0 as a Gpio

docs/galileorevh.md

@@ -1,14 +1,19 @@
 Galileo Gen 2 - Rev H                           {#galileorevh}
 =====================
 
-Galileo is a microcontroller board based on the Intel® Quark SoC X1000
+Galileo is a microcontroller board based on the Intel(R) Quark(TM) SoC X1000
 Application Processor, a 32-bit Intel Pentium-class system on a chip.
 
 The Gen 2 board has the following limitations in libmraa:
 
-- i2c is set at 400Khz speed cannot be changed without reloading kernel module
-- i2c bus is shared with multiple devices, scanning it usually fails
+- i2c is set at 400Khz speed cannot be changed without reloading kernel module,
+  the driver is intel_qrk_gip_i2c and the parameter is i2c_std_mode which must
+  be set to 1 in order to set the i2c bus speed to 100Khz
+- i2c bus is shared with multiple devices in kernel space, scanning it usually
+  fails
 - pwm period is set globally for all pwm channels, when changed this will halt
   all pwm channels
 - adc kernel module will return 12bit number but the ADC itself only has an
   accuracy of 10bits.
+- AIO pins are treated as 0-5 in mraa_aio_init() but as 14-19 for everything
+  else. Therefore use mraa_gpio_init(14) to use A0 as a Gpio

docs/index.md

@@ -1,11 +1,14 @@
-MRAA - Low Level Skeleton Library for Communication on Intel platforms
+libmraa - Low Level Skeleton Library for Communication on Intel platforms
 ==============
 
-Library in C/C++ to interface with Galileo & other Intel platforms, in a
-structured and sane API with port names/numbering that match boards & with
-bindings to javascript & python.
+Libmraa is a C/C++ library with bindings to javascript & python to interface
+with the IO on Galileo, Edison & other platforms, with a structured and sane
+API where port names/numbering matches the board that you are on. Use of
+libmraa does not tie you to specific hardware with board detection done at
+runtime you can create portable code that will work across the supported
+platforms.
 
-The intent is to make it easier for developers and sensor manufacturers to map
+The intent is to make it easier for developers and sensor manufacturers to map 
 their sensors & actuators on top of supported hardware and to allow control of
 low level communication protocol by high level languages & constructs.
 
@@ -36,24 +39,26 @@ Specific platform information for supported platforms is documented here:
 
 - @ref galileorevd
 - @ref galileorevh
+- @ref edison
+- @ref de3815
+- @ref minnowmax
+- @ref rasppib
 
-### ENV RECOMENDATIONS
+## DEBUGGING
 
-All of these are 'optional', however they are recommended. Only a C compiler,
-cmake, libm and pthreads are technically required to compile.
-
-- Swig 3.0.1+ built with node.js & python support (0.10.x)
-- doxygen
-- sphinx (requires doxygen)
-- pygments
+Sometimes it just doesn't want to work, let us try and help you, you can file
+issues in github or join us in #mraa on freenode IRC, hang around for a little
+while because we're not necessarily on 24/7, but we'll get back to you! Have a
+glance at our @debugging page too
 
 ## COMPILING
 
-More information on compiling is @ref building page
+More information on compiling is @ref building page.
 
 ## CONTRIBUTING
 
-Please see the @ref contributing page
+Please see the @ref contributing page, the @ref internals page may also be of
+use.
 
 ## API Changelog
 
@@ -61,6 +66,47 @@ This changelog is meant as a quick & rough guide to what has changed between
 versions. The API is now fairly stable but when new calls/features are added
 they are listed here. Anything pre 0.2.x is ignored.
 
+**0.6.0**
+  * add device path queries for uart
+  * add platform configuration querying
+  * gpio sample added
+  * improve i2c/spi write/read API for python & nodejs
+  * performance improvements on edison & galileo
+
+**0.5.4**
+  * pwm read_* fix introduced in 0.5.3
+  * improved npmpkg support
+
+**0.5.3**
+  * OE toolchain support added to CMake
+  * Various UART fixes
+  * SPI add CS exposure
+  * Remove functions from mraa.c into modules
+  * Rework of support for mmap
+  * Intel Edison MMAP support added. Read and Write
+  * I2C clean up, add cleaner functions
+  * MinnowBoard Max support added
+  * PWM period is written before duty
+  * Node GYP build supported added
+  * Add Get Platform Name function
+
+**0.5.2**
+  * pwm improvement & bugfix
+  * spi mraa_spi_bit_per_word fix
+  * new spi transfer function
+  * i2c object api uses uint8_t
+  * i2c readReg() calls added
+  * edison i2c bus now defaults to a sensible value
+  * edison uart enable support
+  * edison hardware CS exposed as IO10
+  * DE3815tykhe NUC support
+
+**0.5.1**
+  * Intel Edison - Mini breakout board support
+  * Change to use syslog throughout instead of printing to stderr.
+  * Fix misc issues brought up throuh coverity scans
+  * Clear up Analog call documentation
+
 **0.5.0**
   * Intel Edison - Arduino board support.
   * Boost Allowable i2c busses to 12

docs/intel_de3815.md

@@ -0,0 +1,38 @@
+Intel(R) NUC DE3815tykhe                            {#de3815}
+=============
+
+The DE3815 NUC Kit is a single core Atom(TM) clocked at 1.46GHz.
+http://www.intel.com/content/www/us/en/nuc/nuc-kit-de3815tykhe.html
+
+Interface notes
+---------------
+**GPIO** Not yet implemented.
+
+**PWM** Functionality for the PWM is provided by the `pwm_lpss` module `CONFIG_PWM_LPSS`
+
+**I2C** Depending on your system you may need to load `i2c-dev`
+
+Custom Solutions Header mapping
+-------------------------------
+Based on: http://downloadmirror.intel.com/23745/eng/DE3815TYBE_TechProdSpec06.pdf
+
+| MRAA Number | Physical Pin | Function     | Notes                |
+|-------------|--------------|--------------|----------------------|
+| 0           | 1            | 1.8V sby     |                      |
+| 1           | 2            | GND          |                      |
+| 2           | 3            | HDMI_CEC     |                      |
+| 3           | 4            | DMIC_CLK     |                      |
+| 4           | 5            | 3.3V sby     |                      |
+| 5           | 6            | DMIC_DATA    |                      |
+| 6           | 7            | Key (no pin) |                      |
+| 7           | 8            | SMB_ALERT#   |                      |
+| 8           | 9            | 5V sby (2A)  |                      |
+| 9           | 10           | SCI_SMI_GPIO |                      |
+| 10          | 11           | PWM[0]       | PWM Chip 0 Channel 0 |
+| 11          | 12           | PWM[1]       | PWM Chip 0 Channel 1 |
+| 12          | 13           | I2C0_CLK     | /dev/i2c-0 SCL       |
+| 13          | 14           | I2C0_DATA    | /dev/i2c-0 SDA       |
+| 14          | 15           | I2C1_CLK     | /dev/i2c-1 SCL       |
+| 15          | 16           | I2C1_DATA    | /dev/i2c-1-SDA       |
+| 16          | 17           | SMB_CLK      |                      |
+| 17          | 18           | SMB_DATA     |                      |

docs/internals.md

@@ -0,0 +1,178 @@
+libmraa Internals                       {#internals}
+=================
+
+For building see @ref building. This will describe the general internal build
+of libmraa and will be useful to developers who'd like to understand more of
+how libmraa works or who'd like to add additional platforms. The internals will
+deal with the C API as that is the low level API which libmraa is built around.
+Note that C++ is simply a header only wrapper of the C API.
+
+libmraa has the philosophy that the board mapping is what we typically use in
+the API with the execption of i2c/spi bus numbering as they are typically not
+labelled on boards and so we use the kernel numbering scheme. Whilst this can
+confuse some, it's typically not an issue as platforms rarely expose more than
+one of these for user use and so when this is the case, libmraa will always use
+the bus in the pinmapper. For example edison uses i2c #6 but since there is
+only one, libmraa will try to be helpful and everything is treated as 6 when
+doing a mraa_i2c_init and so when this is the case, libmraa will always use the
+bus in the pinmapper. For example edison uses i2c #6 but since there is only
+one, libmraa will try to be helpful and everything is treated as 6 when doing a
+mraa_i2c_init(). The _raw functions will override the pinmapper and can be
+accessed without a valid board configuration. This can be helpful either in
+development of platform configurations for mraa or when modifying kernels
+etc... The mechanism is used heavily internaly.
+
+In libmraa, all code is split into 7 modules, src/{i2c, spi, gpio, uart, pwm,
+aio and common}. These should be fairly self explanatory in goals/purpose but a
+few work in different ways. Public APIs are stored in api/ and internal headers
+are in include/
+
+### Logging ###
+
+Logging is now done purely in syslog(). Note that on platforms running systemd
+journald will intercept syslog(3) calls and log to the journal instead. You can
+set the log mask by using mraa_set_log_level(). Doing a DEBUG build of libmraa
+will also cause the DEBUG macro to be defined which will cause the syslog mask
+to be unset.
+
+### Contexts ###
+
+libmraa uses contexts to store all information, this context cannot be accessed
+by the user and so it's layout can and may be changed without warning to users.
+If an init() function fails it will return NULL and further calls with this
+context will lead to undefined behaviour.
+
+### Pinmapper ###
+
+The mraa_board_t is defined in mraa/common.h. It's a mostly static structure
+initialised during mraa_init(). The pinmap file in
+src/{arch}/{manufacturer}_{boardname}_{revision}.c then fills this array. It's
+also where platform hooks can be defined, functions that will be run at various
+'hook' points in the code.
+
+The mraa_pininfo_t structure needs to be set for the board pincount (set in a
+macro in the platform configuration header. Every pin will have a
+mraa_pincapabilities_t which will define what it can do. The doxygen doc
+explains how this works but it's essentially a bitfield which needs to be set
+for every capability the pin can have. Gpios can have multiple muxes which will
+be set at the gpio init before it can be toggled.
+
+### i2c ###
+
+I2c from userspace in GNU/Linux is handled by character devices handled by the
+kernel driver i2c-dev. For more details the i2c/dev-interface documentation
+file in the kernel is the place to go.
+
+In libmraa, we re-use part of a library - libi2c from RoadNarrows -
+i2c/smbus.c. This library simply makes it easier for us to handle the error
+conditions that can arrise when writing on i2c buses. Essentially the API is
+fairly simple consisting of writes & reads.
+
+Careful - on alot of platforms i2cdetect will often crash, for finding your i2c
+addresses please look at your sensors datasheet!
+
+### spi ###
+
+Mraa deals exclusively with spidev, so when we say bus we really mean bus +
+chip select from spidev. Spi(0) could lead to spidev5.1 and Spi(1) to
+spidev5.2. Typically on a micro using a random gpio as a chip select works
+well, and on some platforms if one is careful with threads this can work well
+with mraa. However when a kernel module shares the same bus as spidev (but on a
+different CS) this behaviour is *very* dangerous. Platforms such as galileo
+gen2 & edison + arduino breakout work this way. Mraa will not help you in using
+a non HW chip select, do so at your own peril!
+
+### gpio ###
+
+GPIO is probably the most complicated and odd module in libmraa. It is based on
+the gpiolib kernel driver framework which uses sysfs. There is a lot of good
+documentation in gpio/sysfs.txt in the kernel docs.
+
+The main issue is that gpios on hobbyist boards typically come with a number of
+muxers or level shifters and are often mapped in crazy ways. libmraa's goal is
+to make the label on your board match the API :) We hope that pleases you.
+
+Because boards are very different we use alot of platform hooks (@ref hooks) to
+make the initialisation work on all platforms. The hope is that simple
+platforms with no level shifters or expanders will work with just the pinmap
+definition.
+
+GPIOs are typically interfaced via sysfs because that's easier for us but we
+can also work with fast gpio. This is typically preffered to do mmap gpio
+access. This is however trickier and typically relies on lots of platform
+hooks. We do support by default to go hit /dev/mem or another device at
+specific addresses to toggle gpios which is how mmap access works on some
+boards.
+
+Note that in Linux gpios are numbered from ARCH_NR_GPIOS down. This means that
+if ARCH_NR_GPIOS is changed, the gpio numbering will change. In 3.18+ the
+default changed from 256 to 512, sadly the value cannot be viewed from
+userspace so we rely on the kernel version to extrapolate the likely value.
+
+### uart ###
+
+libmraa does not support UART/serial as there are many good libraries that do
+this already. In the future we may wrap or use one. However the class exists to
+set the pinmapper correctly for uart to work on some platforms.
+
+### pwm ###
+
+### aio ###
+
+AIO pins are numbered after GPIO pins. This means that on arduino style boards
+pin 14 is A0. Typically mraa will only support an ADC if a platform ships with
+one and has a good kernel module for it. extra i2c/spi ADCs can be supported
+via something like UPM but are unlikely to receive support in mraa at the moment.
+
+Note that giving mraa_aio_init(0) will literally query the pinmapper for
+board->gpio_count + 0 so you must place your aio pins after gpio_count. This is
+the default behaviour but can of course be overriden by advance function
+pointers. Whilst maybe not the sanest of defaults, most of the hobbyist boards
+we deal with follow a similar naming pattern to arduino or have no ADC so for
+now we have considered this sensible.
+
+### Initialisation ###
+
+mraa_init() needs to be called in order to initialise the platform files or
+'pinmap'. Because calling this is tedious libmraa uses a C constructor to run
+mraa_init on library load. This means that it is not possible to stop this
+running and all functino calls like mraa_set_log_level() will not work during
+mraa_init(). This feature is supported by most sane compilers & libcs but you
+can turn off CTORS in uclibc, though I've yet to find a configuration with
+someone doing that. mraa_init() can be called multiple times if you feel like
+being 'safe'.
+
+In the SWIG modulse mraa_init() is called during the %init stage of the module
+loading. This is simply to avoid mraa_init() running 'too' early, though I've
+never seen an issue in running it in a CTOR.
+
+### SWIG ###
+
+At the time when libmraa was created (still the case?) the only - working -
+API/wrapper generation tool that supported nodejs was SWIG. For more general
+information on swig please see the swig documentation.
+
+The src/{javascript, python} & src/mraa.i folders contain all the files for the
+swig generation. The C++ headers in api/mraa/ are given as input sources to
+SWIG. SWIG modules do not link to libmraa (although maybe that would be a good
+idea...)
+
+Typemaps are used heavily to map uint8_t* pointers to bytearrays and
+node_buffers. These are native python & nodejs types that represent uint8_t
+data the best and are very well supported in both languages. Argument
+conversions and memory allocations are performed so the performance of using
+these functions compared to the C/C++ equivalent will likely be a little lower,
+however it is much more natural than using carrays.i typemap library.
+
+### NPM ###
+
+mraa is published on NPM, there is a target to prebuild a mraa src tarball that
+can be built with node-gyp. The way this works is to use the mraa_LIB_SRCS
+array to generate a binding.gyp file from the skeleton binding.gyp.cmake in
+src/javascript. Because we don't expect most NPM users to have SWIG we
+precompile the src/mraajsJAVASCRIPT_wrap.cxx. The src/version.c is already
+known since this is a static tarball so we write that too. These files are
+placed not in a build/ dir but in the main mraa dir. You can then tar the dir
+up and send it to NPM. This is done automatically on every commit by our
+automated build system.
+

docs/minnow_max.md

@@ -0,0 +1,54 @@
+Intel(R) Minnowboard Max               {#minnowmax}
+========================
+MinnowBoard MAX is an open hardware embedded board designed with the Intel(R)
+Atom(TM) E38xx series SOC (Fromerly Bay Trail).
+
+For product overview and faq see
+http://www.minnowboard.org/faq-minnowboard-max/
+
+For technical details see http://www.elinux.org/Minnowboard:MinnowMax
+
+Supported Firmware
+------------------
+mraa has only been tested with 64 bit firmware version 0.73 or later.
+
+Interface notes
+---------------
+The low speed I/O connector supported as per table below.  This assumes default
+BIOS settings, as they are not dynamcially detected If any changes are mode
+(Device Manager -> System Setup -> South Cluster -> LPSS & CSS) them mraa calls
+will not behave as expected.
+
+Documentation shows i2c on bus #5, ACPI shows it on bus #6, but driver uses bus
+#7.
+
+**SPI operation is not currently supported**
+
+| MRAA Number | Physical Pin  | Function   | Sysfs GPIO | Notes                |
+|-------------|---------------|------------|------------|----------------------|
+| 1           | 1             | GND        |            |                      |
+| 2           | 2             | GND        |            |                      |
+| 3           | 3             | 5v         |            |                      |
+| 4           | 4             | 3.3v       |            |                      |
+| 5           | 5             | SPI_CS     | 220        | SPI (not supported)  |
+| 6           | 6             | UART1_TXD  | 225        | UART1                |
+| 7           | 7             | SPI_MISO   | 221        | SPI (not supported)  |
+| 8           | 8             | UART1_RXD  | 224        | UART1                |
+| 9           | 9             | SPI_MOSI   | 222        | SPI (not supported)  |
+| 10          | 10            | UART1_CTS  | 227        | GPIO                 |
+| 11          | 11            | SPI_CLK    | 223        | SPI (not supported)  |
+| 12          | 12            | UART1_RTS  | 226        | GPIO                 |
+| 13          | 13            | I2C_SCL    | 243        | /dev/i2c-7           |
+| 14          | 14            | I2S_CLK    | 216        | GPIO                 |
+| 15          | 15            | I2C_SDA    | 242        | /dev/i2c-7           |
+| 16          | 16            | I2S_FRM    | 217        | GPIO                 |
+| 17          | 17            | UART2_TXD  | 229        | UART2                |
+| 18          | 18            | I2S_DO     | 219        | GPIO                 |
+| 19          | 19            | UART2_RXD  | 228        | UART2                |
+| 20          | 20            | I2S_DI     | 218        | GPIO                 |
+| 21          | 21            | GPIO_S5_0  |  82        | GPIO                 |
+| 22          | 22            | PWM0       | 248        | PWM Chip 0 Channel 0 |
+| 23          | 23            | GPIO_S5_1  |  83        | GPIO                 |
+| 24          | 24            | PWM1       | 249        | PWM Chip 1 Channel 0 |
+| 25          | 25            | S5_4       |  84        | GPIO                 |
+| 26          | 26            | IBL_8254   | 208        | GPIO                 |

docs/npm.md

@@ -0,0 +1,31 @@
+mraa NPM pkg                        {#npmpkg}
+============
+
+What you are looking at is a tarball made after 'make npmpkg' has been run on
+our build system. It contains a few prebuilt files in order to build easily
+with node-gyp on most systems. Note that this is not the preffered way of
+building libmraa and if you'd like to contribute, please learn how the build
+system works and get your sources from git.
+
+Any patches for mraajsJAVASCRIPT_wrap.cxx or version.c will be ignored as these
+are automatically generated files. When you execute a build from node-gyp/npm
+you do not generate the mraajsJAVASCRIPT_wrap.cxx file but rather use one that
+we have generated for you.
+
+Recreating tarball
+------------------
+
+From a checkout of mraa you can do the following to 'generate' this tarball.
+It's important to not leave a .git directory as npm will then consider the
+tarball contains a full git tree. Also you need a top level dir which matches
+the npm pkg name so we create one with a symlink and add the 'h' flag to tar to
+follow simlinks.
+
+~~~~~~~~~~~~~{.sh}
+mkdir build
+cd build
+cmake -DBUILDSWIGNODE=ON  ..
+make npmpkg
+ln -s ../ mraa
+tar hczv --exclude='build*' --exclude='.gitignore' --exclude='.git' --exclude='build*/*' --exclude='.git/*' -f mraa.tar.gz mraa
+~~~~~~~~~~~~~

docs/platform-hooks.md

@@ -1,16 +1,25 @@
-Hooks can be defined per supported platform to allow for highly custom operations if needed.
-This feature of MRAA should only be used by developers defining the board definitions, NOT an end user.
+platform-hooks                             {#hooks}
+==============
+
+Hooks can be defined per supported platform to allow for highly custom
+operations if needed.  This feature of MRAA should only be used by developers
+defining the board definitions, NOT an end user.
 
 ##Types of Hooks
 
 ###REPLACE
-Defining a replace function will entirely replace the associate function. This should only be done if your new function can handle everything the mraa function would normally.
+Defining a replace function will entirely replace the associate function. This
+should only be done if your new function can handle everything the mraa
+function would normally.
 
 ###PRE
-Any functionality defined here will be performed when the main function is called.
+Any functionality defined here will be performed when the main function is
+called.
 
 ###POST
-Any functionality perfomed here is done just before the normal function returns. All post functions will have passed into them the return value that would normally be returned.
+Any functionality perfomed here is done just before the normal function
+returns. All post functions will have passed into them the return value that
+would normally be returned.
 
 ##Hooks
 ### GPIO

docs/raspberry_pi_b.md

@@ -0,0 +1,53 @@
+Raspberry Pi Model B    {#rasppib}
+====================
+
+The Raspberry Pi is based on the Broadcom BCM2835 system on a chip,
+which includes an ARM1176JZF-S 700 MHz processor, VideoCore IV GPU
+and was originally shipped with 256 megabytes of RAM, later 
+upgraded (Model B & Model B+) to 512 MB.
+
+Revision Support
+----------------
+Currently only rev 1 is supported.
+
+Interface notes
+---------------
+**GPIO** Supported on pin 6,10,11,12,14,15,17,21
+
+**PWM** Whilst the Raspberry Pi is meant to have 1 PWM channel this is currently not supported.
+
+**I2C** The blacklist for the kernel module will need to be removed and the `i2c-dev` needs to be loaded.
+
+**SPI** The blacklist for the kernel module needs to be removed and `spidev` loaded
+
+Pin Mapping
+-----------
+
+| MRAA Number | Physical Pin | Function |
+|-------------|--------------|----------|
+| 1           | P1-01        | 3V3 VCC  |
+| 2           | P1-02        | 5V VCC   |
+| 3           | P1-03        | I2C SDA  |
+| 4           | P1-04        | 5V VCC   |
+| 5           | P1-05        | I2C SCL  |
+| 6           | P1-06        | GND      |
+| 7           | P1-07        | GPIO(4)  |
+| 8           | P1-08        | UART TX  |
+| 9           | P1-09        | GND      |
+| 10           | P1-10        | UART RX  |
+| 11          | P1-11        | GPIO(17) |
+| 12          | P1-12        | GPIO(18) |
+| 13          | P1-13        | GPIO(21) |
+| 14          | P1-14        | GND      |
+| 15          | P1-15        | GPIO(22) |
+| 16          | P1-16        | GPIO(23) |
+| 17          | P1-17        | 3V3 VCC  |
+| 18          | P1-18        | GPIO(24) |
+| 19          | P1-19        | SPI MOSI |
+| 20          | P1-20        | GND      |
+| 21          | P1-21        | SPI MISO |
+| 22          | P1-22        | GPIO(25) |
+| 23          | P1-23        | SPI SCL  |
+| 24          | P1-24        | SPI CS0  |
+| 25          | P1-25        | GND      |
+| 26          | P1-26        | SPI CS1  |

examples/CMakeLists.txt

@@ -9,6 +9,7 @@ add_executable (spi_mcp4261 spi_mcp4261.c)
 add_executable (mmap-io2 mmap-io2.c)
 add_executable (blink_onboard blink_onboard.c)
 add_executable (uart_setup uart_setup.c)
+add_executable (gpio gpio.c)
 
 include_directories(${PROJECT_SOURCE_DIR}/api)
 
@@ -23,6 +24,7 @@ target_link_libraries (spi_mcp4261 mraa)
 target_link_libraries (mmap-io2 mraa)
 target_link_libraries (blink_onboard mraa)
 target_link_libraries (uart_setup mraa)
+target_link_libraries (gpio mraa)
 
 add_subdirectory (c++)
 

examples/blink_onboard.c

@@ -32,17 +32,20 @@ int
 main(int argc, char **argv)
 {
     mraa_platform_t platform = mraa_get_platform_type();
-    mraa_gpio_context gpio;
-    char board_name[] = "Some weird devboard that isn't recognised...";
+    mraa_gpio_context gpio, gpio_in = NULL;
+    char* board_name = mraa_get_platform_name();
     int ledstate = 0;
 
     switch (platform) {
         case MRAA_INTEL_GALILEO_GEN1:
-            strcpy(board_name, "Intel Galileo Gen1");
             gpio = mraa_gpio_init_raw(3);
             break;
-        case MRAA_INTEL_GALILEO_GEN2:
-            strcpy(board_name, "Intel Galileo Gen2");
+	case MRAA_INTEL_MINNOWBOARD_MAX:
+	    // there is no onboard LED that we can flash on the minnowboard max
+	    // but on the calamari lure pin 21 is an LED. If you don't have the
+	    // lure put an LED on pin 21
+	    gpio = mraa_gpio_init(21);
+            break;
         default:
             gpio = mraa_gpio_init(13);
     }
@@ -50,8 +53,28 @@ main(int argc, char **argv)
     fprintf(stdout, "Welcome to libmraa\n Version: %s\n Running on %s\n",
         mraa_get_version(), board_name);
 
+
+    if (gpio == NULL) {
+        fprintf(stdout, "Could not initilaize gpio\n");
+        return 1;
+    }
+
+    // on platforms with physical button use gpio_in
+    if (platform == MRAA_INTEL_MINNOWBOARD_MAX) {
+        gpio_in = mraa_gpio_init(14);
+	if (gpio_in != NULL) {
+            mraa_gpio_dir(gpio_in, MRAA_GPIO_IN);
+            // S1 on minnowboardmax's calamari lure maps to pin 14, SW1 != S1
+            fprintf(stdout, "Press and hold S1 to stop, Press SW1 to shutdown!\n");
+        }
+    }
+
     mraa_gpio_dir(gpio, MRAA_GPIO_OUT);
+
     for (;;) {
+        if (gpio_in != NULL && mraa_gpio_read(gpio_in) == 0) {
+            return 0;
+        }
         ledstate = !ledstate;
         mraa_gpio_write(gpio, !ledstate);
         sleep(1);

examples/c++/I2c-compass.cpp

@@ -95,7 +95,7 @@ int main ()
 {
     float direction = 0;
     int16_t x = 0, y = 0, z = 0;
-    char rx_tx_buf[MAX_BUFFER_LENGTH];
+    uint8_t rx_tx_buf[MAX_BUFFER_LENGTH];
 
 //! [Interesting]
     mraa::I2c* i2c;
@@ -116,7 +116,7 @@ int main ()
 
     while (running == 0) {
         i2c->address(HMC5883L_I2C_ADDR);
-        i2c->write(HMC5883L_DATA_REG);
+        i2c->writeByte(HMC5883L_DATA_REG);
 
         i2c->address(HMC5883L_I2C_ADDR);
         i2c->read(rx_tx_buf, DATA_REG_SIZE);

examples/c++/Pwm3-cycle.cpp

@@ -49,6 +49,7 @@ int main ()
         return MRAA_ERROR_UNSPECIFIED;
     }
     fprintf(stdout, "Cycling PWM on IO3 (pwm3) \n");
+    pwm->enable(true);
 
     float value = 0.0f;
     while (running == 0) {

examples/c++/Spi-pot.cpp

@@ -48,22 +48,27 @@ int main ()
 
     spi = new mraa::Spi(0);
 
-    char data[] = {0x00, 100};
-    char *recv;
+    uint8_t data[] = {0x00, 100};
+    uint8_t rxBuf[2];
+    uint8_t *recv;
     while (running == 0) {
         int i;
         for (i = 90; i < 130; i++) {
             data[1] = i;
             recv = spi->write(data, 2);
             printf("Writing -%i",i);
-            printf("RECIVED-%i-%i\n",recv[0],recv[1]);
+            if (recv) {
+                printf("RECIVED-%i-%i\n",recv[0],recv[1]);
+                free(recv);
+            }
             usleep(100000);
         }
         for (i = 130; i > 90; i--) {
             data[1] = i;
-            recv = spi->write(data, 2);
-            printf("Writing -%i",i);
-            printf("RECIVED-%i-%i\n",recv[0],recv[1]);
+            if (spi->transfer(data, rxBuf, 2) == MRAA_SUCCESS) {
+                printf("Writing -%i",i);
+                printf("RECIVED-%i-%i\n",rxBuf[0],rxBuf[1]);
+            }
             usleep(100000);
         }
 

examples/gpio.c

@@ -0,0 +1,142 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <unistd.h>
+
+#include "mraa/gpio.h"
+
+char* board_name;
+
+void
+print_version() {
+    fprintf(stdout, "Version %s on %s\n", mraa_get_version(), board_name);
+}
+
+void
+print_help() {
+    fprintf(stdout, "list              List pins\n");
+    fprintf(stdout, "set pin level     Set pin to level (0/1)\n");
+    fprintf(stdout, "get pin           Get pin level\n");
+    fprintf(stdout, "version           Get mraa version and board name\n");
+}
+
+void
+print_command_error() {
+    fprintf(stdout, "Invalid command, options are:\n");
+    fprintf(stdout, "list              List pins\n");
+    fprintf(stdout, "set pin level     Set pin to level (0/1)\n");
+    fprintf(stdout, "get pin           Get pin level\n");
+    fprintf(stdout, "version           Get mraa version and board name\n");
+}
+
+void
+list_pins() {
+    int pin_count = mraa_get_pin_count();
+    if (pin_count == 0) {
+        fprintf(stdout, "No Pins\n");
+        return;
+    }
+    int i;
+    for (i = 0; i < pin_count; ++i) {
+        fprintf(stdout, "%02d ", i);
+        if (mraa_pin_mode_test(i, MRAA_PIN_GPIO))
+            fprintf(stdout, "GPIO");
+        if (mraa_pin_mode_test(i, MRAA_PIN_I2C))
+            fprintf(stdout, "I2C");
+        if (mraa_pin_mode_test(i, MRAA_PIN_SPI))
+            fprintf(stdout, "SPI");
+        if (mraa_pin_mode_test(i, MRAA_PIN_PWM))
+            fprintf(stdout, "PWM");
+        if (mraa_pin_mode_test(i, MRAA_PIN_UART))
+            fprintf(stdout, "UART");
+        fprintf(stdout, "\n");
+    }
+}
+
+mraa_result_t
+gpio_set(int pin, int level) {
+    mraa_gpio_context gpio = mraa_gpio_init(pin);
+    if (gpio != NULL) {
+        mraa_gpio_dir(gpio, MRAA_GPIO_OUT);
+        mraa_gpio_write(gpio, level);
+        return MRAA_SUCCESS;
+    } else
+        return MRAA_ERROR_INVALID_RESOURCE;
+}
+
+mraa_result_t
+gpio_get(int pin, int* level) {
+    mraa_gpio_context gpio = mraa_gpio_init(pin);
+    if (gpio != NULL) {
+        mraa_gpio_dir(gpio, MRAA_GPIO_IN);
+        *level = mraa_gpio_read(gpio);
+        return MRAA_SUCCESS;
+    } else
+        return MRAA_ERROR_INVALID_RESOURCE;
+}
+
+int
+main(int argc, char **argv)
+{
+    board_name = mraa_get_platform_name();
+    if (board_name == NULL) {
+        board_name = "Error";
+    }
+
+    if (argc == 1) {
+        print_command_error();
+    }
+
+    if (argc > 1) {
+        if (strcmp(argv[1], "list") == 0) {
+            list_pins();
+        } else if (strcmp(argv[1], "help") == 0) {
+            print_help();
+        } else if (strcmp(argv[1], "version") == 0) {
+            print_version();
+        } else if (strcmp(argv[1], "set") == 0) {
+            if (argc == 4) {
+                int pin = atoi(argv[2]);
+                if (gpio_set(pin, atoi(argv[3])) != MRAA_SUCCESS)
+                    fprintf(stdout, "Could not initialize gpio %d\n", pin);
+            } else
+                print_command_error();
+        } else if (strcmp(argv[1], "get") == 0) {
+            if (argc == 3) {
+                int pin = atoi(argv[2]);
+                int level;
+                if (gpio_get(pin, &level) == MRAA_SUCCESS)
+                    fprintf(stdout, "Pin %d = %d\n", pin, level);
+                else
+                    fprintf(stdout, "Could not initialize gpio %d\n", pin);
+            } else
+                print_command_error();
+        } else {
+            print_command_error();
+        }
+    }
+    return 0;
+}

examples/helloedison.c

@@ -0,0 +1,69 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <syslog.h>
+#include <string.h>
+#include <stdbool.h>
+//! [Interesting]
+#include "mraa.h"
+
+int
+main(int argc, char **argv)
+{
+    mraa_result_t ret = MRAA_SUCCESS;
+    mraa_platform_t platform_type = mraa_get_platform_type();
+
+    if (platform_type != MRAA_INTEL_EDISON_FAB_C) {
+        fprintf(stderr, "Error: This program can only run on an edison\n");
+        ret = MRAA_ERROR_INVALID_PLATFORM;
+        goto end;
+    }
+
+    // MRAA_INTEL_EDISON_GP182 == 0 so this will initialise pin0 on arduino
+    // which is hardware gpio 130 and not 182
+    mraa_gpio_context gpio182 = mraa_gpio_init(MRAA_INTEL_EDISON_GP182);
+    if (gpio182 == NULL) {
+        fprintf(stderr, "Error: Failed to open gpio182\n");
+        ret = MRAA_ERROR_INVALID_PLATFORM;
+        goto end;
+    }
+    mraa_gpio_dir(gpio182, MRAA_GPIO_OUT);
+
+    // we set the owner to false here, this makes sure that we do not close the
+    // gpio from sysfs in mraa_gpio_close meaning it will stay as an output and
+    // we will not always transition from 0->1 as gpio182 as output has the
+    // default position of '0'. Note that the value could change as a result of
+    // a mraa_gpio_dir however meaning we always go from 0->1 or 1->0
+    mraa_gpio_owner(gpio182, false);
+    int val = mraa_gpio_read(gpio182);
+    printf("GPIO%d (mraa pin %d) was: %d, will set to %d\n", 182, mraa_gpio_get_pin(gpio182), val, !val);
+    mraa_gpio_write(gpio182, !val);
+    mraa_gpio_close(gpio182);
+
+end:
+    mraa_deinit();
+    return ret;
+}
+//! [Interesting]

examples/hellomraa.c

@@ -24,20 +24,19 @@
 
 #include <stdio.h>
 #include <syslog.h>
+#include <string.h>
 //! [Interesting]
 #include "mraa.h"
 
 int
 main(int argc, char **argv)
 {
-    mraa_result_t ret;
+    char* board_name = mraa_get_platform_name();
 
-    ret = mraa_set_log_level(LOG_DEBUG);
-
-    fprintf(stdout, "hello mraa\n Version: %s\n", mraa_get_version());
+    fprintf(stdout, "hello mraa\n Version: %s\n Running on %s\n", mraa_get_version(), board_name);
 
     mraa_deinit();
 
-    return ret;
+    return MRAA_SUCCESS;
 }
 //! [Interesting]

examples/i2c_HMC5883L.c

@@ -81,7 +81,7 @@ main(int argc, char **argv)
     mraa_init();
     float direction = 0;
     int16_t x = 0, y = 0, z = 0;
-    char rx_tx_buf[MAX_BUFFER_LENGTH];
+    uint8_t rx_tx_buf[MAX_BUFFER_LENGTH];
 
 //! [Interesting]
     mraa_i2c_context i2c;
@@ -99,10 +99,23 @@ main(int argc, char **argv)
     mraa_i2c_write(i2c, rx_tx_buf, 2);
 
     for(;;) {
+#if 0
+        int i = 0;
+        //alternative, equivalent method which helps to understand exactly what
+        //the below does
+        mraa_i2c_address(i2c, HMC5883L_I2C_ADDR);
+        for (i = 0; i < DATA_REG_SIZE; i++) {
+            mraa_i2c_read_byte_data(i2c, HMC5883L_DATA_REG+i);
+        }
+#endif
+        // first 'select' the register we want to read from
         mraa_i2c_address(i2c, HMC5883L_I2C_ADDR);
         mraa_i2c_write_byte(i2c, HMC5883L_DATA_REG);
 
+        // then we read from that register incrementing with every read the
+        // chosen register
         mraa_i2c_address(i2c, HMC5883L_I2C_ADDR);
+        // this call behaves very similarly to the Wire receive() call
         mraa_i2c_read(i2c, rx_tx_buf, DATA_REG_SIZE);
 
         x = (rx_tx_buf[HMC5883L_X_MSB_REG] << 8 ) | rx_tx_buf[HMC5883L_X_LSB_REG] ;

examples/javascript/bmp85.js

@@ -0,0 +1,55 @@
+#!/usr/bin/env node
+
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+var m = require('mraa'); //require mraa
+
+// helper function to go from hex val to dec
+function char(x) { return parseInt(x, 16); }
+
+x = new m.I2c(0)
+x.address(0x77)
+
+// initialise device
+if (x.readReg(char('0xd0')) != char('0x55')) {
+  console.log("error");
+}
+
+// we want to read temperature so write 0x2e into control reg
+x.writeReg(char('0xf4'), char('0x2e'))
+
+// read a 16bit reg, obviously it's uncalibrated so mostly a useless value :)
+console.log(x.readWordReg(char('0xf6')))
+
+// and we can do the same thing with the read()/write() calls if we wished
+// thought I'd really not recommend it!
+buf = new Buffer(2)
+buf[0] = char('0xf4')
+buf[1] = char('0x2e')
+console.log(buf.toString('hex'))
+x.write(buf)
+
+x.writeByte(char('0xf6'))
+d = x.read(2)

examples/javascript/rgblcd.js

@@ -0,0 +1,37 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+var m = require('mraa'); //require mraa
+
+// helper function to go from hex val to dec
+function char(x) { return parseInt(x, 16); }
+
+x = new m.I2c(0)
+x.address(0x62)
+x.writeReg(0, 0)
+x.writeReg(1, 0)
+
+x.writeReg(char('0x08'), char('0xAA'))
+x.writeReg(char('0x04'), 255)
+x.writeReg(char('0x02'), 255)

examples/javascript/spi.js

@@ -0,0 +1,41 @@
+#!/usr/bin/env node
+
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+var m = require('mraa'); //require mraa
+
+// helper function to go from hex val to dec
+function char(x) { return parseInt(x, 16); }
+
+x = new m.Spi(0)
+buf = new Buffer(4)
+buf[0] = char('0xf4')
+buf[1] = char('0x2e')
+buf[2] = char('0x3e')
+buf[3] = char('0x4e')
+buf2 = x.write(buf)
+console.log("Sent: " + buf.toString('hex') + ". Received: " + buf2.toString('hex'))
+
+

examples/python/aio.py

@@ -25,5 +25,9 @@
 import mraa
 
 print (mraa.getVersion())
-x = mraa.Aio(0)
-print (x.read())
+
+try:
+    x = mraa.Aio(0)
+    print (x.read())
+except:
+    print ("Are you sure you have an ADC?")

examples/python/bmp85.py

@@ -0,0 +1,53 @@
+#!/usr/bin/env python
+
+# Author: Brendan Le Foll <brendan.le.foll@intel.com>
+# Copyright (c) 2014 Intel Corporation.
+#
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files (the
+# "Software"), to deal in the Software without restriction, including
+# without limitation the rights to use, copy, modify, merge, publish,
+# distribute, sublicense, and/or sell copies of the Software, and to
+# permit persons to whom the Software is furnished to do so, subject to
+# the following conditions:
+#
+# The above copyright notice and this permission notice shall be
+# included in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+# LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+# OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+# WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE
+
+import mraa as m
+
+# this example will show the 'advanced' i2c functionality from python i2c
+# read/write
+
+x = m.I2c(0)
+x.address(0x77)
+
+# initialise device
+if x.readReg(0xd0) != 0x55:
+  print("error")
+
+# we want to read temperature so write 0x2e into control reg
+x.writeReg(0xf4, 0x2e)
+
+# read a 16bit reg, obviously it's uncalibrated so mostly a useless value :)
+print(str(x.readWordReg(0xf6)))
+
+# and we can do the same thing with the read()/write() calls if we wished
+# thought I'd really not recommend it!
+
+x.write(bytearray(b'0xf40x2e'))
+
+x.writeByte(0xf6)
+d = x.read(2)
+
+# WARNING: python 3.2+ call
+print(str(d))
+print(int.from_bytes(d, byteorder='little'))

examples/python/hello_isr.py

@@ -25,8 +25,16 @@
 import mraa
 import time
 
+class Counter:
+  count = 0
+
+c = Counter()
+
+# inside a python interupt you cannot use 'basic' types so you'll need to use
+# objects
 def test(args):
   print("wooo")
+  c.count+=1
 
 x = mraa.Gpio(6)
 x.dir(mraa.DIR_IN)

examples/python/rgblcd.py

@@ -28,10 +28,12 @@ import mraa
 # to a nice shade of purple
 x = mraa.I2c(0)
 x.address(0x62)
-x.writeReg(0,0)
-x.writeReg(1,0)
 
-# Be careful that your i2c device can actually handle a 'batch' handling of
-# such data, this is not typical in arduino type devices
-s = "\x08\xAA\x04\xFF\x02\xFF"
-x.write(s)
+# initialise device
+x.writeReg(0, 0)
+x.writeReg(1, 0)
+
+# sent RGB color data
+x.writeReg(0x08, 0xAA)
+x.writeReg(0x04, 255)
+x.writeReg(0x02, 255)

examples/python/spi.py

@@ -0,0 +1,43 @@
+#!/usr/bin/env python
+
+# Author: Brendan Le Foll <brendan.le.foll@intel.com>
+# Copyright (c) 2015 Intel Corporation.
+#
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files (the
+# "Software"), to deal in the Software without restriction, including
+# without limitation the rights to use, copy, modify, merge, publish,
+# distribute, sublicense, and/or sell copies of the Software, and to
+# permit persons to whom the Software is furnished to do so, subject to
+# the following conditions:
+#
+# The above copyright notice and this permission notice shall be
+# included in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+# LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+# OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+# WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE
+
+import mraa as m
+import random as rand
+
+# Excuse the super boring example, I was out of fun devices to play with, this
+# will write and read the same data back to itself, a few 100 times, just short
+# MISO & MOSI on your board
+
+dev = m.Spi(0)
+
+for x in range(0,100):
+  txbuf = bytearray(4)
+  for y in range(0,4):
+    txbuf[y] = rand.randrange(0, 256)
+  rxbuf = dev.write(txbuf)
+  if rxbuf != txbuf:
+    print("We have an error captain!")
+    break
+    exit(1)
+

include/arm/raspberry_pi_b.h

@@ -0,0 +1,40 @@
+/*
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mraa_internal.h"
+
+#define MRAA_RASPBERRY_PI_B 27
+
+mraa_board_t*
+mraa_raspberry_pi_b();
+
+#ifdef __cplusplus
+}
+#endif

include/mraa_adv_func.h

@@ -32,6 +32,8 @@ typedef struct {
     mraa_result_t (*gpio_init_pre) (int pin);
     mraa_result_t (*gpio_init_post) (mraa_gpio_context dev);
 
+    mraa_result_t (*gpio_close_pre) (mraa_gpio_context dev);
+
     mraa_result_t (*gpio_mode_replace) (mraa_gpio_context dev, gpio_mode_t mode);
     mraa_result_t (*gpio_mode_pre) (mraa_gpio_context dev, gpio_mode_t mode);
     mraa_result_t (*gpio_mode_post) (mraa_gpio_context dev, gpio_mode_t mode);
@@ -42,13 +44,11 @@ typedef struct {
 
     mraa_result_t (*gpio_write_pre) (mraa_gpio_context dev, int value);
     mraa_result_t (*gpio_write_post) (mraa_gpio_context dev, int value);
-
-    mraa_result_t (*gpio_mmaped_write_replace) (mraa_gpio_context dev, int value);
-    mraa_result_t (*gpio_mmaped_write_pre) (mraa_gpio_context dev, int value);
-    mraa_result_t (*gpio_mmaped_write_post) (mraa_gpio_context dev, int value);
+    mraa_result_t (*gpio_mmap_setup) (mraa_gpio_context dev, mraa_boolean_t en);
 
     mraa_result_t (*i2c_init_pre) (unsigned int bus);
     mraa_result_t (*i2c_init_post) (mraa_i2c_context dev);
+    mraa_result_t (*i2c_set_frequency_replace) (mraa_i2c_context dev, mraa_i2c_mode_t mode);
 
     mraa_result_t (*aio_get_valid_fp) (mraa_aio_context dev);
     mraa_result_t (*aio_init_pre) (unsigned int aio);
@@ -60,4 +60,7 @@ typedef struct {
 
     mraa_result_t (*spi_init_pre) (int bus);
     mraa_result_t (*spi_init_post) (mraa_spi_context spi);
+
+    mraa_result_t (*uart_init_pre) (int index);
+    mraa_result_t (*uart_init_post) (mraa_uart_context uart);
 } mraa_adv_func_t;

include/mraa_internal.h

@@ -38,63 +38,26 @@ extern mraa_adv_func_t* advance_func;
 extern mraa_board_t* plat;
 
 /**
- * Will check input is valid for gpio and will also setup required multiplexers.
- * @param pin the pin as read from the board surface. i.e IO3 would be 3/
- * @return the pin as found in the pinmap
- */
-unsigned int mraa_setup_gpio(int pin);
-
-/**
- * Will check input is valid for aio and will also setup required multiplexers.
- * @param pin the pin as read from the board surface. i.e A3 would be 3/
- * @return the pin as found in the pinmap
- */
-unsigned int mraa_setup_aio(int pin);
-
-/**
- * Setup i2c interface, sets up multiplexer on device.
+ * Takes in pin information and sets up the multiplexors.
  *
- * @return unsigned int if using /dev/i2c-2 returned would be 2
+ * @param meta
+ * @return mraa result type indicating success of actions.
  */
-unsigned int mraa_setup_i2c(int bus);
-
-/** Setup spi interface, sets up multiplexer on device.
- *
- * @return spi bus type
- */
-mraa_spi_bus_t* mraa_setup_spi(int bus);
+mraa_result_t mraa_setup_mux_mapped(mraa_pin_t meta);
 
 /**
- * Will check input is valid for pwm and will also setup required multiplexers.
- * IF the pin also does gpio (strong chance), DO NOTHING, REV D quirk
- * @param pin the pin as read from the board surface.
- * @return the pwm pin_info_t of that IO pin
+ * runtime detect running x86 platform
+ *
+ * @return mraa_platform_t of the init'ed platform
  */
-mraa_pin_t* mraa_setup_pwm(int pin);
+mraa_platform_t mraa_x86_platform();
 
 /**
- * Setup gpio mux to go straight to SoC, galileo.
+ * runtime detect running arm platforms
  *
- * @param pin physical pin to use
- * @return mraa_mmap_pin_t
+ * @return mraa_platform_t of the init'ed platform
  */
-mraa_mmap_pin_t* mraa_setup_mmap_gpio(int pin);
-
-/**
- * Swap Directional mode.
- *
- * @param pin physical pin to operate on
- * @return out direction to setup. 1 for output 0 for input
- */
-mraa_result_t mraa_swap_complex_gpio(int pin, int out);
-
-/**
- * Setup uart muxes to exposes the pins physically.
- *
- * @param index of the uart in the board definition to expose physically
- * @return mraa_result_t of operation
- */
-mraa_result_t mraa_setup_uart(int index);
+mraa_platform_t mraa_arm_platform();
 
 #ifdef __cplusplus
 }

include/mraa_internal_types.h

@@ -26,6 +26,7 @@
 #pragma once
 
 #include "common.h"
+#include "mraa.h"
 
 // general status failures for internal functions
 #define MRAA_PLATFORM_NO_INIT -3
@@ -45,10 +46,8 @@ struct _gpio {
     pthread_t thread_id; /**< the isr handler thread id */
     int isr_value_fp; /**< the isr file pointer on the value */
     mraa_boolean_t owner; /**< If this context originally exported the pin */
-    mraa_boolean_t mmap;
-    void *reg;
-    unsigned int reg_sz;
-    unsigned int reg_bit_pos;
+    mraa_result_t (*mmap_write) (mraa_gpio_context dev, int value);
+    int (*mmap_read) (mraa_gpio_context dev);
     /*@}*/
 };
 
@@ -57,9 +56,10 @@ struct _gpio {
  */
 struct _i2c {
     /*@{*/
-    int hz; /**< frequency of communication */
+    int busnum; /**< the bus number of the /dev/i2c-* device */
     int fh; /**< the file handle to the /dev/i2c-* device */
     int addr; /**< the address of the i2c slave */
+    unsigned long funcs;
     /*@}*/
 };
 
@@ -71,6 +71,7 @@ struct _pwm {
     int pin; /**< the pin number, as known to the os. */
     int chipid; /**< the chip id, which the pwm resides */
     int duty_fp; /**< File pointer to duty file */
+    int period;  /**< Cache the period to speed up setting duty */
     mraa_boolean_t owner; /**< Owner of pwm context*/
     /*@}*/
 };
@@ -83,3 +84,150 @@ struct _aio {
     int adc_in_fp; /**< File Pointer to raw sysfs */
     int value_bit; /**< 10 bits by default. Can be increased if board */
 };
+
+/**
+ * A structure representing a UART device
+ */
+struct _uart {
+    /*@{*/
+    int index; /**< the uart index, as known to the os. */
+    char* path; /**< the uart device path. */
+    /*@}*/
+};
+
+/**
+ * A bitfield representing the capabilities of a pin.
+ */
+typedef struct {
+    /*@{*/
+    mraa_boolean_t valid:1;     /**< Is the pin valid at all */
+    mraa_boolean_t gpio:1;      /**< Is the pin gpio capable */
+    mraa_boolean_t pwm:1;       /**< Is the pin pwm capable */
+    mraa_boolean_t fast_gpio:1; /**< Is the pin fast gpio capable */
+    mraa_boolean_t spi:1;       /**< Is the pin spi capable */
+    mraa_boolean_t i2c:1;       /**< Is the pin i2c capable */
+    mraa_boolean_t aio:1;       /**< Is the pin analog input capable */
+    mraa_boolean_t uart:1;       /**< Is the pin uart capable */
+    /*@}*/
+} mraa_pincapabilities_t;
+
+/**
+ * A Structure representing a multiplexer and the required value
+ */
+typedef struct {
+    /*@{*/
+    unsigned int pin;   /**< Raw GPIO pin id */
+    unsigned int value; /**< Raw GPIO value */
+    /*@}*/
+} mraa_mux_t;
+
+typedef struct {
+    mraa_boolean_t complex_pin:1;
+    mraa_boolean_t output_en:1;
+    mraa_boolean_t output_en_high:1;
+    mraa_boolean_t pullup_en:1;
+    mraa_boolean_t pullup_en_hiz:1;
+} mraa_pin_cap_complex_t;
+
+typedef struct {
+    /*@{*/
+    unsigned int pinmap; /**< sysfs pin */
+    unsigned int parent_id; /** parent chip id */
+    unsigned int mux_total; /** Numfer of muxes needed for operation of pin */
+    mraa_mux_t mux[6]; /** Array holding information about mux */
+    unsigned int output_enable; /** Output Enable GPIO, for level shifting */
+    unsigned int pullup_enable; /** Pull-Up enable GPIO, inputs */
+    mraa_pin_cap_complex_t complex_cap;
+    /*@}*/
+} mraa_pin_t;
+
+typedef struct {
+    /*@{*/
+    char mem_dev[32]; /**< Memory device to use /dev/uio0 etc */
+    unsigned int mem_sz; /** Size of memory to map */
+    unsigned int bit_pos; /** Position of value bit */
+    mraa_pin_t gpio; /** GPio context containing none mmap info */
+    /*@}*/
+} mraa_mmap_pin_t;
+
+/**
+ * A Structure representing a physical Pin.
+ */
+typedef struct {
+    /*@{*/
+    char name[8];                      /**< Pin's real world name */
+    mraa_pincapabilities_t capabilites; /**< Pin Capabiliites */
+    mraa_pin_t gpio; /**< GPIO structure */
+    mraa_pin_t pwm;  /**< PWM structure */
+    mraa_pin_t aio;  /**< Anaglog Pin */
+    mraa_mmap_pin_t mmap; /**< GPIO through memory */
+    mraa_pin_t i2c;  /**< i2c bus/pin */
+    mraa_pin_t spi;  /**< spi bus/pin */
+    mraa_pin_t uart;  /**< uart module/pin */
+    /*@}*/
+} mraa_pininfo_t;
+
+/**
+ * A Structure representing the physical properties of a i2c bus.
+ */
+typedef struct {
+    /*@{*/
+    unsigned int bus_id; /**< ID as exposed in the system */
+    unsigned int scl; /**< i2c SCL */
+    unsigned int sda; /**< i2c SDA */
+    /*@}*/
+} mraa_i2c_bus_t;
+
+/**
+ * A Structure representing the physical properties of a spi bus.
+ */
+typedef struct {
+    /*@{*/
+    unsigned int bus_id; /**< The Bus ID as exposed to the system. */
+    unsigned int slave_s; /**< Slave select */
+    mraa_boolean_t three_wire; /**< Is the bus only a three wire system */
+    unsigned int sclk; /**< Serial Clock */
+    unsigned int mosi; /**< Master Out, Slave In. */
+    unsigned int miso; /**< Master In, Slave Out. */
+    unsigned int cs; /**< Chip Select, used when the board is a spi slave */
+    /*@}*/
+} mraa_spi_bus_t;
+
+/**
+ * A Structure representing a uart device.
+ */
+typedef struct {
+    /*@{*/
+    unsigned int index; /**< ID as exposed in the system */
+    int rx; /**< uart rx */
+    int tx; /**< uart tx */
+    const char* device_path; /**< To store "/dev/ttyS1" for example */
+    /*@}*/
+} mraa_uart_dev_t;
+
+/**
+ * A Structure representing a platform/board.
+ */
+typedef struct {
+    /*@{*/
+    unsigned int phy_pin_count; /**< The Total IO pins on board */
+    unsigned int gpio_count; /**< GPIO Count */
+    unsigned int aio_count;  /**< Analog side Count */
+    unsigned int i2c_bus_count; /**< Usable i2c Count */
+    mraa_i2c_bus_t  i2c_bus[12]; /**< Array of i2c */
+    unsigned int def_i2c_bus; /**< Position in array of default i2c bus */
+    unsigned int spi_bus_count; /**< Usable spi Count */
+    mraa_spi_bus_t spi_bus[12];       /**< Array of spi */
+    unsigned int def_spi_bus; /**< Position in array of defult spi bus */
+    unsigned int adc_raw; /**< ADC raw bit value */
+    unsigned int adc_supported; /**< ADC supported bit value */
+    unsigned int def_uart_dev; /**< Position in array of defult uart */
+    unsigned int uart_dev_count; /**< Usable spi Count */
+    mraa_uart_dev_t uart_dev[6]; /**< Array of UARTs */
+    int pwm_default_period; /**< The default PWM period is US */
+    int pwm_max_period; /**< Maximum period in us */
+    int pwm_min_period; /**< Minimum period in us */
+    const char* platform_name; /**< Platform Name pointer */
+    mraa_pininfo_t* pins;     /**< Pointer to pin array */
+    /*@}*/
+} mraa_board_t;

include/smbus.h

@@ -1,101 +0,0 @@
-/*
- * Author: Robin Knight (robin.knight@roadnarrows.com)
- *
- * Copyright © 2009 RoadNarrows LLC.
- *
- * Permission is hereby granted, without written agreement and without
- * license or royalty fees, to use, copy, modify, and distribute this
- * software and its documentation for any purpose, provided that
- * (1) The above copyright notice and the following two paragraphs
- * appear in all copies of the source code and (2) redistributions
- * including binaries reproduces these notices in the supporting
- * documentation.   Substantial modifications to this software may be
- * copyrighted by their authors and need not follow the licensing terms
- * described here, provided that the new terms are clearly indicated in
- * all files where they apply.
- *
- * IN NO EVENT SHALL THE AUTHOR, ROADNARROWS LLC, OR ANY MEMBERS/EMPLOYEES
- * OF ROADNARROW LLC OR DISTRIBUTORS OF THIS SOFTWARE BE LIABLE TO ANY
- * PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
- * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION,
- * EVEN IF THE AUTHORS OR ANY OF THE ABOVE PARTIES HAVE BEEN ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * THE AUTHOR AND ROADNARROWS LLC SPECIFICALLY DISCLAIM ANY WARRANTIES,
- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
- * FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS ON AN
- * "AS IS" BASIS, AND THE AUTHORS AND DISTRIBUTORS HAVE NO OBLIGATION TO
- * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
- */
-
-#pragma once
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stdlib.h>
-#include <unistd.h>
-#include <fcntl.h>
-#include <inttypes.h>
-#include <sys/types.h>
-#include <sys/errno.h>
-#include <sys/ioctl.h>
-
-#include "linux/i2c-dev.h"
-
-typedef union i2c_smbus_data_union
-{
-    uint8_t byte; ///< data byte
-    unsigned short word; ///< data short word
-    uint8_t block[I2C_SMBUS_BLOCK_MAX + 2];
-    ///< block[0] is used for length and one more for PEC
-} i2c_smbus_data_t;
-
-typedef struct i2c_smbus_ioctl_data_struct
-{
-    uint8_t read_write; ///< operation direction
-    uint8_t command; ///< ioctl command
-    int size; ///< data size
-    i2c_smbus_data_t *data; ///< data
-} i2c_smbus_ioctl_data_t;
-
-// ---------------------------------------------------------------------------
-// Prototypes
-// ---------------------------------------------------------------------------
-
-extern int i2c_smbus_access(int fd, uint8_t read_write, uint8_t command,
-                      int size, i2c_smbus_data_t *data);
-
-extern int i2c_smbus_write_quick(int fd, uint8_t value);
-
-extern int i2c_smbus_read_byte(int fd);
-
-extern int i2c_smbus_write_byte(int fd, uint8_t value);
-
-extern int i2c_smbus_read_byte_data(int fd, uint8_t command);
-
-extern int i2c_smbus_write_byte_data(int fd, uint8_t command, uint8_t value);
-
-extern int i2c_smbus_read_word_data(int fd, uint8_t command);
-
-extern int i2c_smbus_write_word_data(int fd, uint8_t command, unsigned short value);
-
-extern int i2c_smbus_process_call(int fd, uint8_t command, unsigned short value);
-
-extern int i2c_smbus_read_block_data(int fd, uint8_t command, uint8_t *values);
-
-extern int i2c_smbus_write_block_data(int fd, uint8_t command, uint8_t length,
-                                        const uint8_t *values);
-extern int i2c_smbus_read_i2c_block_data(int fd, uint8_t command,
-                                          uint8_t *values);
-
-extern int i2c_smbus_write_i2c_block_data(int fd, uint8_t command, uint8_t length,
-                                    const uint8_t *values);
-
-extern int i2c_smbus_block_process_call(int fd, uint8_t command, uint8_t length,
-                                          uint8_t *values);
-
-#ifdef __cplusplus
-}
-#endif

include/x86/intel_de3815.h

@@ -0,0 +1,40 @@
+/*
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mraa_internal.h"
+
+#define MRAA_INTEL_DE3815_PINCOUNT 18
+
+mraa_board_t*
+mraa_intel_de3815();
+
+#ifdef __cplusplus
+}
+#endif

include/x86/intel_minnow_max.h

@@ -0,0 +1,41 @@
+/*
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mraa_internal.h"
+
+// +1 as pins are "1 indexed"
+#define MRAA_INTEL_MINNOW_MAX_PINCOUNT (26 + 1)
+
+mraa_board_t*
+mraa_intel_minnow_max();
+
+#ifdef __cplusplus
+}
+#endif

src/CMakeLists.txt

@@ -1,21 +1,35 @@
-include_directories(
+set (mraa_LIB_INCLUDE_DIRS
   ${PROJECT_SOURCE_DIR}/api
   ${PROJECT_SOURCE_DIR}/api/mraa
   ${PROJECT_SOURCE_DIR}/include
 )
 
-set (mraa_LIB_SRCS
+include_directories(
+  ${mraa_LIB_INCLUDE_DIRS}
+)
+
+set (mraa_LIB_SRCS_NOAUTO
   ${PROJECT_SOURCE_DIR}/src/mraa.c
   ${PROJECT_SOURCE_DIR}/src/gpio/gpio.c
   ${PROJECT_SOURCE_DIR}/src/i2c/i2c.c
-  ${PROJECT_SOURCE_DIR}/src/i2c/smbus.c
   ${PROJECT_SOURCE_DIR}/src/pwm/pwm.c
   ${PROJECT_SOURCE_DIR}/src/spi/spi.c
   ${PROJECT_SOURCE_DIR}/src/aio/aio.c
   ${PROJECT_SOURCE_DIR}/src/uart/uart.c
-  ${PROJECT_SOURCE_DIR}/src/intel_galileo_rev_d.c
-  ${PROJECT_SOURCE_DIR}/src/intel_galileo_rev_g.c
-  ${PROJECT_SOURCE_DIR}/src/intel_edison_fab_c.c
+)
+
+if (X86PLAT)
+  add_subdirectory(x86)
+  set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DX86PLAT=1")
+endif()
+
+if (ARMPLAT)
+  add_subdirectory(arm)
+  set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DARMPLAT=1")
+endif()
+
+set (mraa_LIB_SRCS
+  ${mraa_LIB_SRCS_NOAUTO}
 # autogenerated version file
   ${CMAKE_CURRENT_BINARY_DIR}/version.c
 )
@@ -43,7 +57,7 @@ macro (mraa_CREATE_INSTALL_PKGCONFIG generated_file install_location)
 endmacro (mraa_CREATE_INSTALL_PKGCONFIG)
 mraa_create_install_pkgconfig (mraa.pc lib${LIB_SUFFIX}/pkgconfig)
 
-install (TARGETS mraa DESTINATION lib)
+install(TARGETS mraa DESTINATION ${CMAKE_INSTALL_LIBDIR})
 
 if (DOXYGEN_FOUND)
   set (CMAKE_SWIG_FLAGS -DDOXYGEN=${DOXYGEN_FOUND})

src/aio/aio.c

@@ -47,8 +47,8 @@ aio_get_valid_fp(mraa_aio_context dev)
 
     dev->adc_in_fp = open(file_path, O_RDONLY);
     if (dev->adc_in_fp == -1) {
-        syslog(LOG_ERR, "Failed to open Analog input raw file %s for "
-                "reading!", file_path);
+        syslog(LOG_ERR, "aio: Failed to open input raw file %s for reading!",
+                file_path);
         return MRAA_ERROR_INVALID_RESOURCE;
     }
 
@@ -56,41 +56,44 @@ aio_get_valid_fp(mraa_aio_context dev)
 }
 
 mraa_aio_context
-mraa_aio_init(unsigned int aio_channel)
+mraa_aio_init(unsigned int aio)
 {
+    if (plat == NULL) {
+        syslog(LOG_ERR, "aio: Platform not initialised");
+        return NULL;
+    }
     if (advance_func->aio_init_pre != NULL) {
-        mraa_result_t pre_ret = (advance_func->aio_init_pre(aio_channel));
+        mraa_result_t pre_ret = (advance_func->aio_init_pre(aio));
         if (pre_ret != MRAA_SUCCESS)
             return NULL;
     }
+    if (aio > plat->aio_count) {
+        syslog(LOG_ERR, "aio: requested channel out of range");
+        return NULL;
+    }
 
-    int checked_pin = mraa_setup_aio(aio_channel);
-    if (checked_pin < 0) {
-        switch (checked_pin) {
-            case MRAA_NO_SUCH_IO:
-                syslog(LOG_ERR, "Invalid analog input channel %d specified",
-                        aio_channel);
-                return NULL;
-            case MRAA_IO_SETUP_FAILURE:
-                syslog(LOG_ERR, "Failed to set-up analog input channel %d "
-                        "multiplexer", aio_channel);
-                return NULL;
-            case MRAA_PLATFORM_NO_INIT:
-                syslog(LOG_ERR, "Platform not initialised");
-                return NULL;
-            default:
-                return NULL;
+    int pin = aio + plat->gpio_count;
+
+    if (plat->pins[pin].capabilites.aio != 1) {
+        syslog(LOG_ERR, "aio: pin uncapable of aio");
+        return NULL;
+    }
+
+    if (plat->pins[pin].aio.mux_total > 0) {
+        if (mraa_setup_mux_mapped(plat->pins[pin].aio) != MRAA_SUCCESS) {
+            syslog(LOG_ERR, "aio: unable to setup multiplexers for pin");
+            return NULL;
         }
     }
 
     //Create ADC device connected to specified channel
     mraa_aio_context dev = malloc(sizeof(struct _aio));
     if (dev == NULL) {
-        syslog(LOG_ERR, "Insufficient memory for specified Analog input channel "
-                "%d\n", aio_channel);
+        syslog(LOG_ERR, "aio: Insufficient memory for specified input channel "
+                "%d\n", aio);
         return NULL;
     }
-    dev->channel = checked_pin;
+    dev->channel = plat->pins[pin].aio.pinmap;
     dev->value_bit = DEFAULT_BITS;
 
     //Open valid  analog input file and get the pointer.
@@ -114,27 +117,32 @@ mraa_aio_init(unsigned int aio_channel)
 unsigned int
 mraa_aio_read(mraa_aio_context dev)
 {
-    char buffer[16];
+    char buffer[17];
     unsigned int shifter_value = 0;
 
     if (dev->adc_in_fp == -1) {
-        aio_get_valid_fp(dev);
+        if (aio_get_valid_fp(dev) != MRAA_SUCCESS) {
+            syslog(LOG_ERR, "aio: Failed to get to the device");
+            return 0;
+        }
     }
 
     lseek(dev->adc_in_fp, 0, SEEK_SET);
     if (read(dev->adc_in_fp, buffer, sizeof(buffer)) < 1) {
-        syslog(LOG_ERR, "Failed to read a sensible value");
+        syslog(LOG_ERR, "aio: Failed to read a sensible value");
     }
+    // force NULL termination of string
+    buffer[16] = '\0';
     lseek(dev->adc_in_fp, 0, SEEK_SET);
 
     errno = 0;
     char *end;
     unsigned int analog_value = (unsigned int) strtoul(buffer, &end, 10);
     if (end == &buffer[0]) {
-        syslog(LOG_ERR, "%s is not a decimal number", buffer);
+        syslog(LOG_ERR, "aio: Value is not a decimal number");
     }
     else if (errno != 0) {
-        syslog(LOG_ERR, "errno was set");
+        syslog(LOG_ERR, "aio: Errno was set");
     }
 
     if (dev->value_bit != raw_bits) {
@@ -154,8 +162,11 @@ mraa_aio_read(mraa_aio_context dev)
 mraa_result_t
 mraa_aio_close(mraa_aio_context dev)
 {
-    if (NULL != dev)
+    if (NULL != dev) {
+        if (dev->adc_in_fp != -1)
+            close(dev->adc_in_fp);
         free(dev);
+    }
 
     return(MRAA_SUCCESS);
 }
@@ -163,14 +174,10 @@ mraa_aio_close(mraa_aio_context dev)
 mraa_result_t
 mraa_aio_set_bit(mraa_aio_context dev, int bits)
 {
-    if (dev == NULL) {
-        syslog(LOG_ERR, "AIO Device not valid");
+    if (dev == NULL || bits < 1) {
+        syslog(LOG_ERR, "aio: Device not valid");
         return MRAA_ERROR_INVALID_RESOURCE;
     }
-    if (bits < 1) {
-        syslog(LOG_ERR, "AIO Device not valid");
-        return MRAA_ERROR_INVALID_PARAMETER;
-    }
     dev->value_bit = bits;
     return MRAA_SUCCESS;
 }
@@ -179,7 +186,7 @@ int
 mraa_aio_get_bit(mraa_aio_context dev)
 {
     if (dev == NULL) {
-        syslog(LOG_ERR, "AIO Device not valid");
+        syslog(LOG_ERR, "aio: Device not valid");
         return 0;
     }
     return dev->value_bit;

src/arm/CMakeLists.txt

@@ -0,0 +1,6 @@
+message (INFO " - Adding ARM platforms")
+set (mraa_LIB_SRCS_NOAUTO ${mraa_LIB_SRCS_NOAUTO}
+  ${PROJECT_SOURCE_DIR}/src/arm/arm.c
+  ${PROJECT_SOURCE_DIR}/src/arm/raspberry_pi_b.c
+  PARENT_SCOPE
+)

src/arm/arm.c

@@ -0,0 +1,40 @@
+/*
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdlib.h>
+
+#include "mraa_internal.h"
+#include "arm/raspberry_pi_b.h"
+
+mraa_platform_t
+mraa_arm_platform()
+{
+    mraa_platform_t platform_type = MRAA_UNKNOWN_PLATFORM;
+
+    //For the Time being, Will always be Raspberry PI when running ARM
+    platform_type = MRAA_RASPBERRY_PI_B;
+    plat = mraa_raspberry_pi_b();
+
+    return platform_type;
+}

src/arm/raspberry_pi_b.c

@@ -0,0 +1,194 @@
+/*
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "common.h"
+#include "arm/raspberry_pi_b.h"
+
+#define UART_DEV_PATH "/dev/ttyAMA0"
+#define PLATFORM_NAME "Raspberry Pi B"
+
+mraa_board_t*
+mraa_raspberry_pi_b()
+{
+    mraa_board_t* b = (mraa_board_t*) malloc(sizeof(mraa_board_t));
+    if (b == NULL) {
+        return NULL;
+    }
+
+    b->platform_name = PLATFORM_NAME;
+    b->phy_pin_count = MRAA_RASPBERRY_PI_B;
+    b->aio_count = 0;
+    b->adc_raw = 0;
+    b->adc_supported = 0;
+    b->pwm_default_period = 500;
+    b->pwm_max_period = 2147483;
+    b->pwm_min_period = 1;
+
+    b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*MRAA_RASPBERRY_PI_B);
+
+    strncpy(b->pins[0].name, "void", 8);
+    b->pins[0].capabilites = (mraa_pincapabilities_t) {0,0,0,0,0,0,0,0};
+    strncpy(b->pins[1].name, "3V3", 8);
+    b->pins[1].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+    strncpy(b->pins[2].name, "5V", 8);
+    b->pins[2].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+    strncpy(b->pins[3].name, "I2C-SDA", 8);
+    b->pins[3].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,1,0,0};
+    b->pins[3].i2c.pinmap = 0;
+    b->pins[3].i2c.mux_total = 0;
+    strncpy(b->pins[4].name, "5V", 8);
+    b->pins[4].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+    strncpy(b->pins[5].name, "I2C-SCL", 8);
+    b->pins[5].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,1,0,0};
+    b->pins[5].i2c.pinmap = 0;
+    b->pins[5].i2c.mux_total = 0;
+    strncpy(b->pins[6].name, "GND", 8);
+    b->pins[6].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+
+    strncpy(b->pins[7].name, "GPIO4", 8);
+    b->pins[7].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
+    b->pins[7].gpio.pinmap = 4;
+    b->pins[7].gpio.mux_total = 0;
+
+    strncpy(b->pins[8].name, "UARTtx", 8);
+    b->pins[8].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,1};
+    b->pins[8].uart.parent_id = 0;
+    b->pins[8].uart.mux_total = 0;
+    strncpy(b->pins[9].name, "GND", 8);
+    b->pins[9].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+    strncpy(b->pins[10].name, "UARTrx", 8);
+    b->pins[10].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,1};
+    b->pins[10].uart.parent_id = 0;
+    b->pins[10].uart.mux_total = 0;
+
+    strncpy(b->pins[11].name, "GPIO17", 8);
+    b->pins[11].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
+    b->pins[11].gpio.pinmap = 17;
+    b->pins[11].gpio.mux_total = 0;
+
+    strncpy(b->pins[12].name, "GPIO18", 8);
+    b->pins[12].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
+    b->pins[12].gpio.pinmap = 18;
+    b->pins[12].gpio.mux_total = 0;
+
+    strncpy(b->pins[13].name, "GPIO21", 8);
+    b->pins[13].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
+    b->pins[13].gpio.pinmap = 21;
+    b->pins[13].gpio.mux_total = 0;
+
+    strncpy(b->pins[14].name, "GND", 8);
+    b->pins[14].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+
+    strncpy(b->pins[15].name, "GPIO22", 8);
+    b->pins[15].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
+    b->pins[15].gpio.pinmap = 22;
+    b->pins[15].gpio.mux_total = 0;
+
+    strncpy(b->pins[16].name, "GPIO23", 8);
+    b->pins[16].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+    b->pins[16].gpio.pinmap = 23;
+    b->pins[16].gpio.mux_total = 0;
+
+    strncpy(b->pins[17].name, "3V3", 8);
+    b->pins[17].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+
+    strncpy(b->pins[18].name, "GPIO24", 8);
+    b->pins[18].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
+    b->pins[18].gpio.pinmap = 24;
+    b->pins[18].gpio.mux_total = 0;
+
+    strncpy(b->pins[19].name, "SPI-MOSI", 8);
+    b->pins[19].capabilites = (mraa_pincapabilities_t) {1,0,0,0,1,0,0,0};
+    b->pins[19].spi.pinmap = 0;
+    b->pins[19].spi.mux_total = 0;
+
+    strncpy(b->pins[20].name, "GND", 8);
+    b->pins[20].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+
+    strncpy(b->pins[21].name, "SPI-MISO", 8);
+    b->pins[21].capabilites = (mraa_pincapabilities_t) {1,0,0,0,1,0,0,0};
+    b->pins[21].spi.pinmap = 0;
+    b->pins[21].spi.mux_total = 0;
+
+    strncpy(b->pins[22].name, "GPIO25", 8);
+    b->pins[22].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
+    b->pins[22].gpio.pinmap = 25;
+    b->pins[22].gpio.mux_total = 0;
+
+    strncpy(b->pins[23].name, "SPI-CLK", 8);
+    b->pins[23].capabilites = (mraa_pincapabilities_t) {1,0,0,0,1,0,0,0};
+    b->pins[23].spi.pinmap = 0;
+    b->pins[23].spi.mux_total = 0;
+
+    strncpy(b->pins[24].name, "SPI-CS0", 8);
+    b->pins[24].capabilites = (mraa_pincapabilities_t) {1,0,0,0,1,0,0,0};
+    b->pins[24].spi.pinmap = 0;
+    b->pins[24].spi.mux_total = 0;
+
+    strncpy(b->pins[25].name, "GND", 8);
+    b->pins[25].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+    strncpy(b->pins[26].name, "SPI-CS1", 8);
+    b->pins[26].capabilites = (mraa_pincapabilities_t) {1,0,0,0,1,0,0,0};
+    b->pins[26].spi.pinmap = 0;
+    b->pins[26].spi.mux_total = 0;
+
+    //BUS DEFINITIONS
+    b->i2c_bus_count = 1;
+    b->def_i2c_bus = 0;
+    b->i2c_bus[0].bus_id = 0;
+    b->i2c_bus[0].sda = 3;
+    b->i2c_bus[0].scl = 5;
+
+    b->spi_bus_count = 2;
+    b->def_spi_bus = 0;
+    b->spi_bus[0].bus_id = 0;
+    b->spi_bus[0].slave_s = 0;
+    b->spi_bus[0].cs = 24;
+    b->spi_bus[0].mosi = 19;
+    b->spi_bus[0].miso = 21;
+    b->spi_bus[0].sclk = 23;
+
+    b->spi_bus[1].bus_id = 0;
+    b->spi_bus[1].slave_s = 1;
+    b->spi_bus[1].cs = 26;
+    b->spi_bus[1].mosi = 19;
+    b->spi_bus[1].miso = 21;
+    b->spi_bus[1].sclk = 23;
+
+    b->uart_dev_count = 1;
+    b->def_uart_dev = 0;
+    b->uart_dev[0].rx = 10;
+    b->uart_dev[0].tx = 8;
+    b->uart_dev[0].device_path = UART_DEV_PATH;
+
+    return b;
+
+error:
+    syslog(LOG_CRIT, "raspberry pi: board failed to initialise");
+    free(b);
+    return NULL;
+}

src/doxy2swig.py

@@ -385,7 +385,7 @@ class Doxy2SWIG:
     def write(self, fname):
         o = my_open_write(fname)
         if self.multi:
-            o.write("".join(self.pieces))
+            o.write("".join(x.encode('utf-8') for x in self.pieces))
         else:
             o.write("".join(self.clean_pieces(self.pieces)))
         o.close()

src/gpio/gpio.c

@@ -55,11 +55,30 @@ mraa_gpio_get_valfp(mraa_gpio_context dev)
 mraa_gpio_context
 mraa_gpio_init(int pin)
 {
-    int pinm = mraa_setup_gpio(pin);
-    if (pinm < 0)
+    if (plat == NULL) {
+        syslog(LOG_ERR, "gpio: platform not initialised");
         return NULL;
+    }
+    if (pin < 0 || pin > plat->phy_pin_count) {
+        syslog(LOG_ERR, "gpio: pin %i beyond platform definition", pin);
+        return NULL;
+    }
+    if (plat->pins[pin].capabilites.gpio != 1) {
+        syslog(LOG_ERR, "gpio: pin %i not capable of gpio", pin);
+        return NULL;
+    }
+    if (plat->pins[pin].gpio.mux_total > 0) {
+        if (mraa_setup_mux_mapped(plat->pins[pin].gpio) != MRAA_SUCCESS) {
+            syslog(LOG_ERR, "gpio: unable to setup muxes");
+            return NULL;
+        }
+    }
 
-    mraa_gpio_context r = mraa_gpio_init_raw(pinm);
+    mraa_gpio_context r = mraa_gpio_init_raw(plat->pins[pin].gpio.pinmap);
+    if (r == NULL) {
+        syslog(LOG_CRIT, "gpio: mraa_gpio_init_raw(%d) returned error", pin);
+        return NULL;
+    }
     r->phy_pin = pin;
 
     if (advance_func->gpio_init_post != NULL) {
@@ -87,12 +106,18 @@ mraa_gpio_init_raw(int pin)
     int length;
 
     mraa_gpio_context dev = (mraa_gpio_context) malloc(sizeof(struct _gpio));
+    if (dev == NULL) {
+        syslog(LOG_CRIT, "gpio: Failed to allocate memory for context");
+        return NULL;
+    }
+
     memset(dev, 0, sizeof(struct _gpio));
     dev->value_fp = -1;
     dev->isr_value_fp = -1;
     dev->pin = pin;
     dev->phy_pin = -1;
 
+    // then check to make sure the pin is exported.
     char directory[MAX_SIZE];
     snprintf(directory, MAX_SIZE, SYSFS_CLASS_GPIO "/gpio%d/", dev->pin);
     struct stat dir;
@@ -101,13 +126,15 @@ mraa_gpio_init_raw(int pin)
     } else {
         int export = open(SYSFS_CLASS_GPIO "/export", O_WRONLY);
         if (export == -1) {
-            syslog(LOG_ERR, "Failed to open export for writing");
+            syslog(LOG_ERR, "gpio: Failed to open export for writing");
+            free(dev);
             return NULL;
         }
         length = snprintf(bu, sizeof(bu), "%d", dev->pin);
         if (write(export, bu, length*sizeof(char)) == -1) {
-            syslog(LOG_ERR, "Failed to write to export");
+            syslog(LOG_ERR, "gpio: Failed to write to export");
             close(export);
+            free(dev);
             return NULL;
         }
         dev->owner = 1;
@@ -117,26 +144,6 @@ mraa_gpio_init_raw(int pin)
     return dev;
 }
 
-static mraa_result_t
-mraa_gpio_write_register(mraa_gpio_context dev,int value)
-{
-    if (advance_func->gpio_mmaped_write_replace != NULL)
-        return advance_func->gpio_mmaped_write_replace(dev,value);
-    if (advance_func->gpio_mmaped_write_pre != NULL) {
-        mraa_result_t pre_ret = (advance_func->gpio_mmaped_write_pre(dev,value));
-        if(pre_ret != MRAA_SUCCESS)
-            return pre_ret;
-    }
-    if (value == 1) {
-        *((unsigned *)dev->reg) |= (1<<dev->reg_bit_pos);
-        return MRAA_SUCCESS;
-    }
-    *((unsigned *)dev->reg) &= ~(1<<dev->reg_bit_pos);
-
-    if (advance_func->gpio_mmaped_write_post != NULL)
-        return advance_func->gpio_mmaped_write_post(dev,value);
-    return MRAA_SUCCESS;
-}
 
 static mraa_result_t
 mraa_gpio_wait_interrupt(int fd)
@@ -174,7 +181,12 @@ mraa_gpio_interrupt_handler(void* arg)
     // open gpio value with open(3)
     char bu[MAX_SIZE];
     sprintf(bu, SYSFS_CLASS_GPIO "/gpio%d/value", dev->pin);
-    dev->isr_value_fp = open(bu, O_RDONLY);
+    int fp = open(bu, O_RDONLY);
+    if (fp < 0) {
+        syslog(LOG_ERR, "gpio: failed to open gpio%d/value", dev->pin);
+        return NULL;
+    }
+    dev->isr_value_fp = fp;
 
     for (;;) {
         ret = mraa_gpio_wait_interrupt(dev->isr_value_fp);
@@ -190,11 +202,11 @@ mraa_gpio_interrupt_handler(void* arg)
             PyObject *ret;
             arglist = Py_BuildValue("(i)", dev->isr_args);
             if (arglist == NULL) {
-                syslog(LOG_ERR, "Py_BuildValue NULL");
+                syslog(LOG_ERR, "gpio: Py_BuildValue NULL");
             } else {
                 ret = PyEval_CallObject((PyObject*)dev->isr, arglist);
                 if (ret == NULL) {
-                    syslog(LOG_ERR, "PyEval_CallObject failed");
+                    syslog(LOG_ERR, "gpio: PyEval_CallObject failed");
                 } else {
                     Py_DECREF(ret);
                 }
@@ -229,7 +241,7 @@ mraa_gpio_edge_mode(mraa_gpio_context dev, gpio_edge_t mode)
 
     int edge = open(filepath, O_RDWR);
     if (edge == -1) {
-        syslog(LOG_ERR, "Failed to open edge for writing");
+        syslog(LOG_ERR, "gpio: Failed to open edge for writing");
         return MRAA_ERROR_INVALID_RESOURCE;
     }
 
@@ -253,7 +265,7 @@ mraa_gpio_edge_mode(mraa_gpio_context dev, gpio_edge_t mode)
             return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
     }
     if (write(edge, bu, length*sizeof(char)) == -1) {
-        syslog(LOG_ERR, "Failed to write to edge");
+        syslog(LOG_ERR, "gpio: Failed to write to edge");
         close(edge);
         return MRAA_ERROR_INVALID_RESOURCE;
     }
@@ -294,9 +306,10 @@ mraa_gpio_isr_exit(mraa_gpio_context dev)
     // stop isr being useful
     ret = mraa_gpio_edge_mode(dev, MRAA_GPIO_EDGE_NONE);
 
-    if ((dev->thread_id != 0) &&
-        (pthread_cancel(dev->thread_id) != 0)) {
-        ret = MRAA_ERROR_INVALID_HANDLE;
+    if ((dev->thread_id != 0)) {
+        if ((pthread_cancel(dev->thread_id) != 0) || (pthread_join(dev->thread_id, NULL) != 0)) {
+            ret = MRAA_ERROR_INVALID_HANDLE;
+        }
     }
 
     // close the filehandle in case it's still open
@@ -339,7 +352,7 @@ mraa_gpio_mode(mraa_gpio_context dev, gpio_mode_t mode)
 
     int drive = open(filepath, O_WRONLY);
     if (drive == -1) {
-        syslog(LOG_ERR, "Failed to open drive for writing");
+        syslog(LOG_ERR, "gpio: Failed to open drive for writing");
         return MRAA_ERROR_INVALID_RESOURCE;
     }
 
@@ -363,7 +376,7 @@ mraa_gpio_mode(mraa_gpio_context dev, gpio_mode_t mode)
             return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
     }
     if (write(drive, bu, length*sizeof(char)) == -1) {
-        syslog(LOG_ERR, "Failed to write to drive mode");
+        syslog(LOG_ERR, "gpio: Failed to write to drive mode");
         close(drive);
         return MRAA_ERROR_INVALID_RESOURCE;
 
@@ -378,12 +391,14 @@ mraa_gpio_mode(mraa_gpio_context dev, gpio_mode_t mode)
 mraa_result_t
 mraa_gpio_dir(mraa_gpio_context dev, gpio_dir_t dir)
 {
-    if (advance_func->gpio_dir_replace != NULL)
+    if (advance_func->gpio_dir_replace != NULL) {
         return advance_func->gpio_dir_replace(dev,dir);
+    }
     if (advance_func->gpio_dir_pre != NULL) {
         mraa_result_t pre_ret = (advance_func->gpio_dir_pre(dev,dir));
-        if(pre_ret != MRAA_SUCCESS)
+        if (pre_ret != MRAA_SUCCESS) {
             return pre_ret;
+        }
     }
 
     if (dev == NULL) {
@@ -399,7 +414,16 @@ mraa_gpio_dir(mraa_gpio_context dev, gpio_dir_t dir)
     int direction = open(filepath, O_RDWR);
 
     if (direction == -1) {
-        return MRAA_ERROR_INVALID_RESOURCE;
+        // Direction Failed to Open. If HIGH or LOW was passed will try and set
+        // If not fail as usual.
+        switch (dir) {
+            case MRAA_GPIO_OUT_HIGH:
+                return mraa_gpio_write(dev, 1);
+            case MRAA_GPIO_OUT_LOW:
+                return mraa_gpio_write(dev, 0);
+            default:
+                return MRAA_ERROR_INVALID_RESOURCE;
+        }
     }
 
     char bu[MAX_SIZE];
@@ -411,6 +435,12 @@ mraa_gpio_dir(mraa_gpio_context dev, gpio_dir_t dir)
         case MRAA_GPIO_IN:
             length = snprintf(bu, sizeof(bu), "in");
             break;
+        case MRAA_GPIO_OUT_HIGH:
+            length = snprintf(bu, sizeof(bu), "high");
+            break;
+        case MRAA_GPIO_OUT_LOW:
+            length = snprintf(bu, sizeof(bu), "low");
+            break;
         default:
             close(direction);
             return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
@@ -430,9 +460,16 @@ mraa_gpio_dir(mraa_gpio_context dev, gpio_dir_t dir)
 int
 mraa_gpio_read(mraa_gpio_context dev)
 {
+    if (dev == NULL)
+        return -1;
+
+    if (dev->mmap_read != NULL)
+        return dev->mmap_read(dev);
+
     if (dev->value_fp == -1) {
         if (mraa_gpio_get_valfp(dev) != MRAA_SUCCESS) {
-             syslog(LOG_ERR, "Failed to get value file pointer");
+            syslog(LOG_ERR, "gpio: Failed to get value file pointer");
+            return -1;
         }
     }
     else {
@@ -441,20 +478,22 @@ mraa_gpio_read(mraa_gpio_context dev)
     }
     char bu[2];
     if (read(dev->value_fp, bu, 2*sizeof(char)) != 2) {
-        syslog(LOG_ERR, "Failed to read a sensible value from sysfs");
+        syslog(LOG_ERR, "gpio: Failed to read a sensible value from sysfs");
+        return -1;
     }
     lseek(dev->value_fp, 0, SEEK_SET);
-    int ret = strtol(bu, NULL, 10);
 
-    return ret;
-    return 0;
+    return (int) strtol(bu, NULL, 10);
 }
 
 mraa_result_t
 mraa_gpio_write(mraa_gpio_context dev, int value)
 {
-    if (dev->mmap == 1)
-        return mraa_gpio_write_register(dev,value);
+    if (dev == NULL)
+        return MRAA_ERROR_INVALID_HANDLE;
+
+    if (dev->mmap_write != NULL)
+        return dev->mmap_write(dev,value);
 
     if (advance_func->gpio_write_pre != NULL) {
         mraa_result_t pre_ret = (advance_func->gpio_write_pre(dev,value));
@@ -463,8 +502,11 @@ mraa_gpio_write(mraa_gpio_context dev, int value)
     }
 
     if (dev->value_fp == -1) {
-        mraa_gpio_get_valfp(dev);
+        if (mraa_gpio_get_valfp(dev) != MRAA_SUCCESS) {
+            return MRAA_ERROR_INVALID_RESOURCE;
+        }
     }
+
     if (lseek(dev->value_fp, 0, SEEK_SET) == -1) {
         return MRAA_ERROR_INVALID_RESOURCE;
     }
@@ -485,14 +527,14 @@ mraa_gpio_unexport_force(mraa_gpio_context dev)
 {
     int unexport = open(SYSFS_CLASS_GPIO "/unexport", O_WRONLY);
     if (unexport == -1) {
-        syslog(LOG_ERR, "Failed to open unexport for writing");
+        syslog(LOG_ERR, "gpio: Failed to open unexport for writing");
         return MRAA_ERROR_INVALID_RESOURCE;
     }
 
     char bu[MAX_SIZE];
     int length = snprintf(bu, sizeof(bu), "%d", dev->pin);
     if (write(unexport, bu, length*sizeof(char)) == -1) {
-        syslog(LOG_ERR, "Failed to write to unexport");
+        syslog(LOG_ERR, "gpio: Failed to write to unexport");
         close(unexport);
         return MRAA_ERROR_INVALID_RESOURCE;
     }
@@ -513,12 +555,18 @@ mraa_gpio_unexport(mraa_gpio_context dev)
 mraa_result_t
 mraa_gpio_close(mraa_gpio_context dev)
 {
+    mraa_result_t result = MRAA_SUCCESS;
+
+    if (advance_func->gpio_close_pre != NULL) {
+        result = advance_func->gpio_close_pre(dev);
+    }
+
     if (dev->value_fp != -1) {
         close(dev->value_fp);
     }
     mraa_gpio_unexport(dev);
     free(dev);
-    return MRAA_SUCCESS;
+    return result;
 }
 
 mraa_result_t
@@ -533,43 +581,28 @@ mraa_gpio_owner(mraa_gpio_context dev, mraa_boolean_t own)
 mraa_result_t
 mraa_gpio_use_mmaped(mraa_gpio_context dev, mraa_boolean_t mmap_en)
 {
-    if (dev ==  NULL) {
-        return MRAA_ERROR_INVALID_RESOURCE;
+    if (advance_func->gpio_mmap_setup != NULL) {
+        return advance_func->gpio_mmap_setup(dev,mmap_en);
     }
 
-    if (mraa_pin_mode_test(dev->phy_pin, MRAA_PIN_FAST_GPIO) == 0)
-        return MRAA_ERROR_NO_RESOURCES;
-
-    mraa_mmap_pin_t *mmp = mraa_setup_mmap_gpio(dev->phy_pin);
-    if (mmp == NULL)
-        return MRAA_ERROR_INVALID_RESOURCE;
-
-    if (mmap_en == 1) {
-        if (dev->mmap == 0) {
-            close(dev->value_fp);
-            int fd;
-            fd = open(mmp->mem_dev, O_RDWR);
-            if (fd < 1) {
-                syslog(LOG_ERR, "Unable to open memory device");
-                return MRAA_ERROR_INVALID_RESOURCE;
-            }
-            dev->reg_sz = mmp->mem_sz;
-            dev->reg = mmap(NULL, dev->reg_sz, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
-            dev->reg_bit_pos = mmp->bit_pos;
-            dev->mmap = 1;
-            close(fd);
-            return MRAA_SUCCESS;
-        }
-        return MRAA_ERROR_INVALID_PARAMETER;
-    }
-
-    if (mmap_en == 0) {
-        if (dev ->mmap == 1) {
-            munmap(dev->reg, dev->reg_sz);
-            dev->mmap = 0;
-        }
-        return MRAA_ERROR_INVALID_PARAMETER;
-    }
-
-    return MRAA_SUCCESS;
+    syslog(LOG_ERR, "gpio: mmap not implemented on this platform");
+    return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
+}
+
+int
+mraa_gpio_get_pin(mraa_gpio_context dev)
+{
+    if (dev == NULL) {
+        syslog(LOG_ERR, "gpio: context is invalid");
+    }
+    return dev->phy_pin;
+}
+
+int
+mraa_gpio_get_pin_raw(mraa_gpio_context dev)
+{
+    if (dev == NULL) {
+        syslog(LOG_ERR, "gpio: context is invalid");
+    }
+    return dev->pin;
 }

src/i2c/LICENSE

@@ -0,0 +1,22 @@
+The MIT License (MIT)
+
+Copyright (c) 2005-2014 RoadNarrows LLC.
+htpt://roadnarrows.com
+All Rights Reserved
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of
+this software and associated documentation files (the "Software"), to deal in
+the Software without restriction, including without limitation the rights to
+use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+the Software, and to permit persons to whom the Software is furnished to do so,
+subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

src/i2c/i2c.c

@@ -2,6 +2,9 @@
  * Author: Brendan Le Foll <brendan.le.foll@intel.com>
  * Copyright (c) 2014 Intel Corporation.
  *
+ * Code is modified from the RoadNarrows-robotics i2c library (distributed under
+ * the MIT license, license is included verbatim under src/i2c/LICENSE)
+ *
  * Permission is hereby granted, free of charge, to any person obtaining
  * a copy of this software and associated documentation files (the
  * "Software"), to deal in the Software without restriction, including
@@ -23,28 +26,85 @@
  */
 
 #include "i2c.h"
-#include "smbus.h"
 #include "mraa_internal.h"
 
+#include <stdlib.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <inttypes.h>
+#include <sys/types.h>
+#include <sys/errno.h>
+#include <sys/ioctl.h>
+#include "linux/i2c-dev.h"
+
+typedef union i2c_smbus_data_union
+{
+    uint8_t byte; ///< data byte
+    unsigned short word; ///< data short word
+    uint8_t block[I2C_SMBUS_BLOCK_MAX + 2];
+    ///< block[0] is used for length and one more for PEC
+} i2c_smbus_data_t;
+
+typedef struct i2c_smbus_ioctl_data_struct
+{
+    uint8_t read_write; ///< operation direction
+    uint8_t command; ///< ioctl command
+    int size; ///< data size
+    i2c_smbus_data_t *data; ///< data
+} i2c_smbus_ioctl_data_t;
+
+int
+mraa_i2c_smbus_access(int fh, uint8_t read_write, uint8_t command, int size,
+        i2c_smbus_data_t *data)
+{
+  i2c_smbus_ioctl_data_t args;
+
+  args.read_write = read_write;
+  args.command = command;
+  args.size = size;
+  args.data = data;
+
+  return ioctl(fh, I2C_SMBUS, &args);
+}
+
 mraa_i2c_context
 mraa_i2c_init(int bus)
 {
-    int checked_pin = mraa_setup_i2c(bus);
-    if (checked_pin < 0) {
-        switch(checked_pin) {
-            case MRAA_NO_SUCH_IO:
-                syslog(LOG_ERR, "No i2c on board");
-                return NULL;
-            case MRAA_IO_SETUP_FAILURE:
-                syslog(LOG_ERR, "Failed to set-up i2c multiplexer");
-                return NULL;
-            case MRAA_PLATFORM_NO_INIT:
-                syslog(LOG_ERR, "Platform Not Initialised");
-                return NULL;
-            default: return NULL;
+    if (plat == NULL) {
+        syslog(LOG_ERR, "i2c: Platform Not Initialised");
+        return NULL;
+    }
+    if (plat->i2c_bus_count == 0) {
+        syslog(LOG_ERR, "No i2c buses defined in platform");
+        return NULL;
+    }
+    if (bus >= plat->i2c_bus_count) {
+        syslog(LOG_ERR, "Above i2c bus count");
+        return NULL;
+    }
+
+    if (plat->i2c_bus[bus].bus_id == -1) {
+        syslog(LOG_ERR, "Invalid i2c bus, moving to default i2c bus");
+        bus = plat->def_i2c_bus;
+    }
+
+    int pos = plat->i2c_bus[bus].sda;
+    if (plat->pins[pos].i2c.mux_total > 0) {
+        if (mraa_setup_mux_mapped(plat->pins[pos].i2c) != MRAA_SUCCESS) {
+            syslog(LOG_ERR, "i2c: Failed to set-up i2c sda multiplexer");
+            return NULL;
         }
     }
-    return mraa_i2c_init_raw((unsigned int) checked_pin);
+
+    pos = plat->i2c_bus[bus].scl;
+    if (plat->pins[pos].i2c.mux_total > 0) {
+        if (mraa_setup_mux_mapped(plat->pins[pos].i2c) != MRAA_SUCCESS) {
+            syslog(LOG_ERR, "i2c: Failed to set-up i2c scl multiplexer");
+            return NULL;
+        }
+    }
+
+    return mraa_i2c_init_raw((unsigned int) plat->i2c_bus[bus].bus_id);
 }
 
 mraa_i2c_context
@@ -55,13 +115,21 @@ mraa_i2c_init_raw(unsigned int bus)
             return NULL;
     }
     mraa_i2c_context dev = (mraa_i2c_context) malloc(sizeof(struct _i2c));
-    if (dev == NULL)
+    if (dev == NULL) {
+        syslog(LOG_CRIT, "i2c: Failed to allocate memory for context");
         return NULL;
+    }
 
     char filepath[32];
+    dev->busnum = bus;
     snprintf(filepath, 32, "/dev/i2c-%u", bus);
     if ((dev->fh = open(filepath, O_RDWR)) < 1) {
-        syslog(LOG_ERR, "Failed to open requested i2c port %s", filepath);
+        syslog(LOG_ERR, "i2c: Failed to open requested i2c port %s", filepath);
+    }
+
+    if (ioctl(dev->fh, I2C_FUNCS, &dev->funcs) < 0) {
+        syslog(LOG_CRIT, "i2c: Failed to get I2C_FUNC map from device");
+        dev->funcs = 0;
     }
 
     if (advance_func->i2c_init_post != NULL) {
@@ -75,11 +143,12 @@ mraa_i2c_init_raw(unsigned int bus)
 }
 
 mraa_result_t
-mraa_i2c_frequency(mraa_i2c_context dev, int hz)
+mraa_i2c_frequency(mraa_i2c_context dev, mraa_i2c_mode_t mode)
 {
-    dev->hz = hz;
-
-    return MRAA_SUCCESS;
+    if (advance_func->i2c_set_frequency_replace != NULL) {
+        return advance_func->i2c_set_frequency_replace(dev, mode);
+    }
+    return MRAA_ERROR_FEATURE_NOT_SUPPORTED;
 }
 
 int
@@ -95,40 +164,112 @@ mraa_i2c_read(mraa_i2c_context dev, uint8_t* data, int length)
 uint8_t
 mraa_i2c_read_byte(mraa_i2c_context dev)
 {
-    uint8_t byte = i2c_smbus_read_byte(dev->fh);
-    if (byte < 0) {
-        return -1;
+    i2c_smbus_data_t d;
+
+    if (mraa_i2c_smbus_access(dev->fh, I2C_SMBUS_READ, I2C_NOCMD,
+            I2C_SMBUS_BYTE, &d) < 0) {
+        syslog(LOG_ERR, "i2c: Failed to write");
+        return 0;
     }
-    return byte;
+    return 0x0FF & d.byte;
+}
+
+uint8_t
+mraa_i2c_read_byte_data(mraa_i2c_context dev, uint8_t command)
+{
+    i2c_smbus_data_t d;
+
+    if (mraa_i2c_smbus_access(dev->fh, I2C_SMBUS_READ, command,
+            I2C_SMBUS_BYTE_DATA, &d) < 0) {
+        syslog(LOG_ERR, "i2c: Failed to write");
+        return 0;
+    }
+    return 0x0FF & d.byte;
+}
+
+uint16_t
+mraa_i2c_read_word_data(mraa_i2c_context dev, uint8_t command)
+{
+    i2c_smbus_data_t d;
+
+    if (mraa_i2c_smbus_access(dev->fh, I2C_SMBUS_READ, command,
+            I2C_SMBUS_WORD_DATA, &d) < 0) {
+        syslog(LOG_ERR, "i2c: Failed to write");
+        return 0;
+    }
+    return 0xFFFF & d.word;
 }
 
 mraa_result_t
 mraa_i2c_write(mraa_i2c_context dev, const uint8_t* data, int length)
 {
-    if (i2c_smbus_write_i2c_block_data(dev->fh, data[0], length-1, (uint8_t*) data+1) < 0) {
-        syslog(LOG_ERR, "Failed to write to i2c");
-	return MRAA_ERROR_INVALID_HANDLE;
+    i2c_smbus_data_t d;
+    int i;
+    uint8_t command = data[0];
+
+    data = &data[1];
+    length = length-1;
+    if (length > I2C_SMBUS_I2C_BLOCK_MAX) {
+        length = I2C_SMBUS_I2C_BLOCK_MAX;
     }
-    return MRAA_SUCCESS;
+
+    for (i=1; i<=length; i++) {
+        d.block[i] = data[i-1];
+    }
+    d.block[0] = length;
+
+    return mraa_i2c_smbus_access(dev->fh, I2C_SMBUS_WRITE, command,
+            I2C_SMBUS_I2C_BLOCK_DATA, &d);
 }
 
 mraa_result_t
 mraa_i2c_write_byte(mraa_i2c_context dev, const uint8_t data)
 {
-    if (i2c_smbus_write_byte(dev->fh, data) < 0) {
-        syslog(LOG_ERR, "Failed to write to i2c");
-	return MRAA_ERROR_INVALID_HANDLE;
+    if (mraa_i2c_smbus_access(dev->fh, I2C_SMBUS_WRITE, data,
+            I2C_SMBUS_BYTE, NULL) < 0) {
+        syslog(LOG_ERR, "i2c: Failed to write");
+        return MRAA_ERROR_INVALID_HANDLE;
     }
     return MRAA_SUCCESS;
 }
 
 mraa_result_t
-mraa_i2c_address(mraa_i2c_context dev, int addr)
+mraa_i2c_write_byte_data(mraa_i2c_context dev, const uint8_t data,
+        const uint8_t command)
 {
-    dev->addr = addr;
+    i2c_smbus_data_t d;
+
+    d.byte = data;
+    if (mraa_i2c_smbus_access(dev->fh, I2C_SMBUS_WRITE, command,
+            I2C_SMBUS_BYTE_DATA, &d) < 0) {
+        syslog(LOG_ERR, "i2c: Failed to write");
+        return MRAA_ERROR_INVALID_HANDLE;
+    }
+    return MRAA_SUCCESS;
+}
+
+mraa_result_t
+mraa_i2c_write_word_data(mraa_i2c_context dev, const uint16_t data,
+        const uint8_t command)
+{
+    i2c_smbus_data_t d;
+
+    d.word = data;
+    if (mraa_i2c_smbus_access(dev->fh, I2C_SMBUS_WRITE, command,
+            I2C_SMBUS_WORD_DATA, &d) < 0) {
+        syslog(LOG_ERR, "i2c: Failed to write");
+        return MRAA_ERROR_INVALID_HANDLE;
+    }
+    return MRAA_SUCCESS;
+}
+
+mraa_result_t
+mraa_i2c_address(mraa_i2c_context dev, uint8_t addr)
+{
+    dev->addr = (int) addr;
     if (ioctl(dev->fh, I2C_SLAVE_FORCE, addr) < 0) {
-        syslog(LOG_ERR, "Failed to set slave address %d", addr);
-	return MRAA_ERROR_INVALID_HANDLE;
+        syslog(LOG_ERR, "i2c: Failed to set slave address %d", addr);
+        return MRAA_ERROR_INVALID_HANDLE;
     }
     return MRAA_SUCCESS;
 }

src/i2c/smbus.c

@@ -1,420 +0,0 @@
-// Library:   libi2c API
-// File:      smbus.c
-
-/*! \file
- *
- * $LastChangedDate: 2009-09-09 09:44:12 -0600 (Wed, 09 Sep 2009) $
- * $Rev: 130 $
- *
- * \brief System Management Bus (SMBus) over I<sup>2</sup>C communication
- * interface.
- *
- * \author Robin Knight (robin.knight@roadnarrows.com)
- *
- * \par Copyright:
- * (C) 2009.  RoadNarrows LLC.
- * (http://www.roadnarrows.com) \n
- * All Rights Reserved
- *
- * <hr>
- * \par Original Source and Copyright:
- * See i2c-dev.h.
- *
- * <hr>
- */
-// Permission is hereby granted, without written agreement and without
-// license or royalty fees, to use, copy, modify, and distribute this
-// software and its documentation for any purpose, provided that
-// (1) The above copyright notice and the following two paragraphs
-// appear in all copies of the source code and (2) redistributions
-// including binaries reproduces these notices in the supporting
-// documentation.   Substantial modifications to this software may be
-// copyrighted by their authors and need not follow the licensing terms
-// described here, provided that the new terms are clearly indicated in
-// all files where they apply.
-//
-// IN NO EVENT SHALL THE AUTHOR, ROADNARROWS LLC, OR ANY MEMBERS/EMPLOYEES
-// OF ROADNARROW LLC OR DISTRIBUTORS OF THIS SOFTWARE BE LIABLE TO ANY
-// PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
-// DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION,
-// EVEN IF THE AUTHORS OR ANY OF THE ABOVE PARTIES HAVE BEEN ADVISED OF
-// THE POSSIBILITY OF SUCH DAMAGE.
-//
-// THE AUTHOR AND ROADNARROWS LLC SPECIFICALLY DISCLAIM ANY WARRANTIES,
-// INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
-// FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS ON AN
-// "AS IS" BASIS, AND THE AUTHORS AND DISTRIBUTORS HAVE NO OBLIGATION TO
-// PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
-//
-////////////////////////////////////////////////////////////////////////////////
-
-#include "smbus.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*!
- * \brief Execute an SMBus IOCTL.
- *
- * \param fd            File descriptor to opened SMBus device.
- * \param read_write    Operation access type.
- * \param command       Operation command or immediate data.
- * \param size          Data size.
- * \param [in,out] data Read/write/control data
- *
- * \return
- *  Returns \h_ge 0 on success.
- *  Else errno is set appropriately and -1 is returned.
- */
-int i2c_smbus_access(int fd, uint8_t read_write, uint8_t command,
-                      int size, i2c_smbus_data_t *data)
-{
-  i2c_smbus_ioctl_data_t args;
-
-  args.read_write = read_write;
-  args.command = command;
-  args.size = size;
-  args.data = data;
-
-  return ioctl(fd, I2C_SMBUS, &args);
-}
-
-/*!
- * \brief Write a quick value to the SMBus.
- *
- * \param fd        File descriptor to opened SMBus device.
- * \param value     Value to write
- *
- * \return
- *  Returns \h_ge 0 on success.
- *  Else errno is set appropriately and -1 is returned.
- */
-int i2c_smbus_write_quick(int fd, uint8_t value)
-{
-  return i2c_smbus_access(fd, value, I2C_NOCMD, I2C_SMBUS_QUICK, NULL);
-}
-
-/*!
- * \brief Read an immediate byte from the SMBus.
- *
- * \param fd            File descriptor to opened SMBus device.
- *
- * \return
- *  Returns read byte on on success.
- *  Else errno is set appropriately and -1 is returned.
- */
-int i2c_smbus_read_byte(int fd)
-{
-  i2c_smbus_data_t  data;
-  int               rc;
-
-  rc = i2c_smbus_access(fd, I2C_SMBUS_READ, I2C_NOCMD, I2C_SMBUS_BYTE, &data);
-
-  return rc>=0? 0x0FF & data.byte: -1;
-}
-
-/*!
- * \brief Write an immediate byte to the SMBus.
- *
- * \param fd            File descriptor to opened SMBus device.
- * \param value         Byte value to write.
- *
- * \return
- *  Returns \h_ge 0 on success.
- *  Else errno is set appropriately and -1 is returned.
- */
-int i2c_smbus_write_byte(int fd, uint8_t value)
-{
-  return i2c_smbus_access(fd, I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
-}
-
-/*!
- * \brief Read a data byte from the SMBus.
- *
- * \param fd            File descriptor to opened SMBus device.
- * \param command       Command to SMBus device.
- *
- * \return
- *  Returns read byte on on success.
- *  Else errno is set appropriately and -1 is returned.
- */
-int i2c_smbus_read_byte_data(int fd, uint8_t command)
-{
-  i2c_smbus_data_t  data;
-  int               rc;
-
-  rc = i2c_smbus_access(fd, I2C_SMBUS_READ, command, I2C_SMBUS_BYTE_DATA,
-                              &data);
-
-  return rc>=0? 0x0FF & data.byte: -1;
-}
-
-/*!
- * \brief Write a data byte to the SMBus.
- *
- * \param fd            File descriptor to opened SMBus device.
- * \param command       Command to SMBus device.
- * \param value         Byte value to write.
- *
- * \return
- *  Returns \h_ge 0 on success.
- *  Else errno is set appropriately and -1 is returned.
- */
-int i2c_smbus_write_byte_data(int fd, uint8_t command, uint8_t value)
-{
-  i2c_smbus_data_t  data;
-
-  data.byte = value;
-
-  return i2c_smbus_access(fd, I2C_SMBUS_WRITE, command,
-                          I2C_SMBUS_BYTE_DATA, &data);
-}
-
-/*!
- * \brief Read a data 2-byte word from the SMBus.
- *
- * \param fd            File descriptor to opened SMBus device.
- * \param command       Command to SMBus device.
- *
- * \return
- *  Returns read 2-byte word on on success.
- *  Else errno is set appropriately and -1 is returned.
- */
-int i2c_smbus_read_word_data(int fd, uint8_t command)
-{
-  i2c_smbus_data_t  data;
-  int               rc;
-
-  rc = i2c_smbus_access(fd, I2C_SMBUS_READ, command, I2C_SMBUS_WORD_DATA,
-                          &data);
-
-  return rc>=0? 0x0FFFF & data.word: -1;
-}
-
-/*!
- * \brief Write a data 2-byte word to the SMBus.
- *
- * \param fd            File descriptor to opened SMBus device.
- * \param command       Command to SMBus device.
- * \param value         Word value to write.
- *
- * \return
- *  Returns \h_ge 0 on success.
- *  Else errno is set appropriately and -1 is returned.
- */
-int i2c_smbus_write_word_data(int fd, uint8_t command, unsigned short value)
-{
-  i2c_smbus_data_t  data;
-
-  data.word = value;
-
-  return i2c_smbus_access(fd, I2C_SMBUS_WRITE,  command,
-                          I2C_SMBUS_WORD_DATA, &data);
-}
-
-/*!
- * \brief Issue a 2-byte word process call (write/read) to the SMBus.
- *
- * \param fd            File descriptor to opened SMBus device.
- * \param command       Command to SMBus device.
- * \param value         Word value to write.
- *
- * \return
- *  Returns read 2-byte word on on success.
- *  Else errno is set appropriately and -1 is returned.
- */
-int i2c_smbus_process_call(int fd, uint8_t command, unsigned short value)
-{
-  i2c_smbus_data_t  data;
-  int               rc;
-
-  data.word = value;
-
-  rc = i2c_smbus_access(fd, I2C_SMBUS_WRITE, command, I2C_SMBUS_PROC_CALL,
-                        &data);
-
-  return rc>=0? 0x0FFFF & data.word: -1;
-}
-
-
-/*!
- * \brief Read a block of data from the SMBus.
- *
- * \param fd            File descriptor to opened SMBus device.
- * \param command       Command to SMBus device.
- * \param [out] values  Buffer to hold the block of read byte values.\n
- *                      Must be large enough to receive the data.
- *
- * \return
- *  On success, returns \h_ge 0 the number of bytes read, excluding any header
- *  fields. Else errno is set appropriately and -1 is returned.
- */
-int i2c_smbus_read_block_data(int fd, uint8_t command, uint8_t *values)
-{
-  i2c_smbus_data_t  data;
-  int               i;
-  int               rc;
-
-  rc = i2c_smbus_access(fd, I2C_SMBUS_READ, command, I2C_SMBUS_BLOCK_DATA,
-                          &data);
-
-  if( rc >= 0 )
-  {
-    for(i=1; i<=data.block[0]; ++i)
-    {
-      values[i-1] = data.block[i];
-    }
-    rc = data.block[0];
-  }
-
-  return rc;
-}
-
-/*!
- * \brief Write a data block to the SMBus.
- *
- * \param fd            File descriptor to opened SMBus device.
- * \param command       Command to SMBus device.
- * \param length        Length of buffer (bytes) to write.
- * \param [in] values   Buffer of data to write.
- *
- * \return
- *  Returns \h_ge 0 on success.
- *  Else errno is set appropriately and -1 is returned.
- */
-int i2c_smbus_write_block_data(int fd, uint8_t command, uint8_t length,
-                              const uint8_t *values)
-{
-  i2c_smbus_data_t  data;
-  int               i;
-
-  if( length > I2C_SMBUS_BLOCK_MAX )
-  {
-    length = I2C_SMBUS_BLOCK_MAX;
-  }
-
-  for(i=1; i<=length; i++)
-  {
-    data.block[i] = values[i-1];
-  }
-  data.block[0] = length;
-
-  return i2c_smbus_access(fd, I2C_SMBUS_WRITE, command,
-                          I2C_SMBUS_BLOCK_DATA, &data);
-}
-
-/*!
- * \brief Read a block of data from the SMBus via low-level I<sup>2</sup>C.
- *
- * \param fd            File descriptor to opened SMBus device.
- * \param command       Command to SMBus device.
- * \param [out] values  Buffer to hold the block of read byte values.\n
- *                      Must be large enough to receive the data.
- *
- * \return
- *  On success, returns \h_ge 0 the number of bytes read, excluding any header
- *  fields. Else errno is set appropriately and -1 is returned.
- */
-int i2c_smbus_read_i2c_block_data(int fd, uint8_t command, uint8_t *values)
-{
-  i2c_smbus_data_t  data;
-  int               i;
-  int               rc;
-
-  rc = i2c_smbus_access(fd, I2C_SMBUS_READ, command, I2C_SMBUS_I2C_BLOCK_DATA,
-                        &data);
-  if( rc >= 0 )
-  {
-    for(i=1; i<=data.block[0]; i++)
-    {
-      values[i-1] = data.block[i];
-    }
-    rc = data.block[0];
-  }
-  return rc;
-}
-
-/*!
- * \brief Write a block of data to the SMBus via low-level I<sup>2</sup>C.
- *
- * \param fd            File descriptor to opened SMBus device.
- * \param command       Command to SMBus device.
- * \param length        Length of buffer (bytes) to write.
- * \param [in] values   Buffer of data to write.
- *
- * \return
- *  Returns \h_ge 0 on success.
- *  Else errno is set appropriately and -1 is returned.
- */
-int i2c_smbus_write_i2c_block_data(int fd, uint8_t command, uint8_t length,
-                                  const uint8_t *values)
-{
-  i2c_smbus_data_t  data;
-  int               i;
-
-  if( length > I2C_SMBUS_I2C_BLOCK_MAX )
-  {
-    length = I2C_SMBUS_I2C_BLOCK_MAX;
-  }
-
-  for(i=1; i<=length; i++)
-  {
-    data.block[i] = values[i-1];
-  }
-  data.block[0] = length;
-
-  return i2c_smbus_access(fd, I2C_SMBUS_WRITE, command,
-                          I2C_SMBUS_I2C_BLOCK_DATA, &data);
-}
-
-/*!
- * \brief Issue a block process call (write/read) to the SMBus.
- *
- * \param fd                File descriptor to opened SMBus device.
- * \param command           Command to SMBus device.
- * \param length            Length of buffer (bytes) to write.
- * \param [in,out] values   Buffer of data to write and to hold the block of
- *                          read byte values.\n
- *                          Must be large enough to receive the data.
- *
- * \return
- *  On success, returns \h_ge 0 the number of bytes read, excluding any header
- *  fields. Else errno is set appropriately and -1 is returned.
- */
-int i2c_smbus_block_process_call(int fd, uint8_t command, uint8_t length,
-                                 uint8_t *values)
-{
-  i2c_smbus_data_t  data;
-  int               i;
-  int               rc;
-
-  if( length > I2C_SMBUS_BLOCK_MAX )
-  {
-    length = I2C_SMBUS_BLOCK_MAX;
-  }
-
-  for(i=1; i<=length; i++)
-  {
-    data.block[i] = values[i-1];
-  }
-  data.block[0] = length;
-
-  rc = i2c_smbus_access(fd, I2C_SMBUS_WRITE, command, I2C_SMBUS_BLOCK_PROC_CALL,
-                          &data);
-
-  if( rc >= 0 )
-  {
-    for(i=1; i<=data.block[0]; i++)
-    {
-      values[i-1] = data.block[i];
-    }
-    rc = data.block[0];
-  }
-
-  return rc;
-}
-
-#ifdef __cplusplus
-}
-#endif

src/intel_edison_fab_c.c

@@ -1,717 +0,0 @@
-/*
- * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
- * Copyright (c) 2014 Intel Corporation.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <stdlib.h>
-#include <string.h>
-
-#include "common.h"
-#include "intel_edison_fab_c.h"
-
-#define SYSFS_CLASS_GPIO "/sys/class/gpio"
-#define SYSFS_PINMODE_PATH "/sys/kernel/debug/gpio_debug/gpio"
-#define MAX_SIZE 64
-#define MAX_MODE_SIZE 8
-
-typedef struct {
-    int sysfs;
-    int mode;
-} mraa_intel_edision_pindef_t;
-
-typedef struct {
-    mraa_intel_edision_pindef_t gpio;
-    mraa_intel_edision_pindef_t pwm;
-    mraa_intel_edision_pindef_t i2c;
-    mraa_intel_edision_pindef_t spi;
-    mraa_intel_edision_pindef_t uart;
-} mraa_intel_edison_pinmodes_t;
-
-static mraa_gpio_context tristate;
-
-static mraa_intel_edison_pinmodes_t pinmodes[MRAA_INTEL_EDISON_PINCOUNT];
-static unsigned int outputen[] = {248,249,250,251,252,253,254,255,256,257,258,259,260,261,232,233,234,235,236,237};
-static unsigned int pullup_map[] = {216,217,218,219,220,221,222,223,224,225,226,227,228,229,208,209,210,211,212,213};
-
-static mraa_result_t
-mraa_intel_edison_pinmode_change(int sysfs, int mode)
-{
-    if (mode < 0 ) {
-        return MRAA_SUCCESS;
-    }
-    char buffer[MAX_SIZE];
-    snprintf(buffer, MAX_SIZE, SYSFS_PINMODE_PATH "%i/current_pinmux",sysfs);
-    int modef = open(buffer, O_WRONLY);
-    if (modef == -1) {
-        syslog(LOG_ERR, "Failed to open SoC pinmode for opening");
-        return MRAA_ERROR_INVALID_RESOURCE;
-    }
-
-    char mode_buf[MAX_MODE_SIZE];
-    int length = sprintf(mode_buf, "mode%u",mode);
-    if (write(modef, mode_buf, length*sizeof(char)) == -1) {
-        return MRAA_ERROR_INVALID_RESOURCE;
-    }
-    close(modef);
-
-    return MRAA_SUCCESS;
-}
-
-mraa_result_t
-mraa_intel_edison_gpio_dir_pre(mraa_gpio_context dev, gpio_dir_t dir)
-{
-    mraa_gpio_write(tristate, 0);
-    if (dev->phy_pin >= 0) {
-        int pin = dev->phy_pin;
-
-        mraa_gpio_context output_e;
-        output_e = mraa_gpio_init_raw(outputen[pin]);
-        if (mraa_gpio_dir(output_e, MRAA_GPIO_OUT) != MRAA_SUCCESS)
-            return MRAA_ERROR_INVALID_RESOURCE;
-        int output_val = 0;
-        if (dir == MRAA_GPIO_OUT)
-            output_val = 1;
-        if (mraa_gpio_write(output_e, output_val) != MRAA_SUCCESS)
-            return MRAA_ERROR_INVALID_RESOURCE;
-    }
-    return MRAA_SUCCESS;
-}
-
-mraa_result_t
-mraa_intel_edison_gpio_dir_post(mraa_gpio_context dev, gpio_dir_t dir)
-{
-    mraa_gpio_write(tristate, 1);
-    return MRAA_SUCCESS;
-}
-
-mraa_result_t
-mraa_intel_edison_gpio_init_post(mraa_gpio_context dev)
-{
-    if (dev == NULL)
-        return MRAA_ERROR_INVALID_RESOURCE;
-
-    int sysfs = pinmodes[dev->phy_pin].gpio.sysfs;
-    int mode = pinmodes[dev->phy_pin].gpio.mode;
-    mraa_result_t ret = mraa_intel_edison_pinmode_change(sysfs, mode);
-
-    return ret;
-}
-
-mraa_result_t
-mraa_intel_edison_i2c_init_pre(unsigned int bus)
-{
-    if(bus != 6) {
-        syslog(LOG_ERR, "Edison: You can't use that bus :/");
-        return MRAA_ERROR_INVALID_RESOURCE;
-    }
-    mraa_gpio_write(tristate, 0);
-    mraa_gpio_context io18_gpio = mraa_gpio_init_raw(14);
-    mraa_gpio_context io19_gpio = mraa_gpio_init_raw(165);
-    mraa_gpio_dir(io18_gpio, MRAA_GPIO_IN);
-    mraa_gpio_dir(io19_gpio, MRAA_GPIO_IN);
-    mraa_gpio_close(io18_gpio);
-    mraa_gpio_close(io19_gpio);
-
-    mraa_gpio_context io18_enable = mraa_gpio_init_raw(236);
-    mraa_gpio_context io19_enable = mraa_gpio_init_raw(237);
-    mraa_gpio_dir(io18_enable, MRAA_GPIO_OUT);
-    mraa_gpio_dir(io19_enable, MRAA_GPIO_OUT);
-    mraa_gpio_write(io18_enable, 0);
-    mraa_gpio_write(io19_enable, 0);
-    mraa_gpio_close(io18_enable);
-    mraa_gpio_close(io19_enable);
-
-    mraa_gpio_context io18_pullup = mraa_gpio_init_raw(212);
-    mraa_gpio_context io19_pullup = mraa_gpio_init_raw(213);
-    mraa_gpio_dir(io18_pullup, MRAA_GPIO_IN);
-    mraa_gpio_dir(io19_pullup, MRAA_GPIO_IN);
-    mraa_gpio_close(io18_pullup);
-    mraa_gpio_close(io19_pullup);
-
-    mraa_intel_edison_pinmode_change(28, 1);
-    mraa_intel_edison_pinmode_change(27, 1);
-
-    mraa_gpio_write(tristate, 1);
-    return MRAA_SUCCESS;
-}
-
-static mraa_result_t
-mraa_intel_edison_misc_spi()
-{
-    mraa_gpio_write(tristate, 0);
-
-    mraa_gpio_context io10_p1 = mraa_gpio_init_raw(263);
-    mraa_gpio_context io10_p2 = mraa_gpio_init_raw(240);
-    mraa_gpio_context io11_p1 = mraa_gpio_init_raw(262);
-    mraa_gpio_context io11_p2 = mraa_gpio_init_raw(241);
-    mraa_gpio_context io12_p1 = mraa_gpio_init_raw(242);
-    mraa_gpio_context io13_p1 = mraa_gpio_init_raw(243);
-    mraa_gpio_dir(io10_p1, MRAA_GPIO_OUT);
-    mraa_gpio_dir(io10_p2, MRAA_GPIO_OUT);
-    mraa_gpio_dir(io11_p1, MRAA_GPIO_OUT);
-    mraa_gpio_dir(io11_p2, MRAA_GPIO_OUT);
-    mraa_gpio_dir(io12_p1, MRAA_GPIO_OUT);
-    mraa_gpio_dir(io13_p1, MRAA_GPIO_OUT);
-
-    mraa_gpio_write(io10_p1, 1);
-    mraa_gpio_write(io10_p2, 0);
-    mraa_gpio_write(io11_p1, 1);
-    mraa_gpio_write(io11_p2, 0);
-    mraa_gpio_write(io12_p1, 0);
-    mraa_gpio_write(io13_p1, 0);
-
-    mraa_gpio_close(io10_p1);
-    mraa_gpio_close(io10_p2);
-    mraa_gpio_close(io11_p1);
-    mraa_gpio_close(io11_p2);
-    mraa_gpio_close(io12_p1);
-    mraa_gpio_close(io13_p1);
-
-    mraa_intel_edison_pinmode_change(111, 1);
-    mraa_intel_edison_pinmode_change(115, 1);
-    mraa_intel_edison_pinmode_change(114, 1);
-    mraa_intel_edison_pinmode_change(109, 1);
-    mraa_gpio_write(tristate, 1);
-
-    return MRAA_SUCCESS;
-}
-
-mraa_result_t
-mraa_intel_edison_aio_get_fp(mraa_aio_context dev)
-{
-    char file_path[64]= "";
-
-    snprintf(file_path, 64, "/sys/bus/iio/devices/iio:device1/in_voltage%d_raw",
-            dev->channel );
-
-    dev->adc_in_fp = open(file_path, O_RDONLY);
-    if (dev->adc_in_fp == -1) {
-        syslog(LOG_ERR, "Failed to open Analog input raw file %s for "
-                "reading!", file_path);
-        return MRAA_ERROR_INVALID_RESOURCE;
-    }
-
-    return MRAA_SUCCESS;
-}
-
-mraa_result_t
-mraa_intel_edison_aio_init_pre(unsigned int aio)
-{
-    if (aio > plat->aio_count) {
-        syslog(LOG_ERR, "Invalid analog input channel");
-        return MRAA_ERROR_INVALID_RESOURCE;
-    }
-
-    int pin = 14 + aio;
-    mraa_gpio_context output_e;
-    output_e = mraa_gpio_init_raw(outputen[pin]);
-    if (mraa_gpio_dir(output_e, MRAA_GPIO_OUT) != MRAA_SUCCESS)
-        return MRAA_ERROR_INVALID_RESOURCE;
-    if (mraa_gpio_write(output_e, 0) != MRAA_SUCCESS)
-        return MRAA_ERROR_INVALID_RESOURCE;
-    mraa_gpio_close(output_e);
-
-    mraa_gpio_context pullup_pin;
-    pullup_pin = mraa_gpio_init_raw(pullup_map[pin]);
-    if (mraa_gpio_dir(pullup_pin, MRAA_GPIO_IN) != MRAA_SUCCESS)
-        return MRAA_ERROR_INVALID_RESOURCE;
-    mraa_gpio_close(pullup_pin);
-
-    return MRAA_SUCCESS;
-}
-
-mraa_result_t
-mraa_intel_edison_aio_init_post(mraa_aio_context dev)
-{
-    mraa_gpio_write(tristate, 1);
-    return MRAA_SUCCESS;
-}
-
-mraa_result_t
-mraa_intel_edison_pwm_init_pre(int pin)
-{
-    if (pin < 0 || pin > 19)
-        return MRAA_ERROR_INVALID_RESOURCE;
-
-    if (!plat->pins[pin].capabilites.pwm)
-        return MRAA_ERROR_INVALID_RESOURCE;
-
-    mraa_gpio_context output_e;
-    output_e = mraa_gpio_init_raw(outputen[pin]);
-    if (mraa_gpio_dir(output_e, MRAA_GPIO_OUT) != MRAA_SUCCESS)
-        return MRAA_ERROR_INVALID_RESOURCE;
-    if (mraa_gpio_write(output_e, 1) != MRAA_SUCCESS)
-        return MRAA_ERROR_INVALID_RESOURCE;
-    mraa_gpio_close(output_e);
-
-    mraa_gpio_context pullup_pin;
-    pullup_pin = mraa_gpio_init_raw(pullup_map[pin]);
-    if (mraa_gpio_dir(pullup_pin, MRAA_GPIO_IN) != MRAA_SUCCESS)
-        return MRAA_ERROR_INVALID_RESOURCE;
-    mraa_gpio_close(pullup_pin);
-    mraa_intel_edison_pinmode_change(plat->pins[pin].gpio.pinmap, 1);
-
-    return MRAA_SUCCESS;
-}
-
-mraa_result_t
-mraa_intel_edison_pwm_init_post(mraa_pwm_context pwm)
-{
-    mraa_gpio_write(tristate, 1);
-    return MRAA_SUCCESS;
-}
-
-mraa_result_t
-mraa_intel_edison_spi_init_pre(int bus)
-{
-    mraa_gpio_write(tristate, 0);
-
-    mraa_gpio_context io10_out = mraa_gpio_init_raw(258);
-    mraa_gpio_context io11_out = mraa_gpio_init_raw(259);
-    mraa_gpio_context io12_out = mraa_gpio_init_raw(260);
-    mraa_gpio_context io13_out = mraa_gpio_init_raw(261);
-    mraa_gpio_dir(io10_out, MRAA_GPIO_OUT);
-    mraa_gpio_dir(io11_out, MRAA_GPIO_OUT);
-    mraa_gpio_dir(io12_out, MRAA_GPIO_OUT);
-    mraa_gpio_dir(io13_out, MRAA_GPIO_OUT);
-
-    mraa_gpio_write(io10_out, 1);
-    mraa_gpio_write(io11_out, 1);
-    mraa_gpio_write(io12_out, 0);
-    mraa_gpio_write(io13_out, 1);
-
-    mraa_gpio_close(io10_out);
-    mraa_gpio_close(io11_out);
-    mraa_gpio_close(io12_out);
-    mraa_gpio_close(io13_out);
-
-    mraa_gpio_context io10_pull = mraa_gpio_init_raw(226);
-    mraa_gpio_context io11_pull = mraa_gpio_init_raw(227);
-    mraa_gpio_context io12_pull = mraa_gpio_init_raw(228);
-    mraa_gpio_context io13_pull = mraa_gpio_init_raw(229);
-
-    mraa_gpio_dir(io10_pull, MRAA_GPIO_IN);
-    mraa_gpio_dir(io11_pull, MRAA_GPIO_IN);
-    mraa_gpio_dir(io12_pull, MRAA_GPIO_IN);
-    mraa_gpio_dir(io13_pull, MRAA_GPIO_IN);
-
-    mraa_gpio_close(io10_pull);
-    mraa_gpio_close(io11_pull);
-    mraa_gpio_close(io12_pull);
-    mraa_gpio_close(io13_pull);
-
-    return MRAA_SUCCESS;
-}
-
-mraa_result_t
-mraa_intel_edison_spi_init_post(mraa_spi_context spi)
-{
-    mraa_gpio_write(tristate, 1);
-    return MRAA_SUCCESS;
-}
-
-mraa_result_t
-mraa_intel_edison_gpio_mode_replace(mraa_gpio_context dev, gpio_mode_t mode)
-{
-    if (dev->value_fp != -1) {
-         close(dev->value_fp);
-         dev->value_fp = -1;
-    }
-
-    mraa_gpio_context pullup_e;
-    pullup_e = mraa_gpio_init_raw(pullup_map[dev->phy_pin]);
-    mraa_result_t sta = mraa_gpio_dir(pullup_e, MRAA_GPIO_IN);
-    if(sta != MRAA_SUCCESS) {
-        syslog(LOG_ERR, "Edison: Failed to set gpio mode-pullup");
-        return MRAA_ERROR_INVALID_RESOURCE;
-    }
-
-    int value = -1;
-    switch(mode) {
-        case MRAA_GPIO_STRONG:
-            break;
-        case MRAA_GPIO_PULLUP:
-            value = 1;
-            break;
-        case MRAA_GPIO_PULLDOWN:
-            value = 0;
-            break;
-        case MRAA_GPIO_HIZ:
-            return MRAA_SUCCESS;
-            break;
-        default:
-            return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
-    }
-    if (value != -1) {
-        sta = mraa_gpio_dir(pullup_e, MRAA_GPIO_OUT);
-        sta = mraa_gpio_write(pullup_e, value);
-        if (sta != MRAA_SUCCESS) {
-            syslog(LOG_ERR, "Edison: Error Setting pullup");
-            return sta;
-        }
-    }
-
-    return MRAA_SUCCESS;
-}
-
-
-mraa_board_t*
-mraa_intel_edison_fab_c()
-{
-    mraa_board_t* b = (mraa_board_t*) malloc(sizeof(mraa_board_t));
-    if (b == NULL)
-        return NULL;
-
-    b->phy_pin_count = 20;
-    b->gpio_count = 14;
-    b->aio_count = 6;
-
-    advance_func->gpio_dir_pre = &mraa_intel_edison_gpio_dir_pre;
-    advance_func->gpio_init_post = &mraa_intel_edison_gpio_init_post;
-    advance_func->gpio_dir_post = &mraa_intel_edison_gpio_dir_post;
-    advance_func->i2c_init_pre = &mraa_intel_edison_i2c_init_pre;
-    advance_func->aio_get_valid_fp = &mraa_intel_edison_aio_get_fp;
-    advance_func->aio_init_pre = &mraa_intel_edison_aio_init_pre;
-    advance_func->aio_init_post = &mraa_intel_edison_aio_init_post;
-    advance_func->pwm_init_pre = &mraa_intel_edison_pwm_init_pre;
-    advance_func->pwm_init_post = &mraa_intel_edison_pwm_init_post;
-    advance_func->spi_init_pre = &mraa_intel_edison_spi_init_pre;
-    advance_func->spi_init_post = &mraa_intel_edison_spi_init_post;
-    advance_func->gpio_mode_replace = &mraa_intel_edison_gpio_mode_replace;
-
-    b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*MRAA_INTEL_EDISON_PINCOUNT);
-
-    tristate = mraa_gpio_init_raw(214);
-    if (tristate == NULL) {
-        syslog(LOG_CRIT, "Intel Edison Failed to initialise Arduino board TriState,\
-                check i2c devices! FATAL\n");
-        return NULL;
-    }
-    mraa_gpio_dir(tristate, MRAA_GPIO_OUT);
-    mraa_intel_edison_misc_spi();
-
-    b->adc_raw = 12;
-    b->adc_supported = 10;
-
-    strncpy(b->pins[0].name, "IO0", 8);
-    b->pins[0].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
-    b->pins[0].gpio.pinmap = 130;
-    b->pins[0].gpio.parent_id = 0;
-    b->pins[0].gpio.mux_total = 0;
-
-    strncpy(b->pins[1].name, "IO1", 8);
-    b->pins[1].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
-    b->pins[1].gpio.pinmap = 131;
-    b->pins[1].gpio.parent_id = 0;
-    b->pins[1].gpio.mux_total = 0;
-
-    strncpy(b->pins[2].name, "IO2", 8);
-    b->pins[2].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
-    b->pins[2].gpio.pinmap = 128;
-    b->pins[2].gpio.parent_id = 0;
-    b->pins[2].gpio.mux_total = 0;
-
-    strncpy(b->pins[3].name, "IO3", 8);
-    b->pins[3].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
-    b->pins[3].gpio.pinmap = 12;
-    b->pins[3].gpio.parent_id = 0;
-    b->pins[3].gpio.mux_total = 0;
-    b->pins[3].pwm.pinmap = 0;
-    b->pins[3].pwm.parent_id = 0;
-    b->pins[3].pwm.mux_total = 0;
-
-    strncpy(b->pins[4].name, "IO4", 8);
-    b->pins[4].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
-    b->pins[4].gpio.pinmap = 129;
-    b->pins[4].gpio.parent_id = 0;
-    b->pins[4].gpio.mux_total = 0;
-
-    strncpy(b->pins[5].name, "IO5", 8);
-    b->pins[5].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0,0};
-    b->pins[5].gpio.pinmap = 13;
-    b->pins[5].gpio.parent_id = 0;
-    b->pins[5].gpio.mux_total = 0;
-    b->pins[5].pwm.pinmap = 1;
-    b->pins[5].pwm.parent_id = 0;
-    b->pins[5].pwm.mux_total = 0;
-
-    strncpy(b->pins[6].name, "IO6", 8);
-    b->pins[6].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0,0};
-    b->pins[6].gpio.pinmap = 182;
-    b->pins[6].gpio.parent_id = 0;
-    b->pins[6].gpio.mux_total = 0;
-    b->pins[6].pwm.pinmap = 2;
-    b->pins[6].pwm.parent_id = 0;
-    b->pins[6].pwm.mux_total = 0;
-
-    strncpy(b->pins[7].name, "IO7", 8);
-    b->pins[7].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
-    b->pins[7].gpio.pinmap = 48;
-    b->pins[7].gpio.parent_id = 0;
-    b->pins[7].gpio.mux_total = 0;
-
-    strncpy(b->pins[8].name, "IO8", 8);
-    b->pins[8].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
-    b->pins[8].gpio.pinmap = 49;
-    b->pins[8].gpio.parent_id = 0;
-    b->pins[8].gpio.mux_total = 0;
-
-    strncpy(b->pins[9].name, "IO9", 8);
-    b->pins[9].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0,0};
-    b->pins[9].gpio.pinmap = 183;
-    b->pins[9].gpio.parent_id = 0;
-    b->pins[9].gpio.mux_total = 0;
-    b->pins[9].pwm.pinmap = 3;
-    b->pins[9].pwm.parent_id = 0;
-    b->pins[9].pwm.mux_total = 0;
-
-    strncpy(b->pins[10].name, "IO10", 8);
-    b->pins[10].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
-    b->pins[10].gpio.pinmap = 41;
-    b->pins[10].gpio.parent_id = 0;
-    b->pins[10].gpio.mux_total = 2;
-    b->pins[10].gpio.mux[0].pin = 263;
-    b->pins[10].gpio.mux[0].value = 1;
-    b->pins[10].gpio.mux[1].pin = 240;
-    b->pins[10].gpio.mux[1].value = 0;
-    b->pins[10].spi.pinmap = 5;
-    b->pins[10].spi.mux_total = 2;
-    b->pins[10].spi.mux[0].pin = 263;
-    b->pins[10].spi.mux[0].value = 1;
-    b->pins[10].spi.mux[1].pin = 240;
-    b->pins[10].spi.mux[1].value = 1;
-
-    strncpy(b->pins[11].name, "IO11", 8);
-    b->pins[11].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
-    b->pins[11].gpio.pinmap = 43;
-    b->pins[11].gpio.parent_id = 0;
-    b->pins[11].gpio.mux_total = 2;
-    b->pins[11].gpio.mux[0].pin = 262;
-    b->pins[11].gpio.mux[0].value = 1;
-    b->pins[11].gpio.mux[1].pin = 241;
-    b->pins[11].gpio.mux[1].value = 0;
-    b->pins[11].spi.pinmap = 5;
-    b->pins[11].spi.mux_total = 2;
-    b->pins[11].spi.mux[0].pin = 262;
-    b->pins[11].spi.mux[0].value = 1;
-    b->pins[11].spi.mux[1].pin = 241;
-    b->pins[11].spi.mux[1].value = 1;
-
-    strncpy(b->pins[12].name, "IO12", 8);
-    b->pins[12].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
-    b->pins[12].gpio.pinmap = 42;
-    b->pins[12].gpio.parent_id = 0;
-    b->pins[12].gpio.mux_total = 1;
-    b->pins[12].gpio.mux[0].pin = 242;
-    b->pins[12].gpio.mux[0].value = 0;
-    b->pins[12].spi.pinmap = 5;
-    b->pins[12].spi.mux_total = 1;
-    b->pins[12].spi.mux[0].pin = 242;
-    b->pins[12].spi.mux[0].value = 1;
-
-    strncpy(b->pins[13].name, "IO13", 8);
-    b->pins[13].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
-    b->pins[13].gpio.pinmap = 40;
-    b->pins[13].gpio.parent_id = 0;
-    b->pins[13].gpio.mux_total = 1;
-    b->pins[13].gpio.mux[0].pin = 243;
-    b->pins[13].gpio.mux[0].value = 0;
-    b->pins[13].spi.pinmap = 5;
-    b->pins[13].spi.mux_total = 1;
-    b->pins[13].spi.mux[0].pin = 243;
-    b->pins[13].spi.mux[0].value = 1;
-
-    strncpy(b->pins[14].name, "A0", 8);
-    b->pins[14].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1,0};
-    b->pins[14].aio.pinmap = 0;
-    b->pins[14].aio.mux_total = 1;
-    b->pins[14].aio.mux[0].pin = 200;
-    b->pins[14].aio.mux[0].value = 1;
-    b->pins[14].gpio.pinmap = 44;
-    b->pins[14].gpio.mux_total = 1;
-    b->pins[14].gpio.mux[0].pin = 200;
-    b->pins[14].gpio.mux[0].value = 0;
-
-    strncpy(b->pins[15].name, "A1", 8);
-    b->pins[15].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1,0};
-    b->pins[15].aio.pinmap = 1;
-    b->pins[15].aio.mux_total = 1;
-    b->pins[15].aio.mux[0].pin = 201;
-    b->pins[15].aio.mux[0].value = 1;
-    b->pins[15].gpio.pinmap = 45;
-    b->pins[15].gpio.mux_total = 1;
-    b->pins[15].gpio.mux[0].pin = 201;
-    b->pins[15].gpio.mux[0].value = 0;
-
-    strncpy(b->pins[16].name, "A2", 8);
-    b->pins[16].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1,0};
-    b->pins[16].aio.pinmap = 2;
-    b->pins[16].aio.mux_total = 1;
-    b->pins[16].aio.mux[0].pin = 202;
-    b->pins[16].aio.mux[0].value = 1;
-    b->pins[16].gpio.pinmap = 46;
-    b->pins[16].gpio.mux_total = 1;
-    b->pins[16].gpio.mux[0].pin = 202;
-    b->pins[16].gpio.mux[0].value = 0;
-
-    strncpy(b->pins[17].name, "A3", 8);
-    b->pins[17].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1,0};
-    b->pins[17].aio.pinmap = 3;
-    b->pins[17].aio.mux_total = 1;
-    b->pins[17].aio.mux[0].pin = 203;
-    b->pins[17].aio.mux[0].value = 1;
-    b->pins[17].gpio.pinmap = 47;
-    b->pins[17].gpio.mux_total = 1;
-    b->pins[17].gpio.mux[0].pin = 203;
-    b->pins[17].gpio.mux[0].value = 0;
-
-    strncpy(b->pins[18].name, "A4", 8);
-    b->pins[18].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,1,0};
-    b->pins[18].i2c.pinmap = 1;
-    b->pins[18].i2c.mux_total = 1;
-    b->pins[18].i2c.mux[0].pin = 204;
-    b->pins[18].i2c.mux[0].value = 0;
-    b->pins[18].aio.pinmap = 4;
-    b->pins[18].aio.mux_total = 1;
-    b->pins[18].aio.mux[0].pin = 204;
-    b->pins[18].aio.mux[0].value = 1;
-    b->pins[18].gpio.pinmap = 14;
-    b->pins[18].gpio.mux_total = 1;
-    b->pins[18].gpio.mux[0].pin = 204;
-    b->pins[18].gpio.mux[0].value = 0;
-
-    strncpy(b->pins[19].name, "A5", 8);
-    b->pins[19].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,1,0};
-    b->pins[19].i2c.pinmap = 1;
-    b->pins[19].i2c.mux_total = 1;
-    b->pins[19].i2c.mux[0].pin = 205;
-    b->pins[19].i2c.mux[0].value = 0;
-    b->pins[19].aio.pinmap = 5;
-    b->pins[19].aio.mux_total = 1;
-    b->pins[19].aio.mux[0].pin = 205;
-    b->pins[19].aio.mux[0].value = 1;
-    b->pins[19].gpio.pinmap = 165;
-    b->pins[19].gpio.mux_total = 1;
-    b->pins[19].gpio.mux[0].pin = 205;
-    b->pins[19].gpio.mux[0].value = 0;
-
-    //BUS DEFINITIONS
-    b->i2c_bus_count = 9;
-    b->def_i2c_bus = 6;
-    int ici;
-    for (ici = 0; ici < 9; ici++) {
-        b->i2c_bus[ici].bus_id = -1;
-    }
-    b->i2c_bus[6].bus_id = 6;
-    b->i2c_bus[6].sda = 18;
-    b->i2c_bus[6].scl = 19;
-
-    b->spi_bus_count = 1;
-    b->def_spi_bus = 0;
-    b->spi_bus[0].bus_id = 5;
-    b->spi_bus[0].slave_s = 1;
-    b->spi_bus[0].cs = 10;
-    b->spi_bus[0].mosi = 11;
-    b->spi_bus[0].miso = 12;
-    b->spi_bus[0].sclk = 13;
-
-    int il;
-    for (il =0; il < MRAA_INTEL_EDISON_PINCOUNT; il++) {
-        pinmodes[il].gpio.sysfs = -1;
-        pinmodes[il].gpio.mode = -1;
-        pinmodes[il].pwm.sysfs = -1;
-        pinmodes[il].pwm.mode = -1;
-        pinmodes[il].i2c.sysfs = -1;
-        pinmodes[il].i2c.mode = -1;
-        pinmodes[il].spi.sysfs = -1;
-        pinmodes[il].spi.mode = -1;
-        pinmodes[il].uart.sysfs = -1;
-        pinmodes[il].uart.mode = -1;
-    }
-    pinmodes[0].gpio.sysfs = 130;
-    pinmodes[0].gpio.mode = 0;
-    pinmodes[0].uart.sysfs = 130;
-    pinmodes[0].uart.mode = 1;
-    pinmodes[1].gpio.sysfs = 131;
-    pinmodes[1].gpio.mode = 0;
-    pinmodes[1].uart.sysfs = 131;
-    pinmodes[1].uart.mode = 1;
-    pinmodes[2].gpio.sysfs = 128;
-    pinmodes[2].gpio.mode = 0;
-    pinmodes[2].uart.sysfs = 128;
-    pinmodes[2].uart.mode = 1;
-    pinmodes[3].gpio.sysfs = 12;
-    pinmodes[3].gpio.mode = 0;
-    pinmodes[3].pwm.sysfs = 12;
-    pinmodes[3].pwm.mode = 1;
-
-    pinmodes[4].gpio.sysfs = 129;
-    pinmodes[4].gpio.mode = 0;
-    pinmodes[4].uart.sysfs = 129;
-    pinmodes[4].uart.mode = 1;
-    pinmodes[5].gpio.sysfs = 13;
-    pinmodes[5].gpio.mode = 0;
-    pinmodes[5].pwm.sysfs = 13;
-    pinmodes[5].pwm.mode = 1;
-    pinmodes[6].gpio.sysfs = 182;
-    pinmodes[6].gpio.mode = 0;
-    pinmodes[6].pwm.sysfs = 182;
-    pinmodes[6].pwm.mode = 1;
-
-    //7 and 8 are provided by something on i2c, very simplepinmodes[3].gpio.sysfs = 12;
-    pinmodes[9].gpio.sysfs = 183;
-    pinmodes[9].gpio.mode = 0;
-    pinmodes[9].pwm.sysfs = 183;
-    pinmodes[9].pwm.mode = 1;
-
-    pinmodes[10].gpio.sysfs = 41;
-    pinmodes[10].gpio.mode = 0;
-    pinmodes[10].spi.sysfs = 111; // Different pin provides, switched at mux level.
-    pinmodes[10].spi.mode = 1;
-
-    pinmodes[11].gpio.sysfs = 43;
-    pinmodes[11].gpio.mode = 0;
-    pinmodes[11].spi.sysfs = 115; // Different pin provides, switched at mux level.
-    pinmodes[11].spi.mode = 1;
-
-    pinmodes[12].gpio.sysfs = 42;
-    pinmodes[12].gpio.mode = 0;
-    pinmodes[12].spi.sysfs = 114; // Different pin provides, switched at mux level.
-    pinmodes[12].spi.mode = 1;
-
-    pinmodes[13].gpio.sysfs = 40;
-    pinmodes[13].gpio.mode = 0;
-    pinmodes[13].spi.sysfs = 109; // Different pin provides, switched at mux level.
-    pinmodes[13].spi.mode = 1;
-    //Everything else but A4 A5 LEAVE
-    pinmodes[18].gpio.sysfs = 14;
-    pinmodes[18].gpio.mode = 0;
-    pinmodes[18].i2c.sysfs = 28;
-    pinmodes[18].i2c.mode = 1;
-
-    pinmodes[19].gpio.sysfs = 165;
-    pinmodes[19].gpio.mode = 0;
-    pinmodes[19].i2c.sysfs = 27;
-    pinmodes[19].i2c.mode = 1;
-
-    return b;
-}

src/javascript/CMakeLists.txt

@@ -31,7 +31,40 @@ set_target_properties (mraajs PROPERTIES
   OUTPUT_NAME mraa
   SUFFIX ".node"
 )
+macro (mraa_CREATE_INSTALL_PACKAGE_JSON generated_file install_location)
+  configure_file (${generated_file}.cmake ${CMAKE_CURRENT_BINARY_DIR}/${generated_file} @ONLY)
+  install (FILES ${CMAKE_CURRENT_BINARY_DIR}/${generated_file} DESTINATION ${install_location})
+endmacro (mraa_CREATE_INSTALL_PACKAGE_JSON)
+mraa_create_install_package_json (package.json lib/node_modules/mraa)
 
-install (FILES ${CMAKE_CURRENT_SOURCE_DIR}/package.json
-         ${CMAKE_CURRENT_BINARY_DIR}/mraa.node
+macro (mraa_CREATE_BINDING_GYP generated_file)
+  set (mraa_LIB_SRCS_GYP "")
+  foreach (srcfile ${mraa_LIB_SRCS_NOAUTO})
+    file (RELATIVE_PATH rel ${CMAKE_SOURCE_DIR} ${srcfile})
+    set (mraa_LIB_SRCS_GYP "'${rel}',\n${mraa_LIB_SRCS_GYP}")
+  endforeach (srcfile)
+  foreach (includedir ${mraa_LIB_INCLUDE_DIRS})
+    file (RELATIVE_PATH rel ${CMAKE_SOURCE_DIR} ${includedir})
+    set (mraa_LIB_INCLUDE_DIRS_GYP "'${rel}',\n${mraa_LIB_INCLUDE_DIRS_GYP}")
+  endforeach (includedir)
+  configure_file (${generated_file}.cmake ${CMAKE_CURRENT_BINARY_DIR}/${generated_file} @ONLY)
+endmacro (mraa_CREATE_BINDING_GYP)
+mraa_create_binding_gyp (binding.gyp)
+
+add_custom_target (npmpkg)
+add_custom_command (TARGET npmpkg POST_BUILD COMMAND ${CMAKE_COMMAND} -E copy
+        ${CMAKE_CURRENT_BINARY_DIR}/mraajsJAVASCRIPT_wrap.cxx ${CMAKE_SOURCE_DIR}/src
+        COMMAND ${CMAKE_COMMAND} -E copy
+        ${CMAKE_BINARY_DIR}/src/version.c ${CMAKE_SOURCE_DIR}/src
+        COMMAND ${CMAKE_COMMAND} -E copy
+        ${CMAKE_CURRENT_BINARY_DIR}/package.json ${CMAKE_SOURCE_DIR}
+        COMMAND sed -i "'s/mraa.node/build\\/Release\\/mraa.node/'"
+        ${CMAKE_SOURCE_DIR}/package.json
+        COMMAND ${CMAKE_COMMAND} -E copy
+        ${CMAKE_CURRENT_BINARY_DIR}/binding.gyp ${CMAKE_SOURCE_DIR}
+        COMMAND ${CMAKE_COMMAND} -E copy
+        ${CMAKE_SOURCE_DIR}/docs/npm.md ${CMAKE_SOURCE_DIR}/READMEFIRST)
+add_dependencies (npmpkg mraajs)
+
+install (FILES ${CMAKE_CURRENT_BINARY_DIR}/mraa.node
          DESTINATION lib/node_modules/mraa)

src/javascript/binding.gyp.cmake

@@ -0,0 +1,30 @@
+{
+  'targets': [
+    {
+      'target_name': 'mraa',
+      'sources': [
+@mraa_LIB_SRCS_GYP@
+'src/version.c',
+'src/mraajsJAVASCRIPT_wrap.cxx' ],
+      'include_dirs': [
+@mraa_LIB_INCLUDE_DIRS_GYP@
+                      ],
+      'cflags_cc!': [ '-fno-rtti', '-fno-exceptions' ],
+      'cflags!': [ '-fno-exceptions' ],
+      'defines' : [ 'SWIG',
+                    'SWIGNODE',
+		    'BUILDING_NODE_EXTENSION=1' ],
+      'conditions' : [
+          [ 'target_arch=="x64"',
+            { 'defines' : [ 'X86PLAT=ON' ], },
+          ],
+          [ 'target_arch=="ia32"',
+            { 'defines' : [ 'X86PLAT=ON' ], },
+          ],
+          [ 'target_arch=="arm"',
+            { 'defines' : [ 'ARMPLAT=ON' ], },
+          ],
+      ],
+    }
+  ]
+}

src/javascript/mraajs.i

@@ -2,4 +2,56 @@
 
 %feature("autodoc", "3");
 
+%include carrays.i
+%array_class(uint8_t, uint8Array);
+
+%inline %{
+  #include <node_buffer.h>
+%}
+
+%typemap(in) (const uint8_t *data, int length) {
+  $1 = (uint8_t*) node::Buffer::Data($input);
+  $2 = node::Buffer::Length($input);
+}
+
+%typemap(in) (uint8_t *txBuf, int length) {
+  $1 = (uint8_t*) node::Buffer::Data($input);
+  $2 = node::Buffer::Length($input);
+}
+
+namespace mraa {
+class Spi;
+%typemap(out) uint8_t*
+{
+  $result = node::Buffer::New((char*) $1, arg3)->handle_;
+}
+}
+
+%newobject I2c::read(uint8_t *data, int length);
+%newobject Spi::write(uint8_t *data, int length);
+
+%typemap(in) (uint8_t *data, int length) {
+   int x;
+   int ecode = SWIG_AsVal_int($input, &x);
+   if (!SWIG_IsOK(ecode)) {
+     SWIG_exception_fail(SWIG_ArgError(ecode), "Expected an int");
+   }
+   $2 = x;
+   if ($2 < 0) {
+       SWIG_exception_fail(SWIG_ERROR, "Positive integer expected");
+       SWIGV8_RETURN(v8::Undefined());
+   }
+   $1 = (uint8_t*) malloc($2 * sizeof(uint8_t));
+}
+
+%typemap(argout) (uint8_t *data, int length) {
+   if (result < 0) {      /* Check for I/O error */
+       free($1);
+       SWIG_exception_fail(SWIG_ERROR, "I2c write failed");
+       SWIGV8_RETURN(v8::Undefined());
+   }
+   $result = node::Buffer::New((char*) $1, result)->handle_;
+   free($1);
+}
+
 %include ../mraa.i

src/javascript/package.json

@@ -1,8 +0,0 @@
-{
-  "name" : "mraa",
-  "main" : "./mraa.node",
-  "engines": {
-    "node": ">= 1.0.x"
-  },
-  "license": "MIT"
-}

src/javascript/package.json.cmake

@@ -0,0 +1,16 @@
+{
+  "name" : "mraa",
+  "description": "IO library that helps you use I2c, SPI, gpio, uart, pwm, analog inputs (aio) and more on a number of platforms such as the Intel galileo, the Intel edison and others",
+  "keywords":["gpio", "edison","galileo","io", "mraajs", "spi", "i2c", "minnow", "intel"],
+  "homepage": "http://github.com/intel-iot-devkit/mraa",
+  "main" : "./mraa.node",
+  "engines": {
+    "node": ">= 0.10.x"
+  },
+  "bugs": {
+    "url" : "http://github.com/intel-iot-devkit/mraa/issues"
+  },
+  "license": "MIT",
+  "version": "@VERSION@",
+  "authors": "See github.com/intel-iot-devkit/mraa/graphs/contributors"
+}

src/mraa.c

@@ -27,11 +27,9 @@
 #include <stdlib.h>
 #include <sched.h>
 #include <string.h>
+#include <pwd.h>
 
 #include "mraa_internal.h"
-#include "intel_galileo_rev_d.h"
-#include "intel_galileo_rev_g.h"
-#include "intel_edison_fab_c.h"
 #include "gpio.h"
 #include "version.h"
 
@@ -58,6 +56,13 @@ mraa_set_log_level(int level)
 mraa_result_t __attribute__((constructor))
 mraa_init()
 {
+    if (plat != NULL) {
+        return MRAA_ERROR_PLATFORM_ALREADY_INITIALISED;
+    }
+
+    uid_t proc_euid = geteuid();
+    struct passwd *proc_user = getpwuid(proc_euid);
+
 #ifdef DEBUG
     setlogmask(LOG_UPTO(LOG_DEBUG));
 #else
@@ -65,65 +70,60 @@ mraa_init()
 #endif
 
     openlog("libmraa", LOG_CONS | LOG_PID | LOG_NDELAY, LOG_LOCAL1);
-    syslog(LOG_DEBUG, "libmraa initialised by user %d", getuid());
+    syslog(LOG_DEBUG,
+           "libmraa initialised by user '%s' with EUID %d",
+           (proc_user != NULL) ? proc_user->pw_name : "<unknown>",
+           proc_euid);
 
-    if (plat != NULL) {
-        return MRAA_ERROR_PLATFORM_ALREADY_INITIALISED;
+    if (proc_euid != 0) {
+        char *err_msg = "mraa: FATAL error, "
+                        "libmraa program must be run as root (EUID 0), "
+                        "cannot proceed\n";
+        syslog(LOG_ERR, "%s", err_msg);
+        fprintf(stderr, "%s", err_msg);
+        return MRAA_ERROR_PLATFORM_NOT_INITIALISED;
     }
+
 #ifdef SWIGPYTHON
     // Initialise python threads, this allows use to grab the GIL when we are
     // required to do so
     Py_InitializeEx(0);
     PyEval_InitThreads();
 #endif
-    // detect a galileo gen2 board
-    char *line = NULL;
-    // let getline allocate memory for *line
-    size_t len = 0;
-    FILE *fh = fopen("/sys/devices/virtual/dmi/id/board_name", "r");
-    if (fh != NULL) {
-        if (getline(&line, &len, fh) != -1) {
-            if (strncmp(line, "GalileoGen2", 10) == 0) {
-                platform_type = MRAA_INTEL_GALILEO_GEN2;
-            } else if (strncmp(line, "BODEGA BAY", 10) == 0) {
-                platform_type = MRAA_INTEL_EDISON_FAB_C;
-            } else if (strncmp(line, "SALT BAY", 7) == 0) {
-                platform_type = MRAA_INTEL_EDISON_FAB_C;
-            } else {
-                platform_type = MRAA_INTEL_GALILEO_GEN1;
-            }
-            free(line);
-        }
-        fclose(fh);
-    }
-
     advance_func = (mraa_adv_func_t*) malloc(sizeof(mraa_adv_func_t));
     memset(advance_func, 0, sizeof(mraa_adv_func_t));
 
-    switch(platform_type) {
-        case MRAA_INTEL_GALILEO_GEN2:
-            plat = mraa_intel_galileo_gen2();
-            break;
-        case MRAA_INTEL_GALILEO_GEN1:
-            plat = mraa_intel_galileo_rev_d();
-            break;
-        case MRAA_INTEL_EDISON_FAB_C:
-            plat = mraa_intel_edison_fab_c();
-            break;
-        default:
-            plat = mraa_intel_galileo_rev_d();
-            syslog(LOG_ERR, "Platform not found, initialising MRAA_INTEL_GALILEO_GEN1");
+#ifdef X86PLAT
+    // Use runtime x86 platform detection
+    platform_type = mraa_x86_platform();
+#elif ARMPLAT
+    // Use runtime ARM platform detection
+    platform_type = mraa_arm_platform();
+#else
+    #error mraa_ARCH NOTHING
+#endif
+
+    if (plat == NULL) {
+        printf("mraa: FATAL error, failed to initialise platform\n");
+        return MRAA_ERROR_PLATFORM_NOT_INITIALISED;
     }
 
-    syslog(LOG_NOTICE, "libmraa initialised for platform %d", platform_type);
+    syslog(LOG_INFO,
+           "libmraa initialised for platform '%s' of type %d",
+           mraa_get_platform_name(),
+           platform_type);
     return MRAA_SUCCESS;
 }
 
 void
 mraa_deinit()
 {
-    free(plat->pins);
-    free(plat);
+    if (plat != NULL) {
+        if (plat->pins != NULL) {
+            free(plat->pins);
+        }
+        free(plat);
+    }
     closelog();
 }
 
@@ -143,164 +143,32 @@ mraa_set_priority(const unsigned int priority)
     return sched_setscheduler(0, SCHED_RR, &sched_s);
 }
 
-static mraa_result_t
+mraa_result_t
 mraa_setup_mux_mapped(mraa_pin_t meta)
 {
     int mi;
+
     for (mi = 0; mi < meta.mux_total; mi++) {
         mraa_gpio_context mux_i;
         mux_i = mraa_gpio_init_raw(meta.mux[mi].pin);
-        if (mux_i == NULL)
+        if (mux_i == NULL) {
             return MRAA_ERROR_INVALID_HANDLE;
+        }
+        // this function will sometimes fail, however this is not critical as
+        // long as the write succeeds - Test case galileo gen2 pin2
         mraa_gpio_dir(mux_i, MRAA_GPIO_OUT);
-        if (mraa_gpio_write(mux_i, meta.mux[mi].value) != MRAA_SUCCESS)
+        mraa_gpio_owner(mux_i, 0);
+
+        if (mraa_gpio_write(mux_i, meta.mux[mi].value) != MRAA_SUCCESS) {
+            mraa_gpio_close(mux_i);
             return MRAA_ERROR_INVALID_RESOURCE;
+        }
+        mraa_gpio_close(mux_i);
     }
+
     return MRAA_SUCCESS;
 }
 
-unsigned int
-mraa_setup_gpio(int pin)
-{
-    if (plat == NULL)
-        return MRAA_PLATFORM_NO_INIT;
-
-    if (pin < 0 || pin > plat->phy_pin_count)
-        return MRAA_NO_SUCH_IO;
-
-    if(plat->pins[pin].capabilites.gpio != 1)
-      return MRAA_NO_SUCH_IO;
-
-    if (plat->pins[pin].gpio.mux_total > 0)
-       if (mraa_setup_mux_mapped(plat->pins[pin].gpio) != MRAA_SUCCESS)
-            return MRAA_NO_SUCH_IO;
-    return plat->pins[pin].gpio.pinmap;
-}
-
-unsigned int
-mraa_setup_aio(int aio)
-{
-    if (plat == NULL)
-        return MRAA_PLATFORM_NO_INIT;
-
-    if (aio < 0 || aio > plat->aio_count)
-        return MRAA_NO_SUCH_IO;
-
-    int pin = aio + plat->gpio_count;
-
-    if (plat->pins[pin].capabilites.aio != 1)
-      return MRAA_NO_SUCH_IO;
-
-    if (plat->pins[pin].aio.mux_total > 0)
-       if (mraa_setup_mux_mapped(plat->pins[pin].aio) != MRAA_SUCCESS)
-            return MRAA_NO_SUCH_IO;
-    return plat->pins[pin].aio.pinmap;
-}
-
-unsigned int
-mraa_setup_i2c(int bus)
-{
-    if (plat == NULL)
-        return MRAA_PLATFORM_NO_INIT;
-
-    if (plat->i2c_bus_count == 0) {
-        syslog(LOG_ERR, "No i2c buses defined in platform");
-        return MRAA_NO_SUCH_IO;
-    }
-    if (bus >= plat->i2c_bus_count) {
-        syslog(LOG_ERR, "Above i2c bus count");
-        return MRAA_NO_SUCH_IO;
-    }
-
-    if (plat->i2c_bus[bus].bus_id == -1) {
-        syslog(LOG_ERR, "Platform not currently allowed for mraa use");
-        return MRAA_NO_SUCH_IO;
-    }
-
-    int pos = plat->i2c_bus[bus].sda;
-    if (plat->pins[pos].i2c.mux_total > 0)
-        if (mraa_setup_mux_mapped(plat->pins[pos].i2c) != MRAA_SUCCESS)
-             return MRAA_IO_SETUP_FAILURE;
-
-    pos = plat->i2c_bus[bus].scl;
-    if (plat->pins[pos].i2c.mux_total > 0)
-        if (mraa_setup_mux_mapped(plat->pins[pos].i2c) != MRAA_SUCCESS)
-             return MRAA_IO_SETUP_FAILURE;
-
-    return plat->i2c_bus[bus].bus_id;
-}
-
-mraa_spi_bus_t*
-mraa_setup_spi(int bus)
-{
-    if (plat == NULL)
-        return NULL;
-
-    if (plat->spi_bus_count >! 0) {
-        syslog(LOG_ERR, "No spi buses defined in platform");
-        return NULL;
-    }
-    if (plat->spi_bus_count == 1) {
-        bus = plat->def_spi_bus;
-    }
-    if (bus >= plat->spi_bus_count) {
-        syslog(LOG_ERR, "Above spi bus count");
-        return NULL;
-    }
-
-    int pos = plat->spi_bus[bus].sclk;
-    if (plat->pins[pos].spi.mux_total > 0)
-        if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS)
-             return NULL;
-
-    pos = plat->spi_bus[bus].mosi;
-    if (plat->pins[pos].spi.mux_total > 0)
-        if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS)
-             return NULL;
-
-    pos = plat->spi_bus[bus].miso;
-    if (plat->pins[pos].spi.mux_total > 0)
-        if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS)
-             return NULL;
-
-    mraa_spi_bus_t *spi = &(plat->spi_bus[bus]);
-    return spi;
-}
-
-mraa_pin_t*
-mraa_setup_pwm(int pin)
-{
-    if (plat == NULL)
-        return NULL;
-
-    if (plat->pins[pin].capabilites.pwm != 1)
-        return NULL;
-
-    if (plat->pins[pin].capabilites.gpio == 1) {
-        mraa_gpio_context mux_i;
-        mux_i = mraa_gpio_init_raw(plat->pins[pin].gpio.pinmap);
-        if (mux_i == NULL)
-            return NULL;
-        if (mraa_gpio_dir(mux_i, MRAA_GPIO_OUT) != MRAA_SUCCESS)
-            return NULL;
-        // Current REV D quirk. //TODO GEN 2
-        if (mraa_gpio_write(mux_i, 1) != MRAA_SUCCESS)
-            return NULL;
-        if (mraa_gpio_close(mux_i) != MRAA_SUCCESS)
-            return NULL;
-    }
-
-    if (plat->pins[pin].pwm.mux_total > 0)
-       if (mraa_setup_mux_mapped(plat->pins[pin].pwm) != MRAA_SUCCESS)
-            return NULL;
-
-    mraa_pin_t *ret;
-    ret = (mraa_pin_t*) malloc(sizeof(mraa_pin_t));
-    ret->pinmap = plat->pins[pin].pwm.pinmap;
-    ret->parent_id = plat->pins[pin].pwm.parent_id;
-    return ret;
-}
-
 void
 mraa_result_print(mraa_result_t result)
 {
@@ -361,7 +229,7 @@ mraa_pin_mode_test(int pin, mraa_pinmodes_t mode)
         if (plat == NULL)
             return 0;
     }
-    if (pin > plat->phy_pin_count || pin < 0)
+    if (pin > (plat->phy_pin_count -1) || pin < 0)
         return 0;
 
     switch(mode) {
@@ -390,35 +258,20 @@ mraa_pin_mode_test(int pin, mraa_pinmodes_t mode)
                 return 1;
             break;
         case MRAA_PIN_AIO:
-            if (pin < plat->aio_count)
-                pin = pin + plat->gpio_count;
             if (plat->pins[pin].capabilites.aio ==1)
                 return 1;
             break;
-        default: break;
+        case MRAA_PIN_UART:
+            if (plat->pins[pin].capabilites.uart == 1)
+                return 1;
+            break;
+        default:
+            syslog(LOG_NOTICE, "requested pinmode invalid");
+            break;
     }
     return 0;
 }
 
-mraa_mmap_pin_t*
-mraa_setup_mmap_gpio(int pin)
-{
-    if (plat == NULL)
-        return NULL;
-
-    if (plat->pins[pin].capabilites.fast_gpio != 1)
-        return NULL;
-
-    if (plat->pins[pin].mmap.gpio.mux_total > 0)
-       if (mraa_setup_mux_mapped(plat->pins[pin].mmap.gpio) != MRAA_SUCCESS)
-            return NULL;
-
-    if (mraa_setup_mux_mapped(plat->pins[pin].mmap.gpio) != MRAA_SUCCESS)
-            return NULL;
-    mraa_mmap_pin_t *ret = &(plat->pins[pin].mmap);
-    return ret;
-}
-
 mraa_platform_t mraa_get_platform_type()
 {
     return platform_type;
@@ -448,31 +301,20 @@ mraa_adc_supported_bits()
     return plat->adc_supported;
 }
 
-mraa_result_t
-mraa_setup_uart(int index)
+char*
+mraa_get_platform_name()
 {
-    if (plat == NULL)
-        return MRAA_ERROR_PLATFORM_NOT_INITIALISED;
-
-    if (plat->uart_dev_count == 0)
-        return MRAA_ERROR_FEATURE_NOT_SUPPORTED;
-
-    if (plat->uart_dev_count <= index)
-        return MRAA_ERROR_NO_RESOURCES;
-
-    int pos = plat->uart_dev[index].rx;
-    if (pos >= 0) {
-        if (plat->pins[pos].uart.mux_total > 0)
-            if (mraa_setup_mux_mapped(plat->pins[pos].uart) != MRAA_SUCCESS)
-                return MRAA_ERROR_INVALID_RESOURCE;
+    if (plat == NULL) {
+        return NULL;
     }
-
-    if (pos >= 0) {
-        pos = plat->uart_dev[index].tx;
-        if (plat->pins[pos].uart.mux_total > 0)
-            if (mraa_setup_mux_mapped(plat->pins[pos].uart) != MRAA_SUCCESS)
-                return MRAA_ERROR_INVALID_RESOURCE;
-    }
-
-    return MRAA_SUCCESS;
+    return (char*) plat->platform_name;
+}
+
+unsigned int
+mraa_get_pin_count()
+{
+    if (plat == NULL) {
+        return 0;
+    }
+    return plat->phy_pin_count;
 }

src/mraa.i

@@ -1,5 +1,8 @@
+%rename("%(strip:[MRAA_])s", %$isenumitem) "";
+
 %include stdint.i
 %include std_string.i
+%include exception.i
 
 #ifdef DOXYGEN
     %include common_hpp_doc.i
@@ -26,34 +29,28 @@
     mraa_init();
 %}
 
-%typemap(in) uint8_t = char;
-%typemap(in) unsigned char* = char*;
-%apply (char *STRING, size_t LENGTH) { (char *data, size_t length) };
+%exception {
+    try {
+        $action
+    } catch(const std::invalid_argument& e) {
+        SWIG_exception(SWIG_ValueError, e.what());
+    } catch(...) {
+        SWIG_exception(SWIG_RuntimeError, "Unknown exception");
+    }
+}
 
 %include "common.hpp"
 
 %include "types.h"
 
-#### GPIO ####
-
 %include "gpio.hpp"
 
-#### i2c ####
-
 %include "i2c.hpp"
 
-#### PWM ####
-
 %include "pwm.hpp"
 
-#### SPI ####
-
 %include "spi.hpp"
 
-#### AIO ####
-
 %include "aio.hpp"
 
-#### UART ####
-
 %include "uart.hpp"

src/pwm/pwm.c

@@ -25,6 +25,7 @@
 #include <stdlib.h>
 #include <sys/stat.h>
 #include <unistd.h>
+#include <limits.h>
 
 #include "pwm.h"
 #include "mraa_internal.h"
@@ -48,15 +49,19 @@ mraa_pwm_setup_duty_fp(mraa_pwm_context dev)
 static mraa_result_t
 mraa_pwm_write_period(mraa_pwm_context dev, int period)
 {
-    if (advance_func->pwm_period_replace != NULL)
-        return advance_func->pwm_period_replace(dev,period);
-
+    if (advance_func->pwm_period_replace != NULL) {
+        mraa_result_t result = advance_func->pwm_period_replace(dev,period);
+        if (result == MRAA_SUCCESS) {
+            dev->period = period;
+        }
+        return result;
+    }
     char bu[MAX_SIZE];
     snprintf(bu,MAX_SIZE ,"/sys/class/pwm/pwmchip%d/pwm%d/period", dev->chipid, dev->pin);
 
     int period_f = open(bu, O_RDWR);
     if (period_f == -1) {
-        syslog(LOG_ERR, "Failed to open period for writing");
+        syslog(LOG_ERR, "pwm: Failed to open period for writing");
         return MRAA_ERROR_INVALID_RESOURCE;
     }
     char out[MAX_SIZE];
@@ -67,6 +72,7 @@ mraa_pwm_write_period(mraa_pwm_context dev, int period)
     }
 
     close(period_f);
+    dev->period = period;
     return MRAA_SUCCESS;
 }
 
@@ -74,7 +80,9 @@ static mraa_result_t
 mraa_pwm_write_duty(mraa_pwm_context dev, int duty)
 {
     if (dev->duty_fp == -1) {
-        mraa_pwm_setup_duty_fp(dev);
+        if (mraa_pwm_setup_duty_fp(dev) == 1) {
+            return MRAA_ERROR_INVALID_HANDLE;
+        }
     }
     char bu[64];
     int length = sprintf(bu, "%d", duty);
@@ -92,50 +100,115 @@ mraa_pwm_read_period(mraa_pwm_context dev)
 
     int period_f = open(bu, O_RDWR);
     if (period_f == -1) {
-        syslog(LOG_ERR, "Failed to open period for reading");
+        syslog(LOG_ERR, "pwm: Failed to open period for reading");
         return 0;
     }
     off_t size = lseek(period_f, 0, SEEK_END);
     lseek(period_f, 0, SEEK_SET);
 
-    read(period_f, output, size + 1);
+    ssize_t rb = read(period_f, output, size + 1);
     close(period_f);
-    int ret = strtol(output, NULL, 10);
 
-    return ret;
+    if (rb < 0) {
+        syslog(LOG_ERR, "pwm: Error in reading period");
+        return -1;
+    }
+
+    char *endptr;
+    long int ret = strtol(output, &endptr, 10);
+    if ('\0' != *endptr && '\n' != *endptr) {
+        syslog(LOG_ERR, "pwm: Error in string conversion");
+        return -1;
+    }
+    else if (ret > INT_MAX || ret < INT_MIN) {
+        syslog(LOG_ERR, "pwm: Number is invalid");
+        return -1;
+    }
+    dev->period = (int)ret;
+    return (int) ret;
 }
 
 static int
 mraa_pwm_read_duty(mraa_pwm_context dev)
 {
     if (dev->duty_fp == -1) {
-        mraa_pwm_setup_duty_fp(dev);
+        if (mraa_pwm_setup_duty_fp(dev) == 1) {
+            return MRAA_ERROR_INVALID_HANDLE;
+        }
     } else {
         lseek(dev->duty_fp, 0, SEEK_SET);
     }
     off_t size = lseek(dev->duty_fp, 0, SEEK_END);
     lseek(dev->duty_fp, 0, SEEK_SET);
     char output[MAX_SIZE];
-    read(dev->duty_fp, output, size+1);
+    ssize_t rb = read(dev->duty_fp, output, size+1);
+    if (rb < 0) {
+        syslog(LOG_ERR, "pwm: Error in reading duty");
+        return -1;
+    }
 
-    int ret = strtol(output, NULL, 10);
-    return ret;
+    char *endptr;
+    long int ret = strtol(output, &endptr, 10);
+    if ('\0' != *endptr && '\n' != *endptr) {
+        syslog(LOG_ERR, "pwm: Error in string converstion");
+        return -1;
+    }
+    else if (ret > INT_MAX || ret < INT_MIN) {
+        syslog(LOG_ERR, "pwm: Number is invalid");
+        return -1;
+    }
+    return (int) ret;
 }
 
 mraa_pwm_context
-mraa_pwm_init(int pin) {
+mraa_pwm_init(int pin)
+{
     if (advance_func->pwm_init_pre != NULL) {
         if (advance_func->pwm_init_pre(pin) != MRAA_SUCCESS)
             return NULL;
     }
-    mraa_pin_t* pinm = mraa_setup_pwm(pin);
-    if (pinm == NULL)
+    if (plat == NULL) {
+        syslog(LOG_ERR, "pwm: Platform Not Initialised");
         return NULL;
-    int chip = pinm->parent_id;
-    int pinn = pinm->pinmap;
-    free(pinm);
+    }
+    if (plat->pins[pin].capabilites.pwm != 1) {
+        syslog(LOG_ERR, "pwm: pin not capable of pwm");
+        return NULL;
+    }
 
-    if (advance_func->gpio_init_post != NULL) {
+    if (plat->pins[pin].capabilites.gpio == 1) {
+        // This deserves more investigation
+        mraa_gpio_context mux_i;
+        mux_i = mraa_gpio_init_raw(plat->pins[pin].gpio.pinmap);
+        if (mux_i == NULL) {
+            syslog(LOG_ERR, "pwm: error in gpio->pwm transition");
+            return NULL;
+        }
+        if (mraa_gpio_dir(mux_i, MRAA_GPIO_OUT) != MRAA_SUCCESS) {
+            syslog(LOG_ERR, "pwm: error in gpio->pwm transition");
+            return NULL;
+        }
+        if (mraa_gpio_write(mux_i, 1) != MRAA_SUCCESS) {
+            syslog(LOG_ERR, "pwm: error in gpio->pwm transition");
+            return NULL;
+        }
+        if (mraa_gpio_close(mux_i) != MRAA_SUCCESS) {
+            syslog(LOG_ERR, "pwm: error in gpio->pwm transition");
+            return NULL;
+        }
+    }
+
+    if (plat->pins[pin].pwm.mux_total > 0) {
+        if (mraa_setup_mux_mapped(plat->pins[pin].pwm) != MRAA_SUCCESS) {
+            syslog(LOG_ERR, "pwm: Failed to set-up multiplexer");
+            return NULL;
+        }
+    }
+
+    int chip = plat->pins[pin].pwm.parent_id;
+    int pinn = plat->pins[pin].pwm.pinmap;
+
+    if (advance_func->pwm_init_post != NULL) {
         mraa_pwm_context pret = mraa_pwm_init_raw(chip,pinn);
         mraa_result_t ret = advance_func->pwm_init_post(pret);
         if (ret != MRAA_SUCCESS) {
@@ -156,19 +229,20 @@ mraa_pwm_init_raw(int chipin, int pin)
     dev->duty_fp = -1;
     dev->chipid = chipin;
     dev->pin = pin;
+    dev->period = -1;
 
     char directory[MAX_SIZE];
     snprintf(directory, MAX_SIZE, SYSFS_PWM "/pwmchip%d/pwm%d", dev->chipid, dev->pin);
     struct stat dir;
     if (stat(directory, &dir) == 0 && S_ISDIR(dir.st_mode)) {
-        syslog(LOG_NOTICE, "PWM Pin already exporting, continuing");
+        syslog(LOG_NOTICE, "pwm: Pin already exported, continuing");
         dev->owner = 0; // Not Owner
     } else {
         char buffer[MAX_SIZE];
         snprintf(buffer, MAX_SIZE, "/sys/class/pwm/pwmchip%d/export", dev->chipid);
         int export_f = open(buffer, O_WRONLY);
         if (export_f == -1) {
-            syslog(LOG_ERR, "Failed to open export for writing");
+            syslog(LOG_ERR, "pwm: Failed to open export for writing");
             free(dev);
             return NULL;
         }
@@ -176,11 +250,13 @@ mraa_pwm_init_raw(int chipin, int pin)
         char out[MAX_SIZE];
         int size = snprintf(out, MAX_SIZE, "%d", dev->pin);
         if (write(export_f, out, size*sizeof(char)) == -1) {
-            syslog(LOG_WARNING, "Failed to write to export! Potentially already enabled");
+            syslog(LOG_WARNING, "pwm: Failed to write to export! Potentially already enabled");
             close(export_f);
+            free(dev);
             return NULL;
         }
         dev->owner = 1;
+        mraa_pwm_period_us(dev, plat->pwm_default_period);
         close(export_f);
     }
     mraa_pwm_setup_duty_fp(dev);
@@ -190,14 +266,25 @@ mraa_pwm_init_raw(int chipin, int pin)
 mraa_result_t
 mraa_pwm_write(mraa_pwm_context dev, float percentage)
 {
-    return mraa_pwm_write_duty(dev, percentage * mraa_pwm_read_period(dev));
+    if (dev->period == -1) {
+        if (mraa_pwm_read_period(dev) <= 0)
+            return MRAA_ERROR_NO_DATA_AVAILABLE;
+    }
+
+    if (percentage >= 1.0f) {
+        return mraa_pwm_write_duty(dev, dev->period);
+    }
+    return mraa_pwm_write_duty(dev, percentage * dev->period);
 }
 
 float
 mraa_pwm_read(mraa_pwm_context dev)
 {
-    float output = mraa_pwm_read_duty(dev) / (float) mraa_pwm_read_period(dev);
-    return output;
+    int period = mraa_pwm_read_period(dev);
+    if (period > 0) {
+         return (mraa_pwm_read_duty(dev) / (float) period);
+    }
+    return 0.0f;
 }
 
 mraa_result_t
@@ -215,6 +302,11 @@ mraa_pwm_period_ms(mraa_pwm_context dev, int ms)
 mraa_result_t
 mraa_pwm_period_us(mraa_pwm_context dev, int us)
 {
+    if (us < plat->pwm_min_period ||
+        us > plat->pwm_max_period) {
+        syslog(LOG_ERR, "pwm: period value outside platform range");
+        return MRAA_ERROR_INVALID_PARAMETER;
+    }
     return mraa_pwm_write_period(dev, us*1000);
 }
 
@@ -251,13 +343,13 @@ mraa_pwm_enable(mraa_pwm_context dev, int enable)
     int enable_f = open(bu, O_RDWR);
 
     if (enable_f == -1) {
-        syslog(LOG_ERR, "Failed to open enable for writing");
+        syslog(LOG_ERR, "pwm: Failed to open enable for writing");
         return MRAA_ERROR_INVALID_RESOURCE;
     }
     char out[2];
     int size = snprintf(out, sizeof(out), "%d", enable);
     if (write(enable_f, out, size * sizeof(char)) == -1) {
-        syslog(LOG_ERR, "Failed to write to enable");
+        syslog(LOG_ERR, "pwm: Failed to write to enable");
         close(enable_f);
         return MRAA_ERROR_INVALID_RESOURCE;
     }
@@ -273,14 +365,14 @@ mraa_pwm_unexport_force(mraa_pwm_context dev)
 
     int unexport_f = open(filepath, O_WRONLY);
     if (unexport_f == -1) {
-        syslog(LOG_ERR, "Failed to open unexport for writing");
+        syslog(LOG_ERR, "pwm: Failed to open unexport for writing");
         return MRAA_ERROR_INVALID_RESOURCE;
     }
 
     char out[MAX_SIZE];
     int size = snprintf(out, MAX_SIZE, "%d", dev->pin);
     if (write(unexport_f, out, size*sizeof(char)) == -1) {
-        syslog(LOG_ERR, "Failed to write to unexport");
+        syslog(LOG_ERR, "pwm: Failed to write to unexport");
         close(unexport_f);
         return MRAA_ERROR_INVALID_RESOURCE;
     }
@@ -322,15 +414,15 @@ mraa_pwm_config_ms(mraa_pwm_context dev, int ms ,float ms_float)
     int old_dutycycle, old_period, status;
     old_dutycycle = mraa_pwm_read_duty(dev);
     old_period = mraa_pwm_read_period(dev);
-    status = mraa_pwm_write_duty(dev, 0);
-    if (status != MRAA_SUCCESS) {
-        return status;
-    }
     status = mraa_pwm_period_us(dev, ms*1000);
     if (status != MRAA_SUCCESS) {
         mraa_pwm_write_duty(dev, old_dutycycle);
         return status;
     }
+    status = mraa_pwm_write_duty(dev, 0);
+    if (status != MRAA_SUCCESS) {
+        return status;
+    }
     status = mraa_pwm_pulsewidth_us(dev, ms_float*1000);
     if (status != MRAA_SUCCESS) {
         mraa_pwm_write_duty(dev, old_dutycycle);
@@ -346,15 +438,15 @@ mraa_pwm_config_percent(mraa_pwm_context dev, int ms ,float percentage)
     int old_dutycycle, old_period, status;
     old_dutycycle = mraa_pwm_read_duty(dev);
     old_period = mraa_pwm_read_period(dev);
-    status = mraa_pwm_write_duty(dev, 0);
-    if (status != MRAA_SUCCESS) {
-        return status;
-    }
     status = mraa_pwm_period_us(dev, ms*1000);
     if (status != MRAA_SUCCESS) {
         mraa_pwm_write_duty(dev, old_dutycycle);
         return status;
     }
+    status = mraa_pwm_write_duty(dev, 0);
+    if (status != MRAA_SUCCESS) {
+        return status;
+    }
     status = mraa_pwm_pulsewidth_us(dev, (ms*1000)*percentage);
     if (status != MRAA_SUCCESS) {
         mraa_pwm_write_duty(dev, old_dutycycle);

src/python/CMakeLists.txt

@@ -36,6 +36,6 @@ list (GET PYTHON_VERSION_LIST 1 PYTHON_VERSION_MINOR)
 
 install (FILES ${CMAKE_CURRENT_BINARY_DIR}/_mraa.so
          ${CMAKE_CURRENT_BINARY_DIR}/mraa.py
-         DESTINATION lib/python${PYTHON_VERSION_MAJOR}.${PYTHON_VERSION_MINOR}/site-packages/)
+         DESTINATION ${CMAKE_INSTALL_LIBDIR}/python${PYTHON_VERSION_MAJOR}.${PYTHON_VERSION_MINOR}/site-packages/)
 
 add_subdirectory (docs)

src/python/docs/example.rst

@@ -20,7 +20,10 @@ GPIO Interupt (isr)
 ===================
 
 The GPIO module allows you to set an interupt on a GPIO. This interupt is
-controlled by the mode that the 'edge' is in.
+controlled by the mode that the 'edge' is in. Before setting another isr please
+remove the first one, multiple isrs on one pin are not supported. Some
+platforms will not support interupts on all pins so please check your return
+values.
 
 **Note:** Galileo Gen1 only supports EDGE_BOTH
 
@@ -31,6 +34,9 @@ controlled by the mode that the 'edge' is in.
 **Note:** If the python script is ended the destructors will run meaning that
 the ISR will not run. The sleep call is there for that function.
 
+**Note:** The python isr module treats only objects. This means that int
+counters will not work inside your isr. Please use the different edge modes.
+
 I2c
 ===
 

src/python/python-mraa.i

@@ -2,5 +2,101 @@
 
 %feature("autodoc", "3");
 
+%include typemaps.i
+%include carrays.i
+
+%array_class(uint8_t, uint8Array);
+
+// i2c write()
+%typemap(in) (const uint8_t *data, int length) {
+  if (PyByteArray_Check($input)) {
+    // whilst this may seem 'hopeful' it turns out this is safe
+    $1 = (uint8_t*) PyByteArray_AsString($input);
+    $2 = PyByteArray_Size($input);
+  }
+}
+
+// Spi write()
+%typemap(in) (uint8_t *txBuf, int length) {
+  if (PyByteArray_Check($input)) {
+    // whilst this may seem 'hopeful' it turns out this is safe
+    $1 = (uint8_t*) PyByteArray_AsString($input);
+    $2 = PyByteArray_Size($input);
+  }
+}
+
+namespace mraa {
+class I2c;
+%typemap(out) uint8_t*
+{
+  // need to loop over length
+  $result = PyByteArray_FromStringAndSize((char*) $1, arg2);
+}
+
+class Spi;
+%typemap(out) uint8_t*
+{
+  // need to loop over length
+  $result = PyByteArray_FromStringAndSize((char*) $1, arg3);
+}
+}
+
+%newobject I2c::read(uint8_t *data, int length);
+%newobject Spi::write(uint8_t *data, int length);
+%newobject Spi::transfer(uint8_t *txBuf, uint8_t *rxBuf, int length);
+
+// I2c::read()
+
+%typemap(in) (uint8_t *data, int length) {
+   if (!PyInt_Check($input)) {
+       PyErr_SetString(PyExc_ValueError, "Expecting an integer");
+       return NULL;
+   }
+   $2 = PyInt_AsLong($input);
+   if ($2 < 0) {
+       PyErr_SetString(PyExc_ValueError, "Positive integer expected");
+       return NULL;
+   }
+   $1 = (uint8_t*) malloc($2 * sizeof(uint8_t));
+}
+
+%typemap(argout) (uint8_t *data, int length) {
+   Py_XDECREF($result);   /* Blow away any previous result */
+   if (result < 0) {      /* Check for I/O error */
+       free($1);
+       PyErr_SetFromErrno(PyExc_IOError);
+       return NULL;
+   }
+   // Append output value $1 to $result
+   $result = PyByteArray_FromStringAndSize((char*) $1, result);
+   free($1);
+}
+
+// Spi::transfer()
+
+%typemap(in) (uint8_t* txBuf, uint8_t* rxBuf, int length) {
+   if (!PyInt_Check($input)) {
+       PyErr_SetString(PyExc_ValueError, "Expecting an integer");
+       return NULL;
+   }
+   $3 = PyInt_AsLong($input);
+   if ($3 < 0) {
+       PyErr_SetString(PyExc_ValueError, "Positive integer expected");
+       return NULL;
+   }
+   $2 = (uint8_t*) malloc($3 * sizeof(uint8_t));
+}
+
+%typemap(argout) (uint8_t* txBuf, uint8_t* rxBuf, int length) {
+   Py_XDECREF($result);   /* Blow away any previous result */
+   if (result != MRAA_SUCCESS) {      /* Check for I/O error */
+       free($2);
+       PyErr_SetFromErrno(PyExc_IOError);
+       return NULL;
+   }
+   $result = PyByteArray_FromStringAndSize((char*) $2, $3);
+   free($2);
+}
+
 %include ../mraa.i
 

src/spi/spi.c

@@ -52,32 +52,58 @@ struct _spi {
 mraa_spi_context
 mraa_spi_init(int bus)
 {
+    if (plat == NULL) {
+        syslog(LOG_ERR, "spi: Platform Not Initialised");
+        return NULL;
+    }
+     if (plat->spi_bus_count == 0) {
+        syslog(LOG_ERR, "spi: no spi buses defined in platform");
+        return NULL;
+    }
+    if (plat->spi_bus_count == 1) {
+        bus = plat->def_spi_bus;
+    }
+    if (bus >= plat->spi_bus_count) {
+        syslog(LOG_ERR, "spi: requested bus above spi bus count");
+        return NULL;
+    }
     if (advance_func->spi_init_pre != NULL) {
         if (advance_func->spi_init_pre(bus) != MRAA_SUCCESS)
             return NULL;
     }
 
-    mraa_spi_bus_t *spi = mraa_setup_spi(bus);
-    if (bus < 0) {
-        syslog(LOG_ERR, "Failed. SPI platform Error");
-        return NULL;
+    int pos = plat->spi_bus[bus].sclk;
+    if (plat->pins[pos].spi.mux_total > 0) {
+        if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) {
+            syslog(LOG_ERR, "spi: failed to set-up spi sclk multiplexer");
+            return NULL;
+        }
     }
-    mraa_spi_context dev = (mraa_spi_context) malloc(sizeof(struct _spi));
-    memset(dev, 0, sizeof(struct _spi));
 
-    char path[MAX_SIZE];
-    sprintf(path, "/dev/spidev%u.%u", spi->bus_id, spi->slave_s);
-
-    dev->devfd = open(path, O_RDWR);
-    if (dev->devfd < 0) {
-        syslog(LOG_ERR, "Failed opening SPI Device. bus:%s", path);
-        free(dev);
-        return NULL;
+    pos = plat->spi_bus[bus].mosi;
+    if (plat->pins[pos].spi.mux_total > 0) {
+        if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) {
+            syslog(LOG_ERR, "spi: failed to set-up spi mosi multiplexer");
+            return NULL;
+        }
     }
-    dev->bpw = 8;
-    dev->clock = 4000000;
-    dev->lsb = 0;
-    dev->mode = 0;
+
+    pos = plat->spi_bus[bus].miso;
+    if (plat->pins[pos].spi.mux_total > 0) {
+        if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) {
+            syslog(LOG_ERR, "spi: failed to set-up spi miso multiplexer");
+            return NULL;
+        }
+    }
+
+    pos = plat->spi_bus[bus].cs;
+    if (plat->pins[pos].spi.mux_total > 0) {
+        if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) {
+            syslog(LOG_ERR, "spi: failed to set-up spi cs multiplexer");
+            return NULL;
+        }
+    }
+    mraa_spi_context dev = mraa_spi_init_raw(plat->spi_bus[bus].bus_id, plat->spi_bus[bus].slave_s);
 
     if (advance_func->spi_init_post != NULL) {
         mraa_result_t ret = advance_func->spi_init_post(dev);
@@ -90,6 +116,33 @@ mraa_spi_init(int bus)
     return dev;
 }
 
+mraa_spi_context
+mraa_spi_init_raw(unsigned int bus, unsigned int cs)
+{
+    mraa_spi_context dev = (mraa_spi_context) malloc(sizeof(struct _spi));
+    if (dev == NULL) {
+        syslog(LOG_CRIT, "spi: Failed to allocate memory for context");
+        return NULL;
+    }
+    memset(dev, 0, sizeof(struct _spi));
+
+    char path[MAX_SIZE];
+    sprintf(path, "/dev/spidev%u.%u", bus, cs);
+
+    dev->devfd = open(path, O_RDWR);
+    if (dev->devfd < 0) {
+        syslog(LOG_ERR, "spi: Failed opening SPI Device. bus:%s", path);
+        free(dev);
+        return NULL;
+    }
+    dev->bpw = 8;
+    dev->clock = 4000000;
+    dev->lsb = 0;
+    dev->mode = 0;
+
+    return dev;
+}
+
 mraa_result_t
 mraa_spi_mode(mraa_spi_context dev, mraa_spi_mode_t mode)
 {
@@ -113,7 +166,7 @@ mraa_spi_mode(mraa_spi_context dev, mraa_spi_mode_t mode)
     }
 
     if (ioctl (dev->devfd, SPI_IOC_WR_MODE, &spi_mode) < 0) {
-        syslog(LOG_ERR, "Failed to set spi mode");
+        syslog(LOG_ERR, "spi: Failed to set spi mode");
         return MRAA_ERROR_INVALID_RESOURCE;
     }
 
@@ -131,12 +184,13 @@ mraa_spi_frequency(mraa_spi_context dev, int hz)
 mraa_result_t
 mraa_spi_lsbmode(mraa_spi_context dev, mraa_boolean_t lsb)
 {
-    uint8_t lsb_mode = 0;
-    if (lsb == 1) {
-        lsb_mode = 1;
-    }
+    uint8_t lsb_mode = (uint8_t) lsb;
     if (ioctl (dev->devfd, SPI_IOC_WR_LSB_FIRST, &lsb_mode) < 0) {
-        syslog(LOG_ERR, "Failed to set bit order");
+        syslog(LOG_ERR, "spi: Failed to set bit order");
+        return MRAA_ERROR_INVALID_RESOURCE;
+    }
+    if (ioctl (dev->devfd, SPI_IOC_RD_LSB_FIRST, &lsb_mode) < 0) {
+        syslog(LOG_ERR, "spi: Failed to set bit order");
         return MRAA_ERROR_INVALID_RESOURCE;
     }
     dev->lsb = lsb;
@@ -146,6 +200,10 @@ mraa_spi_lsbmode(mraa_spi_context dev, mraa_boolean_t lsb)
 mraa_result_t
 mraa_spi_bit_per_word(mraa_spi_context dev, unsigned int bits)
 {
+    if (ioctl(dev->devfd, SPI_IOC_WR_BITS_PER_WORD, &bits) < 0) {
+        syslog(LOG_ERR, "spi: Failed to set bit per word");
+        return MRAA_ERROR_INVALID_RESOURCE;
+    }
     dev->bpw = bits;
     return MRAA_SUCCESS;
 }
@@ -166,28 +224,38 @@ mraa_spi_write(mraa_spi_context dev, uint8_t data)
     msg.delay_usecs = 0;
     msg.len = length;
     if (ioctl(dev->devfd, SPI_IOC_MESSAGE(1), &msg) < 0) {
-        syslog(LOG_ERR, "Failed to perform dev transfer");
+        syslog(LOG_ERR, "spi: Failed to perform dev transfer");
         return -1;
     }
     return recv;
 }
 
-uint8_t*
-mraa_spi_write_buf(mraa_spi_context dev, uint8_t* data, int length)
+mraa_result_t
+mraa_spi_transfer_buf(mraa_spi_context dev, uint8_t* data, uint8_t* rxbuf, int length)
 {
     struct spi_ioc_transfer msg;
     memset(&msg, 0, sizeof(msg));
 
-    uint8_t* recv = malloc(sizeof(uint8_t) * length);
-
     msg.tx_buf = (unsigned long) data;
-    msg.rx_buf = (unsigned long) recv;
+    msg.rx_buf = (unsigned long) rxbuf;
     msg.speed_hz = dev->clock;
     msg.bits_per_word = dev->bpw;
     msg.delay_usecs = 0;
     msg.len = length;
     if (ioctl(dev->devfd, SPI_IOC_MESSAGE(1), &msg) < 0) {
-        syslog(LOG_ERR, "Failed to perform dev transfer");
+        syslog(LOG_ERR, "spi: Failed to perform dev transfer");
+        return MRAA_ERROR_INVALID_RESOURCE;
+    }
+    return MRAA_SUCCESS;
+}
+
+uint8_t*
+mraa_spi_write_buf(mraa_spi_context dev, uint8_t* data, int length)
+{
+    uint8_t* recv = malloc(sizeof(uint8_t) * length);
+
+    if (mraa_spi_transfer_buf(dev, data, recv, length) != MRAA_SUCCESS) {
+        free(recv);
         return NULL;
     }
     return recv;

src/uart/uart.c

@@ -30,25 +30,81 @@
 #include "uart.h"
 #include "mraa_internal.h"
 
-/**
- * A structure representing a UART device
- */
-struct _uart {
-    /*@{*/
-    int index; /**< the uart index, as known to the os. */
-    /*@}*/
-};
-
 mraa_uart_context
 mraa_uart_init(int index)
 {
-    if ( mraa_setup_uart(index) != MRAA_SUCCESS)
+    if (plat == NULL) {
+        syslog(LOG_ERR, "uart: platform not initialised");
         return NULL;
+    }
+
+    if (advance_func->uart_init_pre != NULL) {
+        if (advance_func->uart_init_pre(index) != MRAA_SUCCESS) {
+            syslog(LOG_ERR, "uart: failure in pre-init platform hook");
+            return NULL;
+        }
+    }
+
+    if (plat->uart_dev_count == 0) {
+        syslog(LOG_ERR, "uart: platform has no UARTs defined");
+        return NULL;
+    }
+
+    if (plat->uart_dev_count <= index) {
+        syslog(LOG_ERR, "uart: platform has only %i", plat->uart_dev_count);
+        return NULL;
+    }
+
+    int pos = plat->uart_dev[index].rx;
+    if (pos >= 0) {
+        if (plat->pins[pos].uart.mux_total > 0) {
+            if (mraa_setup_mux_mapped(plat->pins[pos].uart) != MRAA_SUCCESS) {
+                syslog(LOG_ERR, "uart: failed to setup muxes for RX pin");
+                return NULL;
+            }
+        }
+    }
+
+    if (pos >= 0) {
+        pos = plat->uart_dev[index].tx;
+        if (plat->pins[pos].uart.mux_total > 0) {
+            if (mraa_setup_mux_mapped(plat->pins[pos].uart) != MRAA_SUCCESS) {
+                syslog(LOG_ERR, "uart: failed to setup muxes for TX pin");
+                return NULL;
+            }
+        }
+    }
 
     mraa_uart_context dev = (mraa_uart_context) malloc(sizeof(struct _uart));
+    if (dev == NULL) {
+        syslog(LOG_CRIT, "uart: Failed to allocate memory for context");
+        return NULL;
+    }
     memset(dev, 0, sizeof(struct _uart));
 
     dev->index = index;
+    dev->path = (char*) plat->uart_dev[index].device_path;
+    if (advance_func->uart_init_post != NULL) {
+        mraa_result_t ret = advance_func->uart_init_post(dev);
+        if (ret != MRAA_SUCCESS) {
+            free(dev);
+            return NULL;
+        }
+    }
 
     return dev;
 }
+
+char*
+mraa_uart_get_dev_path(mraa_uart_context dev)
+{
+    if (dev == NULL) {
+        syslog(LOG_ERR, "uart: get_device_path failed, context is NULL");
+        return "ERROR:CONTEXT_IS_NULL";
+    }
+    if (dev->path == NULL) {
+        syslog(LOG_ERR, "uart: device path undefined");
+        return "ERROR:PATH_NOT_SET";
+    }
+    return dev->path;
+}

src/x86/CMakeLists.txt

@@ -0,0 +1,10 @@
+message (INFO " - Adding x86 platforms")
+set (mraa_LIB_SRCS_NOAUTO ${mraa_LIB_SRCS_NOAUTO}
+  ${PROJECT_SOURCE_DIR}/src/x86/x86.c
+  ${PROJECT_SOURCE_DIR}/src/x86/intel_galileo_rev_d.c
+  ${PROJECT_SOURCE_DIR}/src/x86/intel_galileo_rev_g.c
+  ${PROJECT_SOURCE_DIR}/src/x86/intel_edison_fab_c.c
+  ${PROJECT_SOURCE_DIR}/src/x86/intel_de3815.c
+  ${PROJECT_SOURCE_DIR}/src/x86/intel_minnow_max.c
+  PARENT_SCOPE
+)

src/x86/intel_de3815.c

@@ -0,0 +1,144 @@
+/*
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "common.h"
+#include "x86/intel_de3815.h"
+
+#define PLATFORM_NAME "Intel DE3815"
+#define MAX_SIZE 64
+#define SYSFS_CLASS_GPIO "/sys/class/gpio"
+
+mraa_board_t*
+mraa_intel_de3815()
+{
+    mraa_board_t* b = (mraa_board_t*) malloc(sizeof(mraa_board_t));
+    if (b == NULL) {
+        return NULL;
+    }
+
+    b->platform_name = PLATFORM_NAME;
+    b->phy_pin_count = 18;
+    //b->gpio_count = 14;
+    b->aio_count = 0;
+    b->adc_raw = 0;
+    b->adc_supported = 0;
+    b->pwm_default_period = 500;
+    b->pwm_max_period = 2147483;
+    b->pwm_min_period = 1;
+
+    b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*MRAA_INTEL_DE3815_PINCOUNT);
+    if (b->pins == NULL) {
+        goto error;
+    }
+
+    strncpy(b->pins[0].name, "1.8v", 8);
+    b->pins[0].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+
+    strncpy(b->pins[1].name, "GND", 8);
+    b->pins[1].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+    strncpy(b->pins[2].name, "HDMIcec", 8);
+    b->pins[2].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+    strncpy(b->pins[3].name, "DMICclk", 8);
+    b->pins[3].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+    strncpy(b->pins[4].name, "3.3v", 8);
+    b->pins[4].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+    strncpy(b->pins[5].name, "DMICda", 8);
+    b->pins[5].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+    strncpy(b->pins[6].name, "Key", 8);
+    b->pins[6].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+    strncpy(b->pins[7].name, "SMB-A", 8);
+    b->pins[7].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+    strncpy(b->pins[8].name, "5v", 8);
+    b->pins[8].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+    strncpy(b->pins[9].name, "SCI", 8);
+    b->pins[9].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+
+    strncpy(b->pins[10].name, "PWM0", 8);
+    b->pins[10].capabilites = (mraa_pincapabilities_t) {1,0,1,0,0,0,0,0};
+    b->pins[10].pwm.pinmap = 0;
+    b->pins[10].pwm.parent_id = 0;
+    b->pins[10].pwm.mux_total = 0;
+
+    strncpy(b->pins[11].name, "PWM1", 8);
+    b->pins[11].capabilites = (mraa_pincapabilities_t) {1,0,1,0,0,0,0,0};
+    b->pins[11].pwm.pinmap = 0;
+    b->pins[11].pwm.parent_id = 1;
+    b->pins[11].pwm.mux_total = 0;
+
+    strncpy(b->pins[12].name, "I2C0SCL", 8);
+    b->pins[12].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,1,0,0};
+    b->pins[12].i2c.pinmap = 1;
+    b->pins[12].i2c.mux_total = 0;
+
+    strncpy(b->pins[13].name, "I2C0SDA", 8);
+    b->pins[13].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,1,0,0};
+    b->pins[13].i2c.pinmap = 1;
+    b->pins[13].i2c.mux_total = 0;
+
+    strncpy(b->pins[14].name, "I2C1SCL", 8);
+    b->pins[14].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,1,0,0};
+    b->pins[14].i2c.pinmap = 1;
+    b->pins[14].i2c.mux_total = 0;
+
+    strncpy(b->pins[15].name, "I2C1SDA", 8);
+    b->pins[15].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,1,0,0};
+    b->pins[15].i2c.pinmap = 1;
+    b->pins[15].i2c.mux_total = 0;
+
+    strncpy(b->pins[16].name, "SMB_CLK", 8);
+    b->pins[16].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+    strncpy(b->pins[17].name, "SMB_SDA", 8);
+    b->pins[17].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
+
+    //BUS DEFINITIONS
+    b->i2c_bus_count = 2;
+    b->def_i2c_bus = 0;
+    b->i2c_bus[0].bus_id = 0;
+    b->i2c_bus[0].sda = 12;
+    b->i2c_bus[0].scl = 13;
+
+    b->i2c_bus[1].bus_id = 1;
+    b->i2c_bus[1].sda = 14;
+    b->i2c_bus[1].scl = 15;
+
+    b->spi_bus_count = 1;
+    b->def_spi_bus = 0;
+    b->spi_bus[0].bus_id = 1;
+    b->spi_bus[0].slave_s = 0;
+    b->spi_bus[0].cs = 10;
+    b->spi_bus[0].mosi = 11;
+    b->spi_bus[0].miso = 12;
+    b->spi_bus[0].sclk = 13;
+
+    b->uart_dev_count = 0;
+
+    return b;
+error:
+    syslog(LOG_CRIT, "de3815: Platform failed to initialise");
+    free(b);
+    return NULL;
+}

src/x86/intel_galileo_rev_d.c

@@ -24,17 +24,108 @@
 
 #include <stdlib.h>
 #include <string.h>
+#include <sys/mman.h>
 
 #include "common.h"
-#include "intel_galileo_rev_d.h"
+#include "x86/intel_galileo_rev_d.h"
+
+#define UIO_PATH "/dev/uio0"
+#define PLATFORM_NAME "Intel Galileo Gen 1"
+
+static uint8_t *mmap_reg = NULL;
+static int mmap_fd = 0;
+static int mmap_size = 0x1000;
+static unsigned int mmap_count = 0;
+
+static mraa_result_t
+mraa_intel_galileo_g1_mmap_unsetup()
+{
+    if (mmap_reg == NULL) {
+        syslog(LOG_WARNING, "galileo1: Mmap null register nothing to unsetup");
+        return MRAA_ERROR_INVALID_RESOURCE;
+    }
+    munmap(mmap_reg, mmap_size);
+    mmap_reg = NULL;
+    close(mmap_fd);
+    return MRAA_SUCCESS;
+}
+
+mraa_result_t
+mraa_intel_galileo_g1_mmap_write(mraa_gpio_context dev, int value)
+{
+    int bitpos = plat->pins[dev->phy_pin].mmap.bit_pos;
+    if (value) {
+        *((unsigned *)mmap_reg) |= (1<<bitpos);
+        return MRAA_SUCCESS;
+    }
+    *((unsigned *)mmap_reg) &= ~(1<<bitpos);
+
+    return MRAA_SUCCESS;
+}
+
+mraa_result_t
+mraa_intel_galileo_g1_mmap_setup(mraa_gpio_context dev, mraa_boolean_t en)
+{
+    if (dev == NULL) {
+        syslog(LOG_ERR, "galileo1: Gpio context not valid");
+        return MRAA_ERROR_INVALID_HANDLE;
+    }
+
+    if (mraa_pin_mode_test(dev->phy_pin, MRAA_PIN_FAST_GPIO) == 0) {
+        syslog(LOG_WARNING, "galileo1: Mmap not available on this pin");
+        return MRAA_ERROR_NO_RESOURCES;
+    }
+    if (en == 0) {
+        if (dev->mmap_write == NULL) {
+            syslog(LOG_NOTICE, "galileo1: Can't disable disabled mmap gpio");
+            return MRAA_ERROR_INVALID_PARAMETER;
+        }
+        dev->mmap_write = NULL;
+        mmap_count--;
+        if (mmap_count == 0) {
+            return mraa_intel_galileo_g1_mmap_unsetup();
+        }
+        return MRAA_SUCCESS;
+    }
+
+    if (dev->mmap_write != NULL) {
+        syslog(LOG_ERR, "galileo1: Can't enable enabled mmap gpio");
+        return MRAA_ERROR_INVALID_PARAMETER;
+    }
+    if (mmap_reg == NULL) {
+        if ((mmap_fd = open(UIO_PATH, O_RDWR)) < 0) {
+            syslog(LOG_ERR, "galileo1: Unable to open UIO device");
+            return MRAA_ERROR_INVALID_RESOURCE;
+        }
+        mmap_reg = mmap(NULL, mmap_size, PROT_READ|PROT_WRITE,
+            MAP_SHARED, mmap_fd, 0);
+
+        if (mmap_reg == MAP_FAILED) {
+            syslog(LOG_ERR, "galileo1: Mmap failed to mmap");
+            mmap_reg = NULL;
+            close(mmap_fd);
+            return MRAA_ERROR_NO_RESOURCES;
+        }
+    }
+    if (mraa_setup_mux_mapped(plat->pins[dev->phy_pin].mmap.gpio)
+            != MRAA_SUCCESS) {
+        syslog(LOG_ERR, "galileo1: Unable to setup required multiplexers for mmap");
+        return MRAA_ERROR_INVALID_RESOURCE;
+    }
+    dev->mmap_write = &mraa_intel_galileo_g1_mmap_write;
+
+    return MRAA_SUCCESS;
+}
 
 mraa_board_t*
 mraa_intel_galileo_rev_d()
 {
     mraa_board_t* b = (mraa_board_t*) malloc(sizeof(mraa_board_t));
-    if (b == NULL)
+    if (b == NULL) {
         return NULL;
+    }
 
+    b->platform_name = PLATFORM_NAME;
     b->phy_pin_count = 20;
     b->gpio_count = 14;
     b->aio_count = 6;
@@ -42,8 +133,16 @@ mraa_intel_galileo_rev_d()
 
     b->adc_raw = 12;
     b->adc_supported = 10;
+    b->pwm_default_period = 500;
+    b->pwm_max_period = 7968;
+    b->pwm_min_period = 1;
+
+    advance_func->gpio_mmap_setup = &mraa_intel_galileo_g1_mmap_setup;
 
     b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*MRAA_INTEL_GALILEO_REV_D_PINCOUNT);
+    if (b->pins == NULL) {
+        goto error;
+    }
 
     //GPIO IO0 - IO10
     strncpy(b->pins[0].name, "IO0", 8);
@@ -300,11 +399,19 @@ mraa_intel_galileo_rev_d()
     b->spi_bus[0].miso = 12;
     b->spi_bus[0].sclk = 13;
 
+    b->uart_dev_count = 2;
     b->def_uart_dev = 0;
     b->uart_dev[0].rx = 0;
     b->uart_dev[0].tx = 1;
+    b->uart_dev[0].device_path = "/dev/ttyS0";
+
     b->uart_dev[1].rx = -1;
     b->uart_dev[1].tx = -1;
+    b->uart_dev[1].device_path = "/dev/ttyS1";
 
     return b;
+error:
+    syslog(LOG_CRIT, "galileo1: Platform failed to initialise");
+    free(b);
+    return NULL;
 }

src/x86/intel_galileo_rev_g.c

@@ -25,15 +25,26 @@
 
 #include <stdlib.h>
 #include <string.h>
+#include <sys/mman.h>
 
 #include "common.h"
-#include "intel_galileo_rev_g.h"
+#include "x86/intel_galileo_rev_g.h"
 
 #define MAX_SIZE 64
 #define SYSFS_CLASS_GPIO "/sys/class/gpio"
+#define PLATFORM_NAME "Intel Galileo Gen 2"
+
+#define UIO_PATH "/dev/uio0"
+
+static uint8_t *mmap_reg = NULL;
+static int mmap_fd = 0;
+static int mmap_size = 0x1000;
+static unsigned int mmap_count = 0;
 
 static unsigned int pullup_map[] = {33,29,35,17,37,19,21,39,41,23,27,25,43,31,49,51,53,55,57,59};
 
+static mraa_gpio_context agpioOutputen[MRAA_INTEL_GALILEO_GEN_2_PINCOUNT];
+
 mraa_result_t
 mraa_intel_galileo_gen2_dir_pre(mraa_gpio_context dev, gpio_dir_t dir)
 {
@@ -43,15 +54,36 @@ mraa_intel_galileo_gen2_dir_pre(mraa_gpio_context dev, gpio_dir_t dir)
             return MRAA_SUCCESS;
 
         if (plat->pins[pin].gpio.complex_cap.output_en == 1) {
-            mraa_gpio_context output_e;
-            output_e = mraa_gpio_init_raw(plat->pins[pin].gpio.output_enable);
-            if (mraa_gpio_dir(output_e, MRAA_GPIO_OUT) != MRAA_SUCCESS)
-                return MRAA_ERROR_INVALID_RESOURCE;
+            if (!agpioOutputen[pin]) {
+                agpioOutputen[pin] = mraa_gpio_init_raw(plat->pins[pin].gpio.output_enable);
+                if (agpioOutputen[pin] == NULL) {
+                    return MRAA_ERROR_INVALID_RESOURCE;
+                }
+                if (mraa_gpio_dir(agpioOutputen[pin], MRAA_GPIO_OUT) != MRAA_SUCCESS) {
+                    return MRAA_ERROR_INVALID_RESOURCE;
+                }
+            }
+
             int output_val = 1;
-            if (dir == MRAA_GPIO_OUT)
+            if (dir == MRAA_GPIO_OUT) {
                 output_val = 0;
-            if (mraa_gpio_write(output_e, output_val) != MRAA_SUCCESS)
+            }
+            if (mraa_gpio_write(agpioOutputen[pin], output_val) != MRAA_SUCCESS) {
                 return MRAA_ERROR_INVALID_RESOURCE;
+            }
+        }
+    }
+    return MRAA_SUCCESS;
+}
+
+mraa_result_t
+mraa_intel_galileo_gen2_gpio_close_pre(mraa_gpio_context dev)
+{
+    if (dev->phy_pin >= 0) {
+        int pin = dev->phy_pin;
+        if (agpioOutputen[pin]) {
+            mraa_gpio_close(agpioOutputen[pin]);
+            agpioOutputen[pin] = NULL;
         }
     }
     return MRAA_SUCCESS;
@@ -60,19 +92,27 @@ mraa_intel_galileo_gen2_dir_pre(mraa_gpio_context dev, gpio_dir_t dir)
 mraa_result_t
 mraa_intel_galileo_gen2_i2c_init_pre(unsigned int bus)
 {
-    mraa_gpio_context io18;
+    mraa_gpio_context io18  = mraa_gpio_init_raw(57);
     int status = 0;
-    io18 = mraa_gpio_init_raw(57);
-    status = status + mraa_gpio_dir(io18, MRAA_GPIO_IN);
-    status = status + mraa_gpio_mode(io18, MRAA_GPIO_HIZ);
 
-    mraa_gpio_context io19;
-    io19 = mraa_gpio_init_raw(59);
-    status = status + mraa_gpio_dir(io19, MRAA_GPIO_IN);
-    status = status + mraa_gpio_mode(io19, MRAA_GPIO_HIZ);
-
-    if (status > 0)
+    if (io18 == NULL) {
         return MRAA_ERROR_UNSPECIFIED;
+    }
+    status += mraa_gpio_dir(io18, MRAA_GPIO_IN);
+    status += mraa_gpio_mode(io18, MRAA_GPIO_HIZ);
+    mraa_gpio_close(io18);
+
+    mraa_gpio_context io19 = mraa_gpio_init_raw(59);
+    if (io19 == NULL) {
+        return MRAA_ERROR_UNSPECIFIED;
+    }
+    status += mraa_gpio_dir(io19, MRAA_GPIO_IN);
+    status += mraa_gpio_mode(io19, MRAA_GPIO_HIZ);
+    mraa_gpio_close(io19);
+
+    if (status > 0) {
+        return MRAA_ERROR_UNSPECIFIED;
+    }
     return MRAA_SUCCESS;
 }
 
@@ -84,7 +124,7 @@ mraa_intel_galileo_gen2_pwm_period_replace(mraa_pwm_context dev, int period)
 
     int period_f = open(bu, O_RDWR);
     if (period_f == -1) {
-        syslog(LOG_ERR, "Failed to open period for writing!");
+        syslog(LOG_ERR, "galileo2: Failed to open period for writing!");
         return MRAA_ERROR_INVALID_RESOURCE;
     }
     char out[MAX_SIZE];
@@ -108,9 +148,12 @@ mraa_intel_galileo_gen2_gpio_mode_replace(mraa_gpio_context dev, gpio_mode_t mod
 
     mraa_gpio_context pullup_e;
     pullup_e = mraa_gpio_init_raw(pullup_map[dev->phy_pin]);
-    mraa_result_t sta = mraa_gpio_dir(pullup_e, MRAA_GPIO_IN);
-    if (sta != MRAA_SUCCESS) {
-        syslog(LOG_ERR, "Galileo Gen 2: Failed to set gpio pullup");
+    if (pullup_e == NULL) {
+        return MRAA_ERROR_INVALID_RESOURCE;
+    }
+    if (mraa_gpio_dir(pullup_e, MRAA_GPIO_IN) != MRAA_SUCCESS) {
+        mraa_gpio_close(pullup_e);
+        syslog(LOG_ERR, "galileo2: Failed to set gpio pullup");
         return MRAA_ERROR_INVALID_RESOURCE;
     }
 
@@ -119,7 +162,7 @@ mraa_intel_galileo_gen2_gpio_mode_replace(mraa_gpio_context dev, gpio_mode_t mod
 
     int drive = open(filepath, O_WRONLY);
     if (drive == -1) {
-        syslog(LOG_ERR, "Failed to open drive for writing");
+        syslog(LOG_ERR, "galileo2: Failed to open drive for writing");
         return MRAA_ERROR_INVALID_RESOURCE;
     }
 
@@ -147,45 +190,167 @@ mraa_intel_galileo_gen2_gpio_mode_replace(mraa_gpio_context dev, gpio_mode_t mod
             return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
     }
     if (write(drive, bu, length*sizeof(char)) == -1) {
-        syslog(LOG_ERR, "Failed to write to drive mode");
+        syslog(LOG_ERR, "galileo2: Failed to write to drive mode");
         close(drive);
+        mraa_gpio_close(pullup_e);
         return MRAA_ERROR_INVALID_RESOURCE;
     }
     if (value != -1) {
-        sta = mraa_gpio_dir(pullup_e, MRAA_GPIO_OUT);
-        sta = mraa_gpio_write(pullup_e, value);
-        if (sta != MRAA_SUCCESS) {
-            syslog(LOG_ERR, "Galileo Gen 2: Error Setting pullup");
-            return sta;
+        mraa_result_t ret = mraa_gpio_dir(pullup_e, MRAA_GPIO_OUT);
+        ret += mraa_gpio_write(pullup_e, value);
+        if (ret != MRAA_SUCCESS) {
+            syslog(LOG_ERR, "galileo2: Error Setting pullup");
+            close(drive);
+            return MRAA_ERROR_INVALID_RESOURCE;
         }
     }
 
+    mraa_gpio_close(pullup_e);
     close(drive);
     return MRAA_SUCCESS;
 }
 
+mraa_result_t
+mraa_intel_galileo_gen2_uart_init_pre(int index)
+{
+    mraa_gpio_context io0_output = mraa_gpio_init_raw(32);
+    if (io0_output == NULL) {
+        return MRAA_ERROR_INVALID_RESOURCE;
+    }
+    mraa_gpio_context io1_output = mraa_gpio_init_raw(28);
+    if (io1_output == NULL) {
+        mraa_gpio_close(io0_output);
+        return MRAA_ERROR_INVALID_RESOURCE;
+    }
+
+    int status = 0;
+    status += mraa_gpio_dir(io0_output, MRAA_GPIO_OUT);
+    status += mraa_gpio_dir(io1_output, MRAA_GPIO_OUT);
+
+    status += mraa_gpio_write(io0_output, 1);
+    status += mraa_gpio_write(io1_output, 0);
+
+    mraa_gpio_close(io0_output);
+    mraa_gpio_close(io1_output);
+
+    if (status > 0) {
+        return MRAA_ERROR_UNSPECIFIED;
+    }
+    return MRAA_SUCCESS;
+}
+
+static mraa_result_t
+mraa_intel_galileo_g2_mmap_unsetup()
+{
+    if (mmap_reg == NULL) {
+        syslog(LOG_ERR, "mmap: null register cant unsetup");
+        return MRAA_ERROR_INVALID_RESOURCE;
+    }
+    munmap(mmap_reg, mmap_size);
+    mmap_reg = NULL;
+    close(mmap_fd);
+    return MRAA_SUCCESS;
+}
+
+mraa_result_t
+mraa_intel_galileo_g2_mmap_write(mraa_gpio_context dev, int value)
+{
+    int bitpos = plat->pins[dev->phy_pin].mmap.bit_pos;
+    if (value) {
+        *((unsigned *)mmap_reg) |= (1<<bitpos);
+        return MRAA_SUCCESS;
+    }
+    *((unsigned *)mmap_reg) &= ~(1<<bitpos);
+
+    return MRAA_SUCCESS;
+}
+
+mraa_result_t
+mraa_intel_galileo_g2_mmap_setup(mraa_gpio_context dev, mraa_boolean_t en)
+{
+    if (dev == NULL) {
+        syslog(LOG_ERR, "Galileo mmap: context not valid");
+        return MRAA_ERROR_INVALID_HANDLE;
+    }
+
+    if (mraa_pin_mode_test(dev->phy_pin, MRAA_PIN_FAST_GPIO) == 0) {
+        syslog(LOG_ERR, "Galileo mmap: mmap not on this pin");
+        return MRAA_ERROR_NO_RESOURCES;
+    }
+    if (en == 0) {
+        if (dev->mmap_write == NULL) {
+            syslog(LOG_ERR, "mmap: can't disable disabled mmap gpio");
+            return MRAA_ERROR_INVALID_PARAMETER;
+        }
+        dev->mmap_write = NULL;
+        mmap_count--;
+        if (mmap_count == 0) {
+            return mraa_intel_galileo_g2_mmap_unsetup();
+        }
+        return MRAA_SUCCESS;
+    }
+
+    if (dev->mmap_write != NULL) {
+        syslog(LOG_ERR, "mmap: can't enable enabled mmap gpio");
+        return MRAA_ERROR_INVALID_PARAMETER;
+    }
+    if (mmap_reg == NULL) {
+        if ((mmap_fd = open(UIO_PATH, O_RDWR)) < 0) {
+            syslog(LOG_ERR, "mmap: Unable to open UIO device");
+            return MRAA_ERROR_INVALID_RESOURCE;
+        }
+        mmap_reg = mmap(NULL, mmap_size, PROT_READ|PROT_WRITE,
+            MAP_SHARED, mmap_fd, 0);
+
+        if (mmap_reg == MAP_FAILED) {
+            syslog(LOG_ERR, "mmap: failed to mmap");
+            mmap_reg = NULL;
+            close(mmap_fd);
+            return MRAA_ERROR_NO_RESOURCES;
+        }
+    }
+    if (mraa_setup_mux_mapped(plat->pins[dev->phy_pin].mmap.gpio)
+        != MRAA_SUCCESS) {
+        syslog(LOG_ERR, "mmap: unable to setup required multiplexers");
+        return MRAA_ERROR_INVALID_RESOURCE;
+    }
+    dev->mmap_write = &mraa_intel_galileo_g2_mmap_write;
+    return MRAA_SUCCESS;
+}
+
 mraa_board_t*
 mraa_intel_galileo_gen2()
 {
     mraa_board_t* b = (mraa_board_t*) malloc(sizeof(mraa_board_t));
-    if (b == NULL)
+    if (b == NULL) {
         return NULL;
+    }
 
+    b->platform_name = PLATFORM_NAME;
     b->phy_pin_count = 20;
     b->gpio_count = 14;
     b->aio_count = 6;
     b->adc_raw = 12;
     b->adc_supported = 10;
+    b->pwm_default_period = 5000;
+    b->pwm_max_period = 41666;
+    b->pwm_min_period = 666;
 
+    advance_func->gpio_close_pre = &mraa_intel_galileo_gen2_gpio_close_pre;
     advance_func->gpio_dir_pre = &mraa_intel_galileo_gen2_dir_pre;
     advance_func->i2c_init_pre = &mraa_intel_galileo_gen2_i2c_init_pre;
     advance_func->pwm_period_replace = &mraa_intel_galileo_gen2_pwm_period_replace;
     advance_func->gpio_mode_replace = &mraa_intel_galileo_gen2_gpio_mode_replace;
+    advance_func->uart_init_pre = &mraa_intel_galileo_gen2_uart_init_pre;
+    advance_func->gpio_mmap_setup = &mraa_intel_galileo_g2_mmap_setup;
 
     b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*MRAA_INTEL_GALILEO_GEN_2_PINCOUNT);
+    if (b->pins == NULL) {
+        goto error;
+    }
 
     strncpy(b->pins[0].name, "IO0", 8);
-    b->pins[0].capabilites = (mraa_pincapabilities_t) {1,1,0,1,0,0,0};
+    b->pins[0].capabilites = (mraa_pincapabilities_t) {1,1,0,1,0,0,0,1};
     b->pins[0].gpio.pinmap = 11;
     b->pins[0].gpio.parent_id = 0;
     b->pins[0].gpio.mux_total = 0;
@@ -201,9 +366,11 @@ mraa_intel_galileo_gen2()
     b->pins[0].mmap.gpio.mux[1].value = 0;
     b->pins[0].mmap.mem_sz = 0x1000;
     b->pins[0].mmap.bit_pos = 3;
+    b->pins[0].uart.parent_id = 0;
+    b->pins[0].uart.mux_total = 0;
 
     strncpy(b->pins[1].name, "IO1", 8);
-    b->pins[1].capabilites = (mraa_pincapabilities_t) {1,1,0,1,0,0,0};
+    b->pins[1].capabilites = (mraa_pincapabilities_t) {1,1,0,1,0,0,0,1};
     b->pins[1].gpio.pinmap = 12;
     b->pins[1].gpio.parent_id = 0;
     b->pins[1].gpio.mux_total = 1;
@@ -223,6 +390,10 @@ mraa_intel_galileo_gen2()
     b->pins[1].mmap.gpio.mux[2].value = 0;
     b->pins[1].mmap.mem_sz = 0x1000;
     b->pins[1].mmap.bit_pos = 4;
+    b->pins[1].uart.parent_id = 0;
+    b->pins[1].uart.mux_total = 1;
+    b->pins[1].uart.mux[0].pin = 45;
+    b->pins[1].uart.mux[0].value = 1;
 
     strncpy(b->pins[2].name, "IO2", 8);
     b->pins[2].capabilites = (mraa_pincapabilities_t) {1,1,0,1,0,0,0};
@@ -361,7 +532,7 @@ mraa_intel_galileo_gen2()
     b->pins[9].pwm.mux[1].value = 0;
 
     strncpy(b->pins[10].name, "IO10", 8);
-    b->pins[10].capabilites = (mraa_pincapabilities_t) {1,1,1,1,0,0,0};
+    b->pins[10].capabilites = (mraa_pincapabilities_t) {1,1,1,1,1,0,0};
     b->pins[10].gpio.pinmap = 10;
     b->pins[10].gpio.parent_id = 0;
     b->pins[10].gpio.mux_total = 1;
@@ -388,6 +559,10 @@ mraa_intel_galileo_gen2()
     b->pins[10].mmap.gpio.mux[2].value = 0;
     b->pins[10].mmap.mem_sz = 0x1000;
     b->pins[10].mmap.bit_pos = 2;
+    b->pins[10].spi.parent_id = 1;
+    b->pins[10].spi.mux_total = 1;
+    b->pins[10].spi.mux[0].pin = 74;
+    b->pins[10].spi.mux[0].value = 0;
 
     strncpy(b->pins[11].name, "IO11", 8);
     b->pins[11].capabilites = (mraa_pincapabilities_t) {1,1,1,0,1,0,0};
@@ -415,9 +590,9 @@ mraa_intel_galileo_gen2()
     b->pins[11].spi.mux[0].pin = 72;
     b->pins[11].spi.mux[0].value = 0;
     b->pins[11].spi.mux[1].pin = 44;
-    b->pins[11].spi.mux[2].value = 1;
-    b->pins[11].pwm.mux[2].pin = 24;
-    b->pins[11].pwm.mux[2].value = 0;
+    b->pins[11].spi.mux[1].value = 1;
+    b->pins[11].spi.mux[2].pin = 24;
+    b->pins[11].spi.mux[2].value = 0;
 
     strncpy(b->pins[12].name, "IO12", 8);
     b->pins[12].capabilites = (mraa_pincapabilities_t) {1,1,0,1,1,0,0};
@@ -565,5 +740,15 @@ mraa_intel_galileo_gen2()
     b->spi_bus[0].miso = 12;
     b->spi_bus[0].sclk = 13;
 
+    b->uart_dev_count = 1;
+    b->def_uart_dev = 0;
+    b->uart_dev[0].rx = 0;
+    b->uart_dev[0].tx = 1;
+    b->uart_dev[0].device_path = "/dev/ttyS0";
+
     return b;
+error:
+    syslog(LOG_CRIT, "galileo2: Platform failed to initialise");
+    free(b);
+    return NULL;
 }

src/x86/intel_minnow_max.c

@@ -0,0 +1,186 @@
+/*
+ * Author: Henry Bruce <henry.bruce@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdlib.h>
+#include <string.h>
+#include <sys/utsname.h>
+#include <ctype.h>
+
+#include "common.h"
+#include "x86/intel_minnow_max.h"
+
+#define PLATFORM_NAME "MinnowBoard MAX"
+#define I2C_BUS_COUNT 10
+#define I2C_BUS_DEFAULT 7
+
+int arch_nr_gpios_adjust = 0x100;
+
+mraa_result_t
+mraa_set_pininfo(mraa_board_t* board, int mraa_index, char *name, mraa_pincapabilities_t caps, int sysfs_pin)
+{
+    if (mraa_index < board->phy_pin_count) {
+        // adjust mraa_index for ARCH_NR_GPIOS value
+        mraa_pininfo_t* pin_info = &board->pins[mraa_index];
+        strncpy(pin_info->name, name, 7);
+        pin_info->capabilites = caps;
+        if (caps.gpio)
+            pin_info->gpio.pinmap = sysfs_pin | arch_nr_gpios_adjust;
+        if (caps.i2c) {
+            pin_info->i2c.pinmap = 1;
+            pin_info->i2c.mux_total = 0;
+        }
+        if (caps.pwm) {
+            int controller = 0;
+            if (strncmp(name, "PWM", 3) == 0 && strlen(name) > 3 && isdigit(name[3]))
+                controller = name[3] - '0';
+            pin_info->pwm.parent_id = controller;
+            pin_info->pwm.pinmap = 0;
+            pin_info->pwm.mux_total = 0;
+        }
+        return MRAA_SUCCESS;
+    }
+    return MRAA_ERROR_INVALID_RESOURCE;
+}
+
+mraa_result_t
+mraa_get_pin_index(mraa_board_t* board, char *name, int* pin_index) {
+    int i;
+    for (i = 0; i < board->phy_pin_count; ++i) {
+        if (strcmp(name, board->pins[i].name) == 0) {
+            *pin_index = i;
+            return MRAA_SUCCESS;
+        }
+    }
+    return MRAA_ERROR_INVALID_RESOURCE;
+}
+
+mraa_board_t*
+mraa_intel_minnow_max()
+{
+    mraa_board_t* b = (mraa_board_t*) malloc(sizeof(mraa_board_t));
+
+    struct utsname running_uname;
+    int uname_major, uname_minor, max_pins[27];
+
+    if (b == NULL) {
+        return NULL;
+    }
+
+    b->platform_name = PLATFORM_NAME;
+    b->phy_pin_count = MRAA_INTEL_MINNOW_MAX_PINCOUNT;
+    b->gpio_count = MRAA_INTEL_MINNOW_MAX_PINCOUNT;
+    b->aio_count = 0;
+    b->adc_raw = 0;
+    b->adc_supported = 0;
+
+    b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*MRAA_INTEL_MINNOW_MAX_PINCOUNT);
+    if (b->pins == NULL) {
+        goto error;
+    }
+
+    if (uname(&running_uname) != 0) {
+        goto error;
+    }
+
+    sscanf(running_uname.release, "%d.%d", &uname_major, &uname_minor);
+
+    /* if we are on Linux 3.17 or lower they use a 256 max and number the GPIOs down
+     * if we are on 3.18 or higher (ea584595fc85e65796335033dfca25ed655cd0ed)  (for now)
+     * they start at 512 and number down, at some point this is going to change again when
+     * GPIO moves to a radix.
+     */
+    if (uname_major <= 3 && uname_minor <= 17 ) {
+        arch_nr_gpios_adjust = 0;
+    }
+
+    mraa_set_pininfo(b, 0, "INVALID",   (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, -1 );
+    mraa_set_pininfo(b, 1, "GND",       (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, -1 );
+    mraa_set_pininfo(b, 2, "GND",       (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, -1 );
+    mraa_set_pininfo(b, 3, "5v",        (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, -1 );
+    mraa_set_pininfo(b, 4, "3.3v",      (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, -1 );
+    mraa_set_pininfo(b, 5, "SPI_CS",    (mraa_pincapabilities_t){1,0,0,0,1,0,0,0}, 220);
+    mraa_set_pininfo(b, 6, "UART1TX",   (mraa_pincapabilities_t){1,0,0,0,0,0,0,1}, 225);
+    mraa_set_pininfo(b, 7, "SPIMISO",   (mraa_pincapabilities_t){1,0,0,0,1,0,0,0}, 221);
+    mraa_set_pininfo(b, 8, "UART1RX",   (mraa_pincapabilities_t){1,0,0,0,0,0,0,1}, 224);
+    mraa_set_pininfo(b, 9, "SPIMOSI",   (mraa_pincapabilities_t){1,0,0,0,1,0,0,0}, 222);
+    mraa_set_pininfo(b, 10, "UART1CT",  (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 227);
+    mraa_set_pininfo(b, 11, "SPI_CLK",  (mraa_pincapabilities_t){1,0,0,0,0,0,0,1}, 223);
+    mraa_set_pininfo(b, 12, "UART1RT",  (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 226);
+    mraa_set_pininfo(b, 13, "I2C_SCL",  (mraa_pincapabilities_t){1,0,0,0,0,1,0,0}, 243);
+    mraa_set_pininfo(b, 14, "I2S_CLK",  (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 216);
+    mraa_set_pininfo(b, 15, "I2C_SDA",  (mraa_pincapabilities_t){1,0,0,0,0,1,0,0}, 242);
+    mraa_set_pininfo(b, 16, "I2S_FRM",  (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 217);
+    mraa_set_pininfo(b, 17, "UART2TX",  (mraa_pincapabilities_t){1,0,0,0,0,0,0,1}, 229);
+    mraa_set_pininfo(b, 18, "I2S_DO",   (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 219);
+    mraa_set_pininfo(b, 19, "UART2RX",  (mraa_pincapabilities_t){1,0,0,0,0,0,0,1}, 228);
+    mraa_set_pininfo(b, 20, "I2S_DI",   (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 218);
+    mraa_set_pininfo(b, 21, "S5_0",     (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 82 );
+    mraa_set_pininfo(b, 22, "PWM0",     (mraa_pincapabilities_t){1,0,1,0,0,0,0,0}, 248); // Assume BIOS configured for PWM
+    mraa_set_pininfo(b, 23, "S5_1",     (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 83 );
+    mraa_set_pininfo(b, 24, "PWM1",     (mraa_pincapabilities_t){1,0,1,0,0,0,0,0}, 249); // Assume BIOS configured for PWM
+    mraa_set_pininfo(b, 25, "S5_4",     (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 84 );
+    mraa_set_pininfo(b, 26, "IBL8254",  (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 208);
+
+    // Set number of i2c adaptors
+    // Got this from running 'i2cdetect -l'
+    b->i2c_bus_count = I2C_BUS_COUNT;
+
+    // Disable all i2c adaptors
+    int ici;
+    for (ici = 0; ici < b->i2c_bus_count; ici++) {
+        b->i2c_bus[ici].bus_id = -1;
+    }
+
+    // Configure i2c adaptor #7 and make it the default
+    int pin_index_sda, pin_index_scl;
+    if (mraa_get_pin_index(b, "I2C_SDA", &pin_index_sda) == MRAA_SUCCESS &&
+        mraa_get_pin_index(b, "I2C_SCL", &pin_index_scl) == MRAA_SUCCESS) {
+        b->def_i2c_bus = I2C_BUS_DEFAULT;
+        b->i2c_bus[b->def_i2c_bus].bus_id = b->def_i2c_bus;
+        b->i2c_bus[b->def_i2c_bus].sda = pin_index_sda;
+        b->i2c_bus[b->def_i2c_bus].scl = pin_index_scl;
+    }
+
+    // Configure PWM
+    b->pwm_default_period = 500;
+    b->pwm_max_period = 1000000000;
+    b->pwm_min_period = 1;
+
+    b->spi_bus_count = 1;
+    b->def_spi_bus = 0;
+    b->spi_bus[0].bus_id = 0;
+    b->spi_bus[0].slave_s = 0;
+    b->spi_bus[0].cs = 5;
+    b->spi_bus[0].mosi = 9;
+    b->spi_bus[0].miso = 7;
+    b->spi_bus[0].sclk = 11;
+
+    b->uart_dev_count = 0;
+
+    return b;
+error:
+    syslog(LOG_CRIT, "minnowmax: Platform failed to initialise");
+    free(b);
+    return NULL;
+}

src/x86/x86.c

@@ -0,0 +1,74 @@
+/*
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "mraa_internal.h"
+#include "x86/intel_galileo_rev_d.h"
+#include "x86/intel_galileo_rev_g.h"
+#include "x86/intel_edison_fab_c.h"
+#include "x86/intel_de3815.h"
+#include "x86/intel_minnow_max.h"
+
+mraa_platform_t
+mraa_x86_platform()
+{
+    mraa_platform_t platform_type = MRAA_UNKNOWN_PLATFORM;
+    char *line = NULL;
+    // let getline allocate memory for *line
+    size_t len = 0;
+    FILE *fh = fopen("/sys/devices/virtual/dmi/id/board_name", "r");
+    if (fh != NULL) {
+        if (getline(&line, &len, fh) != -1) {
+            if (strncmp(line, "GalileoGen2", 11) == 0) {
+                platform_type = MRAA_INTEL_GALILEO_GEN2;
+                plat = mraa_intel_galileo_gen2();
+            } else if (strncmp(line, "BODEGA BAY", 10) == 0) {
+                platform_type = MRAA_INTEL_EDISON_FAB_C;
+                plat = mraa_intel_edison_fab_c();
+            } else if (strncmp(line, "SALT BAY", 8) == 0) {
+                platform_type = MRAA_INTEL_EDISON_FAB_C;
+                plat = mraa_intel_edison_fab_c();
+            } else if (strncmp(line, "DE3815", 6) == 0) {
+                platform_type = MRAA_INTEL_DE3815;
+                plat = mraa_intel_de3815();
+            } else if (strncmp(line, "NOTEBOOK", 8) == 0) {
+                platform_type = MRAA_INTEL_MINNOWBOARD_MAX;
+                plat = mraa_intel_minnow_max();
+            } else if (strncasecmp(line, "MinnowBoard MAX", 15) == 0) {
+                platform_type = MRAA_INTEL_MINNOWBOARD_MAX;
+                plat = mraa_intel_minnow_max();
+            } else {
+                syslog(LOG_ERR, "Platform not supported, initialising as MRAA_INTEL_GALILEO_GEN1");
+                platform_type = MRAA_INTEL_GALILEO_GEN1;
+                plat = mraa_intel_galileo_rev_d();
+            }
+            free(line);
+        }
+        fclose(fh);
+    }
+
+    return platform_type;
+}