mraa: update to version 0.8.0

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>

.clang-format

@@ -0,0 +1,50 @@
+AccessModifierOffset: -2
+AlignEscapedNewlinesLeft: true
+AlignTrailingComments: true
+AllowAllParametersOfDeclarationOnNextLine: false
+AllowShortFunctionsOnASingleLine: false
+AllowShortIfStatementsOnASingleLine: false
+AllowShortLoopsOnASingleLine: false
+AlwaysBreakBeforeMultilineStrings: false
+AlwaysBreakTemplateDeclarations: false
+AlwaysBreakAfterDefinitionReturnType: true
+BinPackParameters: false
+BreakBeforeBinaryOperators: false
+BreakBeforeBraces: Linux
+BreakBeforeTernaryOperators: false
+BreakConstructorInitializersBeforeComma: false
+ColumnLimit: 100
+CommentPragmas: ''
+ConstructorInitializerAllOnOneLineOrOnePerLine: false
+ConstructorInitializerIndentWidth: 0
+ContinuationIndentWidth: 0
+Cpp11BracedListStyle: false
+DerivePointerBinding: false
+IndentCaseLabels: true
+IndentFunctionDeclarationAfterType: false
+IndentWidth: 4
+Language: Cpp
+MaxEmptyLinesToKeep: 2
+NamespaceIndentation: None
+ObjCSpaceAfterProperty: true
+ObjCSpaceBeforeProtocolList: true
+PenaltyBreakBeforeFirstCallParameter: 100
+PenaltyBreakComment: 100
+PenaltyBreakFirstLessLess: 0
+PenaltyBreakString: 100
+PenaltyExcessCharacter: 1
+PenaltyReturnTypeOnItsOwnLine: 20
+PointerBindsToType: true
+PointerAlignment: Left
+SpaceBeforeAssignmentOperators: true
+SpaceBeforeParens: ControlStatements
+SpaceInEmptyParentheses: false
+SpacesBeforeTrailingComments: 1
+SpacesInAngles: false
+SpacesInCStyleCastParentheses: false
+SpaceAfterCStyleCast: true
+SpacesInContainerLiterals: false
+SpacesInParentheses: false
+Standard: Cpp11
+TabWidth: 4
+UseTab: Never

.gitignore

@@ -10,4 +10,13 @@ build/
 
 # Temp files
 *.swp
+*.swo
 *~
+
+# npmpub files
+src/mraajsJAVASCRIPT_wrap.cxx
+src/version.c
+package.json
+binding.gyp
+READMEFIRST
+npm-debug.log

.gitmodules

@@ -0,0 +1,4 @@
+[submodule "doxygen2jsdoc"]
+	path = doxygen2jsdoc
+	url = https://github.com/arfoll/doxygen2jsdoc.git
+	branch = master

.travis.yml

@@ -0,0 +1,9 @@
+language: cpp
+compiler:
+  - gcc
+  - clang
+install:
+  - sudo apt-get update -qq
+  - sudo apt-get install -y -qq swig python git
+script:
+  - mkdir build && cd build && cmake -DBUILDSWIGPYTHON=ON .. && make && make test

CMakeLists.txt

@@ -1,11 +1,14 @@
 cmake_minimum_required (VERSION 2.8)
 project (mraa)
 
-FIND_PACKAGE (Threads)
+FIND_PACKAGE (Threads REQUIRED)
 
-set (CMAKE_CXX_FLAGS_DEBUG "${CMAKE_CXX_FLAGS_DEBUG} -Wall -fno-omit-frame-pointer -DDEBUG")
+set (CMAKE_CXX_FLAGS_DEBUG "${CMAKE_CXX_FLAGS_DEBUG} -Wall -fno-omit-frame-pointer")
 set (CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -Wall")
-set (CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS} -DDEBUG")
+set (LIB_INSTALL_DIR "lib${LIB_SUFFIX}" CACHE PATH "Installation path for libraries")
+
+# Set CMAKE_LIB_INSTALL_DIR if not defined
+include(GNUInstallDirs)
 
 # Appends the cmake/modules path to MAKE_MODULE_PATH variable.
 set (CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}/cmake/modules ${CMAKE_MODULE_PATH})
@@ -13,12 +16,12 @@ set (CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}/cmake/modules ${CMAKE_MODULE_
 # Make a version file containing the current version from git.
 include (GetGitRevisionDescription)
 git_describe (VERSION "--tags")
-if ("x_${VERSION}" STREQUAL "x_GIT-NOTFOUND")
+if ("x_${VERSION}" STREQUAL "x_GIT-NOTFOUND" OR "x_${VERSION}" STREQUAL "x_HEAD-HASH-NOTFOUND")
   message (WARNING " - Install git to compile a production libmraa!")
-  set (VERSION "v0.5.0-dirty")
+  set (VERSION "v0.8.0-dirty")
 endif ()
 
-message (INFO " - MRAA Version ${VERSION}")
+message (INFO " - libmraa Version ${VERSION}")
 
 #parse the version information into pieces.
 string (REGEX REPLACE "^v([0-9]+)\\..*" "\\1" VERSION_MAJOR "${VERSION}")
@@ -46,16 +49,58 @@ set (CMAKE_SWIG_FLAGS "")
 find_path (SYSTEM_USR_DIR "stdlib.h")
 include_directories (${SYSTEM_USR_DIR})
 
-option (GTEST "Build all gtests." OFF)
 option (BUILDDOC "Build all doc." OFF)
 option (BUILDSWIG "Build swig modules." ON)
 option (BUILDSWIGPYTHON "Build swig python modules." ON)
 option (BUILDSWIGNODE "Build swig node modules." ON)
+option (BUILDSWIGJAVA "Build Java API." OFF)
+option (USBPLAT "Detection USB platform." OFF)
+option (FTDI4222 "Build with FTDI FT4222 subplatform support." OFF)
 option (IPK "Generate IPK using CPack" OFF)
+option (RPM "Generate RPM using CPack" OFF)
+option (BUILDPYTHON3 "Use python3 for building/installing" OFF)
+option (ENABLEEXAMPLES "Disable building of examples" ON)
+option (INSTALLGPIOTOOL "Install gpio tool" OFF)
+option (BUILDARCH "Override architecture to build for - override" OFF)
+option (TESTS "Override the addition of tests" ON)
 
-if (GTEST)
-  enable_testing ()
-  add_subdirectory (tests)
+if (NOT BUILDSWIG)
+  set (BUILDSWIGPYTHON OFF)
+  set (BUILDSWIGNODE OFF)
+  set (BUILDSWIGJAVA OFF)
+endif()
+
+if (NOT BUILDARCH)
+  include (TargetArch)
+  target_architecture (DETECTED_ARCH)
+  message( INFO " - Target arch is ${DETECTED_ARCH}")
+else ()
+  set (DETECTED_ARCH ${BUILDARCH})
+  message( INFO " - Override arch is ${DETECTED_ARCH}")
+endif()
+
+if (DETECTED_ARCH STREQUAL "i586" OR DETECTED_ARCH STREQUAL "x86_64"
+    OR DETECTED_ARCH STREQUAL "i386")
+  set (X86PLAT ON)
+elseif (DETECTED_ARCH MATCHES "arm.*")
+  set (ARMPLAT ON)
+else ()
+  message(FATAL_ERROR "Only x86 and arm platforms currently supported")
+endif()
+
+if (BUILDSWIGPYTHON)
+  if (BUILDPYTHON3)
+    set (PYTHONBUILD_VERSION 3)
+  else ()
+    set (PYTHONBUILD_VERSION 2.7)
+  endif ()
+  find_package (PythonInterp ${PYTHONBUILD_VERSION} REQUIRED)
+  if (TESTS)
+    if (${PYTHONINTERP_FOUND})
+      enable_testing ()
+      add_subdirectory (tests)
+    endif ()
+  endif ()
 endif ()
 
 if (BUILDDOC)
@@ -63,6 +108,9 @@ if (BUILDDOC)
   find_package (Doxygen)
   if (DOXYGEN_FOUND)
     configure_file (${CMAKE_CURRENT_SOURCE_DIR}/Doxyfile.in ${CMAKE_CURRENT_BINARY_DIR}/Doxyfile @ONLY)
+    if (BUILDSWIGJAVA)
+      configure_file (${CMAKE_CURRENT_SOURCE_DIR}/Doxyfile.java.in ${CMAKE_CURRENT_BINARY_DIR}/src/java/Doxyfile @ONLY)
+    endif ()
     add_custom_target (doc
       ${DOXYGEN_EXECUTABLE} ${CMAKE_CURRENT_BINARY_DIR}/Doxyfile
       WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
@@ -72,12 +120,22 @@ if (BUILDDOC)
 endif ()
 
 if (IPK)
-  include (TargetArch)
-  target_architecture (DETECTED_ARCH)
-  message( INFO " - Target arch is ${DETECTED_ARCH}")
+  # Get target package arch from Yocto ADT sysroot if set or host OS, mapping to Ubuntu name if necessary
+  if (DEFINED ENV{OECORE_TARGET_SYSROOT})
+    GET_FILENAME_COMPONENT (DETECTED_SYSROOT $ENV{OECORE_TARGET_SYSROOT} NAME)
+    string (REGEX REPLACE "-poky-linux" "" TARGET_ARCH "${DETECTED_SYSROOT}")
+  else ()
+    # debian uses amd64 to denote x86_64
+    if (DETECTED_ARCH STREQUAL "x86_64")
+      set (TARGET_ARCH "amd64")
+    else ()
+      set (TARGET_ARCH ${DETECTED_ARCH})
+    endif ()
+  endif ()
+  message (INFO " - Package arch is ${TARGET_ARCH}")
 
   set(CPACK_GENERATOR "DEB" "TGZ")
-  set(OPKG_ARCH ${DETECTED_ARCH})
+  set(OPKG_ARCH ${TARGET_ARCH})
   set(CPACK_BINARY_DIR ${CMAKE_BINARY_DIR})
   set(CPACK_DEBIAN_PACKAGE_MAINTAINER "Intel IoT-Devkit") #required
   set(mraa_PACKAGE_ON_TAG ".")
@@ -86,16 +144,42 @@ if (IPK)
   endif()
   set(CPACK_PACKAGE_VERSION 
       "${mraa_VERSION_MAJOR}.${mraa_VERSION_MINOR}.${mraa_VERSION_PATCH}${mraa_PACKAGE_ON_TAG}${VERSION_COMMIT}")
-  set(CPACK_PACKAGE_NAME "libmraa${mraa_VERSION_MAJOR}")
+  set(CPACK_PACKAGE_NAME "mraa")
   set(CPACK_DEBIAN_PACKAGE_SECTION "libs")
-  set(CPACK_DEBIAN_PACKAGE_ARCHITECTURE ${DETECTED_ARCH})
-  set(CPACK_SYSTEM_NAME ${DETECTED_ARCH})
-  set(CPACK_DEBIAN_PACKAGE_PROVIDES "libmraa-dev, libmraa-dbg, libmraa-doc, libmaa-dev, libmaa-dbg, libmaa-doc, libmaa0")
-  set(CPACK_DEBIAN_PACKAGE_REPLACES ${CPACK_DEBIAN_PACKAGE_PROVIDES})
+  set(CPACK_DEBIAN_PACKAGE_ARCHITECTURE ${TARGET_ARCH})
+  set(CPACK_SYSTEM_NAME ${TARGET_ARCH})
+  set(CPACK_DEBIAN_PACKAGE_PROVIDES "mraa-dev, mraa-dbg, mraa-doc")
+  set(CPACK_DEBIAN_PACKAGE_REPLACES "${CPACK_DEBIAN_PACKAGE_PROVIDES}, libmraa, libmraa-dev, libmraa-doc")
   set(CPACK_DEBIAN_PACKAGE_CONFLICTS ${CPACK_DEBIAN_PACKAGE_PROVIDES})
   set(WDIR "${CPACK_TOPLEVEL_DIRECTORY}/${CPACK_PACKAGE_FILE_NAME}")
   include (CPack)
 endif()
 
+if (RPM)
+  message (INFO " - Enabled RPM packaging for ${DETECTED_ARCH}")
+  set(CMAKE_INSTALL_PREFIX "/usr")
+  set(CPACK_PACKAGE_VERSION ${VERSION})
+  set(CPACK_GENERATOR "RPM")
+  set(CPACK_PACKAGE_NAME "libmraa${mraa_VERSION_MAJOR}")
+  set(CPACK_PACKAGE_RELEASE 1)
+  set(CPACK_PACKAGE_VERSION
+      "${mraa_VERSION_MAJOR}.${mraa_VERSION_MINOR}.${mraa_VERSION_PATCH}${mraa_PACKAGE_ON_TAG}${VERSION_COMMIT}")
+  set(CPACK_PACKAGE_CONTACT "Intel IoT-Devkit")
+  set(CPACK_PACKAGE_VENDOR "Intel IoT-Devkit")
+  set(CPACK_RPM_PACKAGE_PROVIDES "${CPACK_PACKAGE_NAME}-devel")
+  # Get distro tag (e.g. 'fc20') by parsing output of rpm --showrc
+  EXECUTE_PROCESS(
+    COMMAND rpm --showrc
+    COMMAND grep -w dist
+    COMMAND sed -e "s/\\t./ /"
+    COMMAND awk "{printf \"%s\", \$NF}"
+    OUTPUT_VARIABLE DIST_TAG
+  )
+  set(CPACK_PACKAGE_FILE_NAME "${CPACK_PACKAGE_NAME}-${CPACK_PACKAGE_VERSION}-${CPACK_PACKAGE_RELEASE}.${DIST_TAG}.${DETECTED_ARCH}")
+  include(CPack)
+endif()
+
 add_subdirectory (src)
-add_subdirectory (examples)
+if (ENABLEEXAMPLES)
+  add_subdirectory (examples)
+endif ()

README.md

@@ -1,9 +1,12 @@
-MRAA - Low Level Skeleton Library for Communication on GNU/Linux platforms
+libmraa - Low Level Skeleton Library for Communication on GNU/Linux platforms
 ==============
 
-Library in C/C++ to interface with Galileo & other Intel platforms, in a
-structured and sane API with port names/numbering that match boards & with
-bindings to javascript & python.
+Libmraa is a C/C++ library with bindings to javascript & python to interface
+with the IO on Galileo, Edison & other platforms, with a structured and sane
+API where port names/numbering matches the board that you are on. Use of
+libmraa does not tie you to specific hardware with board detection done at
+runtime you can create portable code that will work across the supported
+platforms.
 
 The intent is to make it easier for developers and sensor manufacturers to map
 their sensors & actuators on top of supported hardware and to allow control of
@@ -12,16 +15,31 @@ low level communication protocol by high level languages & constructs.
 Supported Boards
 ================
 
+X86
+---
 * [Galileo Gen 1 - Rev D](../master/docs/galileorevd.md)
 * [Galileo Gen 2 - Rev H](../master/docs/galileorevh.md)
 * [Edison](../master/docs/edison.md)
+* [Intel DE3815](../master/docs/intel_de3815.md)
+* [Minnowboard Max](../master/docs/minnow_max.md)
+* [NUC 5th generation](../master/docs/intel_nuc5.md)
+
+ARM
+---
+* [Raspberry Pi](../master/docs/raspberry_pi.md)
+* [Bannana Pi](../master/docs/banana_pi.md)
+* [Beaglebone Black](../master/docs/beaglebone.md)
+
+USB
+---
+* [FT4222](../master/docs/ftdi_ft4222.md)
 
 Installing on your board
 ========
 
 See the section below on compiling or use our repository to install on an
 eglibc based yocto poky image that supports opkg. Adding this repository is as
-simple as:
+simple as and you'll have the latest stable tagged build of mraa installed!
 
 ``` bash
 echo "src mraa-upm http://iotdk.intel.com/repos/1.1/intelgalactic" > /etc/opkg/mraa-upm.conf
@@ -29,6 +47,23 @@ opkg update
 opkg install libmraa0
 ```
 
+If you would like to get the latest & greatest builds from master HEAD you can
+use our -dev repository
+
+```bash
+echo "src mraa-upm http://iotdk.intel.com/repos/1.1/intelgalactic-dev" > /etc/opkg/mraa-upm.conf
+opkg update
+opkg install libmraa0
+```
+
+You can also install just the node.js mraa module by using npm. You will need a
+C++ compiler and the node development headers, however it's not required to
+have SWIG installed.
+
+```bash
+npm install mraa
+```
+
 Compiling
 =========
 
@@ -39,6 +74,14 @@ Examples
 
 See the [examples](../../tree/master/examples) available for various languages
 
+Debugging
+=========
+
+Sometimes it just doesn't want to work, let us try and help you, you can file
+issues in github or join us in #mraa on freenode IRC, hang around for a little
+while because we're not necessarily on 24/7, but we'll get back to you! Have a
+glance at our [debugging](../master/docs/debugging.md) page too.
+
 C/C++ API Documentation
 ===========
 
@@ -52,7 +95,4 @@ The Python documentation is available [here](http://iotdk.intel.com/docs/master/
 NodeJS API documentation
 ===========
 
-There is no explicit nodejs API documentation, see the examples. The API itself
-is very similar to the python one but with a js syntax. If you know of an
-autodoc tool for generating nodejs APIs from a native C++ nodejs extension
-please get in touch!
+The Javascript documention is available [here](http://iotdk.intel.com/docs/master/mraa/node/modules/mraa.html)

api/mraa/aio.h

@@ -67,6 +67,14 @@ mraa_aio_context mraa_aio_init(unsigned int pin);
  */
 unsigned int mraa_aio_read(mraa_aio_context dev);
 
+/**
+ * Read the input voltage and return it as a normalized float (0.0f-1.0f).
+ *
+ * @param dev The AIO context
+ * @returns The current input voltage as a normalized float (0.0f-1.0f)
+ */
+float mraa_aio_read_float(mraa_aio_context dev);
+
 /**
  * Close the analog input context, this will free the memory for the context
  *

api/mraa/aio.hpp

@@ -24,9 +24,12 @@
 
 #pragma once
 
+#include <stdexcept>
 #include "aio.h"
+#include "types.hpp"
 
-namespace mraa {
+namespace mraa
+{
 
 /**
  * @brief API to Analog IO
@@ -35,52 +38,73 @@ namespace mraa {
  *
  * @snippet examples/c++/AioA0.cpp Interesting
  */
-class Aio {
-    public:
-        /**
-         * Aio Constructor, takes a pin number which will map directly to the
-         * board number
-         *
-         * @param pin channel number to read ADC inputs
-         */
-        Aio(unsigned int pin) {
-            m_aio = mraa_aio_init(pin);
-        }
-        /**
-         * Aio destructor
-         */
-        ~Aio() {
-            mraa_aio_close(m_aio);
-        }
-        /**
-         * Read a value from the AIO pin. By default mraa will shift
-         * the raw value up or down to a 10 bit value.
-         *
-         * @returns The current input voltage. By default, a 10bit value
-         */
-        int read() {
-            return mraa_aio_read(m_aio);
-        }
-        /**
-         * Set the bit value which mraa will shift the raw reading
-         * from the ADC to. I.e. 10bits
-         * @param bits the bits the return from read should be i.e 10
-         * @return mraa result type
-         */
-        mraa_result_t setBit(int bits) {
-            return mraa_aio_set_bit(m_aio, bits);
-        }
-        /**
-         * Gets the bit value mraa is shifting the analog read to.
-         *
-         * @return bit value mraa is set return from the read function
-         */
-        int getBit() {
-            return mraa_aio_get_bit(m_aio);
+class Aio
+{
+  public:
+    /**
+     * Aio Constructor, takes a pin number which will map directly to the
+     * board number
+     *
+     * @param pin channel number to read ADC inputs
+     */
+    Aio(unsigned int pin)
+    {
+        m_aio = mraa_aio_init(pin);
+        if (m_aio == NULL) {
+            throw std::invalid_argument("Invalid AIO pin specified - do you have an ADC?");
         }
+    }
+    /**
+     * Aio destructor
+     */
+    ~Aio()
+    {
+        mraa_aio_close(m_aio);
+    }
+    /**
+     * Read a value from the AIO pin. By default mraa will shift
+     * the raw value up or down to a 10 bit value.
+     *
+     * @returns The current input voltage. By default, a 10bit value
+     */
+    int
+    read()
+    {
+        return mraa_aio_read(m_aio);
+    }
+    /**
+     * Read a value from the AIO pin and return it as a normalized float.
+     *
+     * @returns The current input voltage as a normalized float (0.0f-1.0f)
+     */
+    float
+    readFloat()
+    {
+        return mraa_aio_read_float(m_aio);
+    }
+    /**
+     * Set the bit value which mraa will shift the raw reading
+     * from the ADC to. I.e. 10bits
+     * @param bits the bits the return from read should be i.e 10
+     * @return mraa::Result type
+     */
+    Result
+    setBit(int bits)
+    {
+        return (Result) mraa_aio_set_bit(m_aio, bits);
+    }
+    /**
+     * Gets the bit value mraa is shifting the analog read to.
+     *
+     * @return bit value mraa is set return from the read function
+     */
+    int
+    getBit()
+    {
+        return mraa_aio_get_bit(m_aio);
+    }
 
-    private:
-        mraa_aio_context m_aio;
+  private:
+    mraa_aio_context m_aio;
 };
-
 }

api/mraa/common.h

@@ -24,8 +24,19 @@
 
 #pragma once
 
+#include <stdint.h>
 #include "types.h"
 
+#define MRAA_PLATFORM_NAME_MAX_SIZE 64
+#define MRAA_PIN_NAME_SIZE 12
+
+#define MRAA_SUB_PLATFORM_BIT_SHIFT 9
+#define MRAA_SUB_PLATFORM_MASK (1<<MRAA_SUB_PLATFORM_BIT_SHIFT)
+
+#define MRAA_MAIN_PLATFORM_OFFSET 0
+#define MRAA_SUB_PLATFORM_OFFSET 1
+
+
 /** @file
  *
  * This file defines the basic shared values for libmraa
@@ -41,156 +52,14 @@ extern "C" {
  */
 typedef unsigned int mraa_boolean_t;
 
-/**
- * Enum representing different possible modes for a pin.
- */
-typedef enum {
-    MRAA_PIN_VALID       = 0, /**< Pin Valid */
-    MRAA_PIN_GPIO        = 1, /**< General Purpose IO */
-    MRAA_PIN_PWM         = 2, /**< Pulse Width Modulation */
-    MRAA_PIN_FAST_GPIO   = 3, /**< Faster GPIO */
-    MRAA_PIN_SPI         = 4, /**< SPI */
-    MRAA_PIN_I2C         = 5, /**< I2C */
-    MRAA_PIN_AIO         = 6, /**< Analog in */
-    MRAA_PIN_UART        = 7  /**< UART */
-} mraa_pinmodes_t;
-
-/**
- * A bitfield representing the capabilities of a pin.
- */
-typedef struct {
-    /*@{*/
-    mraa_boolean_t valid:1;     /**< Is the pin valid at all */
-    mraa_boolean_t gpio:1;      /**< Is the pin gpio capable */
-    mraa_boolean_t pwm:1;       /**< Is the pin pwm capable */
-    mraa_boolean_t fast_gpio:1; /**< Is the pin fast gpio capable */
-    mraa_boolean_t spi:1;       /**< Is the pin spi capable */
-    mraa_boolean_t i2c:1;       /**< Is the pin i2c capable */
-    mraa_boolean_t aio:1;       /**< Is the pin analog input capable */
-    mraa_boolean_t uart:1;       /**< Is the pin uart capable */
-    /*@}*/
-} mraa_pincapabilities_t;
-
-/**
- * A Structure representing a multiplexer and the required value
- */
-typedef struct {
-    /*@{*/
-    unsigned int pin;   /**< Raw GPIO pin id */
-    unsigned int value; /**< Raw GPIO value */
-    /*@}*/
-} mraa_mux_t;
-
-typedef struct {
-    mraa_boolean_t complex_pin:1;
-    mraa_boolean_t output_en:1;
-    mraa_boolean_t output_en_high:1;
-    mraa_boolean_t pullup_en:1;
-    mraa_boolean_t pullup_en_hiz:1;
-} mraa_pin_cap_complex_t;
-
-typedef struct {
-    /*@{*/
-    unsigned int pinmap; /**< sysfs pin */
-    unsigned int parent_id; /** parent chip id */
-    unsigned int mux_total; /** Numfer of muxes needed for operation of pin */
-    mraa_mux_t mux[6]; /** Array holding information about mux */
-    unsigned int output_enable; /** Output Enable GPIO, for level shifting */
-    unsigned int pullup_enable; /** Pull-Up enable GPIO, inputs */
-    mraa_pin_cap_complex_t complex_cap;
-    /*@}*/
-} mraa_pin_t;
-
-typedef struct {
-    /*@{*/
-    char mem_dev[32]; /**< Memory device to use /dev/uio0 etc */
-    unsigned int mem_sz; /** Size of memory to map */
-    unsigned int bit_pos; /** Position of value bit */
-    mraa_pin_t gpio; /** GPio context containing none mmap info */
-    /*@}*/
-} mraa_mmap_pin_t;
-
-/**
- * A Structure representing a physical Pin.
- */
-typedef struct {
-    /*@{*/
-    char name[8];                      /**< Pin's real world name */
-    mraa_pincapabilities_t capabilites; /**< Pin Capabiliites */
-    mraa_pin_t gpio; /**< GPIO structure */
-    mraa_pin_t pwm;  /**< PWM structure */
-    mraa_pin_t aio;  /**< Anaglog Pin */
-    mraa_mmap_pin_t mmap; /**< GPIO through memory */
-    mraa_pin_t i2c;  /**< i2c bus/pin */
-    mraa_pin_t spi;  /**< spi bus/pin */
-    mraa_pin_t uart;  /**< uart module/pin */
-    /*@}*/
-} mraa_pininfo_t;
-
-/**
- * A Structure representing the physical properties of a i2c bus.
- */
-typedef struct {
-    /*@{*/
-    unsigned int bus_id; /**< ID as exposed in the system */
-    unsigned int scl; /**< i2c SCL */
-    unsigned int sda; /**< i2c SDA */
-    /*@}*/
-} mraa_i2c_bus_t;
-
-/**
- * A Structure representing the physical properties of a spi bus.
- */
-typedef struct {
-    /*@{*/
-    unsigned int bus_id; /**< The Bus ID as exposed to the system. */
-    unsigned int slave_s; /**< Slave select */
-    mraa_boolean_t three_wire; /**< Is the bus only a three wire system */
-    unsigned int sclk; /**< Serial Clock */
-    unsigned int mosi; /**< Master Out, Slave In. */
-    unsigned int miso; /**< Master In, Slave Out. */
-    unsigned int cs; /**< Chip Select, used when the board is a spi slave */
-    /*@}*/
-} mraa_spi_bus_t;
-
-/**
- * A Structure representing a uart device.
- */
-typedef struct {
-    /*@{*/
-    unsigned int index; /**< ID as exposed in the system */
-    int rx; /**< uart rx */
-    int tx; /**< uart tx */
-    /*@}*/
-} mraa_uart_dev_t;
-
-/**
- * A Structure representing a platform/board.
- */
-typedef struct {
-    /*@{*/
-    unsigned int phy_pin_count; /**< The Total IO pins on board */
-    unsigned int gpio_count; /**< GPIO Count */
-    unsigned int aio_count;  /**< Analog side Count */
-    unsigned int i2c_bus_count; /**< Usable i2c Count */
-    mraa_i2c_bus_t  i2c_bus[12]; /**< Array of i2c */
-    unsigned int def_i2c_bus; /**< Position in array of default i2c bus */
-    unsigned int spi_bus_count; /**< Usable spi Count */
-    mraa_spi_bus_t spi_bus[12];       /**< Array of spi */
-    unsigned int def_spi_bus; /**< Position in array of defult spi bus */
-    unsigned int adc_raw; /**< ADC raw bit value */
-    unsigned int adc_supported; /**< ADC supported bit value */
-    unsigned int def_uart_dev; /**< Position in array of defult uart */
-    unsigned int uart_dev_count; /**< Usable spi Count */
-    mraa_uart_dev_t uart_dev[6]; /**< Array of UARTs */
-    mraa_pininfo_t* pins;     /**< Pointer to pin array */
-    /*@}*/
-} mraa_board_t;
-
 /**
  * Initialise MRAA
  *
- * Detects running platform and attempts to use included pinmap
+ * Detects running platform and attempts to use included pinmap, this is run on
+ * module/library init/load but is handy to rerun to check board initialised
+ * correctly. MRAA_SUCCESS inidicates correct (first time) initialisation
+ * whilst MRAA_ERROR_PLATFORM_ALREADY_INITIALISED indicates the board is
+ * already initialised correctly
  *
  * @return Result of operation
  */
@@ -228,6 +97,14 @@ mraa_boolean_t mraa_pin_mode_test(int pin, mraa_pinmodes_t mode);
  */
 unsigned int mraa_adc_raw_bits();
 
+/**
+ * Check the specified board's bit size when reading the value
+ *
+ * @param specified platform offset; 0 for main platform, 1 foor sub platform
+ * @return raw bits being read from kernel module. zero if no ADC
+ */
+unsigned int mraa_get_platform_adc_raw_bits(uint8_t platform_offset);
+
 /**
  * Return value that the raw value should be shifted to. Zero if no ADC
  *
@@ -235,6 +112,13 @@ unsigned int mraa_adc_raw_bits();
  */
 unsigned int mraa_adc_supported_bits();
 
+/**
+ * Return value that the raw value should be shifted to. Zero if no ADC
+ *
+ * @param specified platform offset; 0 for main platform, 1 foor sub platform
+ * @return return actual bit size the adc value should be understood as.
+ */
+unsigned int mraa_get_platform_adc_supported_bits(int platform_offset);
 
 /**
  * Sets the log level to use from 0-7 where 7 is very verbose. These are the
@@ -244,6 +128,139 @@ unsigned int mraa_adc_supported_bits();
  */
 mraa_result_t mraa_set_log_level(int level);
 
+/**
+ * Return the Platform's Name, If no platform detected return NULL
+ *
+ * @return platform name
+ */
+char* mraa_get_platform_name();
+
+/**
+ * This function attempts to set the mraa process to a given priority and the
+ * scheduler to SCHED_RR. Highest * priority is typically 99 and minimum is 0.
+ * This function * will set to MAX if * priority is > MAX. Function will return
+ * -1 on failure.
+ *
+ * @param priority Value from typically 0 to 99
+ * @return The priority value set
+ */
+int mraa_set_priority(const unsigned int priority);
+
+/** Get the version string of mraa autogenerated from git tag
+ *
+ * The version returned may not be what is expected however it is a reliable
+ * number associated with the git tag closest to that version at build time
+ *
+ * @return version string from version.h
+ */
+const char* mraa_get_version();
+
+/**
+ * Print a textual representation of the mraa_result_t
+ *
+ * @param result the result to print
+ */
+void mraa_result_print(mraa_result_t result);
+
+/**
+ * Get platform type, board must be initialised.
+ *
+ * @return mraa_platform_t Platform type enum
+ */
+mraa_platform_t mraa_get_platform_type();
+
+/**
+ * Get combined platform type, board must be initialised.
+ * The combined type is represented as
+ * (sub_platform_type << 8) | main_platform_type
+ *
+ * @return int combined platform type
+ */
+int mraa_get_platform_combined_type();
+
+/**
+ * Get platform pincount, board must be initialised.
+ *
+ * @return uint of physical pin count on the in-use platform
+ */
+unsigned int mraa_get_pin_count();
+
+/**
+ * Get platform usable I2C bus count, board must be initialised.
+ *
+ * @return number f usable I2C bus count on the current platform. Function will
+ * return -1 on failure
+ */
+int mraa_get_i2c_bus_count();
+
+/**
+ * Get I2C adapter number in sysfs.
+ *
+ * @param i2c_bus the logical I2C bus number
+ * @return I2C adapter number in sysfs. Function will return -1 on failure
+ */
+int mraa_get_i2c_bus_id(unsigned int i2c_bus);
+
+/**
+ * Get specified platform pincount, board must be initialised.
+ *
+ * @param specified platform offset; 0 for main platform, 1 foor sub platform
+ * @return uint of physical pin count on the in-use platform
+ */
+unsigned int mraa_get_platform_pin_count(uint8_t platform_offset);
+
+/**
+* Get name of pin, board must be initialised.
+*
+* @param pin number
+* @return char* of pin name
+*/
+char* mraa_get_pin_name(int pin);
+
+/**
+ * Get default i2c bus, board must be initialised.
+ *
+ * @return int default i2c bus index
+ */
+int mraa_get_default_i2c_bus(uint8_t platform_offset);
+
+/**
+ * Detect presence of sub platform.
+ *
+ * @return mraa_boolean_t 1 if sub platform is present and initialized, 0 otherwise
+ */
+mraa_boolean_t mraa_has_sub_platform();
+
+
+/**
+ * Check if pin or bus id includes sub platform mask.
+ *
+ * @param int pin or bus number
+ *
+ * @return mraa_boolean_t 1 if pin or bus is for sub platform, 0 otherwise
+ */
+mraa_boolean_t mraa_is_sub_platform_id(int pin_or_bus_id);
+
+/**
+ * Convert pin or bus index to corresponding sub platform id.
+ *
+ * @param int pin or bus index
+ *
+ * @return int sub platform pin or bus number
+ */
+int mraa_get_sub_platform_id(int pin_or_bus_index);
+
+/**
+ * Convert pin or bus sub platform id to index.
+ *
+ * @param int sub platform pin or bus id
+ *
+ * @return int pin or bus index
+ */
+int mraa_get_sub_platform_index(int pin_or_bus_id);
+
+
+
 #ifdef __cplusplus
 }
 #endif

api/mraa/common.hpp

@@ -25,12 +25,14 @@
 #pragma once
 
 #include "common.h"
+#include "types.hpp"
 #include <string>
 
 /**
  * @namespace mraa namespace
  */
-namespace mraa {
+namespace mraa
+{
 
 /**
  * @file
@@ -39,12 +41,30 @@ namespace mraa {
  * This file defines the interface for libmraa common functions
  */
 
+/**
+ * Initialise MRAA
+ *
+ * Detects running platform and attempts to use included pinmap, this is run on
+ * module/library init/load but is handy to rerun to check board initialised
+ * correctly. MRAA_SUCCESS inidicates correct (first time) initialisation
+ * whilst MRAA_ERROR_PLATFORM_ALREADY_INITIALISED indicates the board is
+ * already initialised correctly
+ *
+ * @return Result of operation
+ */
+inline Result
+init()
+{
+    return (Result) mraa_init();
+}
+
 /**
  * Get libmraa version.
  *
  * @return libmraa version (e.g. v0.4.0-20-gb408207)
  */
-std::string getVersion()
+inline std::string
+getVersion()
 {
     std::string ret = mraa_get_version();
     return ret;
@@ -59,7 +79,8 @@ std::string getVersion()
  * @param priority Value from typically 0 to 99
  * @return The priority value set
  */
-int setPriority(const unsigned int priority)
+inline int
+setPriority(const unsigned int priority)
 {
     return mraa_set_priority(priority);
 }
@@ -67,21 +88,23 @@ int setPriority(const unsigned int priority)
 /**
  * Get platform type, board must be initialised.
  *
- * @return mraa_platform_t Platform type enum
+ * @return mraa::platform Platform type enum
  */
-mraa_platform_t getPlatformType()
+inline Platform
+getPlatformType()
 {
-    return mraa_get_platform_type();
+    return (Platform) mraa_get_platform_type();
 }
 
 /**
- * Print a textual representation of the mraa_result_t
+ * Print a textual representation of the mraa::Result
  *
- * @param result the result to print
+ * @param Result the Result to print
  */
-void printError(mraa_result_t result)
+inline void
+printError(Result result)
 {
-    mraa_result_print(result);
+    mraa_result_print((mraa_result_t) result);
 }
 
 /**
@@ -91,9 +114,10 @@ void printError(mraa_result_t result)
  * @param mode the mode to be tested.
  * @return boolean if the mode is supported, 0=false.
  */
-bool pinModeTest(int pin, mraa_pinmodes_t mode)
+inline bool
+pinModeTest(int pin, Pinmodes mode)
 {
-    return (bool) mraa_pin_mode_test(pin,mode);
+    return (bool) mraa_pin_mode_test(pin, (mraa_pinmodes_t) mode);
 }
 
 /**
@@ -101,7 +125,8 @@ bool pinModeTest(int pin, mraa_pinmodes_t mode)
  *
  * @return raw bits being read from kernel module. Zero if no ADC
  */
-unsigned int adcRawBits()
+inline unsigned int
+adcRawBits()
 {
     return mraa_adc_raw_bits();
 }
@@ -111,20 +136,135 @@ unsigned int adcRawBits()
  *
  * @return return actual bit size the adc value should be understood as.
  */
-unsigned int adcSupportedBits()
+inline unsigned int
+adcSupportedBits()
 {
     return mraa_adc_supported_bits();
 }
 
+/**
+ * Return Platform Name. Returns NULL if no platform inited.
+ *
+ * @return platform name
+ */
+inline std::string
+getPlatformName()
+{
+    std::string ret_val(mraa_get_platform_name());
+    return ret_val;
+}
+
+/**
+ * Return count of physical pins on the running platform
+ *
+ * @return uint of physical pins.
+ */
+inline unsigned int
+getPinCount()
+{
+    return mraa_get_pin_count();
+}
+
+/**
+ * Get platform usable I2C bus count, board must be initialised.
+ *
+ * @return number f usable I2C bus count on the current platform. Function will
+ * return -1 on failure
+ */
+inline int
+getI2cBusCount()
+{
+    return mraa_get_i2c_bus_count();
+}
+
+/**
+ * Get I2C adapter number in sysfs.
+ *
+ * @param i2c_bus the logical I2C bus number
+ * @return I2C adapter number in sysfs. Function will return -1 on failure
+ */
+inline int
+getI2cBusId(unsigned int i2c_bus)
+{
+    return mraa_get_i2c_bus_id(i2c_bus);
+}
+
+/**
+* Get name of pin, board must be initialised.
+*
+* @param pin number
+*
+* @return char* of pin name
+*/
+inline std::string
+getPinName(int pin)
+{
+    std::string ret_val(mraa_get_pin_name(pin));
+    return ret_val;
+}
+
 /**
  * Sets the log level to use from 0-7 where 7 is very verbose. These are the
  * syslog log levels, see syslog(3) for more information on the levels.
  *
+ * @param level
  * @return Result of operation
  */
-mraa_result_t setLogLevel(int level)
+inline Result
+setLogLevel(int level)
 {
-    return mraa_set_log_level(level);
+    return (Result) mraa_set_log_level(level);
 }
 
+/**
+ * Detect presence of sub platform.
+ *
+ * @return bool true if sub platform is present and initialized, false otherwise
+ */
+inline bool
+hasSubPlatform()
+{
+    return static_cast<bool>(mraa_has_sub_platform());
+}
+
+
+
+/**
+ * Check if pin or bus id includes sub platform mask.
+ *
+ * @param int pin or bus number
+ *
+ * @return mraa_boolean_t 1 if pin or bus is for sub platform, 0 otherwise
+ */
+inline bool
+isSubPlatformId(int pin_or_bus_id)
+{
+    return static_cast<bool>(mraa_is_sub_platform_id(pin_or_bus_id));
+}
+
+/**
+ * Convert pin or bus index to corresponding sub platform id.
+ *
+ * @param int pin or bus index
+ *
+ * @return int sub platform pin or bus number
+ */
+inline int 
+getSubPlatformId(int pin_or_bus_index)
+{
+    return mraa_get_sub_platform_id(pin_or_bus_index);
+}
+
+/**
+ * Convert pin or bus sub platform id to index.
+ *
+ * @param int sub platform pin or bus id
+ *
+ * @return int pin or bus index
+ */
+inline int
+getSubPlatformIndex(int pin_or_bus_id)
+{
+    return mraa_get_sub_platform_index(pin_or_bus_id);
+}
 }

api/mraa/gpio.h

@@ -59,29 +59,31 @@ typedef struct _gpio* mraa_gpio_context;
  * Gpio Output modes
  */
 typedef enum {
-    MRAA_GPIO_STRONG     = 0, /**< Default. Strong high and low */
-    MRAA_GPIO_PULLUP     = 1, /**< Resistive High */
-    MRAA_GPIO_PULLDOWN   = 2, /**< Resistive Low */
-    MRAA_GPIO_HIZ        = 3  /**< High Z State */
-} gpio_mode_t;
+    MRAA_GPIO_STRONG = 0,   /**< Default. Strong high and low */
+    MRAA_GPIO_PULLUP = 1,   /**< Resistive High */
+    MRAA_GPIO_PULLDOWN = 2, /**< Resistive Low */
+    MRAA_GPIO_HIZ = 3       /**< High Z State */
+} mraa_gpio_mode_t;
 
 /**
  * Gpio Direction options
  */
 typedef enum {
-    MRAA_GPIO_OUT    = 0, /**< Output. A Mode can also be set */
-    MRAA_GPIO_IN     = 1  /**< Input */
-} gpio_dir_t;
+    MRAA_GPIO_OUT = 0,      /**< Output. A Mode can also be set */
+    MRAA_GPIO_IN = 1,       /**< Input */
+    MRAA_GPIO_OUT_HIGH = 2, /**< Output. Init High */
+    MRAA_GPIO_OUT_LOW = 3   /**< Output. Init Low */
+} mraa_gpio_dir_t;
 
 /**
  * Gpio Edge types for interupts
  */
 typedef enum {
-    MRAA_GPIO_EDGE_NONE    = 0, /**< No interrupt on Gpio */
-    MRAA_GPIO_EDGE_BOTH    = 1, /**< Interupt on rising & falling */
-    MRAA_GPIO_EDGE_RISING  = 2, /**< Interupt on rising only */
-    MRAA_GPIO_EDGE_FALLING = 3  /**< Interupt on falling only */
-} gpio_edge_t;
+    MRAA_GPIO_EDGE_NONE = 0,   /**< No interrupt on Gpio */
+    MRAA_GPIO_EDGE_BOTH = 1,   /**< Interupt on rising & falling */
+    MRAA_GPIO_EDGE_RISING = 2, /**< Interupt on rising only */
+    MRAA_GPIO_EDGE_FALLING = 3 /**< Interupt on falling only */
+} mraa_gpio_edge_t;
 
 /**
  * Initialise gpio_context, based on board number
@@ -106,7 +108,7 @@ mraa_gpio_context mraa_gpio_init_raw(int gpiopin);
  * @param mode The edge mode to set the gpio into
  * @return Result of operation
  */
-mraa_result_t mraa_gpio_edge_mode(mraa_gpio_context dev, gpio_edge_t mode);
+mraa_result_t mraa_gpio_edge_mode(mraa_gpio_context dev, mraa_gpio_edge_t mode);
 
 /**
  * Set an interupt on pin
@@ -118,7 +120,7 @@ mraa_result_t mraa_gpio_edge_mode(mraa_gpio_context dev, gpio_edge_t mode);
  * @param args Arguments passed to the interrupt handler (fptr)
  * @return Result of operation
  */
-mraa_result_t mraa_gpio_isr(mraa_gpio_context dev, gpio_edge_t edge, void (*fptr)(void *), void * args);
+mraa_result_t mraa_gpio_isr(mraa_gpio_context dev, mraa_gpio_edge_t edge, void (*fptr)(void*), void* args);
 
 /**
  * Stop the current interupt watcher on this Gpio, and set the Gpio edge mode
@@ -136,7 +138,7 @@ mraa_result_t mraa_gpio_isr_exit(mraa_gpio_context dev);
  * @param mode The Gpio Output Mode
  * @return Result of operation
  */
-mraa_result_t mraa_gpio_mode(mraa_gpio_context dev, gpio_mode_t mode);
+mraa_result_t mraa_gpio_mode(mraa_gpio_context dev, mraa_gpio_mode_t mode);
 
 /**
  * Set Gpio direction
@@ -145,7 +147,7 @@ mraa_result_t mraa_gpio_mode(mraa_gpio_context dev, gpio_mode_t mode);
  * @param dir The direction of the Gpio
  * @return Result of operation
  */
-mraa_result_t mraa_gpio_dir(mraa_gpio_context dev, gpio_dir_t dir);
+mraa_result_t mraa_gpio_dir(mraa_gpio_context dev, mraa_gpio_dir_t dir);
 
 /**
  * Close the Gpio context
@@ -157,7 +159,8 @@ mraa_result_t mraa_gpio_dir(mraa_gpio_context dev, gpio_dir_t dir);
 mraa_result_t mraa_gpio_close(mraa_gpio_context dev);
 
 /**
- * Read the Gpio value.
+ * Read the Gpio value. This can be 0 or 1. A resonse of -1 means that there
+ * was a fatal error.
  *
  * @param dev The Gpio context
  * @return Result of operation
@@ -191,6 +194,22 @@ mraa_result_t mraa_gpio_owner(mraa_gpio_context dev, mraa_boolean_t owner);
  */
 mraa_result_t mraa_gpio_use_mmaped(mraa_gpio_context dev, mraa_boolean_t mmap);
 
+/**
+ * Get a pin number of the gpio, invalid will return -1
+ *
+ * @param dev The Gpio context
+ * @return Pin number
+ */
+int mraa_gpio_get_pin(mraa_gpio_context dev);
+
+/**
+ * Get a gpio number as used within sysfs, invalid will return -1
+ *
+ * @param dev The Gpio context
+ * @return gpio number
+ */
+int mraa_gpio_get_pin_raw(mraa_gpio_context dev);
+
 #ifdef __cplusplus
 }
 #endif

api/mraa/gpio.hpp

@@ -25,8 +25,17 @@
 #pragma once
 
 #include "gpio.h"
+#include "types.hpp"
+#include <stdexcept>
 
-namespace mraa {
+#if defined(SWIGJAVASCRIPT)
+#if NODE_MODULE_VERSION >= 0x000D
+#include <uv.h>
+#endif
+#endif
+
+namespace mraa
+{
 
 // These enums must match the enums in gpio.h
 
@@ -34,30 +43,56 @@ namespace mraa {
  * Gpio Output modes
  */
 typedef enum {
-    MODE_STRONG   = 0, /**< No interrupt on Gpio */
-    MODE_PULLUP   = 1, /**< Interupt on rising & falling */
+    MODE_STRONG = 0,   /**< Default. Strong High and Low */
+    MODE_PULLUP = 1,   /**< Interupt on rising & falling */
     MODE_PULLDOWN = 2, /**< Interupt on rising only */
-    MODE_HIZ      = 3  /**< Interupt on falling only */
+    MODE_HIZ = 3       /**< Interupt on falling only */
 } Mode;
 
 /**
  * Gpio Direction options
  */
 typedef enum {
-    DIR_OUT = 0, /**< Output. A Mode can also be set */
-    DIR_IN  = 1  /**< Input */
+    DIR_OUT = 0,      /**< Output. A Mode can also be set */
+    DIR_IN = 1,       /**< Input */
+    DIR_OUT_HIGH = 2, /**< Output. Init High */
+    DIR_OUT_LOW = 3   /**< Output. Init Low */
 } Dir;
 
 /**
  * Gpio Edge types for interupts
  */
 typedef enum {
-    EDGE_NONE    = 0, /**< No interrupt on Gpio */
-    EDGE_BOTH    = 1, /**< Interupt on rising & falling */
-    EDGE_RISING  = 2, /**< Interupt on rising only */
-    EDGE_FALLING = 3  /**< Interupt on falling only */
+    EDGE_NONE = 0,   /**< No interrupt on Gpio */
+    EDGE_BOTH = 1,   /**< Interupt on rising & falling */
+    EDGE_RISING = 2, /**< Interupt on rising only */
+    EDGE_FALLING = 3 /**< Interupt on falling only */
 } Edge;
 
+#if defined(SWIGJAVA)
+
+class IsrCallback
+{
+  friend class Gpio;
+  public:
+    virtual ~IsrCallback()
+    {
+    }
+    virtual void
+    run()
+    { /* empty, overloaded in Java*/
+    }
+
+  protected:
+    static void
+    generic_isr_callback(void* data)
+    {
+        IsrCallback* callback = (IsrCallback*) data;
+        callback->run();
+    }
+};
+#endif
+
 /**
  * @brief API to General Purpose IO
  *
@@ -65,117 +100,217 @@ typedef enum {
  *
  * @snippet Blink-IO.cpp Interesting
  */
-class Gpio {
-    public:
-        /**
-         * Instanciates a Gpio object
-         *
-         * @param pin pin number to use
-         * @param owner (optional) Set pin owner, default behaviour is to 'own'
-         * the pin if we exported it. This means we will close it on destruct.
-         * Otherwise it will get left open. This is only valid in sysfs use
-         * cases
-         * @param raw (optional) Raw pins will use gpiolibs pin numbering from
-         * the kernel module. Note that you will not get any muxers set up for
-         * you so this may not always work as expected.
-         */
-        Gpio(int pin, bool owner=true, bool raw=false) {
-            if (raw)
-                m_gpio = mraa_gpio_init_raw(pin);
-            else
-                m_gpio = mraa_gpio_init(pin);
-            if (!owner)
-                mraa_gpio_owner(m_gpio, 0);
+class Gpio
+{
+  public:
+    /**
+     * Instanciates a Gpio object
+     *
+     * @param pin pin number to use
+     * @param owner (optional) Set pin owner, default behaviour is to 'own'
+     * the pin if we exported it. This means we will close it on destruct.
+     * Otherwise it will get left open. This is only valid in sysfs use
+     * cases
+     * @param raw (optional) Raw pins will use gpiolibs pin numbering from
+     * the kernel module. Note that you will not get any muxers set up for
+     * you so this may not always work as expected.
+     */
+    Gpio(int pin, bool owner = true, bool raw = false)
+    {
+        if (raw) {
+            m_gpio = mraa_gpio_init_raw(pin);
+        } else {
+            m_gpio = mraa_gpio_init(pin);
         }
-        /**
-         * Gpio object destructor, this will only unexport the gpio if we where
-         * the owner
-         */
-        ~Gpio() {
-            mraa_gpio_close(m_gpio);
-        }
-        /**
-         * Set the edge mode for ISR
-         *
-         * @param mode The edge mode to set
-         * @return Result of operation
-         */
-        mraa_result_t edge(Edge mode) {
-            return mraa_gpio_edge_mode(m_gpio, (gpio_edge_t) mode);
-        }
-#if defined(SWIGPYTHON)
-        mraa_result_t isr(Edge mode, PyObject *pyfunc, PyObject* args) {
-            return mraa_gpio_isr(m_gpio, (gpio_edge_t) mode, (void (*) (void *)) pyfunc, (void *) args);
-        }
-#else
-        /**
-         * Sets a callback to be called when pin value changes
-         *
-         * @param mode The edge mode to set
-         * @param fptr Function pointer to function to be called when interupt is
-         * triggered
-         * @param args Arguments passed to the interrupt handler (fptr)
-         * @return Result of operation
-         */
-        mraa_result_t isr(Edge mode, void (*fptr)(void *), void * args) {
-            return mraa_gpio_isr(m_gpio, (gpio_edge_t) mode, fptr, args);
-        }
-#endif
-        /**
-         * Exits callback - this call will not kill the isr thread imediatlu
-         * but only when it is out of it's critical section
-         *
-         * @return Result of operation
-         */
-        mraa_result_t isrExit() {
-            return mraa_gpio_isr_exit(m_gpio);
-        }
-        /**
-         * Change Gpio mode
-         *
-         * @param mode The mode to change the gpio into
-         * @return Result of operation
-         */
-        mraa_result_t mode(Mode mode) {
-            return mraa_gpio_mode(m_gpio, (gpio_mode_t) mode);
-        }
-        /**
-         * Change Gpio direction
-         *
-         * @param dir The direction to change the gpio into
-         * @return Result of operation
-         */
-        mraa_result_t dir(Dir dir) {
-            return mraa_gpio_dir(m_gpio, (gpio_dir_t) dir);
-        }
-        /**
-         * Read value from Gpio
-         *
-         * @return Gpio value
-         */
-        int read() {
-            return mraa_gpio_read(m_gpio);
-        }
-        /**
-         * Write value to Gpio
-         *
-         * @param value Value to write to Gpio
-         * @return Result of operation
-         */
-        mraa_result_t write(int value) {
-            return mraa_gpio_write(m_gpio, value);
-        }
-        /**
-         * Enable use of mmap i/o if available.
-         *
-         * @param enable true to use mmap
-         * @return Result of operation
-         */
-        mraa_result_t useMmap(bool enable) {
-            return mraa_gpio_use_mmaped(m_gpio, (mraa_boolean_t) enable);
-        }
-    private:
-        mraa_gpio_context m_gpio;
-};
 
+        if (m_gpio == NULL) {
+            throw std::invalid_argument("Invalid GPIO pin specified");
+        }
+
+        if (!owner) {
+            mraa_gpio_owner(m_gpio, 0);
+        }
+    }
+    /**
+     * Gpio object destructor, this will only unexport the gpio if we where
+     * the owner
+     */
+    ~Gpio()
+    {
+        mraa_gpio_close(m_gpio);
+    }
+    /**
+     * Set the edge mode for ISR
+     *
+     * @param mode The edge mode to set
+     * @return Result of operation
+     */
+    Result
+    edge(Edge mode)
+    {
+        return (Result) mraa_gpio_edge_mode(m_gpio, (mraa_gpio_edge_t) mode);
+    }
+#if defined(SWIGPYTHON)
+    Result
+    isr(Edge mode, PyObject* pyfunc, PyObject* args)
+    {
+        return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, (void (*) (void*)) pyfunc, (void*) args);
+    }
+#elif defined(SWIGJAVASCRIPT)
+    static void
+    v8isr(uv_work_t* req, int status)
+    {
+        mraa::Gpio* This = (mraa::Gpio*) req->data;
+        int argc = 1;
+        v8::Local<v8::Value> argv[] = { SWIGV8_INTEGER_NEW(-1) };
+#if NODE_MODULE_VERSION >= 0x000D
+        v8::Local<v8::Function> f = v8::Local<v8::Function>::New(v8::Isolate::GetCurrent(), This->m_v8isr);
+        f->Call(SWIGV8_CURRENT_CONTEXT()->Global(), argc, argv);
+#else
+        This->m_v8isr->Call(SWIGV8_CURRENT_CONTEXT()->Global(), argc, argv);
+#endif
+        delete req;
+    }
+
+    static void
+    nop(uv_work_t* req)
+    {
+        // Do nothing.
+    }
+
+    static void
+    uvwork(void* ctx)
+    {
+        uv_work_t* req = new uv_work_t;
+        req->data = ctx;
+        uv_queue_work(uv_default_loop(), req, nop, v8isr);
+    }
+
+    Result
+    isr(Edge mode, v8::Handle<v8::Function> func)
+    {
+#if NODE_MODULE_VERSION >= 0x000D
+        m_v8isr.Reset(v8::Isolate::GetCurrent(), func);
+#else
+        m_v8isr = v8::Persistent<v8::Function>::New(func);
+#endif
+        return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, &uvwork, this);
+    }
+#elif defined(SWIGJAVA)
+    Result
+    isr(Edge mode, IsrCallback* cb)
+    {
+        return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, &IsrCallback::generic_isr_callback, cb);
+    }
+#else
+    /**
+     * Sets a callback to be called when pin value changes
+     *
+     * @param mode The edge mode to set
+     * @param fptr Function pointer to function to be called when interupt is
+     * triggered
+     * @param args Arguments passed to the interrupt handler (fptr)
+     * @return Result of operation
+     */
+    Result
+    isr(Edge mode, void (*fptr)(void*), void* args)
+    {
+        return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, fptr, args);
+    }
+#endif
+    /**
+     * Exits callback - this call will not kill the isr thread immediatly
+     * but only when it is out of it's critical section
+     *
+     * @return Result of operation
+     */
+    Result
+    isrExit()
+    {
+#if defined(SWIGJAVASCRIPT)
+#if NODE_MODULE_VERSION >= 0x000D
+        m_v8isr.Reset();
+#else
+        m_v8isr.Dispose();
+        m_v8isr.Clear();
+#endif
+#endif
+        return (Result) mraa_gpio_isr_exit(m_gpio);
+    }
+    /**
+     * Change Gpio mode
+     *
+     * @param mode The mode to change the gpio into
+     * @return Result of operation
+     */
+    Result
+    mode(Mode mode)
+    {
+        return (Result )mraa_gpio_mode(m_gpio, (mraa_gpio_mode_t) mode);
+    }
+    /**
+     * Change Gpio direction
+     *
+     * @param dir The direction to change the gpio into
+     * @return Result of operation
+     */
+    Result
+    dir(Dir dir)
+    {
+        return (Result )mraa_gpio_dir(m_gpio, (mraa_gpio_dir_t) dir);
+    }
+    /**
+     * Read value from Gpio
+     *
+     * @return Gpio value
+     */
+    int
+    read()
+    {
+        return mraa_gpio_read(m_gpio);
+    }
+    /**
+     * Write value to Gpio
+     *
+     * @param value Value to write to Gpio
+     * @return Result of operation
+     */
+    Result
+    write(int value)
+    {
+        return (Result) mraa_gpio_write(m_gpio, value);
+    }
+    /**
+     * Enable use of mmap i/o if available.
+     *
+     * @param enable true to use mmap
+     * @return Result of operation
+     */
+    Result
+    useMmap(bool enable)
+    {
+        return (Result) mraa_gpio_use_mmaped(m_gpio, (mraa_boolean_t) enable);
+    }
+    /**
+     * Get pin number of Gpio. If raw param is True will return the
+     * number as used within sysfs. Invalid will return -1.
+     *
+     * @param raw (optional) get the raw gpio number.
+     * @return Pin number
+     */
+    int
+    getPin(bool raw = false)
+    {
+        if (raw) {
+            return mraa_gpio_get_pin_raw(m_gpio);
+        }
+        return mraa_gpio_get_pin(m_gpio);
+    }
+
+  private:
+    mraa_gpio_context m_gpio;
+#if defined(SWIGJAVASCRIPT)
+    v8::Persistent<v8::Function> m_v8isr;
+#endif
+};
 }

api/mraa/i2c.h

@@ -61,7 +61,7 @@ typedef struct _i2c* mraa_i2c_context;
 mraa_i2c_context mraa_i2c_init(int bus);
 
 /**
- * Initialise i2c context, passing in spi bus to use.
+ * Initialise i2c context, passing in the i2c bus to use.
  *
  * @param bus The i2c bus to use i.e. /dev/i2c-2 would be "2"
  * @return i2c context or NULL
@@ -69,44 +69,76 @@ mraa_i2c_context mraa_i2c_init(int bus);
 mraa_i2c_context mraa_i2c_init_raw(unsigned int bus);
 
 /**
- * Sets the frequency of the i2c context
+ * Sets the frequency of the i2c context. Most platforms do not support this.
  *
  * @param dev The i2c context
- * @param hz The bus frequency in hertz
+ * @param mode The bus mode
  * @return Result of operation
  */
-mraa_result_t mraa_i2c_frequency(mraa_i2c_context dev, int hz);
+mraa_result_t mraa_i2c_frequency(mraa_i2c_context dev, mraa_i2c_mode_t mode);
 
 /**
- * Read from an i2c context
+ * Simple bulk read from an i2c context, this will always begin with the i2c
+ * offset 0x0
  *
  * @param dev The i2c context
  * @param data pointer to the byte array to read data in to
  * @param length max number of bytes to read
  * @return length of the read in bytes or 0
  */
-int mraa_i2c_read(mraa_i2c_context dev, uint8_t *data, int length);
+int mraa_i2c_read(mraa_i2c_context dev, uint8_t* data, int length);
 
 /**
- * Read a single byte from the i2c context
+ * Simple read for a single byte from the i2c context, this will always begin
+ * with the i2c offset 0x0
  *
  * @param dev The i2c context
- * @return The result of the read or -1 if failed
+ * @return The result of the read and 0 if failed
  */
 uint8_t mraa_i2c_read_byte(mraa_i2c_context dev);
 
 /**
- * Write to an i2c context
+ * Read a single byte from i2c context, from designated register
+ *
+ * @param dev The i2c context
+ * @param command The register
+ * @return The result of the read and 0 if failed
+ */
+uint8_t mraa_i2c_read_byte_data(mraa_i2c_context dev, const uint8_t command);
+
+/**
+ * Read a single word from i2c context, from designated register
+ *
+ * @param dev The i2c context
+ * @param command The register
+ * @return The result of the read and 0 if failed
+ */
+uint16_t mraa_i2c_read_word_data(mraa_i2c_context dev, const uint8_t command);
+
+/**
+ * Bulk read from i2c context, starting from designated register
+ *
+ * @param dev The i2c context
+ * @param command The register
+ * @param data pointer to the byte array to read data in to
+ * @param length max number of bytes to read
+ * @return The length in bytes passed to the function or -1
+ */
+int mraa_i2c_read_bytes_data(mraa_i2c_context dev, uint8_t command, uint8_t* data, int length);
+
+/**
+ * Write length bytes to the bus, the first byte in the array is the
+ * command/register to write
  *
  * @param dev The i2c context
  * @param data pointer to the byte array to be written
  * @param length the number of bytes to transmit
  * @return Result of operation
  */
-mraa_result_t mraa_i2c_write(mraa_i2c_context dev, const uint8_t *data, int length);
+mraa_result_t mraa_i2c_write(mraa_i2c_context dev, const uint8_t* data, int length);
 
 /**
- * Write a single byte to an i2c context
+ * Write a single byte to an i2c context, always at offset 0x0
  *
  * @param dev The i2c context
  * @param data The byte to write
@@ -114,6 +146,26 @@ mraa_result_t mraa_i2c_write(mraa_i2c_context dev, const uint8_t *data, int leng
  */
 mraa_result_t mraa_i2c_write_byte(mraa_i2c_context dev, const uint8_t data);
 
+/**
+ * Write a single byte to an i2c context
+ *
+ * @param dev The i2c context
+ * @param data The byte to write
+ * @param command The register
+ * @return Result of operation
+ */
+mraa_result_t mraa_i2c_write_byte_data(mraa_i2c_context dev, const uint8_t data, const uint8_t command);
+
+/**
+ * Write a single word to an i2c context
+ *
+ * @param dev The i2c context
+ * @param data The word to write
+ * @param command The register
+ * @return Result of operation
+ */
+mraa_result_t mraa_i2c_write_word_data(mraa_i2c_context dev, const uint16_t data, const uint8_t command);
+
 /**
  * Sets the i2c context address.
  *
@@ -123,7 +175,7 @@ mraa_result_t mraa_i2c_write_byte(mraa_i2c_context dev, const uint8_t data);
  *   general call address.
  * @return Result of operation
  */
-mraa_result_t mraa_i2c_address(mraa_i2c_context dev, int address);
+mraa_result_t mraa_i2c_address(mraa_i2c_context dev, uint8_t address);
 
 /**
  * De-inits an mraa_i2c_context device

api/mraa/i2c.hpp

@@ -25,8 +25,11 @@
 #pragma once
 
 #include "i2c.h"
+#include "types.hpp"
+#include <stdexcept>
 
-namespace mraa {
+namespace mraa
+{
 
 /**
  * @brief API to Inter-Integrated Circuit
@@ -37,117 +40,182 @@ namespace mraa {
  *
  * @snippet I2c-compass.cpp Interesting
  */
-class I2c {
-    public:
-        /**
-         * Instantiates an i2c bus. Multiple instances of the same bus can
-         * exist and the bus is not guarranteed to be on the correct address
-         * before read/write.
-         *
-         * @param bus The i2c bus to use
-         * @param raw Whether to disable pinmapper for your board
-         */
-        I2c(int bus, bool raw=false) {
-            if (raw)
-                m_i2c = mraa_i2c_init_raw(bus);
-            else
-                m_i2c = mraa_i2c_init(bus);
+class I2c
+{
+  public:
+    /**
+     * Instantiates an i2c bus. Multiple instances of the same bus can
+     * exist and the bus is not guarranteed to be on the correct address
+     * before read/write.
+     *
+     * @param bus The i2c bus to use
+     * @param raw Whether to disable pinmapper for your board
+     */
+    I2c(int bus, bool raw = false)
+    {
+        if (raw) {
+            m_i2c = mraa_i2c_init_raw(bus);
+        } else {
+            m_i2c = mraa_i2c_init(bus);
         }
-        /**
-         * Closes the I2c Bus used. This does not guarrantee the bus will not
-         * be usable by anyone else or communicates this disconnect to any
-         * slaves.
-         */
-        ~I2c() {
-            mraa_i2c_stop(m_i2c);
-        }
-        /**
-         * Sets the i2c Frequency for communication. Your board may not support
-         * the set frequency. Anyone can change this at any time and this will
-         * affect every slave on the bus
-         *
-         * @param hz Frequency to set the bus to in hz
-         * @return Result of operation
-         */
-        mraa_result_t frequency(int hz) {
-            return mraa_i2c_frequency(m_i2c, hz);
-        }
-        /**
-         * Set the slave to talk to, typically called before every read/write
-         * operation
-         *
-         * @param address Communicate to the i2c slave on this address
-         * @return Result of operation
-         */
-        mraa_result_t address(int address) {
-            return mraa_i2c_address(m_i2c, address);
-        }
-        /**
-         * Read exactly one byte from the bus
-         *
-         * @return char read from the bus
-         */
-        unsigned char read() {
-            return (unsigned char) mraa_i2c_read_byte(m_i2c);
-        }
-        /**
-         * Read mutliple bytes from the bus
-         *
-         * @param data Buffer to write into
-         * @param length Size of read
-         * @return length of the read or 0 if failed
-         */
-        int read(char *data, size_t length) {
-            return mraa_i2c_read(m_i2c, (uint8_t*) data, (int) length);
-        }
-	/**
-	 * Read length bytes from the bus, and return as a std::string note
-	 * that this is not a null terminated string
-	 *
-	 * @param length Size of read to make
-	 * @return pointer to std::string
-	 */
-        std::string read(size_t length) {
-            char* data = (char*) malloc(sizeof(char) * length);
-            mraa_i2c_read(m_i2c, (uint8_t*) data, (int) length);
-            std::string str(data, (int) length);
-            free(data);
-            return str;
-        }
-        /**
-         * Write one byte to the bus
-         *
-         * @param data Buffer to send on the bus
-         * @param length Size of buffer to send
-         * @return Result of operation
-         */
-        mraa_result_t write(char* data, size_t length) {
-            return mraa_i2c_write(m_i2c, (const unsigned char *)data, (int) length);
+        if (m_i2c == NULL) {
+            throw std::invalid_argument("Invalid i2c bus");
         }
+    }
 
-        /**
-         * Write to an i2c register
-         *
-         * @param reg Register to write to
-         * @param data Value to write to register
-         * @return Result of operation
-         */
-        mraa_result_t writeReg(char reg, char data) {
-            const unsigned char buf[2] = {(unsigned char) reg, (unsigned char) data};
-            return mraa_i2c_write(m_i2c, buf, 2);
-        }
+    /**
+     * Closes the I2c Bus used. This does not guarrantee the bus will not
+     * be usable by anyone else or communicates this disconnect to any
+     * slaves.
+     */
+    ~I2c()
+    {
+        mraa_i2c_stop(m_i2c);
+    }
 
-        /**
-         * Write multiple bytes to the bus
-         *
-         * @param data The byte to send on the bus
-         * @return Result of operation
-         */
-        mraa_result_t write(char data) {
-            return mraa_i2c_write_byte(m_i2c, data);
-        }
-    private:
-        mraa_i2c_context m_i2c;
+    /**
+     * Sets the i2c Frequency for communication. Your board may not support
+     * the set frequency. Anyone can change this at any time and this will
+     * affect every slave on the bus
+     *
+     * @param mode Frequency to set the bus to
+     * @return Result of operation
+     */
+    Result
+    frequency(I2cMode mode)
+    {
+        return (Result) mraa_i2c_frequency(m_i2c, (mraa_i2c_mode_t) mode);
+    }
+
+    /**
+     * Set the slave to talk to, typically called before every read/write
+     * operation
+     *
+     * @param address Communicate to the i2c slave on this address
+     * @return Result of operation
+     */
+    Result
+    address(uint8_t address)
+    {
+        return (Result) mraa_i2c_address(m_i2c, address);
+    }
+
+    /**
+     * Read exactly one byte from the bus
+     *
+     * @return char read from the bus
+     */
+    uint8_t
+    readByte()
+    {
+        return (uint8_t) mraa_i2c_read_byte(m_i2c);
+    }
+
+    /**
+     * Read length bytes from the bus into *data pointer
+     *
+     * @param data Data to read into
+     * @param length Size of read in bytes to make
+     * @return length of read, should match length
+     */
+    int
+    read(uint8_t* data, int length)
+    {
+        return mraa_i2c_read(m_i2c, data, length);
+    }
+
+    /**
+     * Read byte from an i2c register
+     *
+     * @param reg Register to read from
+     * @return char read from register
+     */
+    uint8_t
+    readReg(uint8_t reg)
+    {
+        return mraa_i2c_read_byte_data(m_i2c, reg);
+    }
+
+    /**
+     * Read word from an i2c register
+     *
+     * @param reg Register to read from
+     * @return char read from register
+     */
+    uint16_t
+    readWordReg(uint8_t reg)
+    {
+        return mraa_i2c_read_word_data(m_i2c, reg);
+    }
+
+    /**
+     * Read length bytes from the bus into *data pointer starting from
+     * an i2c register
+     *
+     * @param reg Register to read from
+     * @param data pointer to the byte array to read data in to
+     * @param length max number of bytes to read
+     * @return length passed to the function or -1
+     */
+    int
+    readBytesReg(uint8_t reg, uint8_t* data, int length)
+    {
+        return mraa_i2c_read_bytes_data(m_i2c, reg, data, length);
+    }
+
+    /**
+     * Write a byte on the bus
+     *
+     * @param data The byte to send on the bus
+     * @return Result of operation
+     */
+    Result
+    writeByte(uint8_t data)
+    {
+        return (Result) mraa_i2c_write_byte(m_i2c, data);
+    }
+
+    /**
+     * Write length bytes to the bus, the first byte in the array is the
+     * command/register to write
+     *
+     * @param data Buffer to send on the bus, first byte is i2c command
+     * @param length Size of buffer to send
+     * @return Result of operation
+     */
+    Result
+    write(const uint8_t* data, int length)
+    {
+        return (Result) mraa_i2c_write(m_i2c, data, length);
+    }
+
+    /**
+     * Write a byte to an i2c register
+     *
+     * @param reg Register to write to
+     * @param data Value to write to register
+     * @return Result of operation
+     */
+    Result
+    writeReg(uint8_t reg, uint8_t data)
+    {
+        return (Result) mraa_i2c_write_byte_data(m_i2c, data, reg);
+    }
+
+    /**
+     * Write a word to an i2c register
+     *
+     * @param reg Register to write to
+     * @param data Value to write to register
+     * @return Result of operation
+     */
+    Result
+    writeWordReg(uint8_t reg, uint16_t data)
+    {
+        return (Result) mraa_i2c_write_word_data(m_i2c, data, reg);
+    }
+
+  private:
+    mraa_i2c_context m_i2c;
 };
-
 }

api/mraa/pwm.h

@@ -186,6 +186,20 @@ mraa_result_t mraa_pwm_config_ms(mraa_pwm_context dev, int period, float duty);
  */
 mraa_result_t mraa_pwm_config_percent(mraa_pwm_context dev, int period, float duty);
 
+/**
+ * Get the maximum pwm period in us
+ *
+ * @return max pwm in us
+ */
+int mraa_pwm_get_max_period();
+
+/**
+ * Get the minimum pwm period in us
+ *
+ * @return min pwm in us
+ */
+int mraa_pwm_get_min_period();
+
 #ifdef __cplusplus
 }
 #endif

api/mraa/pwm.hpp

@@ -25,8 +25,11 @@
 #pragma once
 
 #include "pwm.h"
+#include "types.hpp"
+#include <stdexcept>
 
-namespace mraa {
+namespace mraa
+{
 
 /**
  * @brief API to Pulse Width Modulation
@@ -35,144 +38,195 @@ namespace mraa {
  *
  * @snippet Pwm3-cycle.cpp Interesting
  */
-class Pwm {
-    public:
-        /**
-         * instanciates a PWM object on a pin
-         *
-         * @param pin the pin number used on your board
-         * @param chipid the pwmchip to use, use only in raw mode
-         * @param owner if you are the owner of the pin the destructor will
-         * unexport the pin from sysfs, default behaviour is you are the owner
-         * if the pinmapper exported it
-         */
-        Pwm(int pin, int chipid=-1, bool owner = true) {
-            if (chipid == -1)
-                m_pwm = mraa_pwm_init(pin);
-            else
-                m_pwm = mraa_pwm_init_raw(pin, chipid);
-            if (!owner)
-                mraa_pwm_owner(m_pwm, 0);
-        }
-        /**
-         * Pwm destructor
-         */
-        ~Pwm() {
-            mraa_pwm_close(m_pwm);
-        }
-        /**
-         * Set the output duty-cycle percentage, as a float
-         *
-         * @param percentage A floating-point value representing percentage of
-         * output. The value should lie between 0.0f (representing on 0%) and
-         * 1.0f Values above or below this range will be set at either 0.0f or
-         * 1.0f
-         * @return Result of operation
-         */
-        mraa_result_t write(float percentage) {
-            return mraa_pwm_write(m_pwm, percentage);
-        }
-        /**
-         * Read the ouput duty-cycle percentage, as a float
-         *
-         * @return A floating-point value representing percentage of
-         * output. The value should lie between 0.0f (representing on 0%) and
-         * 1.0f Values above or below this range will be set at either 0.0f or
-         * 1.0f
-         */
-        float read() {
-            return mraa_pwm_read(m_pwm);
-        }
-        /**
-         * Set the PWM period as seconds represented in a float
-         *
-         * @param period Period represented as a float in seconds
-         * @return Result of operation
-         */
-        mraa_result_t period(float period) {
-            return mraa_pwm_period(m_pwm, period);
-        }
-        /**
-         * Set period, milliseconds
-         *
-         * @param ms milliseconds for period
-         * @return Result of operation
-         */
-        mraa_result_t period_ms(int ms) {
-            return mraa_pwm_period_ms(m_pwm, ms);
-        }
-        /**
-         * Set period, microseconds
-         *
-         * @param us microseconds as period
-         * @return Result of operation
-         */
-        mraa_result_t period_us(int us) {
-            return mraa_pwm_period_us(m_pwm, us);
-        }
-        /**
-         * Set pulsewidth, As represnted by seconds in a (float)
-         *
-         * @param seconds The duration of a pulse
-         * @return Result of operation
-         */
-        mraa_result_t pulsewidth(float seconds) {
-            return mraa_pwm_pulsewidth(m_pwm, seconds);
-        }
-        /**
-         * Set pulsewidth, milliseconds
-         *
-         * @param ms milliseconds for pulsewidth
-         * @return Result of operation
-         */
-        mraa_result_t pulsewidth_ms(int ms) {
-            return mraa_pwm_pulsewidth_ms(m_pwm, ms);
-        }
-        /**
-         * The pulsewidth, microseconds
-         *
-         * @param us microseconds for pulsewidth
-         * @return Result of operation
-         */
-        mraa_result_t pulsewidth_us(int us) {
-            return mraa_pwm_pulsewidth_us(m_pwm, us);
-        }
-        /**
-         * Set the enable status of the PWM pin. None zero will assume on with
-         * output being driven and 0 will disable the output
-         *
-         * @param enable enable status of pin
-         * @return Result of operation
-         */
-        mraa_result_t enable(bool enable) {
-            if (enable)
-                return mraa_pwm_enable(m_pwm, 1);
-            else
-                return mraa_pwm_enable(m_pwm, 0);
-        }
-        /**
-         * Set the period and duty of a PWM object.
-         *
-         * @param period represented in ms.
-         * @param duty represnted in ms as float.
-         * @return Result of operation
-         */
-        mraa_result_t config_ms(int period, float duty) {
-            return mraa_pwm_config_ms(m_pwm, period, duty);
-        }
-        /**
-         * Set the period and duty (percent) of a PWM object.
-         *
-         * @param period as represented in ms.
-         * @param duty percentage i.e. 50% = 0.5f
-         * @return Result of operation
-         */
-        mraa_result_t config_percent(int period, float duty) {
-            return mraa_pwm_config_percent(m_pwm, period, duty);
+class Pwm
+{
+  public:
+    /**
+     * instanciates a PWM object on a pin
+     *
+     * @param pin the pin number used on your board
+     * @param owner if you are the owner of the pin the destructor will
+     * @param chipid the pwmchip to use, use only in raw mode
+     * unexport the pin from sysfs, default behaviour is you are the owner
+     * if the pinmapper exported it
+     */
+    Pwm(int pin, bool owner = true, int chipid = -1)
+    {
+        if (chipid == -1) {
+            m_pwm = mraa_pwm_init(pin);
+        } else {
+            m_pwm = mraa_pwm_init_raw(chipid, pin);
         }
 
-    private:
-        mraa_pwm_context m_pwm;
+        if (m_pwm == NULL) {
+            throw std::invalid_argument("Error initialising PWM on pin");
+        }
+
+        if (!owner) {
+            mraa_pwm_owner(m_pwm, 0);
+        }
+    }
+    /**
+     * Pwm destructor
+     */
+    ~Pwm()
+    {
+        mraa_pwm_close(m_pwm);
+    }
+    /**
+     * Set the output duty-cycle percentage, as a float
+     *
+     * @param percentage A floating-point value representing percentage of
+     * output. The value should lie between 0.0f (representing on 0%) and
+     * 1.0f Values above or below this range will be set at either 0.0f or
+     * 1.0f
+     * @return Result of operation
+     */
+    Result
+    write(float percentage)
+    {
+        return (Result) mraa_pwm_write(m_pwm, percentage);
+    }
+    /**
+     * Read the ouput duty-cycle percentage, as a float
+     *
+     * @return A floating-point value representing percentage of
+     * output. The value should lie between 0.0f (representing on 0%) and
+     * 1.0f Values above or below this range will be set at either 0.0f or
+     * 1.0f
+     */
+    float
+    read()
+    {
+        return mraa_pwm_read(m_pwm);
+    }
+    /**
+     * Set the PWM period as seconds represented in a float
+     *
+     * @param period Period represented as a float in seconds
+     * @return Result of operation
+     */
+    Result
+    period(float period)
+    {
+        return (Result) mraa_pwm_period(m_pwm, period);
+    }
+    /**
+     * Set period, milliseconds
+     *
+     * @param ms milliseconds for period
+     * @return Result of operation
+     */
+    Result
+    period_ms(int ms)
+    {
+        return (Result) mraa_pwm_period_ms(m_pwm, ms);
+    }
+    /**
+     * Set period, microseconds
+     *
+     * @param us microseconds as period
+     * @return Result of operation
+     */
+    Result
+    period_us(int us)
+    {
+        return (Result) mraa_pwm_period_us(m_pwm, us);
+    }
+    /**
+     * Set pulsewidth, As represnted by seconds in a (float)
+     *
+     * @param seconds The duration of a pulse
+     * @return Result of operation
+     */
+    Result
+    pulsewidth(float seconds)
+    {
+        return (Result) mraa_pwm_pulsewidth(m_pwm, seconds);
+    }
+    /**
+     * Set pulsewidth, milliseconds
+     *
+     * @param ms milliseconds for pulsewidth
+     * @return Result of operation
+     */
+    Result
+    pulsewidth_ms(int ms)
+    {
+        return (Result) mraa_pwm_pulsewidth_ms(m_pwm, ms);
+    }
+    /**
+     * The pulsewidth, microseconds
+     *
+     * @param us microseconds for pulsewidth
+     * @return Result of operation
+     */
+    Result
+    pulsewidth_us(int us)
+    {
+        return (Result) mraa_pwm_pulsewidth_us(m_pwm, us);
+    }
+    /**
+     * Set the enable status of the PWM pin. None zero will assume on with
+     * output being driven and 0 will disable the output
+     *
+     * @param enable enable status of pin
+     * @return Result of operation
+     */
+    Result
+    enable(bool enable)
+    {
+        if (enable)
+            return (Result) mraa_pwm_enable(m_pwm, 1);
+        else
+            return (Result) mraa_pwm_enable(m_pwm, 0);
+    }
+    /**
+     * Set the period and duty of a PWM object.
+     *
+     * @param period represented in ms.
+     * @param duty represnted in ms as float.
+     * @return Result of operation
+     */
+    Result
+    config_ms(int period, float duty)
+    {
+        return (Result) mraa_pwm_config_ms(m_pwm, period, duty);
+    }
+    /**
+     * Set the period and duty (percent) of a PWM object.
+     *
+     * @param period as represented in ms.
+     * @param duty percentage i.e. 50% = 0.5f
+     * @return Result of operation
+     */
+    Result
+    config_percent(int period, float duty)
+    {
+        return (Result) mraa_pwm_config_percent(m_pwm, period, duty);
+    }
+    /**
+     * Get the maximum pwm period in us
+     *
+     * @return max pwm in us
+     */
+    int
+    max_period()
+    {
+        return mraa_pwm_get_max_period();
+    }
+    /**
+     * Get the minimum pwm period in us
+     *
+     * @return min pwm in us
+     */
+    int
+    min_period()
+    {
+        return mraa_pwm_get_min_period();
+    }
+
+  private:
+    mraa_pwm_context m_pwm;
 };
-
 }

api/mraa/spi.h

@@ -26,7 +26,7 @@
 
 /**
  * @file
- * @brief System Packet Interface
+ * @brief Serial Peripheral Interface
  *
  * This file defines the spi interface for libmraa. A Spi object in libmraa
  * represents a spidev device. Linux spidev devices are created per spi bus and
@@ -48,13 +48,17 @@ extern "C" {
 #include "common.h"
 
 /**
- * MRAA supported platform types
+ * MRAA SPI Modes
  */
 typedef enum {
-    MRAA_SPI_MODE0 = 0, /**< CPOL = 0, CPHA = 0, Clock idle low, data is clocked in on rising edge, output data (change) on falling edge */
-    MRAA_SPI_MODE1 = 1, /**< CPOL = 0, CPHA = 1, Clock idle low, data is clocked in on falling edge, output data (change) on rising edge */
-    MRAA_SPI_MODE2 = 2, /**< CPOL = 1, CPHA = 0, Clock idle low, data is clocked in on falling edge, output data (change) on rising edge */
-    MRAA_SPI_MODE3 = 3, /**< CPOL = 1, CPHA = 1, Clock idle low, data is clocked in on rising, edge output data (change) on falling edge */
+    MRAA_SPI_MODE0 = 0, /**< CPOL = 0, CPHA = 0, Clock idle low, data is clocked in on rising edge,
+                           output data (change) on falling edge */
+    MRAA_SPI_MODE1 = 1, /**< CPOL = 0, CPHA = 1, Clock idle low, data is clocked in on falling edge,
+                           output data (change) on rising edge */
+    MRAA_SPI_MODE2 = 2, /**< CPOL = 1, CPHA = 0, Clock idle low, data is clocked in on falling edge,
+                           output data (change) on rising edge */
+    MRAA_SPI_MODE3 = 3, /**< CPOL = 1, CPHA = 1, Clock idle low, data is clocked in on rising, edge
+                           output data (change) on falling edge */
 } mraa_spi_mode_t;
 
 /**
@@ -70,33 +74,54 @@ typedef struct _spi* mraa_spi_context;
  */
 mraa_spi_context mraa_spi_init(int bus);
 
+/**
+ * Initialise SPI_context without any board configuration, selects a bus and a mux.
+ *
+ * @param bus Bus to use as listed by spidev
+ * @param cs Chip select to use as listed in spidev
+ * @return Spi context or NULL
+ */
+mraa_spi_context mraa_spi_init_raw(unsigned int bus, unsigned int cs);
+
 /**
  * Set the SPI device mode. see spidev 0-3.
  *
  * @param dev The Spi context
  * @param mode The SPI mode, See Linux spidev
- * @return Spi context or NULL
+ * @return Result of operation
  */
 mraa_result_t mraa_spi_mode(mraa_spi_context dev, mraa_spi_mode_t mode);
 
-/** Set the SPI device operating clock frequency.
+/**
+ * Set the SPI device operating clock frequency.
  *
  * @param dev the Spi context
  * @param hz the frequency in hz
- * @return mraa_spi_context The returned initialised SPI context
+ * @return Result of operation
  */
 mraa_result_t mraa_spi_frequency(mraa_spi_context dev, int hz);
 
-/** Write Single Byte to the SPI device.
+/**
+ * Write Single Byte to the SPI device.
+ *
+ * @param dev The Spi context
+ * @param data Data to send
+ * @return Data received on the miso line or -1 in case of error
+ */
+int mraa_spi_write(mraa_spi_context dev, uint8_t data);
+
+/**
+ *Write Two Bytes to the SPI device.
  *
  * @param dev The Spi context
  * @param data Data to send
  * @return Data received on the miso line
  */
-uint8_t mraa_spi_write(mraa_spi_context dev, uint8_t data);
+uint16_t mraa_spi_write_word(mraa_spi_context dev, uint16_t data);
 
-/** Write Buffer of bytes to the SPI device. The pointer return has to be
- * free'd by the caller.
+/**
+ * Write Buffer of bytes to the SPI device. The pointer return has to be
+ * free'd by the caller. It will return a NULL pointer in cases of error.
  *
  * @param dev The Spi context
  * @param data to send
@@ -105,6 +130,41 @@ uint8_t mraa_spi_write(mraa_spi_context dev, uint8_t data);
  */
 uint8_t* mraa_spi_write_buf(mraa_spi_context dev, uint8_t* data, int length);
 
+/**
+ * Write Buffer of uint16 to the SPI device. The pointer return has to be
+ * free'd by the caller. It will return a NULL pointer in cases of error.
+ *
+ * @param dev The Spi context
+ * @param data to send
+ * @param length elements (in bytes) within buffer, Max 4096
+ * @return Data received on the miso line, same length as passed in
+ */
+uint16_t* mraa_spi_write_buf_word(mraa_spi_context dev, uint16_t* data, int length);
+
+/**
+ * Transfer Buffer of bytes to the SPI device. Both send and recv buffers
+ * are passed in
+ *
+ * @param dev The Spi context
+ * @param data to send
+ * @param rxbuf buffer to recv data back, may be NULL
+ * @param length elements within buffer, Max 4096
+ * @return Result of operation
+ */
+mraa_result_t mraa_spi_transfer_buf(mraa_spi_context dev, uint8_t* data, uint8_t* rxbuf, int length);
+
+/**
+ * Transfer Buffer of uint16 to the SPI device. Both send and recv buffers
+ * are passed in
+ *
+ * @param dev The Spi context
+ * @param data to send
+ * @param rxbuf buffer to recv data back, may be NULL
+ * @param length elements (in bytes) within buffer, Max 4096
+ * @return Result of operation
+ */
+mraa_result_t mraa_spi_transfer_buf_word(mraa_spi_context dev, uint16_t* data, uint16_t* rxbuf, int length);
+
 /**
  * Change the SPI lsb mode
  *

api/mraa/spi.hpp

@@ -25,88 +25,196 @@
 #pragma once
 
 #include "spi.h"
+#include "types.hpp"
+#include <stdexcept>
 
-namespace mraa {
+namespace mraa
+{
 
 /**
- * @brief API to System Packet Interface
- *
- * This file defines the SPI interface for libmraa
- *
- * @snippet Spi-pot.cpp Interesting
+ * MRAA SPI Modes
  */
-class Spi {
-    public:
-        /**
-         * Initialise SPI object using the board mapping to set muxes
-         *
-         * @param bus to use, as listed in the platform definition, normally 0
-         */
-        Spi(int bus) {
-            m_spi = mraa_spi_init(bus);
+typedef enum {
+    SPI_MODE0 = 0, /**< CPOL = 0, CPHA = 0, Clock idle low, data is clocked in on rising edge,
+                      output data (change) on falling edge */
+    SPI_MODE1 = 1, /**< CPOL = 0, CPHA = 1, Clock idle low, data is clocked in on falling edge,
+                      output data (change) on rising edge */
+    SPI_MODE2 = 2, /**< CPOL = 1, CPHA = 0, Clock idle low, data is clocked in on falling edge,
+                      output data (change) on rising edge */
+    SPI_MODE3 = 3, /**< CPOL = 1, CPHA = 1, Clock idle low, data is clocked in on rising, edge
+                      output data (change) on falling edge */
+} Spi_Mode;
+
+
+/**
+* @brief API to Serial Peripheral Interface
+*
+* This file defines the SPI interface for libmraa
+*
+* @snippet Spi-pot.cpp Interesting
+*/
+class Spi
+{
+  public:
+    /**
+     * Initialise SPI object using the board mapping to set muxes
+     *
+     * @param bus to use, as listed in the platform definition, normally 0
+     */
+    Spi(int bus)
+    {
+        m_spi = mraa_spi_init(bus);
+
+        if (m_spi == NULL) {
+            throw std::invalid_argument("Error initialising SPI bus");
         }
-        /**
-         * Closes spi bus
-         */
-        ~Spi() {
-            mraa_spi_stop(m_spi);
-        }
-        /**
-         * Set the SPI device mode. see spidev0-3
-         *
-         * @param mode the mode. See Linux spidev doc
-         * @return Result of operation
-         */
-        mraa_result_t mode(mraa_spi_mode_t mode) {
-            return mraa_spi_mode(m_spi, mode);
-        }
-        /**
-         * Set the SPI device operating clock frequency
-         *
-         * @param hz the frequency to set in hz
-         * @return Result of operation
-         */
-        mraa_result_t frequency(int hz) {
-            return mraa_spi_frequency(m_spi, hz);
-        }
-        /**
-         * Write single byte to the SPI device
-         *
-         * @param data the byte to send
-         * @return data received on the miso line
-         */
-        char write(char data) {
-            return (char) mraa_spi_write(m_spi, (uint8_t) data);
-        }
-        /**
-         * Write buffer of bytes to SPI device
-         *
-         * @param data buffer to send
-         * @param length size of buffer to send
-         * @return char* data received on the miso line. Same length as passed in
-         */
-        char* write(char* data, size_t length) {
-            return (char*) mraa_spi_write_buf(m_spi, (uint8_t *) data, (int) length);
-        }
-        /**
-         * Change the SPI lsb mode
-         *
-         * @param lsb Use least significant bit transmission - 0 for msbi
-         * @return Result of operation
-         */
-        mraa_result_t lsbmode(bool lsb) {
-            return mraa_spi_lsbmode(m_spi, (mraa_boolean_t) lsb);
-        }
-        /**
-         * Set bits per mode on transaction, default is 8
-         *
-         * @param bits bits per word
-         * @return Result of operation
-         */
-        mraa_result_t bitPerWord(unsigned int bits) {
-            return mraa_spi_bit_per_word(m_spi, bits);
-        }
-            private:
-                mraa_spi_context m_spi;
-        };
+    }
+
+    /**
+     * Closes spi bus
+     */
+    ~Spi()
+    {
+        mraa_spi_stop(m_spi);
+    }
+
+    /**
+     * Set the SPI device mode. see spidev0-3
+     *
+     * @param mode the mode. See Linux spidev doc
+     * @return Result of operation
+     */
+    Result
+    mode(Spi_Mode mode)
+    {
+        return (Result) mraa_spi_mode(m_spi, (mraa_spi_mode_t) mode);
+    }
+
+    /**
+     * Set the SPI device operating clock frequency
+     *
+     * @param hz the frequency to set in hz
+     * @return Result of operation
+     */
+    Result
+    frequency(int hz)
+    {
+        return (Result) mraa_spi_frequency(m_spi, hz);
+    }
+
+    /**
+     * Write single byte to the SPI device
+     *
+     * @param data the byte to send
+     * @return data received on the miso line or -1 in case of error
+     */
+    int
+    writeByte(uint8_t data)
+    {
+        return mraa_spi_write(m_spi, (uint8_t) data);
+    }
+
+    /**
+     * Write single byte to the SPI device
+     *
+     * @param data the byte to send
+     * @return data received on the miso line
+     */
+    uint16_t
+    write_word(uint16_t data)
+    {
+        return mraa_spi_write_word(m_spi, (uint16_t) data);
+    }
+
+    /**
+     * Write buffer of bytes to SPI device The pointer return has to be
+     * free'd by the caller. It will return a NULL pointer in cases of
+     * error
+     *
+     * @param txBuf buffer to send
+     * @param length size of buffer to send
+     * @return uint8_t* data received on the miso line. Same length as passed in
+     */
+    uint8_t*
+    write(uint8_t* txBuf, int length)
+    {
+        return mraa_spi_write_buf(m_spi, txBuf, length);
+    }
+
+#ifndef SWIG
+    /**
+     * Write buffer of bytes to SPI device The pointer return has to be
+     * free'd by the caller. It will return a NULL pointer in cases of
+     * error
+     *
+     * @param txBuf buffer to send
+     * @param length size of buffer (in bytes) to send
+     * @return uint8_t* data received on the miso line. Same length as passed in
+     */
+    uint16_t*
+    write_word(uint16_t* txBuf, int length)
+    {
+        return mraa_spi_write_buf_word(m_spi, txBuf, length);
+    }
+#endif
+
+#ifndef SWIG
+    /**
+     * Transfer data to and from SPI device Receive pointer may be null if
+     * return data is not needed.
+     *
+     * @param txBuf buffer to send
+     * @param rxBuf buffer to optionally receive data from spi device
+     * @param length size of buffer to send
+     * @return Result of operation
+     */
+    Result
+    transfer(uint8_t* txBuf, uint8_t* rxBuf, int length)
+    {
+        return (Result) mraa_spi_transfer_buf(m_spi, txBuf, rxBuf, length);
+    }
+
+    /**
+     * Transfer data to and from SPI device Receive pointer may be null if
+     * return data is not needed.
+     *
+     * @param txBuf buffer to send
+     * @param rxBuf buffer to optionally receive data from spi device
+     * @param length size of buffer to send
+     * @return Result of operation
+     */
+    Result
+    transfer_word(uint16_t* txBuf, uint16_t* rxBuf, int length)
+    {
+        return (Result) mraa_spi_transfer_buf_word(m_spi, txBuf, rxBuf, length);
+    }
+#endif
+
+    /**
+     * Change the SPI lsb mode
+     *
+     * @param lsb Use least significant bit transmission - 0 for msbi
+     * @return Result of operation
+     */
+    Result
+    lsbmode(bool lsb)
+    {
+        return (Result) mraa_spi_lsbmode(m_spi, (mraa_boolean_t) lsb);
+    }
+
+    /**
+     * Set bits per mode on transaction, default is 8
+     *
+     * @param bits bits per word
+     * @return Result of operation
+     */
+    Result
+    bitPerWord(unsigned int bits)
+    {
+        return (Result) mraa_spi_bit_per_word(m_spi, bits);
+    }
+
+  private:
+    mraa_spi_context m_spi;
+};
 }

api/mraa/types.h

@@ -37,67 +37,205 @@ extern "C" {
  * MRAA supported platform types
  */
 typedef enum {
-    MRAA_INTEL_GALILEO_GEN1 = 0, /**< The Generation 1 Galileo platform (RevD) */
-    MRAA_INTEL_GALILEO_GEN2 = 1, /**< The Generation 2 Galileo platform (RevG/H) */
-    MRAA_INTEL_EDISON_FAB_C = 2, /**< The Intel Edison (FAB C) */
+    MRAA_INTEL_GALILEO_GEN1 = 0,    /**< The Generation 1 Galileo platform (RevD) */
+    MRAA_INTEL_GALILEO_GEN2 = 1,    /**< The Generation 2 Galileo platform (RevG/H) */
+    MRAA_INTEL_EDISON_FAB_C = 2,    /**< The Intel Edison (FAB C) */
+    MRAA_INTEL_DE3815 = 3,          /**< The Intel DE3815 Baytrail NUC */
+    MRAA_INTEL_MINNOWBOARD_MAX = 4, /**< The Intel Minnow Board Max */
+    MRAA_RASPBERRY_PI = 5,          /**< The different Raspberry PI Models -like  A,B,A+,B+ */
+    MRAA_BEAGLEBONE = 6,            /**< The different BeagleBone Black Modes B/C */
+    MRAA_BANANA = 7,                /**< Allwinner A20 based Banana Pi and Banana Pro */
+    MRAA_INTEL_NUC5 = 8,            /**< The Intel 5th generations Broadwell NUCs */
 
-    MRAA_UNKNOWN_PLATFORM = 99 /**< An unknown platform type, typically will load INTEL_GALILEO_GEN1 */
+    // USB platform extenders start at 256
+    MRAA_FTDI_FT4222 = 256,         /**< FTDI FT4222 USB to i2c bridge */
+
+    MRAA_NULL_PLATFORM = 98,        /**< Platform with no capabilities that hosts a sub platform  */
+    MRAA_UNKNOWN_PLATFORM =
+    99 /**< An unknown platform type, typically will load INTEL_GALILEO_GEN1 */
 } mraa_platform_t;
 
+/**
+ * Intel edison miniboard numbering enum
+ */
+typedef enum {
+    MRAA_INTEL_EDISON_MINIBOARD_J17_1 = 0,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_5 = 4,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_7 = 6,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_8 = 7,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_9 = 8,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_10 = 9,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_11 = 10,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_12 = 11,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_14 = 13,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_1 = 14,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_2 = 15,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_6 = 19,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_7 = 20,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_8 = 21,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_10 = 23,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_11 = 24,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_12 = 25,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_13 = 26,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_4 = 31,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_5 = 32,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_6 = 33,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_8 = 35,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_9 = 36,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_10 = 37,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_11 = 38,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_12 = 39,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_13 = 40,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_14 = 41,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_3 = 44,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_4 = 45,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_5 = 46,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_6 = 47,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_7 = 48,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_8 = 49,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_9 = 50,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_10 = 51,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_11 = 52,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_12 = 53,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_13 = 54,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_14 = 55
+} mraa_intel_edison_miniboard_t;
+
+/**
+ * Intel Edison raw GPIO numbering enum
+ */
+typedef enum {
+    MRAA_INTEL_EDISON_GP182 = 0,
+    MRAA_INTEL_EDISON_GP135 = 4,
+    MRAA_INTEL_EDISON_GP27 = 6,
+    MRAA_INTEL_EDISON_GP20 = 7,
+    MRAA_INTEL_EDISON_GP28 = 8,
+    MRAA_INTEL_EDISON_GP111 = 0,
+    MRAA_INTEL_EDISON_GP109 = 10,
+    MRAA_INTEL_EDISON_GP115 = 11,
+    MRAA_INTEL_EDISON_GP128 = 13,
+    MRAA_INTEL_EDISON_GP13 = 14,
+    MRAA_INTEL_EDISON_GP165 = 15,
+    MRAA_INTEL_EDISON_GP19 = 19,
+    MRAA_INTEL_EDISON_GP12 = 20,
+    MRAA_INTEL_EDISON_GP183 = 21,
+    MRAA_INTEL_EDISON_GP110 = 23,
+    MRAA_INTEL_EDISON_GP114 = 24,
+    MRAA_INTEL_EDISON_GP129 = 25,
+    MRAA_INTEL_EDISON_GP130 = 26,
+    MRAA_INTEL_EDISON_GP44 = 31,
+    MRAA_INTEL_EDISON_GP46 = 32,
+    MRAA_INTEL_EDISON_GP48 = 33,
+    MRAA_INTEL_EDISON_GP131 = 35,
+    MRAA_INTEL_EDISON_GP14 = 36,
+    MRAA_INTEL_EDISON_GP40 = 37,
+    MRAA_INTEL_EDISON_GP43 = 38,
+    MRAA_INTEL_EDISON_GP77 = 39,
+    MRAA_INTEL_EDISON_GP82 = 40,
+    MRAA_INTEL_EDISON_GP83 = 41,
+    MRAA_INTEL_EDISON_GP134 = 44,
+    MRAA_INTEL_EDISON_GP45 = 45,
+    MRAA_INTEL_EDISON_GP47 = 46,
+    MRAA_INTEL_EDISON_GP49 = 47,
+    MRAA_INTEL_EDISON_GP15 = 48,
+    MRAA_INTEL_EDISON_GP84 = 49,
+    MRAA_INTEL_EDISON_GP42 = 50,
+    MRAA_INTEL_EDISON_GP41 = 51,
+    MRAA_INTEL_EDISON_GP78 = 52,
+    MRAA_INTEL_EDISON_GP79 = 53,
+    MRAA_INTEL_EDISON_GP80 = 54,
+    MRAA_INTEL_EDISON_GP81 = 55
+} mraa_intel_edison_t;
+
+/**
+* Raspberry PI Wiring compatible numbering enum
+*/
+typedef enum {
+    MRAA_RASPBERRY_WIRING_PIN8 = 3,
+    MRAA_RASPBERRY_WIRING_PIN9 = 5,
+    MRAA_RASPBERRY_WIRING_PIN7 = 7,
+    MRAA_RASPBERRY_WIRING_PIN15 = 8,
+    MRAA_RASPBERRY_WIRING_PIN16 = 10,
+    MRAA_RASPBERRY_WIRING_PIN0 = 11,
+    MRAA_RASPBERRY_WIRING_PIN1 = 12,
+    MRAA_RASPBERRY_WIRING_PIN2 = 13,
+    MRAA_RASPBERRY_WIRING_PIN3 = 15,
+    MRAA_RASPBERRY_WIRING_PIN4 = 16,
+    MRAA_RASPBERRY_WIRING_PIN5 = 18,
+    MRAA_RASPBERRY_WIRING_PIN12 = 19,
+    MRAA_RASPBERRY_WIRING_PIN13 = 21,
+    MRAA_RASPBERRY_WIRING_PIN6 = 22,
+    MRAA_RASPBERRY_WIRING_PIN14 = 23,
+    MRAA_RASPBERRY_WIRING_PIN10 = 24,
+    MRAA_RASPBERRY_WIRING_PIN11 = 26,
+    MRAA_RASPBERRY_WIRING_PIN17 = 29, // RPi B V2
+    MRAA_RASPBERRY_WIRING_PIN21 = 29,
+    MRAA_RASPBERRY_WIRING_PIN18 = 30, // RPi B V2
+    MRAA_RASPBERRY_WIRING_PIN19 = 31, // RPI B V2
+    MRAA_RASPBERRY_WIRING_PIN22 = 31,
+    MRAA_RASPBERRY_WIRING_PIN20 = 32, // RPi B V2
+    MRAA_RASPBERRY_WIRING_PIN26 = 32,
+    MRAA_RASPBERRY_WIRING_PIN23 = 33,
+    MRAA_RASPBERRY_WIRING_PIN24 = 35,
+    MRAA_RASPBERRY_WIRING_PIN27 = 36,
+    MRAA_RASPBERRY_WIRING_PIN25 = 37,
+    MRAA_RASPBERRY_WIRING_PIN28 = 38,
+    MRAA_RASPBERRY_WIRING_PIN29 = 40
+} mraa_raspberry_wiring_t;
+
 /**
  * MRAA return codes
  */
 typedef enum {
-    MRAA_SUCCESS                              =  0, /**< Expected response */
-    MRAA_ERROR_FEATURE_NOT_IMPLEMENTED        =  1, /**< Feature TODO */
-    MRAA_ERROR_FEATURE_NOT_SUPPORTED          =  2, /**< Feature not supported by HW */
-    MRAA_ERROR_INVALID_VERBOSITY_LEVEL        =  3, /**< Verbosity level wrong */
-    MRAA_ERROR_INVALID_PARAMETER              =  4, /**< Parameter invalid */
-    MRAA_ERROR_INVALID_HANDLE                 =  5, /**< Handle invalid */
-    MRAA_ERROR_NO_RESOURCES                   =  6, /**< No resource of that type avail */
-    MRAA_ERROR_INVALID_RESOURCE               =  7, /**< Resource invalid */
-    MRAA_ERROR_INVALID_QUEUE_TYPE             =  8, /**< Queue type incorrect */
-    MRAA_ERROR_NO_DATA_AVAILABLE              =  9, /**< No data available */
-    MRAA_ERROR_INVALID_PLATFORM               = 10, /**< Platform not recognised */
-    MRAA_ERROR_PLATFORM_NOT_INITIALISED       = 11, /**< Board information not initialised */
-    MRAA_ERROR_PLATFORM_ALREADY_INITIALISED   = 12, /**< Board is already initialised */
+    MRAA_SUCCESS = 0,                             /**< Expected response */
+    MRAA_ERROR_FEATURE_NOT_IMPLEMENTED = 1,       /**< Feature TODO */
+    MRAA_ERROR_FEATURE_NOT_SUPPORTED = 2,         /**< Feature not supported by HW */
+    MRAA_ERROR_INVALID_VERBOSITY_LEVEL = 3,       /**< Verbosity level wrong */
+    MRAA_ERROR_INVALID_PARAMETER = 4,             /**< Parameter invalid */
+    MRAA_ERROR_INVALID_HANDLE = 5,                /**< Handle invalid */
+    MRAA_ERROR_NO_RESOURCES = 6,                  /**< No resource of that type avail */
+    MRAA_ERROR_INVALID_RESOURCE = 7,              /**< Resource invalid */
+    MRAA_ERROR_INVALID_QUEUE_TYPE = 8,            /**< Queue type incorrect */
+    MRAA_ERROR_NO_DATA_AVAILABLE = 9,             /**< No data available */
+    MRAA_ERROR_INVALID_PLATFORM = 10,             /**< Platform not recognised */
+    MRAA_ERROR_PLATFORM_NOT_INITIALISED = 11,     /**< Board information not initialised */
+    MRAA_ERROR_PLATFORM_ALREADY_INITIALISED = 12, /**< Board is already initialised */
 
-    MRAA_ERROR_UNSPECIFIED                    = 99 /**< Unknown Error */
+    MRAA_ERROR_UNSPECIFIED = 99 /**< Unknown Error */
 } mraa_result_t;
 
 /**
- * This function attempts to set the mraa process to a given priority and the
- * scheduler to SCHED_RR. Highest * priority is typically 99 and minimum is 0.
- * This function * will set to MAX if * priority is > MAX. Function will return
- * -1 on failure.
- *
- * @param priority Value from typically 0 to 99
- * @return The priority value set
+ * Enum representing different possible modes for a pin.
  */
-int mraa_set_priority(const unsigned int priority);
-
-/** Get the version string of mraa autogenerated from git tag
- *
- * The version returned may not be what is expected however it is a reliable
- * number associated with the git tag closest to that version at build time
- *
- * @return version string from version.h
- */
-const char* mraa_get_version();
+typedef enum {
+    MRAA_PIN_VALID = 0,     /**< Pin Valid */
+    MRAA_PIN_GPIO = 1,      /**< General Purpose IO */
+    MRAA_PIN_PWM = 2,       /**< Pulse Width Modulation */
+    MRAA_PIN_FAST_GPIO = 3, /**< Faster GPIO */
+    MRAA_PIN_SPI = 4,       /**< SPI */
+    MRAA_PIN_I2C = 5,       /**< I2C */
+    MRAA_PIN_AIO = 6,       /**< Analog in */
+    MRAA_PIN_UART = 7       /**< UART */
+} mraa_pinmodes_t;
 
 /**
- * Print a textual representation of the mraa_result_t
- *
- * @param result the result to print
+ * Enum reprensenting different i2c speeds/modes
  */
-void mraa_result_print(mraa_result_t result);
+typedef enum {
+    MRAA_I2C_STD = 0,  /**< up to 100Khz */
+    MRAA_I2C_FAST = 1, /**< up to 400Khz */
+    MRAA_I2C_HIGH = 2  /**< up to 3.4Mhz */
+} mraa_i2c_mode_t;
+
+typedef enum {
+	MRAA_UART_PARITY_NONE = 0,
+	MRAA_UART_PARITY_EVEN = 1,
+	MRAA_UART_PARITY_ODD = 2,
+	MRAA_UART_PARITY_MARK = 3,
+	MRAA_UART_PARITY_SPACE = 4
+} mraa_uart_parity_t;
+
 
-/**
- * Get platform type, board must be initialised.
- *
- * @return mraa_platform_t Platform type enum
- */
-mraa_platform_t mraa_get_platform_type();
 
 #ifdef __cplusplus
 }

api/mraa/types.hpp

@@ -0,0 +1,234 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright © 2014 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#pragma once
+
+/** @file
+ *
+ * This file defines the basic shared types for libmraa
+ * this file is different to common.h in that swig takes this as an input
+ */
+
+namespace mraa
+{
+
+//These enums must match the enums in types.h
+
+/**
+ * MRAA supported platform types
+ */
+typedef enum {
+    INTEL_GALILEO_GEN1 = 0,    /**< The Generation 1 Galileo platform (RevD) */
+    INTEL_GALILEO_GEN2 = 1,    /**< The Generation 2 Galileo platform (RevG/H) */
+    INTEL_EDISON_FAB_C = 2,    /**< The Intel Edison (FAB C) */
+    INTEL_DE3815 = 3,          /**< The Intel DE3815 Baytrail NUC */
+    INTEL_MINNOWBOARD_MAX = 4, /**< The Intel Minnow Board Max */
+    RASPBERRY_PI = 5,          /**< The different Raspberry PI Models -like  A,B,A+,B+ */
+    BEAGLEBONE = 6,            /**< The different BeagleBone Black Modes B/C */
+    BANANA = 7,                /**< Allwinner A20 based Banana Pi and Banana Pro */
+
+    UNKNOWN_PLATFORM =
+    99 /**< An unknown platform type, typically will load INTEL_GALILEO_GEN1 */
+} Platform;
+
+/**
+ * Intel edison miniboard numbering enum
+ */
+typedef enum {
+    INTEL_EDISON_MINIBOARD_J17_1 = 0,
+    INTEL_EDISON_MINIBOARD_J17_5 = 4,
+    INTEL_EDISON_MINIBOARD_J17_7 = 6,
+    INTEL_EDISON_MINIBOARD_J17_8 = 7,
+    INTEL_EDISON_MINIBOARD_J17_9 = 8,
+    INTEL_EDISON_MINIBOARD_J17_10 = 9,
+    INTEL_EDISON_MINIBOARD_J17_11 = 10,
+    INTEL_EDISON_MINIBOARD_J17_12 = 11,
+    INTEL_EDISON_MINIBOARD_J17_14 = 13,
+    INTEL_EDISON_MINIBOARD_J18_1 = 14,
+    INTEL_EDISON_MINIBOARD_J18_2 = 15,
+    INTEL_EDISON_MINIBOARD_J18_6 = 19,
+    INTEL_EDISON_MINIBOARD_J18_7 = 20,
+    INTEL_EDISON_MINIBOARD_J18_8 = 21,
+    INTEL_EDISON_MINIBOARD_J18_10 = 23,
+    INTEL_EDISON_MINIBOARD_J18_11 = 24,
+    INTEL_EDISON_MINIBOARD_J18_12 = 25,
+    INTEL_EDISON_MINIBOARD_J18_13 = 26,
+    INTEL_EDISON_MINIBOARD_J19_4 = 31,
+    INTEL_EDISON_MINIBOARD_J19_5 = 32,
+    INTEL_EDISON_MINIBOARD_J19_6 = 33,
+    INTEL_EDISON_MINIBOARD_J19_8 = 35,
+    INTEL_EDISON_MINIBOARD_J19_9 = 36,
+    INTEL_EDISON_MINIBOARD_J19_10 = 37,
+    INTEL_EDISON_MINIBOARD_J19_11 = 38,
+    INTEL_EDISON_MINIBOARD_J19_12 = 39,
+    INTEL_EDISON_MINIBOARD_J19_13 = 40,
+    INTEL_EDISON_MINIBOARD_J19_14 = 41,
+    INTEL_EDISON_MINIBOARD_J20_3 = 44,
+    INTEL_EDISON_MINIBOARD_J20_4 = 45,
+    INTEL_EDISON_MINIBOARD_J20_5 = 46,
+    INTEL_EDISON_MINIBOARD_J20_6 = 47,
+    INTEL_EDISON_MINIBOARD_J20_7 = 48,
+    INTEL_EDISON_MINIBOARD_J20_8 = 49,
+    INTEL_EDISON_MINIBOARD_J20_9 = 50,
+    INTEL_EDISON_MINIBOARD_J20_10 = 51,
+    INTEL_EDISON_MINIBOARD_J20_11 = 52,
+    INTEL_EDISON_MINIBOARD_J20_12 = 53,
+    INTEL_EDISON_MINIBOARD_J20_13 = 54,
+    INTEL_EDISON_MINIBOARD_J20_14 = 55
+} IntelEdisonMiniboard;
+
+/**
+ * Intel Edison raw GPIO numbering enum
+ */
+typedef enum {
+    INTEL_EDISON_GP182 = 0,
+    INTEL_EDISON_GP135 = 4,
+    INTEL_EDISON_GP27 = 6,
+    INTEL_EDISON_GP20 = 7,
+    INTEL_EDISON_GP28 = 8,
+    INTEL_EDISON_GP111 = 0,
+    INTEL_EDISON_GP109 = 10,
+    INTEL_EDISON_GP115 = 11,
+    INTEL_EDISON_GP128 = 13,
+    INTEL_EDISON_GP13 = 14,
+    INTEL_EDISON_GP165 = 15,
+    INTEL_EDISON_GP19 = 19,
+    INTEL_EDISON_GP12 = 20,
+    INTEL_EDISON_GP183 = 21,
+    INTEL_EDISON_GP110 = 23,
+    INTEL_EDISON_GP114 = 24,
+    INTEL_EDISON_GP129 = 25,
+    INTEL_EDISON_GP130 = 26,
+    INTEL_EDISON_GP44 = 31,
+    INTEL_EDISON_GP46 = 32,
+    INTEL_EDISON_GP48 = 33,
+    INTEL_EDISON_GP131 = 35,
+    INTEL_EDISON_GP14 = 36,
+    INTEL_EDISON_GP40 = 37,
+    INTEL_EDISON_GP43 = 38,
+    INTEL_EDISON_GP77 = 39,
+    INTEL_EDISON_GP82 = 40,
+    INTEL_EDISON_GP83 = 41,
+    INTEL_EDISON_GP134 = 44,
+    INTEL_EDISON_GP45 = 45,
+    INTEL_EDISON_GP47 = 46,
+    INTEL_EDISON_GP49 = 47,
+    INTEL_EDISON_GP15 = 48,
+    INTEL_EDISON_GP84 = 49,
+    INTEL_EDISON_GP42 = 50,
+    INTEL_EDISON_GP41 = 51,
+    INTEL_EDISON_GP78 = 52,
+    INTEL_EDISON_GP79 = 53,
+    INTEL_EDISON_GP80 = 54,
+    INTEL_EDISON_GP81 = 55
+} IntelEdison;
+
+/**
+* Raspberry PI Wiring compatible numbering enum
+*/
+typedef enum {
+    RASPBERRY_WIRING_PIN8 = 3,
+    RASPBERRY_WIRING_PIN9 = 5,
+    RASPBERRY_WIRING_PIN7 = 7,
+    RASPBERRY_WIRING_PIN15 = 8,
+    RASPBERRY_WIRING_PIN16 = 10,
+    RASPBERRY_WIRING_PIN0 = 11,
+    RASPBERRY_WIRING_PIN1 = 12,
+    RASPBERRY_WIRING_PIN2 = 13,
+    RASPBERRY_WIRING_PIN3 = 15,
+    RASPBERRY_WIRING_PIN4 = 16,
+    RASPBERRY_WIRING_PIN5 = 18,
+    RASPBERRY_WIRING_PIN12 = 19,
+    RASPBERRY_WIRING_PIN13 = 21,
+    RASPBERRY_WIRING_PIN6 = 22,
+    RASPBERRY_WIRING_PIN14 = 23,
+    RASPBERRY_WIRING_PIN10 = 24,
+    RASPBERRY_WIRING_PIN11 = 26,
+    RASPBERRY_WIRING_PIN17 = 29, // RPi B V2
+    RASPBERRY_WIRING_PIN21 = 29,
+    RASPBERRY_WIRING_PIN18 = 30, // RPi B V2
+    RASPBERRY_WIRING_PIN19 = 31, // RPI B V2
+    RASPBERRY_WIRING_PIN22 = 31,
+    RASPBERRY_WIRING_PIN20 = 32, // RPi B V2
+    RASPBERRY_WIRING_PIN26 = 32,
+    RASPBERRY_WIRING_PIN23 = 33,
+    RASPBERRY_WIRING_PIN24 = 35,
+    RASPBERRY_WIRING_PIN27 = 36,
+    RASPBERRY_WIRING_PIN25 = 37,
+    RASPBERRY_WIRING_PIN28 = 38,
+    RASPBERRY_WIRING_PIN29 = 40
+} RaspberryWiring;
+
+/**
+ * MRAA return codes
+ */
+typedef enum {
+    SUCCESS = 0,                             /**< Expected response */
+    ERROR_FEATURE_NOT_IMPLEMENTED = 1,       /**< Feature TODO */
+    ERROR_FEATURE_NOT_SUPPORTED = 2,         /**< Feature not supported by HW */
+    ERROR_INVALID_VERBOSITY_LEVEL = 3,       /**< Verbosity level wrong */
+    ERROR_INVALID_PARAMETER = 4,             /**< Parameter invalid */
+    ERROR_INVALID_HANDLE = 5,                /**< Handle invalid */
+    ERROR_NO_RESOURCES = 6,                  /**< No resource of that type avail */
+    ERROR_INVALID_RESOURCE = 7,              /**< Resource invalid */
+    ERROR_INVALID_QUEUE_TYPE = 8,            /**< Queue type incorrect */
+    ERROR_NO_DATA_AVAILABLE = 9,             /**< No data available */
+    ERROR_INVALID_PLATFORM = 10,             /**< Platform not recognised */
+    ERROR_PLATFORM_NOT_INITIALISED = 11,     /**< Board information not initialised */
+    ERROR_PLATFORM_ALREADY_INITIALISED = 12, /**< Board is already initialised */
+
+    ERROR_UNSPECIFIED = 99 /**< Unknown Error */
+} Result;
+
+/**
+ * Enum representing different possible modes for a pin.
+ */
+typedef enum {
+    PIN_VALID = 0,     /**< Pin Valid */
+    PIN_GPIO = 1,      /**< General Purpose IO */
+    PIN_PWM = 2,       /**< Pulse Width Modulation */
+    PIN_FAST_GPIO = 3, /**< Faster GPIO */
+    PIN_SPI = 4,       /**< SPI */
+    PIN_I2C = 5,       /**< I2C */
+    PIN_AIO = 6,       /**< Analog in */
+    PIN_UART = 7       /**< UART */
+} Pinmodes;
+
+/**
+ * Enum reprensenting different i2c speeds/modes
+ */
+typedef enum {
+    I2C_STD = 0,  /**< up to 100Khz */
+    I2C_FAST = 1, /**< up to 400Khz */
+    I2C_HIGH = 2  /**< up to 3.4Mhz */
+} I2cMode;
+
+typedef enum {
+    UART_PARITY_NONE = 0,
+    UART_PARITY_EVEN = 1,
+    UART_PARITY_ODD = 2,
+    UART_PARITY_MARK = 3,
+    UART_PARITY_SPACE = 4
+} UartParity;
+
+}

api/mraa/uart.h

@@ -1,6 +1,8 @@
 /*
  * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
- * Copyright (c) 2014 Intel Corporation.
+ * Contributions: Jon Trulson <jtrulson@ics.com>
+ *                Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014 - 2015 Intel Corporation
  *
  * Permission is hereby granted, free of charge, to any person obtaining
  * a copy of this software and associated documentation files (the
@@ -32,7 +34,7 @@
  * libmraa. It allows the exposure of UART pins on supported boards.
  * With functionality to expand at a later date.
  *
- * @snippet uart_setup.c Interesting
+ * @snippet uart.c Interesting
  */
 
 #ifdef __cplusplus
@@ -40,7 +42,6 @@ extern "C" {
 #endif
 
 #include <stdio.h>
-#include <fcntl.h>
 
 #include "common.h"
 
@@ -54,6 +55,115 @@ typedef struct _uart* mraa_uart_context;
  */
 mraa_uart_context mraa_uart_init(int uart);
 
+/**
+ * Initialise a raw uart_context. No board setup.
+ *
+ * @param path for example "/dev/ttyS0"
+ * @return uart context or NULL
+ */
+mraa_uart_context mraa_uart_init_raw(const char* path);
+
+/**
+ * Flush the outbound data.
+ * Blocks until complete.
+ *
+ * @param dev The UART context
+ * @return Result of operation
+ */
+mraa_result_t mraa_uart_flush(mraa_uart_context dev);
+
+/**
+ * Set the baudrate.
+ * Takes an int and will attempt to decide what baudrate  is
+ * to be used on the UART hardware.
+ *
+ * @param dev The UART context
+ * @param baud unsigned int of baudrate i.e. 9600
+ * @return Result of operation
+ */
+mraa_result_t mraa_uart_set_baudrate(mraa_uart_context dev, unsigned int baud);
+
+/**
+ * Set the transfer mode
+ * For example setting the mode to 8N1 would be
+ * "mraa_uart_set_mode(dev, 8,MRAA_UART_PARITY_NONE , 1)"
+ *
+ * @param dev The UART context
+ * @param bytesize data bits
+ * @param parity Parity bit setting
+ * @param stopbits stop bits
+ * @return Result of operation
+ */
+mraa_result_t mraa_uart_set_mode(mraa_uart_context dev, int bytesize, mraa_uart_parity_t parity, int stopbits);
+
+/**
+ * Set the flowcontrol
+ *
+ * @param dev The UART context
+ * @param xonxoff XON/XOFF Software flow control.
+ * @param rtscts RTS/CTS out of band hardware flow control
+ * @return Result of operation
+ */
+mraa_result_t mraa_uart_set_flowcontrol(mraa_uart_context dev, mraa_boolean_t xonxoff, mraa_boolean_t rtscts);
+
+/**
+ * Set the timeout for read and write operations
+ * <= 0 will disable that timeout
+ *
+ * @param dev The UART context
+ * @param read read timeout
+ * @param write write timeout
+ * @param interchar inbetween char timeout
+ * @return Result of operation
+ */
+mraa_result_t mraa_uart_set_timeout(mraa_uart_context dev, int read, int write, int interchar);
+
+/**
+ * Get Char pointer with tty device path within Linux
+ * For example. Could point to "/dev/ttyS0"
+ *
+ * @param dev uart context
+ * @return char pointer of device path
+ */
+const char* mraa_uart_get_dev_path(mraa_uart_context dev);
+
+/**
+ * Destroy a mraa_uart_context
+ *
+ * @param dev uart context
+ * @return mraa_result_t
+ */
+mraa_result_t mraa_uart_stop(mraa_uart_context dev);
+
+/**
+ * Read bytes from the device into a buffer
+ *
+ * @param dev uart context
+ * @param buf buffer pointer
+ * @param length maximum size of buffer
+ * @return the number of bytes read, or -1 if an error occurred
+ */
+int mraa_uart_read(mraa_uart_context dev, char* buf, size_t length);
+
+/**
+ * Write bytes in buffer to a device
+ *
+ * @param dev uart context
+ * @param buf buffer pointer
+ * @param length maximum size of buffer
+ * @return the number of bytes written, or -1 if an error occurred
+ */
+int mraa_uart_write(mraa_uart_context dev, const char* buf, size_t length);
+
+/**
+ * Check to see if data is available on the device for reading
+ *
+ * @param dev uart context
+ * @param millis number of milliseconds to wait, or 0 to return immediately
+ * @return 1 if there is data available to read, 0 otherwise
+ */
+mraa_boolean_t mraa_uart_data_available(mraa_uart_context dev, unsigned int millis);
+
 #ifdef __cplusplus
 }
 #endif

api/mraa/uart.hpp

@@ -1,6 +1,8 @@
 /*
  * Author: Brendan Le Foll <brendan.le.foll@intel.com>
- * Copyright (c) 2014 Intel Corporation.
+ * Contributions: Jon Trulson <jtrulson@ics.com>
+ * Contributions: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 - 2015 Intel Corporation.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
  * a copy of this software and associated documentation files (the
@@ -25,33 +27,215 @@
 #pragma once
 
 #include "uart.h"
+#include "types.hpp"
+#include <stdexcept>
+#include <cstring>
 
-namespace mraa {
+namespace mraa
+{
 
 /**
  * @brief API to UART (enabling only)
  *
  * This file defines the UART interface for libmraa
+ *
+ * @snippet Uart-example.cpp Interesting
  */
-class Uart {
-    public:
-        /**
-         * Uart Constructor, takes a pin number which will map directly to the
-         * linux uart number, this 'enables' the uart, nothing more
-         *
-         * @param uart the index of the uart set to use
-         */
-        Uart(int uart) {
-            m_uart = mraa_uart_init(uart);
-        }
-        /**
-         * Uart destructor
-         */
-        ~Uart() {
-            return;
-        }
-    private:
-        mraa_uart_context m_uart;
-};
+class Uart
+{
+  public:
+    /**
+     * Uart Constructor, takes a pin number which will map directly to the
+     * linux uart number, this 'enables' the uart, nothing more
+     *
+     * @param uart the index of the uart set to use
+     */
+    Uart(int uart)
+    {
+        m_uart = mraa_uart_init(uart);
 
+        if (m_uart == NULL) {
+            throw std::invalid_argument("Error initialising UART");
+        }
+    }
+
+    /**
+     * Uart Constructor, takes a string to the path of the serial
+     * interface that is needed.
+     *
+     * @param uart the index of the uart set to use
+     */
+    Uart(std::string path)
+    {
+        m_uart = mraa_uart_init_raw(path.c_str());
+
+        if (m_uart == NULL) {
+            throw std::invalid_argument("Error initialising UART");
+        }
+    }
+
+    /**
+     * Uart destructor
+     */
+    ~Uart()
+    {
+        mraa_uart_stop(m_uart);
+    }
+
+    /**
+     * Get string with tty device path within Linux
+     * For example. Could point to "/dev/ttyS0"
+     *
+     * @return char pointer of device path
+     */
+    std::string
+    getDevicePath()
+    {
+        std::string ret_val(mraa_uart_get_dev_path(m_uart));
+        return ret_val;
+    }
+
+    /**
+     * Read bytes from the device into char* buffer
+     *
+     * @param data buffer pointer
+     * @param length maximum size of buffer
+     * @return numbers of bytes read
+     */
+    int
+    read(char* data, int length)
+    {
+        return mraa_uart_read(m_uart, data, (size_t) length);
+    }
+
+    /**
+     * Write bytes in String object to a device
+     *
+     * @param data buffer pointer
+     * @param length maximum size of buffer
+     * @return the number of bytes written, or -1 if an error occurred
+     */
+    int
+    write(const char* data, int length)
+    {
+        return mraa_uart_write(m_uart, data, (size_t) length);
+    }
+
+    /**
+     * Read bytes from the device into a String object
+     *
+     * @param length to read
+     * @return string of data
+     */
+    std::string
+    readStr(int length)
+    {
+        char* data = (char*) malloc(sizeof(char) * length);
+        int v = mraa_uart_read(m_uart, data, (size_t) length);
+        std::string ret(data, v);
+        free(data);
+        return ret;
+    }
+
+    /**
+     * Write bytes in String object to a device
+     *
+     * @param string to write
+     * @return the number of bytes written, or -1 if an error occurred
+     */
+    int
+    writeStr(std::string data)
+    {
+        // this is data.length() not +1 because we want to avoid the '\0' char
+        return mraa_uart_write(m_uart, data.c_str(), (data.length()));
+    }
+
+    /**
+     * Check to see if data is available on the device for reading
+     *
+     * @param millis number of milliseconds to wait, or 0 to return immediately
+     * @return true if there is data available to read, false otherwise
+     */
+    bool
+    dataAvailable(unsigned int millis = 0)
+    {
+        if (mraa_uart_data_available(m_uart, millis))
+            return true;
+        else
+            return false;
+    }
+
+    /**
+     * Flush the outbound data.
+     * Blocks until complete.
+     *
+     * @return Result of operation
+     */
+    Result
+    flush()
+    {
+        return (Result) mraa_uart_flush(m_uart);
+    }
+
+    /**
+     * Set the baudrate.
+     * Takes an int and will attempt to decide what baudrate  is
+     * to be used on the UART hardware.
+     *
+     * @param baud unsigned int of baudrate i.e. 9600
+     * @return Result of operation
+     */
+    Result
+    setBaudRate(unsigned int baud)
+    {
+        return (Result) mraa_uart_set_baudrate(m_uart, baud);
+    }
+
+    /**
+     * Set the transfer mode
+     * For example setting the mode to 8N1 would be
+     * "dev.setMode(8,UART_PARITY_NONE , 1)"
+     *
+     * @param bytesize data bits
+     * @param parity Parity bit setting
+     * @param stopbits stop bits
+     * @return Result of operation
+     */
+    Result
+    setMode(int bytesize, UartParity parity, int stopbits)
+    {
+        return (Result) mraa_uart_set_mode(m_uart, bytesize, (mraa_uart_parity_t) parity, stopbits);
+    }
+
+    /**
+     * Set the flowcontrol
+     *
+     * @param xonxoff XON/XOFF Software flow control.
+     * @param rtscts RTS/CTS out of band hardware flow control
+     * @return Result of operation
+     */
+    Result
+    setFlowcontrol(bool xonxoff, bool rtscts)
+    {
+        return (Result) mraa_uart_set_flowcontrol(m_uart, xonxoff, rtscts);
+    }
+
+    /**
+     * Set the timeout for read and write operations
+     * <= 0 will disable that timeout
+     *
+     * @param read read timeout
+     * @param write write timeout
+     * @param interchar inbetween char timeout
+     * @return Result of operation
+     */
+    Result
+    setTimeout(int read, int write, int interchar)
+    {
+        return (Result) mraa_uart_set_timeout(m_uart, read, write, interchar);
+    }
+
+  private:
+    mraa_uart_context m_uart;
+};
 }

cmake/Toolchains/oe-sdk_cross.cmake

@@ -0,0 +1,25 @@
+# this toolchain file comes from gnuradio project
+
+set( CMAKE_SYSTEM_NAME Linux )
+#set( CMAKE_C_COMPILER  $ENV{CC} )
+#set( CMAKE_CXX_COMPILER  $ENV{CXX} )
+string(REGEX MATCH "sysroots/([a-zA-Z0-9]+)" CMAKE_SYSTEM_PROCESSOR $ENV{SDKTARGETSYSROOT})
+string(REGEX REPLACE "sysroots/" "" CMAKE_SYSTEM_PROCESSOR ${CMAKE_SYSTEM_PROCESSOR})
+set( CMAKE_CXX_FLAGS $ENV{CXXFLAGS}  CACHE STRING "" FORCE )
+set( CMAKE_C_FLAGS $ENV{CFLAGS} CACHE STRING "" FORCE ) #same flags for C sources
+set( CMAKE_LDFLAGS_FLAGS ${CMAKE_CXX_FLAGS} CACHE STRING "" FORCE ) #same flags for C sources
+set( CMAKE_LIBRARY_PATH ${OECORE_TARGET_SYSROOT}/usr/lib )
+set( CMAKE_FIND_ROOT_PATH $ENV{OECORE_TARGET_SYSROOT} $ENV{OECORE_NATIVE_SYSROOT} )
+set( CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER )
+set( CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY )
+set( CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY )
+set( CMAKE_INSTALL_PREFIX $ENV{OECORE_TARGET_SYSROOT}/usr CACHE STRING "" FORCE)
+set( ORC_INCLUDE_DIRS $ENV{OECORE_TARGET_SYSROOT}/usr/include/orc-0.4 )
+set( ORC_LIBRARY_DIRS $ENV{OECORE_TARGET_SYSROOT}/usr/lib )
+
+# for java
+set( JAVA_AWT_INCLUDE_PATH $ENV{JAVA_HOME}/include CACHE PATH "" FORCE)
+set( JAVA_AWT_LIBRARY $ENV{JAVA_HOME}/jre/lib/amd64/libjawt.so CACHE FILEPATH "" FORCE)
+set( JAVA_INCLUDE_PATH $ENV{JAVA_HOME}/include CACHE PATH "" FORCE)
+set( JAVA_INCLUDE_PATH2 $ENV{JAVA_HOME}/include/linux CACHE PATH "" FORCE)
+set( JAVA_JVM_LIBRARY $ENV{JAVA_HOME}/jre/lib/amd64/libjvm.so CACHE FILEPATH "" FORCE)

cmake/modules/COPYING-CMAKE-SCRIPTS

@@ -0,0 +1,22 @@
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+1. Redistributions of source code must retain the copyright
+   notice, this list of conditions and the following disclaimer.
+2. Redistributions in binary form must reproduce the copyright
+   notice, this list of conditions and the following disclaimer in the
+   documentation and/or other materials provided with the distribution.
+3. The name of the author may not be used to endorse or promote products
+   derived from this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

cmake/modules/Copyright.txt

@@ -0,0 +1,57 @@
+CMake - Cross Platform Makefile Generator
+Copyright 2000-2015 Kitware, Inc.
+Copyright 2000-2011 Insight Software Consortium
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+* Redistributions of source code must retain the above copyright
+  notice, this list of conditions and the following disclaimer.
+
+* Redistributions in binary form must reproduce the above copyright
+  notice, this list of conditions and the following disclaimer in the
+  documentation and/or other materials provided with the distribution.
+
+* Neither the names of Kitware, Inc., the Insight Software Consortium,
+  nor the names of their contributors may be used to endorse or promote
+  products derived from this software without specific prior written
+  permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+------------------------------------------------------------------------------
+
+The above copyright and license notice applies to distributions of
+CMake in source and binary form.  Some source files contain additional
+notices of original copyright by their contributors; see each source
+for details.  Third-party software packages supplied with CMake under
+compatible licenses provide their own copyright notices documented in
+corresponding subdirectories.
+
+------------------------------------------------------------------------------
+
+CMake was initially developed by Kitware with the following sponsorship:
+
+ * National Library of Medicine at the National Institutes of Health
+   as part of the Insight Segmentation and Registration Toolkit (ITK).
+
+ * US National Labs (Los Alamos, Livermore, Sandia) ASC Parallel
+   Visualization Initiative.
+
+ * National Alliance for Medical Image Computing (NAMIC) is funded by the
+   National Institutes of Health through the NIH Roadmap for Medical Research,
+   Grant U54 EB005149.
+
+ * Kitware, Inc.

cmake/modules/FindFtd2xx.cmake

@@ -0,0 +1,73 @@
+# - Try to find libftd2xx
+# Once done this will define
+#
+#  LIBFTD2XX_FOUND - system has libftd2xx
+#  LIBFTD2XX_INCLUDE_DIRS - the libftd2xx include directory
+#  LIBFTD2XX_LIBRARIES - Link these to use libftd2xx
+#  LIBFTD2XX_DEFINITIONS - Compiler switches required for using libftd2xx
+#
+#  Adapted from cmake-modules Google Code project
+#
+#  Copyright (c) 2006 Andreas Schneider <mail@cynapses.org>
+#
+#  (Changes for libftd2xx) Copyright (c) 2008 Kyle Machulis <kyle@nonpolynomial.com>
+#
+# Redistribution and use is allowed according to the terms of the New BSD license.
+# For details see the accompanying COPYING-CMAKE-SCRIPTS file.
+
+if (LIBFTD2XX_LIBRARIES AND LIBFTD2XX_INCLUDE_DIRS)
+  # in cache already
+  set(LIBFTD2XX_FOUND TRUE)
+else (LIBFTD2XX_LIBRARIES AND LIBFTD2XX_INCLUDE_DIRS)
+  find_path(LIBFTD2XX_INCLUDE_DIR
+    NAMES
+    ftd2xx.h
+    PATHS
+    /usr/include
+    /usr/local/include
+    /opt/local/include
+    /sw/include
+	)
+
+  SET(FTD2XX_LIBNAME ftd2xx)
+  IF(WIN32)
+	SET(FTD2XX_LIBNAME ftd2xx.lib)
+  ENDIF(WIN32)
+
+  find_library(LIBFTD2XX_LIBRARY
+    NAMES
+    ${FTD2XX_LIBNAME}
+    PATHS
+    /usr/lib
+    /usr/local/lib
+    /opt/local/lib
+    /sw/lib
+	)
+
+  if(LIBFTD2XX_INCLUDE_DIR)
+	set(LIBFTD2XX_INCLUDE_DIRS
+      ${LIBFTD2XX_INCLUDE_DIR}
+	  )
+  endif(LIBFTD2XX_INCLUDE_DIR)
+  set(LIBFTD2XX_LIBRARIES
+    ${LIBFTD2XX_LIBRARY}
+	)
+
+  if (LIBFTD2XX_INCLUDE_DIRS AND LIBFTD2XX_LIBRARIES)
+    set(LIBFTD2XX_FOUND TRUE)
+  endif (LIBFTD2XX_INCLUDE_DIRS AND LIBFTD2XX_LIBRARIES)
+
+  if (LIBFTD2XX_FOUND)
+    if (NOT libftd2xx_FIND_QUIETLY)
+	  message(STATUS "Found libftd2xx: ${LIBFTD2XX_LIBRARIES}")
+    endif (NOT libftd2xx_FIND_QUIETLY)
+  else (LIBFTD2XX_FOUND)
+    if (libftd2xx_FIND_REQUIRED)
+	  message(FATAL_ERROR "Could not find libftd2xx")
+    endif (libftd2xx_FIND_REQUIRED)
+  endif (LIBFTD2XX_FOUND)
+
+  # show the LIBFTD2XX_INCLUDE_DIRS and LIBFTD2XX_LIBRARIES variables only in the advanced view
+  mark_as_advanced(LIBFTD2XX_INCLUDE_DIRS LIBFTD2XX_LIBRARIES)
+
+endif (LIBFTD2XX_LIBRARIES AND LIBFTD2XX_INCLUDE_DIRS)

cmake/modules/FindFtd4222.cmake

@@ -0,0 +1,75 @@
+# - Try to find LIBFT4222
+# Once done this will define
+#
+#  LIBFT4222_FOUND - system has LIBFT4222
+#  LIBFT4222_INCLUDE_DIRS - the LIBFT4222 include directory
+#  LIBFT4222_LIBRARIES - Link these to use LIBFT4222
+#  LIBFT4222_DEFINITIONS - Compiler switches required for using LIBFT4222
+#
+#  Adapted from cmake-modules Google Code project
+#
+#  Copyright (c) 2006 Andreas Schneider <mail@cynapses.org>
+#
+#  (Changes for LIBFTD2XX) Copyright (c) 2008 Kyle Machulis <kyle@nonpolynomial.com>
+#  (Changes for LIBFT4222) Henry Bruce <henry.bruce@intel.com> Copyright (c) 2015 Intel Corporation. 
+#
+# Redistribution and use is allowed according to the terms of the New BSD license.
+# For details see the accompanying COPYING-CMAKE-SCRIPTS file.
+
+if (LIBFT4222_LIBRARIES AND LIBFT4222_INCLUDE_DIRS)
+  # in cache already
+  set(LIBFT4222_FOUND TRUE)
+else (LIBFT4222_LIBRARIES AND LIBFT4222_INCLUDE_DIRS)
+  find_path(LIBFT4222_INCLUDE_DIR
+    NAMES
+    libft4222.h
+    PATHS
+    /usr/include
+    /usr/local/include
+    /opt/local/include
+    /sw/include
+	)
+
+  SET(FTD4222_LIBNAME ft4222)
+  IF(WIN32)
+	SET(FTD4222_LIBNAME LibFT4222.lib)
+  ENDIF(WIN32)
+
+  find_library(LIBFT4222_LIBRARY
+    NAMES
+    ${FTD4222_LIBNAME}
+    PATHS
+    /usr/lib
+    /usr/local/lib
+    /opt/local/lib
+    /sw/lib
+	)
+
+  if(LIBFT4222_INCLUDE_DIR)
+	set(LIBFT4222_INCLUDE_DIRS
+      ${LIBFT4222_INCLUDE_DIR}
+	  )
+  endif(LIBFT4222_INCLUDE_DIR)
+  set(LIBFT4222_LIBRARIES
+    ${LIBFT4222_LIBRARY}
+	)
+
+  if (LIBFT4222_INCLUDE_DIRS AND LIBFT4222_LIBRARIES)
+    set(LIBFT4222_FOUND TRUE)
+  endif (LIBFT4222_INCLUDE_DIRS AND LIBFT4222_LIBRARIES)
+
+  if (LIBFT4222_FOUND)
+    if (NOT LIBFT4222_FIND_QUIETLY)
+	  message(STATUS "Found LIBFT4222: ${LIBFT4222_LIBRARIES}")
+    endif (NOT LIBFT4222_FIND_QUIETLY)
+  else (LIBFT4222_FOUND)
+    if (LIBFT4222_FIND_REQUIRED)
+	  message(FATAL_ERROR "Could not find LIBFT4222")
+    endif (LIBFT4222_FIND_REQUIRED)
+  endif (LIBFT4222_FOUND)
+
+  # show the LIBFT4222_INCLUDE_DIRS and LIBFT4222_LIBRARIES variables only in the advanced view
+  mark_as_advanced(LIBFT4222_INCLUDE_DIRS LIBFT4222_LIBRARIES)
+
+endif (LIBFT4222_LIBRARIES AND LIBFT4222_INCLUDE_DIRS)
+

cmake/modules/FindNodejs.cmake

@@ -0,0 +1,59 @@
+find_program (NODE_EXECUTABLE NAMES node nodejs
+    HINTS
+    $ENV{NODE_DIR}
+    PATH_SUFFIXES bin
+    DOC "Node.js interpreter"
+)
+
+include (FindPackageHandleStandardArgs)
+
+find_path (NODE_ROOT_DIR "node/node.h" "src/node.h"
+  PATHS /usr/include/nodejs /usr/local/include/nodejs /usr/local/include)
+
+set (NODE_INCLUDE_DIRS
+  ${NODE_ROOT_DIR}/src
+  ${NODE_ROOT_DIR}/node
+  ${NODE_ROOT_DIR}/deps/v8/include
+  ${NODE_ROOT_DIR}/deps/uv/include
+)
+
+find_package_handle_standard_args (Node DEFAULT_MSG
+    NODE_EXECUTABLE
+    NODE_INCLUDE_DIRS
+)
+
+if (NODE_EXECUTABLE)
+    execute_process(COMMAND ${NODE_EXECUTABLE} --version
+                    OUTPUT_VARIABLE _VERSION
+                    RESULT_VARIABLE _NODE_VERSION_RESULT)
+    execute_process(COMMAND ${NODE_EXECUTABLE} -e "console.log(process.versions.v8)"
+                    OUTPUT_VARIABLE _V8_VERSION
+                    RESULT_VARIABLE _V8_RESULT)
+    if (NOT _NODE_VERSION_RESULT AND NOT _V8_RESULT)
+        string (REPLACE "v" "" NODE_VERSION_STRING "${_VERSION}")
+        string (REPLACE "." ";" _VERSION_LIST "${NODE_VERSION_STRING}")
+        list (GET _VERSION_LIST 0 NODE_VERSION_MAJOR)
+        list (GET _VERSION_LIST 1 NODE_VERSION_MINOR)
+        list (GET _VERSION_LIST 2 NODE_VERSION_PATCH)
+        set (V8_VERSION_STRING ${_V8_VERSION})
+        string (REPLACE "." ";" _V8_VERSION_LIST "${_V8_VERSION}")
+        list (GET _V8_VERSION_LIST 0 V8_VERSION_MAJOR)
+        list (GET _V8_VERSION_LIST 1 V8_VERSION_MINOR)
+        list (GET _V8_VERSION_LIST 2 V8_VERSION_PATCH)
+        # we end up with a nasty newline so strip everything that isn't a number
+        string (REGEX MATCH "^[0-9]*" V8_VERSION_PATCH ${V8_VERSION_PATCH})
+    else ()
+        set (NODE_VERSION_STRING "0.10.30")
+        set (NODE_VERSION_MAJOR "0")
+        set (NODE_VERSION_MINOR "10")
+        set (NODE_VERSION_PATCH "30")
+        set (V8_VERSION_MAJOR "3")
+        set (V8_VERSION_MAJOR "14")
+        set (V8_VERSION_MAJOR "5")
+        set (V8_VERSION_STRING "3.28.72")
+        message ("defaulted to node 0.10.30")
+    endif ()
+    message ("INFO - Node version is " ${NODE_VERSION_STRING} "INFO - Node using v8 " ${V8_VERSION_STRING})
+endif ()
+
+mark_as_advanced (NODE_EXECUTABLE)

cmake/modules/FindYuidoc.cmake

@@ -0,0 +1,21 @@
+find_program (YUIDOC_EXECUTABLE NAMES yuidoc
+  HINTS $ENV{YUIDOC_DIR}
+    PATHS usr usr/local
+  PATH_SUFFIXES bin
+  DOC "Yuidoc documentation generator"
+)
+
+include (FindPackageHandleStandardArgs)
+
+find_package_handle_standard_args (Yuidoc DEFAULT_MSG
+  YUIDOC_EXECUTABLE
+)
+
+# Get Yuidoc version
+if (YUIDOC_EXECUTABLE)
+  execute_process(COMMAND ${YUIDOC_EXECUTABLE} --version
+                  ERROR_VARIABLE YUIDOC_VERSION)
+  message ("INFO - Yuidoc version is " ${YUIDOC_VERSION})
+endif ()
+
+mark_as_advanced (YUIDOC_EXECUTABLE)

cmake/modules/LICENSE.LGPL

@@ -0,0 +1,504 @@
+		  GNU LESSER GENERAL PUBLIC LICENSE
+		       Version 2.1, February 1999
+
+ Copyright (C) 1991, 1999 Free Software Foundation, Inc.
+ 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+[This is the first released version of the Lesser GPL.  It also counts
+ as the successor of the GNU Library Public License, version 2, hence
+ the version number 2.1.]
+
+			    Preamble
+
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+Licenses are intended to guarantee your freedom to share and change
+free software--to make sure the software is free for all its users.
+
+  This license, the Lesser General Public License, applies to some
+specially designated software packages--typically libraries--of the
+Free Software Foundation and other authors who decide to use it.  You
+can use it too, but we suggest you first think carefully about whether
+this license or the ordinary General Public License is the better
+strategy to use in any particular case, based on the explanations below.
+
+  When we speak of free software, we are referring to freedom of use,
+not price.  Our General Public Licenses are designed to make sure that
+you have the freedom to distribute copies of free software (and charge
+for this service if you wish); that you receive source code or can get
+it if you want it; that you can change the software and use pieces of
+it in new free programs; and that you are informed that you can do
+these things.
+
+  To protect your rights, we need to make restrictions that forbid
+distributors to deny you these rights or to ask you to surrender these
+rights.  These restrictions translate to certain responsibilities for
+you if you distribute copies of the library or if you modify it.
+
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+it.  And you must show them these terms so they know their rights.
+
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+library, and (2) we offer you this license, which gives you legal
+permission to copy, distribute and/or modify the library.
+
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+modified by someone else and passed on, the recipients should know
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+introduced by others.
+
+  Finally, software patents pose a constant threat to the existence of
+any free program.  We wish to make sure that a company cannot
+effectively restrict the users of a free program by obtaining a
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+  Most GNU software, including some libraries, is covered by the
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+General Public License, applies to certain designated libraries, and
+is quite different from the ordinary General Public License.  We use
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+libraries into non-free programs.
+
+  When a program is linked with a library, whether statically or using
+a shared library, the combination of the two is legally speaking a
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+General Public License therefore permits such linking only if the
+entire combination fits its criteria of freedom.  The Lesser General
+Public License permits more lax criteria for linking other code with
+the library.
+
+  We call this license the "Lesser" General Public License because it
+does Less to protect the user's freedom than the ordinary General
+Public License.  It also provides other free software developers Less
+of an advantage over competing non-free programs.  These disadvantages
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+
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+
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+
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+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
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+
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+  Ty Coon, President of Vice
+
+That's all there is to it!
+
+

cmake/modules/TargetArch.cmake

@@ -2,6 +2,13 @@
 # https://qt.gitorious.org/qt/qtbase/blobs/master/src/corelib/global/qprocessordetection.h
 # Currently handles arm (v5, v6, v7), x86 (32/64), ia64, and ppc (32/64)
 
+# This file is under the terms of the GNU Lesser General Public License version
+# 2.1 as published by the Free Software Foundation and appearing in the file
+# LICENSE.LGPL included in the packaging of this file. Please review the
+# following information to ensure the GNU Lesser General Public License version
+# 2.1 requirements will be met:
+# http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
+
 # Regarding POWER/PowerPC, just as is noted in the Qt source,
 # "There are many more known variants/revisions that we do not handle/detect."
 

docs/banana_pi.md

@@ -0,0 +1,85 @@
+Banana Pi/Pro    {#bananapi}
+============
+
+The Banana Pi/Pro is a clone of the well known Raspberry Pi. It has advantages
+compared to the 'old' Raspberry Pi A/B/A+/B+ devices as it is based on the
+Allwinner A20 Dual Core Cortex-A7. It also has 1G Ethernet compared to 100M
+Ethernet on the Raspberry.
+
+There is a lot of effort on Mainline Kernel to fully support the Allwinner
+Chips, for example Fedora 22 Arm will come with support for BananaPi/Pro which
+means that you will be able to have HDMI Output and a number of periperal
+modules work out of the box.
+
+Pin-wise the Banana Pi matches the Raspberry Pi, the Banana Pro has a connector
+similar to the Raspberry Pi A+/B+
+
+Revision Support
+----------------
+Banana Pi
+Banana Pro
+
+Interface notes
+---------------
+
+**PWM** Whilst the Banana Pi is meant to have 1 PWM channel this is currently
+not supported.
+
+**SPI** works fine when used with old 3.4 Kernels provided by Lemaker, on
+Mainline Kernel SPI does currently not work
+
+**COM** I have created devicetree patches so that Mainline Kernel supports all
+COM-Interfaces, this is not yet visible in Kernel
+
+Mainline Kernel requires the use of Device-Trees, mraa tries it's best to guess
+which gpio/serial/i2c/spi is connected where but there is currently no support
+to manipulate the Device-Tree settings from within mraa. If a device does not
+work as expected then please check syslog, mraa usually complains with a
+meaningful message when it is unable to initialize the device.
+
+Pin Mapping
+-----------
+
+This pin mapping refers to the Banana Pi but gives an idea
+as to what the values are from mraa. Note that there is an emum to use wiringPi
+style numbers.
+
+| MRAA Number | Physical Pin | Function  |
+|-------------|--------------|-----------|
+| 1           | P1-01        | 3V3 VCC   |
+| 2           | P1-02        | 5V VCC    |
+| 3           | P1-03        | I2C SDA   |
+| 4           | P1-04        | 5V VCC    |
+| 5           | P1-05        | I2C SCL   |
+| 6           | P1-06        | GND       |
+| 7           | P1-07        | GPIO(PI03)|
+| 8           | P1-08        | UART4 TX  |
+| 9           | P1-09        | GND       |
+| 10          | P1-10        | UART4 RX  |
+| 11          | P1-11        | GPIO(PI19)|
+| 12          | P1-12        | GPIO(PH02)|
+| 13          | P1-13        | GPIO(PI18)|
+| 14          | P1-14        | GND       |
+| 15          | P1-15        | GPIO(PI17)|
+| 16          | P1-16        | GPIO(PH20)|
+| 17          | P1-17        | 3V3 VCC   |
+| 18          | P1-18        | GPIO(PH21)|
+| 19          | P1-19        | SPI MOSI  |
+| 20          | P1-20        | GND       |
+| 21          | P1-21        | SPI MISO  |
+| 22          | P1-22        | GPIO(PI16)|
+| 23          | P1-23        | SPI SCL   |
+| 24          | P1-24        | SPI CS0   |
+| 25          | P1-25        | GND       |
+| 26          | P1-26        | SPI CS1   |
+
+There is also a second 8-pin connector on the Banana Pi, the pins are as follows:
+
+| 27          | P1-19        | 5V VCC    |
+| 28          | P1-20        | 3V3 VCC   |
+| 29          | P1-21        | GPIO(PH5) |
+| 30          | P1-22        | GPIO(PI22)|
+| 31          | P1-23        | GPIO(PH03)|
+| 32          | P1-24        | GPIO(PI20)|
+| 33          | P1-25        | GND       |
+| 34          | P1-26        | GND       |

docs/beaglebone.md

@@ -0,0 +1,74 @@
+Beaglebone Black    {#beaglebone}
+================
+
+The Beaglebone Black is a very maker friendly Board with a huge amount of
+available I/O Pins. It consists of an Cortex-A8 single core CPU plus two
+additional microcontroller cores called 'pru' that can be used for realtime
+tasks.
+
+The official Beaglebone Black Image runs Debian on a 3.8.13 Kernel. But there
+are also mainline kernels available, either from Robert C. Nelson or also as
+part of the upcoming Fedora 22 release.
+
+The kernel releases from Robert C. Nelson have usually more complete support as
+not all code is yet commited to mainline kernel, your mileage may vary!
+
+In Kernel 3.8.13 there is a Capemanager included, a mechanism to load
+configuration data for devices and extension boards from userland.
+
+This mechanism does not (yet) exist in Mainline kernels, so for mainline
+kernels you need to either rely on the pre-delivered devicetree's or you will
+need to build your own devicetree to support hardware not available by default.
+
+Revision Support
+----------------
+Beaglebone Black Rev. B
+Beaglebone Black Rev. C
+
+Interface notes
+---------------
+
+**SPI** works fine with 3.8.13 kernels, on Mainline Kernel SPI does currently
+not work. mraa will activate spi on 3.8.13 if it finds out that spi is not yet
+configured
+
+**I2C** works both on 3.8.13 and mainline. i2c is activated if missing for
+3.8.13 kernels
+
+Mainline Kernel requires the use of Device-Trees, mraa tries it's best to guess
+which gpio/serial/i2c/spi is connected where but there is currently no support
+to manipulate the Device-Tree settings from within mraa.  If a device does not
+work as expected then please check syslog, mraa usually complains with a
+meaningful message when it is unable to initialize the device.
+
+It will also tell you which overlay for SPI/COM/I2C/PWM it tries to load, on
+some older Debian distributions (or heaven forbid, on Angström) you may need to
+install thoses overlays to /lib/firmware
+
+Capes and further documentation
+-------------------------------
+
+Correctly configuring i2c/spi/serial can get a little challenging as some pins
+have double functionality or are not available at all because hdmi is enabled.
+When something does not work as expected make sure to first check the syslog,
+then check the Beaglebone documentation. Some pointers for good descriptions
+are:
+
+http://elinux.org/BeagleBone_Black_Enable_SPIDEV
+http://elinux.org/Interfacing_with_I2C_Devices
+
+When working with mainline kernels take every hit you have on google with a
+grain of salt, a lot of documentation is based on 3.8 and older kernels. Using
+mainline kernels can be very rewarding, but at least at time of writing also
+can have some nasty
+pitfalls.
+
+Pin Mapping
+-----------
+
+mraa will take into account if you have hdmi cape or mmc enabled and will show
+you the gpio's available for your given configuration.
+
+To see the pin mapping use the command:
+
+$ sudo mraa-gpio list

docs/building.md

@@ -2,12 +2,25 @@ Building libmraa                         {#building}
 ===============
 
 libmraa uses cmake in order to make compilation relatively painless. Cmake runs
-build out of tree so the recommended way is to clone from git and make a build/ directory.
+build out of tree so the recommended way is to clone from git and make a build/
+directory inside the clone directory.
 
-You'll need swig version 3.0.1+, currently I'm using
-8d226e39dc7a958013ff9ffd15e231ef206ba265 from the swig master branch. This is
-only required for javascript support and can be disabled with a cmake define
-(see below).
+## Build dependencies
+Not all these are required but if you're unsure of what you're doing this is
+what you'll need:
+* [SWIG](http://swig.org) 3.0.5+
+* [git](http://git-scm.com)
+* [python](http://python.org) 2.7 or 3.4+ (you'll need not just the interpreter but python-dev)
+* [node.js](http://nodejs.org) 0.10.x or 0.12.x (you'll need not just the interpreter but nodejs-dev)
+* [CMake](http://cmake.org) 2.8.8+
+
+To build the documentation you'll also need:
+* [Doxygen](http://www.stack.nl/~dimitri/doxygen/) 1.8.9.1+
+* [Graphviz](http://graphviz.org/) 2+ (For doxygen graph generation)
+* [Sphinx](http://sphinx-doc.org/) 1.1.3+ (For Python docs)
+
+
+## Basic build steps
 
 ~~~~~~~~~~~~~{.sh}
 mkdir build
@@ -16,19 +29,122 @@ cmake ..
 make
 ~~~~~~~~~~~~~
 
-Our cmake configure has a number of options, `cmake -i` will ask you all sorts
-of interesting questions, you can disable swig modules, build documentation
-etc...
+If this goes wrong and you have all the dependencies installed, then please
+file an issue with the full output of `cmake ..` and `make` or however far you
+got.
 
-Few recommended options:
-Changing install path from /usr/local to /usr
--DCMAKE_INSTALL_PREFIX:PATH=/usr
+## Configuration flags
 
-Building debug build:
--DCMAKE_BUILD_TYPE=DEBUG
+Our cmake configure has a number of options, cmake-gui or ccmake (cmake -i is
+no longer with us :() can show you all the options. A few of the more common
+ones are listed below. Note that when the option starts with CMAKE_ it's an
+option that is made available by cmake and will be similar in all cmake
+projects. You need to add them after `cmake` but before `..`.
+
+A few recommended options:
+Changing install path from /usr/local to /usr:
+ -DCMAKE_INSTALL_PREFIX:PATH=/usr
+
+Building debug build - adds -g and disables optimisations - this will force a
+full rebuild:
+ -DCMAKE_BUILD_TYPE=DEBUG
 
 Using clang instead of gcc:
- -DCMAKE_C_COMPILER=/usr/bin/clang -DCMAKE_CXX_COMPILER=/usr/bin/clang
+ -DCMAKE_C_COMPILER=/usr/bin/clang -DCMAKE_CXX_COMPILER=/usr/bin/clang++
 
-Building with an older version of swig (swig 2.0+) requires the disabling of javascript:
+Building with an older version of SWIG (< 3.0.2) requires the disabling of javascript:
  -DBUILDSWIGNODE=OFF
+
+Disabling python module building:
+ -DBUILDSWIGPYTHON=OFF
+
+Building doc, this will require [SPHINX](http://sphinx-doc.org) &
+[Doxygen](http://doxygen.org):
+ -DBUILDDOC=ON
+
+Building with python3 (careful you need to clear cmake cache between python
+version switches!)
+ -DBUILDPYTHON3=ON
+
+Override build architecture (this is useful because on x86 arm code is not
+compiled so use this flag to force the target arch)
+ -DBUILDARCH=arm
+
+## Dependencies continued
+
+You'll need at least SWIG version 3.0.2 and we recommend 3.0.5 to build the
+javascript & python modules. If your version of SWIG is older than this then
+please see above for disabling SWIGNODE. Otherwise you will get a weird build
+failure when building the javascript module. The python module builds with SWIG
+2.x.
+
+During the build, we'll assume you're building from git, note that if you
+compile with git installed your version of mraa will be tagged -dirty. This
+simply means git wasn't installed or that you where building form a tarball.
+You can modify build/src/version.c before running make if this is incorrect.
+The instructions listed here all assume that build/ is an empty dir that lives
+inside the cloned repository of mraa.
+
+If you have multiple versions of python then mraa can get confused, we
+recommend using virtualenv to select which version of python you want. We test
+2.7 the most but SWIG will generate valid 3.x python code but we do not
+generally support building both at once.
+
+## Using a yocto/oe toolchain
+
+In order to compile with a yocto/oe toolchain use the following toolchain file.
+This works well on the edison 1.6 SDK. First source the environment file, then
+use our cmake toolchain file.
+
+~~~~~~~~~~~~~{.sh}
+source /opt/poky-edison/1.6/environment-setup-core2-32-poky-linux
+mkdir build
+cmake -DCMAKE_TOOLCHAIN_FILE=../cmake/Toolchains/oe-sdk_cross.cmake ..
+make
+~~~~~~~~~~~~~
+
+## Using coverity
+
+Static analysis is routinely performed using coverity on libmraa's codebase.
+This is the procedure to submit a build to coverity. You'll need to install
+coverity-submit for your OS.
+
+~~~~~~~~~~~~~{.sh}
+mkdir covbuild/ && cd covbuild
+cmake -DBUILDDOC=OFF -DBUILDSWIG=OFF ..
+cov-build --dir cov-int make
+tar caf mraa.tar.bz2 cov-int
+~~~~~~~~~~~~~
+
+## Building Java bindings
+Have JAVA_HOME set to JDK install directory. Most distributions set this from /etc/profile.d/ and have a way of switching between alternatives. We support both OpenJDK and Oracle's JDK. On Arch Linux with openjdk8 you'll have to set this yourself like this:
+~~~~~~~~~~~~~{.sh}
+export JAVA_HOME=/usr/lib/jvm/default/
+~~~~~~~~~~~~~
+Then use the cmake configuration flag:
+ -DBUILDSWIGJAVA=ON
+To compile Example.java
+~~~~~~~~~~~~~{.sh}
+javac -cp $DIR_WHERE_YOU_INSTALLED_MRAA/mraa.jar:. Example.java
+~~~~~~~~~~~~~
+To run, make sure libmraajava.so is in LD_LIBRARY_PATH
+ ~~~~~~~~~~~~~{.sh}
+jave -cp $DIR_WHERE_YOU_INSTALLED_MRAA/mraa.jar:. Example
+~~~~~~~~~~~~~
+
+## Building an IPK/RPM package using cpack
+
+You can get cpack to generate an IPK or RPM package fairly easily if you have
+the correct packaging tools
+
+~~~~~~~~~~~~~{.sh}
+cmake -DIPK=ON -DCMAKE_INSTAL_PREFIX=/usr ..
+make package
+~~~~~~~~~~~~~
+
+To use RPM simply enable the RPM option. You'll need rpmbuild installed on your
+build machine.
+
+~~~~~~~~~~~~~{.sh}
+cmake -DRPM=ON -DCMAKE_INSTAL_PREFIX=/usr ..
+~~~~~~~~~~~~~

docs/contributing.md

@@ -4,14 +4,86 @@ Contributing to libmraa                           {#contributing}
 libmraa is an opensource project and we are actively looking for people to help
 with:
 
-- Writing platform supports for all types of embedded boards running linux
-- People to write cool samples
-- People to extend the functionality
+- Writing platform supports for all types of boards running linux
+- People to extend the functionality, API with useful functions
+- Anything we haven't thought about :) Ideas always welcome!
 
 The recommended method to contribute is to fork on github, and then send pull
-requests to the main project. Questions can be also be asked and issues raised
-on github.
+requests to the main project. You can open issues if you find any bugs/have
+questions.
 
 If you'd rather not use github you are more than welcome to send git formatted
 patches to brendan.le.foll@intel.com.
 
+Basic rules
+-----------
+- Your code must build
+- Commits must have a sign-off line by at least yourself
+- Commits must be named <file/module>: Some decent description
+- Try not to break master. In any commit.
+- Try to split commits up logically, you will be asked to rebase them if they
+  are not.
+- Try to stick to the established coding style regardless of your personal
+  feeling for it! Use clang-format (3.6+ required)
+
+Coding Style
+------------
+
+Coding style for all code is defined by clang-format, have a look at it. Avoid
+styling fixes as they make history difficult to read. Javascript & Java can
+also be parsed through the clang-format, it complains but seems to do an ok
+job. Few exceptions to coding styles:
+- All python code is indented by 2 spaces
+- CmakeLists files are 2 space indented and a space is required before all
+  brackets so endif () and if () and command (). Also use lowercase for
+  everything but variables. Cmake is case insensitive but this isn't the wild
+  wild west ;-)
+
+Use common sense and don't be afraid to challenge something if it doesn't make sense!
+
+Code signing
+------------
+
+The sign-off is a simple line at the end of the explanation for the
+patch, which certifies that you wrote it or otherwise have the right to pass it
+on as an open-source patch.  The rules are pretty simple: if you can certify
+the below:
+
+        Developer's Certificate of Origin 1.1
+
+        By making a contribution to this project, I certify that:
+
+        (a) The contribution was created in whole or in part by me and I
+            have the right to submit it under the open source license
+            indicated in the file; or
+
+        (b) The contribution is based upon previous work that, to the best
+            of my knowledge, is covered under an appropriate open source
+            license and I have the right under that license to submit that
+            work with modifications, whether created in whole or in part
+            by me, under the same open source license (unless I am
+            permitted to submit under a different license), as indicated
+            in the file; or
+
+        (c) The contribution was provided directly to me by some other
+            person who certified (a), (b) or (c) and I have not modified
+            it.
+
+        (d) I understand and agree that this project and the contribution
+            are public and that a record of the contribution (including all
+            personal information I submit with it, including my sign-off) is
+            maintained indefinitely and may be redistributed consistent with
+            this project or the open source license(s) involved.
+
+then you just add a line saying
+
+	Signed-off-by: Random J Developer <random@developer.example.org>
+
+Using your real name (sorry, no pseudonyms or anonymous contributions.)
+
+Where to find us
+----------------
+
+Hop onto the freenode network on IRC and join #mraa. Please be patient as we're
+not always online.
+

docs/debugging.md

@@ -0,0 +1,31 @@
+Debugging libmraa                         {#debugging}
+=================
+
+This page contains a few debugging tip. When filing an issue please go through
+this list as it's the first thing we'll ask you to do.
+
+### Finding your mraa version
+
+Getting the exact version of libmraa you're running is really important to us.
+The best way to get this is to call mraa_get_version() or mraa.getVersion(). If
+mraa returns x.x.x-dirty then your version was not built from a git tree or you
+built out of tree (see our building doc) - or you don't have git installed.
+
+### Finding error logs
+
+mraa logs pretty much everything that goes wrong to syslog. These days it'll go
+to the systemd journal so check with `sudo journalctl -f` whilst running your
+app or check all libmraa messages with `journalctl -t libmraa`.  Grab all the
+messages from the initialisation message right up to your last one. Using a
+pastebin is always a good idea, I like dpaste.com. If your system does not have
+systemd likely your log is in /var/log/messages or a similar location.
+
+### Common errors to check for
+
+* Not running as root
+* Incorrect IO pin numbers, mraa uses physical connector pin numbering see your
+  platform documentation for details
+* Your platform is unsupported
+* Using the wrong pin, check pin capabilities either using the API or your
+  platform documentation
+

docs/edison.md

@@ -1,16 +1,106 @@
 Intel Edison                            {#edison}
 =============
 
-Edison is a dual core Silvermont Atom clocked at 500MHz. The Edison
-also features 4GB of storage, 1GB ram and onboard wifi and bluetooth.
+Intel(R) Edison is a dual-core Silvermont Atom(TM) clocked at 500MHz. The
+Edison also features 4GB of storage, 1GB ram and on-board WiFi and Bluetooth.
 
-Currently the Arduino breakout board is supported by libmraa.
+Currently supported boards:
+- Intel Arduino board
+- Intel breakout board
 
+UART
+----
+On both the Arduino board and the breakout board, The available UART interface is on /dev/ttyMFD1
+
+Intel Arduino board
+-------------------
 The Edison used with the Arduino board has the following limitations
 in libmraa:
 
-- i2c is exposed on i2c-6, therfore you must use bus 6 and not bus 0
-- PWM avaible on default swizzler postions. (3,5,6,9)
+- I2C is exposed on i2c-6, therefore you must use bus 6 and not bus 0
+- PWM available on default swizzler positions. (3,5,6,9)
 - SPI exposed is also used for the ADC. Try not to use your own CS.
-- ADC kernel module will return 12bit number but the ADC itself only has an
-  accuracy of 10bits. This ADC is only included on the arduino board.
+- Max SPI speed is 25Mhz/4 ~6.25Mhz
+- SPI PM can sometimes do weird things you can disable it with:
+  `echo on > /sys/devices/pci0000\:00/0000\:00\:07.1/power/control`
+- ADC kernel module will return 16bit number but the ADC itself only has an
+  accuracy of maximum 12bits and in MRAA it's limited to 10bits by default.
+  Use `mraa_aio_set_bit(12)` to switch to the maximum resolution mode.
+  This ADC is only included on the Arduino board.
+- AIO pins are treated as 0-5 in `mraa_aio_init()` but as 14-19 for everything
+  else. Therefore use `mraa_gpio_init(14)` to use A0 as a GPIO
+- Arduino pin 7 can sometimes negatively impact the WiFi capability, if using
+  WiFi avoid using this pin
+
+Because of the way IO is setup with the tristate on the Arduino breakout board
+IO will be flipped as it is setup. It's recommended to setup IO pins &
+direction before using them in a `setup()` method or similar. It's impossible on
+this platform to avoid some GPIOs flipping on setup.
+
+Intel(R) breakout board
+-----------------------
+
+- Both I2C buses are available 1 & 6
+- IO on the miniboard is 1.8V
+- Requesting GPIO 4 will break your FTDI UART console, so bear in mind when trying to use it
+
+Please see the following table on how the physical pins map to mraa pin numbers
+
+| MRAA Number | Physical Pin | Edison Pin    | Notes                   | Pinmode0 | Pinmode1   | Pinmode2 |
+|-------------|--------------|---------------|-------------------------|----------|------------|----------|
+| 0           | J17-1        | GP182         |                         | GPIO-182 | PWM2       |          |
+| 1           | J17-2        | NC            | Nothing from mraa       |          |            |          |
+| 2           | J17-3        | NC            | Nothing from mraa       |          |            |          |
+| 3           | J17-4        | VIN           | Nothing from mraa       |          |            |          |
+| 4           | J17-5        | GP135         |                         | GPIO-135 | UART       |          |
+| 5           | J17-6        | RCVR_MODE     | Nothing from mraa       |          |            |          |
+| 6           | J17-7        | GP27          |                         | GPIO-27  | I2C-6-SCL  |          |
+| 7           | J17-8        | GP20          |                         | GPIO-20  | I2C-1-SDA  |          |
+| 8           | J17-9        | GP28          |                         | GPIO-28  | I2C-6-SDA  |          |
+| 9           | J17-10       | GP111         |                         | GPIO-111 | SPI-5-CS1  |          |
+| 10          | J17-11       | GP109         |                         | GPIO-109 | SPI-5-SCK  |          |
+| 11          | J17-12       | GP115         |                         | GPIO-115 | SPI-5-MOSI |          |
+| 12          | J17-13       | OSC_CLK_OUT_0 | Nothing from mraa/check |          |            |          |
+| 13          | J17-14       | GP128         |                         | GPIO-128 | UART-1-CTS |          |
+| 14          | J18-1        | GP13          |                         | GPIO-13  | PWM1       |          |
+| 15          | J18-2        | GP165         |                         | GPIO-165 |            |          |
+| 16          | J18-3        | GPI_PWRBTN_N  | Nothing from mraa       |          |            |          |
+| 17          | J18-4        | MSIC_SLP_CLK2 | Nothing from mraa       |          |            |          |
+| 18          | J18-5        | V_VBAT_BKUP   | Nothing from mraa       |          |            |          |
+| 19          | J18-6        | GP19          |                         | GPIO-19  | I2C-1-SCL  |          |
+| 20          | J18-7        | GP12          | PWM0                    | GPIO-12  | PWM0       |          |
+| 21          | J18-8        | GP183         | PWM3                    | GPIO-183 | PWM3       |          |
+| 22          | J18-9        | NC            | Nothing from mraa       |          |            |          |
+| 23          | J18-10       | GP110         |                         | GPIO-110 | SPI-5-CS0  |          |
+| 24          | J18-11       | GP114         |                         | GPIO-114 | SPI-5-MISO |          |
+| 25          | J18-12       | GP129         |                         | GPIO-129 | UART-1-RTS |          |
+| 26          | J18-13       | GP130         |                         | GPIO-130 | UART-1-RX  |          |
+| 27          | J18-14       | FW_RCVR       | Nothing from mraa       |          |            |          |
+| 28          | J19-1        | NC            | Nothing from mraa       |          |            |          |
+| 29          | J19-2        | V_V1P80       | Nothing from mraa       |          |            |          |
+| 30          | J19-3        | GND           | Nothing from mraa       |          |            |          |
+| 31          | J19-4        | GP44          |                         | GPIO-44  |            |          |
+| 32          | J19-5        | GP46          |                         | GPIO-46  |            |          |
+| 33          | J19-6        | GP48          |                         | GPIO-48  |            |          |
+| 34          | J19-7        | RESET_OUT     | Nothing from mraa       |          |            |          |
+| 35          | J19-8        | GP131         |                         | GPIO-131 | UART-1-TX  |          |
+| 36          | J19-9        | GP14          |                         | GPIO-14  |            |          |
+| 37          | J19-10       | GP40          |                         | GPIO-40  | SSP2_CLK   |          |
+| 38          | J19-11       | GP43          |                         | GPIO-43  | SSP2_TXD   |          |
+| 39          | J19-12       | GP77          |                         | GPIO-77  | SD         |          |
+| 40          | J19-13       | GP82          |                         | GPIO-82  | SD         |          |
+| 41          | J19-14       | GP83          |                         | GPIO-83  | SD         |          |
+| 42          | J20-1        | V_VSYS        | Nothing from mraa       |          |            |          |
+| 43          | J20-2        | V_V3P30       | Nothing from mraa       |          |            |          |
+| 44          | J20-3        | GP134         |                         |          |            |          |
+| 45          | J20-4        | GP45          |                         | GPIO-45  |            |          |
+| 46          | J20-5        | GP47          |                         | GPIO-47  |            |          |
+| 47          | J20-6        | GP49          |                         | GPIO-49  |            |          |
+| 48          | J20-7        | GP15          |                         | GPIO-15  |            |          |
+| 49          | J20-8        | GP84          |                         | GPIO-84  | SD         |          |
+| 50          | J20-9        | GP42          |                         | GPIO-42  | SSP2_RXD   |          |
+| 51          | J20-10       | GP41          |                         | GPIO-41  | SSP2_FS    |          |
+| 52          | J20-11       | GP78          |                         | GPIO-78  | SD         |          |
+| 53          | J20-12       | GP79          |                         | GPIO-79  | SD         |          |
+| 54          | J20-13       | GP80          |                         | GPIO-80  | SD         |          |
+| 55          | J20-14       | GP81          |                         | GPIO-81  | SD         |          |

docs/ftdi_ft4222.md

@@ -0,0 +1,23 @@
+FTDI FT4222H                             {#ft4222}
+============
+
+The FT4222H is a High/Full Speed USB2.0-to-Quad SPI/I2C device controller. Mraa
+supports it as a USB subplatform using the libft4222 library from FTDI which
+can be found
+[here](http://www.ftdichip.com/Support/SoftwareExamples/libft4222-1.2.0.240.tgz).
+
+The FT 4222H has 4 configuration modes selected by {DCNF1, DCNF0}.  The c hip
+configuration mode will determine the number of USB interface s for data stream
+s and for GPIOs control. Mraa supports only chip CNFMODE0.
+
+Whilst mraa can support custom board in CNFMODE0 (support for other mode is
+welcome!) there may be some work to be done. We test using FTDI's UNFT4222EV
+reference board. More detail on this board can be found
+[here](http://www.ftdichip.com/Support/Documents/DataSheets/Modules/DS_UMFT4222EV.pdf).
+
+Interface notes
+---------------
+
+You will need to unload all ftdi kernel modules for libft4222 to work
+correctly. You will also have to compile mraa with FT4222 support which may not
+be enabled by default.

docs/galileorevd.md

@@ -1,11 +1,14 @@
 Galileo Gen 1 - Rev D                            {#galileorevd}
 =====================
 
-Galileo is a microcontroller board based on the Intel® Quark SoC X1000
+Galileo is a microcontroller board based on the Intel(R) Quark(TM) SoC X1000
 Application Processor, a 32-bit Intel Pentium-class system on a chip.
 
 The rev D board has the following limitations in libmraa:
 
+- gpio 13 will not switch the LED as it's a different Gpio, use raw gpio '3' to do this
 - gpio register access via /dev/uio is limited to pin2 and 3
 - gpio interupts will only work on GPIO_EDGE_BOTH
 - adc kernel module will return 12bit number. MRAA defaults shift this to 10bits
+- AIO pins are treated as 0-5 in mraa_aio_init() but as 14-19 for everything
+  else. Therefore use mraa_gpio_init(14) to use A0 as a Gpio

docs/galileorevh.md

@@ -1,14 +1,56 @@
 Galileo Gen 2 - Rev H                           {#galileorevh}
 =====================
 
-Galileo is a microcontroller board based on the Intel® Quark SoC X1000
+Galileo is a microcontroller board based on the Intel(R) Quark(TM) SoC X1000
 Application Processor, a 32-bit Intel Pentium-class system on a chip.
 
 The Gen 2 board has the following limitations in libmraa:
 
-- i2c is set at 400Khz speed cannot be changed without reloading kernel module
-- i2c bus is shared with multiple devices, scanning it usually fails
+- i2c is set at 400Khz speed cannot be changed without reloading kernel module,
+  the driver is intel_qrk_gip_i2c and the parameter is i2c_std_mode which must
+  be set to 1 in order to set the i2c bus speed to 100Khz
+- i2c bus is shared with multiple devices in kernel space, scanning it usually
+  fails
 - pwm period is set globally for all pwm channels, when changed this will halt
   all pwm channels
 - adc kernel module will return 12bit number but the ADC itself only has an
   accuracy of 10bits.
+- AIO pins are treated as 0-5 in mraa_aio_init() but as 14-19 for everything
+  else. Therefore use mraa_gpio_init(14) to use A0 as a Gpio
+
+Uart 1 on gen2
+--------------
+
+Uart 1 is connected to the FTDI header and the linux console. It's also
+possible to use it from A2(Rx)/A3(Tx). However mraa does not support this
+directly so you need to enable the muxing manually. Here is an example of how
+this is done, this was tested using an FTDI 3.3V TTL cable:
+
+$ systemctl stop serial-getty@ttyS1.service
+
+$ python
+>>> # Configure the Muxes for Uart1 on Aio2/3
+>>> import mraa as m
+>>> p77 = m.Gpio(77, False, True)
+>>> p76 = m.Gpio(76, False, True)
+>>> p16 = m.Gpio(16, False, True)
+>>> p17 = m.Gpio(17, False, True)
+>>> p77.write(1)
+>>> p76.write(1)
+>>> p16.dir(m.DIR_OUT)
+>>> p16.write(0)
+>>> p17.dir(m.DIR_OUT)
+>>> p17.write(1)
+
+>>> # For Rx to work correctly switch the level shifter
+>>> p34 = m.Gpio(34, False, True)
+>>> p34.dir(m.DIR_OUT)
+>>> p34.write(1)
+
+>>> # Use the uart
+>>> x = m.Uart(1)
+>>> x.setBaudRate(115200)
+>>> x.writeStr('hello')
+>>> x.read(5)
+bytearray(b'dsds\n')
+

docs/index.java.md

@@ -0,0 +1,63 @@
+libmraa - Low Level Skeleton Library for Communication on GNU/Linux platforms
+==============
+
+Libmraa is a C/C++ library with bindings to Java, Python and JavaScript to
+interface with the I/O on Galileo, Edison & other platforms, with a structured
+and sane API where port names/numbering matches the board that you are on. Use
+of libmraa does not tie you to specific hardware with board detection done at
+runtime you can create portable code that will work across the supported
+platforms.
+
+The intent is to make it easier for developers and sensor manufacturers to map
+their sensors & actuators on top of supported hardware and to allow control of
+low level communication protocol by high level languages & constructs.
+
+## API
+
+These interfaces allow you to interact with all libmraa functionality. The
+Java classes directly wrap the C/C++ API and provide a near 1:1 mapping of
+functionality.
+
+<center>
+| C API Modules          | Java API Classes              |
+|:----------------------:|:----------------------------:|
+| @ref gpio.h "gpio"     | @ref mraa::Gpio "Gpio class" |
+| @ref i2c.h "i2c"       | @ref mraa::I2c "I2c class"   |
+| @ref aio.h "aio"       | @ref mraa::Aio "Aio class"   |
+| @ref pwm.h "pwm"       | @ref mraa::Pwm "Pwm class"   |
+| @ref spi.h "spi"       | @ref mraa::Spi "Spi class"   |
+| @ref uart.h "uart"     | @ref mraa::Uart "Uart class" |
+| @ref common.h "common" | @ref mraa::mraa "mraa class" |
+</center>
+
+## Supported platforms
+
+Specific platform information for supported platforms is documented here:
+
+- @ref galileorevd
+- @ref galileorevh
+- @ref edison
+- @ref de3815
+- @ref minnowmax
+- @ref rasppi
+- @ref bananapi
+- @ref beaglebone
+- @ref nuc5
+- @ref ft4222
+
+## DEBUGGING
+
+Sometimes it just doesn't want to work, let us try and help you, you can file
+issues in github or join us in #mraa on freenode IRC, hang around for a little
+while because we're not necessarily on 24/7, but we'll get back to you! Have a
+glance at our @debugging page too
+
+## COMPILING
+
+More information on compiling is @ref building page.
+
+## CONTRIBUTING
+
+Please see the @ref contributing page, the @ref internals page may also be of
+use.
+

docs/index.md

@@ -1,9 +1,12 @@
-MRAA - Low Level Skeleton Library for Communication on Intel platforms
+libmraa - Low Level Skeleton Library for Communication on GNU/Linux platforms
 ==============
 
-Library in C/C++ to interface with Galileo & other Intel platforms, in a
-structured and sane API with port names/numbering that match boards & with
-bindings to javascript & python.
+Libmraa is a C/C++ library with bindings to Python, Javascript and Java to
+interface with the I/O on Galileo, Edison & other platforms, with a structured
+and sane API where port names/numbering matches the board that you are on. Use
+of libmraa does not tie you to specific hardware with board detection done at
+runtime you can create portable code that will work across the supported
+platforms.
 
 The intent is to make it easier for developers and sensor manufacturers to map
 their sensors & actuators on top of supported hardware and to allow control of
@@ -36,24 +39,30 @@ Specific platform information for supported platforms is documented here:
 
 - @ref galileorevd
 - @ref galileorevh
+- @ref edison
+- @ref de3815
+- @ref minnowmax
+- @ref rasppi
+- @ref bananapi
+- @ref beaglebone
+- @ref nuc5
+- @ref ft4222
 
-### ENV RECOMENDATIONS
+## DEBUGGING
 
-All of these are 'optional', however they are recommended. Only a C compiler,
-cmake, libm and pthreads are technically required to compile.
-
-- Swig 3.0.1+ built with node.js & python support (0.10.x)
-- doxygen
-- sphinx (requires doxygen)
-- pygments
+Sometimes it just doesn't want to work, let us try and help you, you can file
+issues in github or join us in #mraa on freenode IRC, hang around for a little
+while because we're not necessarily on 24/7, but we'll get back to you! Have a
+glance at our @debugging page too
 
 ## COMPILING
 
-More information on compiling is @ref building page
+More information on compiling is @ref building page.
 
 ## CONTRIBUTING
 
-Please see the @ref contributing page
+Please see the @ref contributing page, the @ref internals page may also be of
+use.
 
 ## API Changelog
 
@@ -61,6 +70,96 @@ This changelog is meant as a quick & rough guide to what has changed between
 versions. The API is now fairly stable but when new calls/features are added
 they are listed here. Anything pre 0.2.x is ignored.
 
+**0.8.0**
+  * Better java support
+  * Support for FT4222 subplatforms
+  * New types.hpp improves C++ & SWIG APIs
+  * Added support for minnowboard max compatible boards
+
+**0.7.5**
+  * 5th Generation NUC i2c support
+  * NPM 0.10.x ia32 fix
+
+**0.7.4**
+  * Minnowboard i2c fix
+  * Add NPM arm support
+  * Uart initialisation improved
+  * Better i2c bus detection on DE3815 & mmax
+
+**0.7.3**
+  * DE3815 i2c fix when using different kernels
+  * Fixed various memory leaks in SWIG wrappers
+  * gpio enums all prefixed with mraa_
+  * Fix SPI CS pin caps causing mux_total to be > 0
+  * Improved error checking/handling
+
+**0.7.2**
+  * Fix node.js npm builds with binding.gyp that didn't use --target-arch
+
+**0.7.1**
+  * Uart now uses binary arrays and has optional 'Str' functions in C++/SWIG
+  * Various Uart module bugfixes
+  * Node.js 0.12.4 support
+  * Node.js documentation support
+
+**0.7.0**
+  * Uart module now contains read/write interactions and configuration
+  * Python API contains more buffer checks
+  * Java support
+  * RPM cpack support
+
+**0.6.2**
+  * Node.js 0.12 support
+  * NPM support
+  * Formatting done with clang-format
+  * Various examples and documentation updates
+  * Supported added for Beaglebone Black + Banana Pi
+
+**0.6.1**
+  * 16bit spi iunctions added
+  * Node.js ISR now supported
+
+**0.6.0**
+  * add device path queries for uart
+  * add platform configuration querying
+  * gpio sample added
+  * improve i2c/spi write/read API for python & nodejs
+  * performance improvements on edison & galileo
+
+**0.5.4**
+  * pwm read_* fix introduced in 0.5.3
+  * improved npmpkg support
+
+**0.5.3**
+  * OE toolchain support added to CMake
+  * Various UART fixes
+  * SPI add CS exposure
+  * Remove functions from mraa.c into modules
+  * Rework of support for mmap
+  * Intel Edison MMAP support added. Read and Write
+  * I2C clean up, add cleaner functions
+  * MinnowBoard Max support added
+  * PWM period is written before duty
+  * Node GYP build supported added
+  * Add Get Platform Name function
+
+**0.5.2**
+  * pwm improvement & bugfix
+  * spi mraa_spi_bit_per_word fix
+  * new spi transfer function
+  * i2c object api uses uint8_t
+  * i2c readReg() calls added
+  * edison i2c bus now defaults to a sensible value
+  * edison uart enable support
+  * edison hardware CS exposed as IO10
+  * DE3815tykhe NUC support
+
+**0.5.1**
+  * Intel Edison - Mini breakout board support
+  * Change to use syslog throughout instead of printing to stderr.
+  * Fix misc issues brought up throuh coverity scans
+  * Clear up Analog call documentation
+
 **0.5.0**
   * Intel Edison - Arduino board support.
   * Boost Allowable i2c busses to 12

docs/intel_de3815.md

@@ -0,0 +1,38 @@
+Intel(R) NUC DE3815tykhe                            {#de3815}
+=============
+
+The DE3815 NUC Kit is a single core Atom(TM) clocked at 1.46GHz.
+http://www.intel.com/content/www/us/en/nuc/nuc-kit-de3815tykhe.html
+
+Interface notes
+---------------
+**GPIO** Not yet implemented.
+
+**PWM** Functionality for the PWM is provided by the `pwm_lpss` module `CONFIG_PWM_LPSS`
+
+**I2C** Depending on your system you may need to load `i2c-dev`
+
+Custom Solutions Header mapping
+-------------------------------
+Based on: http://downloadmirror.intel.com/23745/eng/DE3815TYBE_TechProdSpec06.pdf
+
+| MRAA Number | Physical Pin | Function     | Notes                |
+|-------------|--------------|--------------|----------------------|
+| 0           | 1            | 1.8V sby     |                      |
+| 1           | 2            | GND          |                      |
+| 2           | 3            | HDMI_CEC     |                      |
+| 3           | 4            | DMIC_CLK     |                      |
+| 4           | 5            | 3.3V sby     |                      |
+| 5           | 6            | DMIC_DATA    |                      |
+| 6           | 7            | Key (no pin) |                      |
+| 7           | 8            | SMB_ALERT#   |                      |
+| 8           | 9            | 5V sby (2A)  |                      |
+| 9           | 10           | SCI_SMI_GPIO |                      |
+| 10          | 11           | PWM[0]       | PWM Chip 0 Channel 0 |
+| 11          | 12           | PWM[1]       | PWM Chip 0 Channel 1 |
+| 12          | 13           | I2C0_CLK     | /dev/i2c-0 SCL       |
+| 13          | 14           | I2C0_DATA    | /dev/i2c-0 SDA       |
+| 14          | 15           | I2C1_CLK     | /dev/i2c-1 SCL       |
+| 15          | 16           | I2C1_DATA    | /dev/i2c-1-SDA       |
+| 16          | 17           | SMB_CLK      |                      |
+| 17          | 18           | SMB_DATA     |                      |

docs/intel_nuc5.md

@@ -0,0 +1,46 @@
+Intel NUC NUC5i5MYBE                             {#nuc5}
+====================
+
+Pinmuxing on the 5th generation Intel NUCs is done in the BIOS. This is only
+tested on bios 0024+ (MYBDWi5v.86A). By default the custom solution header is
+disabled, currently in Linux (as of 4.2). Both i2c buses are currently
+supported.
+
+The NUCs supported are the NUC5i5MYBE & NUC5i3MYBE which also come as the
+NUC5i5MYHE and NUC5i3MYHE motherboards. It's possible that others expose the IO
+in a very similar way so could be supported, get in touch if you have one!
+
+In the BIOS you are required to enable the following:
+Devices -> Onboard Devices - GPIO Lockdown
+Select I2c under GPIO for the 12/13 14/15 pins
+
+Interface notes
+---------------
+
+**I2C** Depending on your system you may need to load `i2c-dev`
+
+Custom Solutions Header mapping
+-------------------------------
+
+The mapping is the same as the DE3815tykhe.
+
+| MRAA Number | Physical Pin | Function     | Notes                |
+|-------------|--------------|--------------|----------------------|
+| 0           | 1            | 1.8V sby     |                      |
+| 1           | 2            | GND          |                      |
+| 2           | 3            | HDMI_CEC     |                      |
+| 3           | 4            | DMIC_CLK     |                      |
+| 4           | 5            | 3.3V sby     |                      |
+| 5           | 6            | DMIC_DATA    |                      |
+| 6           | 7            | Key (no pin) |                      |
+| 7           | 8            | SMB_ALERT#   |                      |
+| 8           | 9            | 5V sby (2A)  |                      |
+| 9           | 10           | SCI_SMI_GPIO |                      |
+| 10          | 11           | PWM[0]       |                      |
+| 11          | 12           | PWM[1]       |                      |
+| 12          | 13           | I2C0_CLK     | /dev/i2c-0 SCL       |
+| 13          | 14           | I2C0_DATA    | /dev/i2c-0 SDA       |
+| 14          | 15           | I2C1_CLK     | /dev/i2c-1 SCL       |
+| 15          | 16           | I2C1_DATA    | /dev/i2c-1-SDA       |
+| 16          | 17           | SMB_CLK      |                      |
+| 17          | 18           | SMB_DATA     |                      |

docs/internals.md

@@ -0,0 +1,180 @@
+libmraa Internals                       {#internals}
+=================
+
+For building see @ref building. This will describe the general internal build
+of libmraa and will be useful to developers who'd like to understand more of
+how libmraa works or who'd like to add additional platforms. The internals will
+deal with the C API as that is the low level API which libmraa is built around.
+Note that C++ is simply a header only wrapper of the C API.
+
+libmraa has the philosophy that the board mapping is what we typically use in
+the API with the execption of i2c/spi bus numbering as they are typically not
+labelled on boards and so we use the kernel numbering scheme. Whilst this can
+confuse some, it's typically not an issue as platforms rarely expose more than
+one of these for user use and so when this is the case, libmraa will always use
+the bus in the pinmapper. For example edison uses i2c #6 but since there is
+only one, libmraa will try to be helpful and everything is treated as 6 when
+doing a mraa_i2c_init(). The _raw functions will override the pinmapper and can
+be accessed without a valid board configuration. This can be helpful either in
+development of platform configurations for mraa or when modifying kernels
+etc... Internally the mechanism is used heavily.
+
+In libmraa, all code is split into 7 modules, src/{i2c, spi, gpio, uart, pwm,
+aio and common}. These should be fairly self explanatory in goals/purpose but a
+few work in different ways. Public APIs are stored in api/ and internal headers
+are in include/
+
+### Logging ###
+
+Logging is now done purely in syslog(). Note that on platforms running systemd
+journald will intercept syslog(3) calls and log to the journal instead. You can
+set the log mask by using mraa_set_log_level(). Doing a DEBUG build of libmraa
+will also cause the DEBUG macro to be defined which will cause the syslog mask
+to be unset.
+
+### Contexts ###
+
+libmraa uses contexts to store all information, this context cannot be accessed
+by the user and so it's layout can and may be changed without warning to users.
+If an init() function fails it will return NULL and further calls with this
+context will lead to undefined behaviour.
+
+### Pinmapper ###
+
+The mraa_board_t is defined in mraa/common.h. It's a mostly static structure
+initialised during mraa_init(). The pinmap file in
+src/{arch}/{manufacturer}_{boardname}_{revision}.c then fills this array. It's
+also where platform hooks can be defined, functions that will be run at various
+'hook' points in the code.
+
+The mraa_pininfo_t structure needs to be set for the board pincount (set in a
+macro in the platform configuration header. Every pin will have a
+mraa_pincapabilities_t which will define what it can do. The doxygen
+documentation explains how this works but it's essentially a bitfield which
+needs to be set for every capability the pin can have. Gpios can have multiple
+muxes which will be set at the gpio init before it can be toggled.
+
+### i2c ###
+
+I2c from userspace in GNU/Linux is handled by character devices handled by the
+kernel driver i2c-dev. For more details the i2c/dev-interface documentation
+file in the kernel is the place to go.
+
+In libmraa, we re-use part of a library - libi2c from RoadNarrows -
+i2c/smbus.c. This library simply makes it easier for us to handle the error
+conditions that can arrise when writing on i2c buses. Essentially the API is
+fairly simple consisting of writes & reads.
+
+Careful - on alot of platforms i2cdetect will often crash. To findi your i2c
+addresses please look at your sensor's datasheet! If using i2cdetect most
+platforms do not support SMBus quick write so use the '-r' flag.
+
+### spi ###
+
+Mraa deals exclusively with spidev, so when we say bus we really mean bus +
+chip select from spidev. Spi(0) could lead to spidev5.1 and Spi(1) to
+spidev5.2. Typically on a micro using a random gpio as a chip select works
+well, and on some platforms if one is careful with threads this can work well
+with mraa. However when a kernel module shares the same bus as spidev (but on a
+different CS) this behaviour is *very* dangerous. Platforms such as Galileo
+Gen2 & Edison + Arduino breakout board work this way. Mraa will not help you in
+using a non hardware chip select, do so at your own peril!
+
+### gpio ###
+
+GPIO is probably the most complicated and odd module in libmraa. It is based on
+the gpiolib kernel driver framework which uses sysfs. There is a lot of good
+documentation in gpio/sysfs.txt in the kernel docs.
+
+The main issue is that gpios on hobbyist boards typically come with a number of
+muxers or level shifters and are often mapped in crazy ways. libmraa's goal is
+to make the label on your board match the API :) We hope that pleases you.
+
+Because boards are very different we use alot of platform hooks (@ref hooks) to
+make the initialisation work on all platforms. The hope is that simple
+platforms with no level shifters or expanders will work with just the pinmap
+definition.
+
+GPIOs are typically interfaced via sysfs because that's easier for us but we
+can also work with fast gpio. This is typically preffered to do mmap gpio
+access. This is however trickier and typically relies on lots of platform
+hooks. By default we support hitting /dev/mem or another device at specific
+addresses to toggle gpios which is how mmap access works on some boards.
+
+Note that in Linux gpios are numbered from ARCH_NR_GPIOS down. This means that
+if ARCH_NR_GPIOS is changed, the gpio numbering will change. In 3.18+ the
+default changed from 256 to 512, sadly the value cannot be viewed from
+userspace so we rely on the kernel version to extrapolate the likely value.
+
+### uart ###
+
+libmraa does not support UART/serial as there are many good libraries that do
+this already. In the future we may wrap or use one. However the class exists to
+set the pinmapper correctly for uart to work on some platforms.
+
+### pwm ###
+
+Internally everything with PWM in mraa is in microseconds because that's what
+the linux kernel uses and is probably all the granularity we'll ever
+need/achieve with the kind of hardware we're targetting. Board configuration
+pwm max/min values are always set in microseconds.
+
+### aio ###
+
+AIO pins are numbered after GPIO pins. This means that on Arduino style boards
+pin 14 is A0. Typically mraa will only support an ADC if a platform ships with
+one and has a good kernel module for it. Extra i2c/spi ADCs can be supported
+via something like UPM but are unlikely to receive support in mraa at the moment.
+
+Note that giving mraa_aio_init(0) will literally query the pinmapper for
+board->gpio_count + 0 so you must place your aio pins after gpio_count. This is
+the default behaviour but can of course be overriden by advance function
+pointers. Whilst maybe not the sanest of defaults, most of the hobbyist boards
+we deal with follow a naming pattern similar to Arduino or have no ADC so for
+now we have considered this sensible.
+
+### Initialisation ###
+
+mraa_init() needs to be called in order to initialise the platform files or
+'pinmap'. Because calling this is tedious libmraa uses a C constructor to run
+mraa_init on library load. This means that it is not possible to stop this
+running and all function calls like mraa_set_log_level() will not work during
+mraa_init(). This feature is supported by most sane compilers and libcs but you
+can turn off CTORS in uclibc, though I've yet to find a configuration with
+someone doing that. mraa_init() can be called multiple times if you feel like
+being 'safe'.
+
+In the SWIG modules mraa_init() is called during the %init stage of the module
+loading. This is simply to avoid mraa_init() running 'too' early, though I've
+never seen an issue in running it in a CTOR.
+
+### SWIG ###
+
+At the time when libmraa was created (still the case?) the only - working -
+API/wrapper generation tool that supported nodejs was SWIG. For more general
+information on SWIG please see the SWIG documentation.
+
+The src/{javascript, python} & src/mraa.i folders contain all the files for the
+SWIG generation. The C++ headers in api/mraa/ are given as input sources to
+SWIG. SWIG modules do not link to libmraa (although maybe that would be a good
+idea...)
+
+Typemaps are used heavily to map uint8_t* pointers to bytearrays and
+node_buffers. These are native python & node.js types that represent uint8_t
+data the best and are very well supported in both languages. Argument
+conversions and memory allocations are performed so the performance of using
+these functions compared to the C/C++ equivalent will likely be a little lower,
+however it is much more natural than using carrays.i typemap library.
+
+### NPM ###
+
+mraa is published on NPM, there is a target to prebuild a mraa src tarball that
+can be built with node-gyp. The way this works is to use the mraa_LIB_SRCS
+array to generate a binding.gyp file from the skeleton binding.gyp.cmake in
+src/javascript. Because we don't expect most NPM users to have SWIG we
+precompile the src/mraajsJAVASCRIPT_wrap.cxx. The src/version.c is already
+known since this is a static tarball so we write that too. These files are
+placed not in a build/ directory but in the main mraa directory. You can then
+tar the directory up and send it to NPM. This is done automatically on every
+commit by our automated build system.
+

docs/minnow_max.md

@@ -0,0 +1,58 @@
+Intel(R) Minnowboard Max               {#minnowmax}
+========================
+MinnowBoard MAX is an open hardware embedded board designed with the Intel(R)
+Atom(TM) E38xx series SOC (Fromerly Bay Trail).
+
+For product overview and faq see
+http://www.minnowboard.org/faq-minnowboard-max/
+
+For technical details see http://www.elinux.org/Minnowboard:MinnowMax
+
+Supported Firmware
+------------------
+mraa has only been tested with 64 bit firmware version 0.73 or later.
+
+SPI
+---
+For SPI support you need to load the low_speed_spidev kernel module and that
+will create the /dev/spidev0.0 device node. Mraa only knows about this one SPI
+bus and no other.
+
+Interface notes
+---------------
+The low speed I/O connector supported as per table below.  This assumes default
+BIOS settings, as they are not dynamcially detected If any changes are mode
+(Device Manager -> System Setup -> South Cluster -> LPSS & CSS) them mraa calls
+will not behave as expected.
+
+Documentation shows i2c on bus #5, ACPI shows it on bus #6, but driver uses
+bus #7.
+
+| MRAA Number | Physical Pin  | Function   | Sysfs GPIO | Notes                |
+|-------------|---------------|------------|------------|----------------------|
+| 1           | 1             | GND        |            |                      |
+| 2           | 2             | GND        |            |                      |
+| 3           | 3             | 5v         |            |                      |
+| 4           | 4             | 3.3v       |            |                      |
+| 5           | 5             | SPI_CS     | 220        | SPI (via low_speed)  |
+| 6           | 6             | UART1_TXD  | 225        | UART1                |
+| 7           | 7             | SPI_MISO   | 221        | SPI (via low_speed)  |
+| 8           | 8             | UART1_RXD  | 224        | UART1                |
+| 9           | 9             | SPI_MOSI   | 222        | SPI (via low_speed)  |
+| 10          | 10            | UART1_CTS  | 227        | GPIO                 |
+| 11          | 11            | SPI_CLK    | 223        | SPI (via low_speed)  |
+| 12          | 12            | UART1_RTS  | 226        | GPIO                 |
+| 13          | 13            | I2C_SCL    | 243        | /dev/i2c-7           |
+| 14          | 14            | I2S_CLK    | 216        | GPIO                 |
+| 15          | 15            | I2C_SDA    | 242        | /dev/i2c-7           |
+| 16          | 16            | I2S_FRM    | 217        | GPIO                 |
+| 17          | 17            | UART2_TXD  | 229        | UART2                |
+| 18          | 18            | I2S_DO     | 219        | GPIO                 |
+| 19          | 19            | UART2_RXD  | 228        | UART2                |
+| 20          | 20            | I2S_DI     | 218        | GPIO                 |
+| 21          | 21            | GPIO_S5_0  |  82        | GPIO                 |
+| 22          | 22            | PWM0       | 248        | PWM Chip 0 Channel 0 |
+| 23          | 23            | GPIO_S5_1  |  83        | GPIO                 |
+| 24          | 24            | PWM1       | 249        | PWM Chip 1 Channel 0 |
+| 25          | 25            | S5_4       |  84        | GPIO                 |
+| 26          | 26            | IBL_8254   | 208        | GPIO                 |

docs/npm.md

@@ -0,0 +1,49 @@
+mraa NPM pkg                        {#npmpkg}
+============
+
+What you are looking at is a tarball made after 'make npmpkg' has been run on
+our build system. It contains a few prebuilt files in order to build easily
+with node-gyp on most systems. Note that this is not the preffered way of
+building libmraa and if you'd like to contribute, please learn how the build
+system works and get your sources from git.
+
+Any patches for mraajsJAVASCRIPT_wrap.cxx or version.c will be ignored as these
+are automatically generated files. When you execute a build from node-gyp/npm
+you do not generate the mraajsJAVASCRIPT_wrap.cxx file but rather use one that
+we have generated for you.
+
+Recreating tarball
+------------------
+
+You can run the following commands to 'generate' this tarball from a checkout
+of mraa.  It's important to not leave a .git directory as npm will then
+consider the tarball contains a full git tree. You also you need a top level
+dir which matches the npm pkg name so we create one with a symlink and add the
+'h' flag to tar to follow symlinks.
+
+~~~~~~~~~~~~~{.sh}
+mkdir build
+cd build
+cmake -DBUILDSWIGNODE=ON  ..
+make npmpkg
+ln -s ../ mraa
+tar hczv --exclude='build*' --exclude='.gitignore' --exclude='.git' --exclude='build*/*' --exclude='.git/*' -f mraa.tar.gz mraa
+~~~~~~~~~~~~~
+
+Building with node-gyp
+----------------------
+
+You can build with node-gyp using the binding.gyp file, obviously this requires
+either the prebuilt tarball from npm or to do the above to generate it with the
+npmpkg target. Note the --target='' flag will not work since binding.gyp will
+do a check for the running node v8 version, you'll also need to run that
+version (or close to) in your $PATH.
+
+~~~~~~~~~~~{.sh}
+node-gyp configure --python=/usr/bin/python2
+node-gyp build --python=/usr/bin/python2 --verbose
+~~~~~~~~~~~
+
+Note that no cross compilation is available without modifying the --arch flag
+manually. If you want to cross compile, it's recommended to use cmake.
+

docs/platform-hooks.md

@@ -1,16 +1,25 @@
-Hooks can be defined per supported platform to allow for highly custom operations if needed.
-This feature of MRAA should only be used by developers defining the board definitions, NOT an end user.
+platform-hooks                             {#hooks}
+==============
+
+Hooks can be defined per supported platform to allow for highly custom
+operations if needed.  This feature of MRAA should only be used by developers
+defining the board definitions, NOT an end user.
 
 ##Types of Hooks
 
 ###REPLACE
-Defining a replace function will entirely replace the associate function. This should only be done if your new function can handle everything the mraa function would normally.
+Defining a replace function will entirely replace the associate function. This
+should only be done if your new function can handle everything the mraa
+function would normally.
 
 ###PRE
-Any functionality defined here will be performed when the main function is called.
+Any functionality defined here will be performed when the main function is
+called.
 
 ###POST
-Any functionality perfomed here is done just before the normal function returns. All post functions will have passed into them the return value that would normally be returned.
+Any functionality perfomed here is done just before the normal function
+returns. All post functions will have passed into them the return value that
+would normally be returned.
 
 ##Hooks
 ### GPIO

docs/raspberry_pi.md

@@ -0,0 +1,100 @@
+Raspberry Pi    {#rasppi}
+============
+
+The Raspberry Pi is based on the Broadcom BCM2835 system on a chip, which
+includes an ARM1176JZF-S 700 MHz processor, VideoCore IV GPU and was originally
+shipped with 256 megabytes of RAM, later upgraded (Model B & Model B+) to 512
+MB. The Raspberry Pi 2 is based on an armv7 CPU but shares a number of
+similarities with the original.
+
+Revision Support
+----------------
+Raspberry Pi A/B/A+/B+
+Raspberry Pi 2 B
+
+Interface notes
+---------------
+
+**PWM** Whilst the Raspberry Pi is meant to have 1 PWM channel this is currently not supported.
+
+Pin Mapping
+-----------
+
+This pin mapping refers to the first generation 'B' model Pi but gives an idea
+as to what the values are from mraa. Note that there is an emum to use wiringPi
+style numbers.
+
+| MRAA Number | Physical Pin | Function |
+|-------------|--------------|----------|
+| 1           | P1-01        | 3V3 VCC  |
+| 2           | P1-02        | 5V VCC   |
+| 3           | P1-03        | I2C SDA  |
+| 4           | P1-04        | 5V VCC   |
+| 5           | P1-05        | I2C SCL  |
+| 6           | P1-06        | GND      |
+| 7           | P1-07        | GPIO(4)  |
+| 8           | P1-08        | UART TX  |
+| 9           | P1-09        | GND      |
+| 10          | P1-10        | UART RX  |
+| 11          | P1-11        | GPIO(17) |
+| 12          | P1-12        | GPIO(18) |
+| 13          | P1-13        | GPIO(21) |
+| 14          | P1-14        | GND      |
+| 15          | P1-15        | GPIO(22) |
+| 16          | P1-16        | GPIO(23) |
+| 17          | P1-17        | 3V3 VCC  |
+| 18          | P1-18        | GPIO(24) |
+| 19          | P1-19        | SPI MOSI |
+| 20          | P1-20        | GND      |
+| 21          | P1-21        | SPI MISO |
+| 22          | P1-22        | GPIO(25) |
+| 23          | P1-23        | SPI SCL  |
+| 24          | P1-24        | SPI CS0  |
+| 25          | P1-25        | GND      |
+| 26          | P1-26        | SPI CS1  |
+
+
+The following pin mapping applies to the new Raspberry Pi model 2 and B+. Note that GPIO(21) is now GPIO(27)
+
+| MRAA Number | Physical Pin | Function |
+|-------------|--------------|----------|
+| 1           | P1-01        | 3V3 VCC  |
+| 2           | P1-02        | 5V VCC   |
+| 3           | P1-03        | I2C SDA  |
+| 4           | P1-04        | 5V VCC   |
+| 5           | P1-05        | I2C SCL  |
+| 6           | P1-06        | GND      |
+| 7           | P1-07        | GPIO(4)  |
+| 8           | P1-08        | UART TX  |
+| 9           | P1-09        | GND      |
+| 10          | P1-10        | UART RX  |
+| 11          | P1-11        | GPIO(17) |
+| 12          | P1-12        | GPIO(18) |
+| 13          | P1-13        | GPIO(27) |
+| 14          | P1-14        | GND      |
+| 15          | P1-15        | GPIO(22) |
+| 16          | P1-16        | GPIO(23) |
+| 17          | P1-17        | 3V3 VCC  |
+| 18          | P1-18        | GPIO(24) |
+| 19          | P1-19        | SPI MOSI |
+| 20          | P1-20        | GND      |
+| 21          | P1-21        | SPI MISO |
+| 22          | P1-22        | GPIO(25) |
+| 23          | P1-23        | SPI SCL  |
+| 24          | P1-24        | SPI CS0  |
+| 25          | P1-25        | GND      |
+| 26          | P1-26        | SPI CS1  |
+| 27          | P1-27        | I2C SDA1 |
+| 28          | P1-28        | I2C SCL1 |
+| 29          | P1-29        | GPIO(5)  |
+| 30          | P1-30        | GND      |
+| 31          | P1-31        | GPIO(6)  |
+| 32          | P1-32        | GPIO(12) |
+| 33          | P1-33        | GPIO(13) |
+| 34          | P1-34        | GND      |
+| 35          | P1-35        | SPI MISO1|
+| 36          | P1-36        | GPIO(16) |
+| 37          | P1-37        | GPIO(26) |
+| 38          | P1-38        | SPI MOSI1|
+| 39          | P1-39        | GND      |
+| 40          | P1-40        | SPI SCL1 |

docs/testing.md

@@ -0,0 +1,42 @@
+# Testing mraa
+
+Mraa has a test suite written in python which can be run by users to check
+their platform is working correctly. The aim is to have a full API coverage
+using python scripts using unittests. Currently the test suite is far from
+complete.
+
+## Supported platforms
+
+Intel Galileo v1 was used and is currently the only supported platform. Tests
+were conducted on Intel Galileo v2, but because of hardware differences, some
+failures may occur. Logic will be added to auto-select board to work on. To
+start with boards with an arduino type shield/layout should work
+
+## How to run these tests
+
+You need to compile from source with -DBUILDSWIGPYTHON=ON and then tests can be
+executed with:
+$ make test
+
+More detail can be seen by running:
+$ ctest -VV
+
+Note tests will not run on platforms which cannot initialise, checking the
+amount of 'skipped' tests can be useful
+
+## What's next?
+
+At this point tests were made to do a quick sanity check. In the future the
+followings will be implemented:
+ * Create a physical layer that will emulate sensors behavior and generate I/O
+   signals. This layer will be available to the community and will help replace
+   the need of specific sensors. The simplest solution will be chosen allowing
+   anyone to rapidly implement it.
+ * Implement stress tests over long periods of time. This feature alone is
+   possible only with the use of a physical layer since it will behave both as
+   signals generator and interpreter.
+ * Analyze a tests result collection solution (and after, interpretation). This
+   is useful since tests mean nothing without a history and possibility to
+   check on results.
+ * Any idea welcome!
+

examples/CMakeLists.txt

@@ -8,9 +8,15 @@ add_executable (gpio_read6 gpio_read6.c)
 add_executable (spi_mcp4261 spi_mcp4261.c)
 add_executable (mmap-io2 mmap-io2.c)
 add_executable (blink_onboard blink_onboard.c)
-add_executable (uart_setup uart_setup.c)
+add_executable (uart uart.c)
+add_executable (mraa-gpio mraa-gpio.c)
+add_executable (mraa-i2c mraa-i2c.c)
+add_executable (spi_max7219 spi_max7219.c)
 
 include_directories(${PROJECT_SOURCE_DIR}/api)
+# FIXME Hack to access mraa internal types used by mraa-i2c
+include_directories(${PROJECT_SOURCE_DIR}/include)
+include_directories(${PROJECT_SOURCE_DIR}/api/mraa)
 
 target_link_libraries (hellomraa mraa)
 target_link_libraries (i2c_HMC5883L mraa m)
@@ -22,8 +28,15 @@ target_link_libraries (gpio_read6 mraa)
 target_link_libraries (spi_mcp4261 mraa)
 target_link_libraries (mmap-io2 mraa)
 target_link_libraries (blink_onboard mraa)
-target_link_libraries (uart_setup mraa)
+target_link_libraries (uart mraa)
+target_link_libraries (mraa-gpio mraa)
+target_link_libraries (mraa-i2c mraa)
+target_link_libraries (spi_max7219 mraa)
 
 add_subdirectory (c++)
 
 install (DIRECTORY ${PROJECT_SOURCE_DIR}/examples/ DESTINATION share/mraa/examples)
+
+if (INSTALLGPIOTOOL)
+   install (TARGETS mraa-gpio DESTINATION bin)
+endif()

examples/analogin_a0.c

@@ -26,19 +26,23 @@
 //! [Interesting]
 #include "mraa/aio.h"
 
-int main ()
+int
+main()
 {
     mraa_aio_context adc_a0;
     uint16_t adc_value = 0;
+    float adc_value_float = 0.0;
 
     adc_a0 = mraa_aio_init(0);
     if (adc_a0 == NULL) {
         return 1;
     }
 
-    for(;;) {
+    for (;;) {
         adc_value = mraa_aio_read(adc_a0);
+        adc_value_float = mraa_aio_read_float(adc_a0);
         fprintf(stdout, "ADC A0 read %X - %d\n", adc_value, adc_value);
+        fprintf(stdout, "ADC A0 read float - %.5f\n", adc_value_float);
     }
 
     mraa_aio_close(adc_a0);

examples/blink-io.c

@@ -45,7 +45,7 @@ sig_handler(int signo)
 }
 
 int
-main(int argc, char **argv)
+main(int argc, char** argv)
 {
     mraa_result_t r = MRAA_SUCCESS;
     iopin = DEFAULT_IOPIN;
@@ -57,14 +57,13 @@ main(int argc, char **argv)
     }
 
     mraa_init();
-    fprintf(stdout, "MRAA Version: %s\nStarting Blinking on IO%d\n",
-            mraa_get_version(), iopin);
+    fprintf(stdout, "MRAA Version: %s\nStarting Blinking on IO%d\n", mraa_get_version(), iopin);
 
     mraa_gpio_context gpio;
     gpio = mraa_gpio_init(iopin);
     if (gpio == NULL) {
         fprintf(stderr, "Are you sure that pin%d you requested is valid on your platform?", iopin);
-	exit(1);
+        exit(1);
     }
     printf("Initialised pin%d\n", iopin);
 

examples/blink_onboard.c

@@ -29,29 +29,51 @@
 #include "mraa/gpio.h"
 
 int
-main(int argc, char **argv)
+main(int argc, char** argv)
 {
     mraa_platform_t platform = mraa_get_platform_type();
-    mraa_gpio_context gpio;
-    char board_name[] = "Some weird devboard that isn't recognised...";
+    mraa_gpio_context gpio, gpio_in = NULL;
+    char* board_name = mraa_get_platform_name();
     int ledstate = 0;
 
     switch (platform) {
         case MRAA_INTEL_GALILEO_GEN1:
-            strcpy(board_name, "Intel Galileo Gen1");
             gpio = mraa_gpio_init_raw(3);
             break;
-        case MRAA_INTEL_GALILEO_GEN2:
-            strcpy(board_name, "Intel Galileo Gen2");
+        case MRAA_INTEL_MINNOWBOARD_MAX:
+            // there is no onboard LED that we can flash on the minnowboard max
+            // but on the calamari lure pin 21 is an LED. If you don't have the
+            // lure put an LED on pin 21
+            gpio = mraa_gpio_init(21);
+            break;
         default:
             gpio = mraa_gpio_init(13);
     }
 
-    fprintf(stdout, "Welcome to libmraa\n Version: %s\n Running on %s\n",
-        mraa_get_version(), board_name);
+    fprintf(stdout, "Welcome to libmraa\n Version: %s\n Running on %s\n", mraa_get_version(), board_name);
+
+
+    if (gpio == NULL) {
+        fprintf(stdout, "Could not initilaize gpio\n");
+        return 1;
+    }
+
+    // on platforms with physical button use gpio_in
+    if (platform == MRAA_INTEL_MINNOWBOARD_MAX) {
+        gpio_in = mraa_gpio_init(14);
+        if (gpio_in != NULL) {
+            mraa_gpio_dir(gpio_in, MRAA_GPIO_IN);
+            // S1 on minnowboardmax's calamari lure maps to pin 14, SW1 != S1
+            fprintf(stdout, "Press and hold S1 to stop, Press SW1 to shutdown!\n");
+        }
+    }
 
     mraa_gpio_dir(gpio, MRAA_GPIO_OUT);
+
     for (;;) {
+        if (gpio_in != NULL && mraa_gpio_read(gpio_in) == 0) {
+            return 0;
+        }
         ledstate = !ledstate;
         mraa_gpio_write(gpio, !ledstate);
         sleep(1);

examples/c++/AioA0.cpp

@@ -25,9 +25,11 @@
 //! [Interesting]
 #include "mraa.hpp"
 
-int main ()
+int
+main()
 {
     uint16_t adc_value;
+    float adc_value_float;
     mraa::Aio* a0;
 
     a0 = new mraa::Aio(0);
@@ -35,9 +37,11 @@ int main ()
         return MRAA_ERROR_UNSPECIFIED;
     }
 
-    for(;;) {
+    for (;;) {
         adc_value = a0->read();
+        adc_value_float = a0->readFloat();
         fprintf(stdout, "ADC A0 read %X - %d\n", adc_value, adc_value);
+        fprintf(stdout, "ADC A0 read float - %.5f\n", adc_value_float);
     }
 
     return MRAA_SUCCESS;

examples/c++/Blink-IO.cpp

@@ -43,7 +43,8 @@ sig_handler(int signo)
         running = -1;
     }
 }
-int main (int argc, char **argv)
+int
+main(int argc, char** argv)
 {
     if (argc < 2) {
         printf("Provide an int arg if you want to flash on something other than %d\n", DEFAULT_IOPIN);
@@ -54,13 +55,13 @@ int main (int argc, char **argv)
 
     signal(SIGINT, sig_handler);
 
-//! [Interesting]
+    //! [Interesting]
     mraa::Gpio* gpio = new mraa::Gpio(iopin);
     if (gpio == NULL) {
-        return MRAA_ERROR_UNSPECIFIED;
+        return mraa::ERROR_UNSPECIFIED;
     }
-    mraa_result_t response = gpio->dir(mraa::DIR_OUT);
-    if (response != MRAA_SUCCESS) {
+    mraa::Result response = gpio->dir(mraa::DIR_OUT);
+    if (response != mraa::SUCCESS) {
         mraa::printError(response);
         return 1;
     }
@@ -73,5 +74,5 @@ int main (int argc, char **argv)
     }
     delete gpio;
     return response;
-//! [Interesting]
+    //! [Interesting]
 }

examples/c++/CMakeLists.txt

@@ -3,6 +3,7 @@ add_executable (blink-io-cpp Blink-IO.cpp)
 add_executable (Pwm3-cycle Pwm3-cycle.cpp)
 add_executable (I2c-compass I2c-compass.cpp)
 add_executable (Spi-pot Spi-pot.cpp)
+add_executable (Uart Uart-example.cpp)
 
 include_directories(${PROJECT_SOURCE_DIR}/api)
 
@@ -11,3 +12,4 @@ target_link_libraries (blink-io-cpp mraa stdc++)
 target_link_libraries (Pwm3-cycle mraa stdc++)
 target_link_libraries (I2c-compass mraa stdc++ m)
 target_link_libraries (Spi-pot mraa stdc++)
+target_link_libraries (Uart mraa stdc++)

examples/c++/I2c-compass.cpp

@@ -32,14 +32,14 @@
 #define MAX_BUFFER_LENGTH 6
 #define HMC5883L_I2C_ADDR 0x1E
 
-//configuration registers
+// configuration registers
 #define HMC5883L_CONF_REG_A 0x00
 #define HMC5883L_CONF_REG_B 0x01
 
-//mode register
+// mode register
 #define HMC5883L_MODE_REG 0x02
 
-//data register
+// data register
 #define HMC5883L_X_MSB_REG 0
 #define HMC5883L_X_LSB_REG 1
 #define HMC5883L_Z_MSB_REG 2
@@ -48,10 +48,10 @@
 #define HMC5883L_Y_LSB_REG 5
 #define DATA_REG_SIZE 6
 
-//status register
+// status register
 #define HMC5883L_STATUS_REG 0x09
 
-//ID registers
+// ID registers
 #define HMC5883L_ID_A_REG 0x0A
 #define HMC5883L_ID_B_REG 0x0B
 #define HMC5883L_ID_C_REG 0x0C
@@ -59,7 +59,7 @@
 #define HMC5883L_CONT_MODE 0x00
 #define HMC5883L_DATA_REG 0x03
 
-//scales
+// scales
 #define GA_0_88_REG 0x00 << 5
 #define GA_1_3_REG 0x01 << 5
 #define GA_1_9_REG 0x02 << 5
@@ -69,7 +69,7 @@
 #define GA_5_6_REG 0x06 << 5
 #define GA_8_1_REG 0x07 << 5
 
-//digital resolutions
+// digital resolutions
 #define SCALE_0_73_MG 0.73
 #define SCALE_0_92_MG 0.92
 #define SCALE_1_22_MG 1.22
@@ -91,13 +91,14 @@ sig_handler(int signo)
     }
 }
 
-int main ()
+int
+main()
 {
     float direction = 0;
     int16_t x = 0, y = 0, z = 0;
-    char rx_tx_buf[MAX_BUFFER_LENGTH];
+    uint8_t rx_tx_buf[MAX_BUFFER_LENGTH];
 
-//! [Interesting]
+    //! [Interesting]
     mraa::I2c* i2c;
     i2c = new mraa::I2c(0);
 
@@ -105,7 +106,7 @@ int main ()
     rx_tx_buf[0] = HMC5883L_CONF_REG_B;
     rx_tx_buf[1] = GA_1_3_REG;
     i2c->write(rx_tx_buf, 2);
-//! [Interesting]
+    //! [Interesting]
 
     i2c->address(HMC5883L_I2C_ADDR);
     rx_tx_buf[0] = HMC5883L_MODE_REG;
@@ -116,24 +117,25 @@ int main ()
 
     while (running == 0) {
         i2c->address(HMC5883L_I2C_ADDR);
-        i2c->write(HMC5883L_DATA_REG);
+        i2c->writeByte(HMC5883L_DATA_REG);
 
         i2c->address(HMC5883L_I2C_ADDR);
         i2c->read(rx_tx_buf, DATA_REG_SIZE);
 
-        x = (rx_tx_buf[HMC5883L_X_MSB_REG] << 8 ) | rx_tx_buf[HMC5883L_X_LSB_REG] ;
-        z = (rx_tx_buf[HMC5883L_Z_MSB_REG] << 8 ) | rx_tx_buf[HMC5883L_Z_LSB_REG] ;
-        y = (rx_tx_buf[HMC5883L_Y_MSB_REG] << 8 ) | rx_tx_buf[HMC5883L_Y_LSB_REG] ;
+        x = (rx_tx_buf[HMC5883L_X_MSB_REG] << 8) | rx_tx_buf[HMC5883L_X_LSB_REG];
+        z = (rx_tx_buf[HMC5883L_Z_MSB_REG] << 8) | rx_tx_buf[HMC5883L_Z_LSB_REG];
+        y = (rx_tx_buf[HMC5883L_Y_MSB_REG] << 8) | rx_tx_buf[HMC5883L_Y_LSB_REG];
 
-        //scale and calculate direction
+        // scale and calculate direction
         direction = atan2(y * SCALE_0_92_MG, x * SCALE_0_92_MG);
 
-        //check if the signs are reversed
+        // check if the signs are reversed
         if (direction < 0)
             direction += 2 * M_PI;
 
-        printf("Compass scaled data x : %f, y : %f, z : %f\n", x * SCALE_0_92_MG, y * SCALE_0_92_MG, z * SCALE_0_92_MG) ;
-        printf("Heading : %f\n", direction * 180/M_PI);
+        printf("Compass scaled data x : %f, y : %f, z : %f\n", x * SCALE_0_92_MG, y * SCALE_0_92_MG,
+               z * SCALE_0_92_MG);
+        printf("Heading : %f\n", direction * 180 / M_PI);
         sleep(1);
     }
     delete i2c;

examples/c++/Pwm3-cycle.cpp

@@ -38,10 +38,11 @@ sig_handler(int signo)
     }
 }
 
-int main ()
+int
+main()
 {
     signal(SIGINT, sig_handler);
-//! [Interesting]
+    //! [Interesting]
     mraa::Pwm* pwm;
 
     pwm = new mraa::Pwm(3);
@@ -49,6 +50,7 @@ int main ()
         return MRAA_ERROR_UNSPECIFIED;
     }
     fprintf(stdout, "Cycling PWM on IO3 (pwm3) \n");
+    pwm->enable(true);
 
     float value = 0.0f;
     while (running == 0) {
@@ -60,7 +62,7 @@ int main ()
         }
     }
     delete pwm;
-//! [Interesting]
+    //! [Interesting]
 
     return MRAA_SUCCESS;
 }

examples/c++/Spi-pot.cpp

@@ -39,37 +39,42 @@ sig_handler(int signo)
     }
 }
 
-int main ()
+int
+main()
 {
     signal(SIGINT, sig_handler);
 
-//! [Interesting]
+    //! [Interesting]
     mraa::Spi* spi;
 
     spi = new mraa::Spi(0);
 
-    char data[] = {0x00, 100};
-    char *recv;
+    uint8_t data[] = { 0x00, 100 };
+    uint8_t rxBuf[2];
+    uint8_t* recv;
     while (running == 0) {
         int i;
         for (i = 90; i < 130; i++) {
             data[1] = i;
             recv = spi->write(data, 2);
-            printf("Writing -%i",i);
-            printf("RECIVED-%i-%i\n",recv[0],recv[1]);
+            printf("Writing -%i", i);
+            if (recv) {
+                printf("RECIVED-%i-%i\n", recv[0], recv[1]);
+                free(recv);
+            }
             usleep(100000);
         }
         for (i = 130; i > 90; i--) {
             data[1] = i;
-            recv = spi->write(data, 2);
-            printf("Writing -%i",i);
-            printf("RECIVED-%i-%i\n",recv[0],recv[1]);
+            if (spi->transfer(data, rxBuf, 2) == mraa::SUCCESS) {
+                printf("Writing -%i", i);
+                printf("RECIVED-%i-%i\n", rxBuf[0], rxBuf[1]);
+            }
             usleep(100000);
         }
-
     }
     delete spi;
-//! [Interesting]
+    //! [Interesting]
 
-    return MRAA_SUCCESS;
+    return mraa::SUCCESS;
 }

examples/c++/Uart-example.cpp

@@ -0,0 +1,70 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <unistd.h>
+#include <iostream>
+#include <exception>
+
+#include "mraa.hpp"
+
+int
+main()
+{
+    //! [Interesting]
+    // If you have a valid platform configuration use numbers to represent uart
+    // device. If not use raw mode where std::string is taken as a constructor
+    // parameter
+    mraa::Uart* dev;
+    try {
+        dev = new mraa::Uart(0);
+    } catch (std::exception& e) {
+        std::cout << e.what() << ", likely invalid platform config" << std::endl;
+    }
+
+    try {
+        dev = new mraa::Uart("/dev/ttyACM0");
+    } catch (std::exception& e) {
+        std::cout << "Error while setting up raw UART, do you have a uart?" << std::endl;
+        std::terminate();
+    }
+
+    if (dev->setBaudRate(115200) != mraa::SUCCESS) {
+        std::cout << "Error setting parity on UART" << std::endl;
+    }
+
+    if (dev->setMode(8, mraa::UART_PARITY_NONE, 1) != mraa::SUCCESS) {
+        std::cout << "Error setting parity on UART" << std::endl;
+    }
+
+    if (dev->setFlowcontrol(false, false) != mraa::SUCCESS) {
+        std::cout << "Error setting flow control UART" << std::endl;
+    }
+
+    dev->writeStr("Hello monkeys");
+    //! [Interesting]
+
+    delete dev;
+
+    return mraa::SUCCESS;
+}

examples/cycle-pwm3.c

@@ -27,10 +27,10 @@
 #include "mraa.h"
 
 int
-main ()
+main()
 {
     mraa_init();
-//! [Interesting]
+    //! [Interesting]
     mraa_pwm_context pwm;
     pwm = mraa_pwm_init(3);
     if (pwm == NULL) {
@@ -50,6 +50,6 @@ main ()
         }
         float output = mraa_pwm_read(pwm);
     }
-//! [Interesting]
+    //! [Interesting]
     return 0;
 }

examples/gpio_read6.c

@@ -28,13 +28,12 @@
 #include "mraa.h"
 
 int
-main(int argc, char **argv)
+main(int argc, char** argv)
 {
     mraa_init();
-    fprintf(stdout, "MRAA Version: %s\nStarting Read on IO6\n",
-            mraa_get_version());
+    fprintf(stdout, "MRAA Version: %s\nStarting Read on IO6\n", mraa_get_version());
 
-//! [Interesting]
+    //! [Interesting]
     mraa_gpio_context gpio;
 
     gpio = mraa_gpio_init(6);
@@ -47,7 +46,7 @@ main(int argc, char **argv)
     }
 
     mraa_gpio_close(gpio);
-//! [Interesting]
+    //! [Interesting]
 
     return 0;
 }

examples/helloedison.c

@@ -0,0 +1,69 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <syslog.h>
+#include <string.h>
+#include <stdbool.h>
+//! [Interesting]
+#include "mraa.h"
+
+int
+main(int argc, char** argv)
+{
+    mraa_result_t ret = MRAA_SUCCESS;
+    mraa_platform_t platform_type = mraa_get_platform_type();
+
+    if (platform_type != MRAA_INTEL_EDISON_FAB_C) {
+        fprintf(stderr, "Error: This program can only run on an edison\n");
+        ret = MRAA_ERROR_INVALID_PLATFORM;
+        goto end;
+    }
+
+    // MRAA_INTEL_EDISON_GP182 == 0 so this will initialise pin0 on arduino
+    // which is hardware gpio 130 and not 182
+    mraa_gpio_context gpio182 = mraa_gpio_init(MRAA_INTEL_EDISON_GP182);
+    if (gpio182 == NULL) {
+        fprintf(stderr, "Error: Failed to open gpio182\n");
+        ret = MRAA_ERROR_INVALID_PLATFORM;
+        goto end;
+    }
+    mraa_gpio_dir(gpio182, MRAA_GPIO_OUT);
+
+    // we set the owner to false here, this makes sure that we do not close the
+    // gpio from sysfs in mraa_gpio_close meaning it will stay as an output and
+    // we will not always transition from 0->1 as gpio182 as output has the
+    // default position of '0'. Note that the value could change as a result of
+    // a mraa_gpio_dir however meaning we always go from 0->1 or 1->0
+    mraa_gpio_owner(gpio182, false);
+    int val = mraa_gpio_read(gpio182);
+    printf("GPIO%d (mraa pin %d) was: %d, will set to %d\n", 182, mraa_gpio_get_pin(gpio182), val, !val);
+    mraa_gpio_write(gpio182, !val);
+    mraa_gpio_close(gpio182);
+
+end:
+    mraa_deinit();
+    return ret;
+}
+//! [Interesting]

examples/hellomraa.c

@@ -24,20 +24,20 @@
 
 #include <stdio.h>
 #include <syslog.h>
+#include <string.h>
 //! [Interesting]
 #include "mraa.h"
 
 int
-main(int argc, char **argv)
+main(int argc, char** argv)
 {
-    mraa_result_t ret;
+    char* board_name = mraa_get_platform_name();
+    int i2c_bus, i, i2c_adapter;
 
-    ret = mraa_set_log_level(LOG_DEBUG);
-
-    fprintf(stdout, "hello mraa\n Version: %s\n", mraa_get_version());
+    fprintf(stdout, "hello mraa\n Version: %s\n Running on %s\n", mraa_get_version(), board_name);
 
     mraa_deinit();
 
-    return ret;
+    return MRAA_SUCCESS;
 }
 //! [Interesting]

examples/i2c_HMC5883L.c

@@ -28,14 +28,14 @@
 #define MAX_BUFFER_LENGTH 6
 #define HMC5883L_I2C_ADDR 0x1E
 
-//configuration registers
+// configuration registers
 #define HMC5883L_CONF_REG_A 0x00
 #define HMC5883L_CONF_REG_B 0x01
 
-//mode register
+// mode register
 #define HMC5883L_MODE_REG 0x02
 
-//data register
+// data register
 #define HMC5883L_X_MSB_REG 0
 #define HMC5883L_X_LSB_REG 1
 #define HMC5883L_Z_MSB_REG 2
@@ -44,10 +44,10 @@
 #define HMC5883L_Y_LSB_REG 5
 #define DATA_REG_SIZE 6
 
-//status register
+// status register
 #define HMC5883L_STATUS_REG 0x09
 
-//ID registers
+// ID registers
 #define HMC5883L_ID_A_REG 0x0A
 #define HMC5883L_ID_B_REG 0x0B
 #define HMC5883L_ID_C_REG 0x0C
@@ -55,7 +55,7 @@
 #define HMC5883L_CONT_MODE 0x00
 #define HMC5883L_DATA_REG 0x03
 
-//scales
+// scales
 #define GA_0_88_REG 0x00 << 5
 #define GA_1_3_REG 0x01 << 5
 #define GA_1_9_REG 0x02 << 5
@@ -65,7 +65,7 @@
 #define GA_5_6_REG 0x06 << 5
 #define GA_8_1_REG 0x07 << 5
 
-//digital resolutions
+// digital resolutions
 #define SCALE_0_73_MG 0.73
 #define SCALE_0_92_MG 0.92
 #define SCALE_1_22_MG 1.22
@@ -76,14 +76,14 @@
 #define SCALE_4_35_MG 4.35
 
 int
-main(int argc, char **argv)
+main(int argc, char** argv)
 {
     mraa_init();
     float direction = 0;
     int16_t x = 0, y = 0, z = 0;
-    char rx_tx_buf[MAX_BUFFER_LENGTH];
+    uint8_t rx_tx_buf[MAX_BUFFER_LENGTH];
 
-//! [Interesting]
+    //! [Interesting]
     mraa_i2c_context i2c;
     i2c = mraa_i2c_init(0);
 
@@ -91,32 +91,46 @@ main(int argc, char **argv)
     rx_tx_buf[0] = HMC5883L_CONF_REG_B;
     rx_tx_buf[1] = GA_1_3_REG;
     mraa_i2c_write(i2c, rx_tx_buf, 2);
-//! [Interesting]
+    //! [Interesting]
 
     mraa_i2c_address(i2c, HMC5883L_I2C_ADDR);
     rx_tx_buf[0] = HMC5883L_MODE_REG;
     rx_tx_buf[1] = HMC5883L_CONT_MODE;
     mraa_i2c_write(i2c, rx_tx_buf, 2);
 
-    for(;;) {
+    for (;;) {
+#if 0
+        int i = 0;
+        //alternative, equivalent method which helps to understand exactly what
+        //the below does
+        mraa_i2c_address(i2c, HMC5883L_I2C_ADDR);
+        for (i = 0; i < DATA_REG_SIZE; i++) {
+            mraa_i2c_read_byte_data(i2c, HMC5883L_DATA_REG+i);
+        }
+#endif
+        // first 'select' the register we want to read from
         mraa_i2c_address(i2c, HMC5883L_I2C_ADDR);
         mraa_i2c_write_byte(i2c, HMC5883L_DATA_REG);
 
+        // then we read from that register incrementing with every read the
+        // chosen register
         mraa_i2c_address(i2c, HMC5883L_I2C_ADDR);
+        // this call behaves very similarly to the Wire receive() call
         mraa_i2c_read(i2c, rx_tx_buf, DATA_REG_SIZE);
 
-        x = (rx_tx_buf[HMC5883L_X_MSB_REG] << 8 ) | rx_tx_buf[HMC5883L_X_LSB_REG] ;
-        z = (rx_tx_buf[HMC5883L_Z_MSB_REG] << 8 ) | rx_tx_buf[HMC5883L_Z_LSB_REG] ;
-        y = (rx_tx_buf[HMC5883L_Y_MSB_REG] << 8 ) | rx_tx_buf[HMC5883L_Y_LSB_REG] ;
+        x = (rx_tx_buf[HMC5883L_X_MSB_REG] << 8) | rx_tx_buf[HMC5883L_X_LSB_REG];
+        z = (rx_tx_buf[HMC5883L_Z_MSB_REG] << 8) | rx_tx_buf[HMC5883L_Z_LSB_REG];
+        y = (rx_tx_buf[HMC5883L_Y_MSB_REG] << 8) | rx_tx_buf[HMC5883L_Y_LSB_REG];
 
-        //scale and calculate direction
+        // scale and calculate direction
         direction = atan2(y * SCALE_0_92_MG, x * SCALE_0_92_MG);
 
-        //check if the signs are reversed
+        // check if the signs are reversed
         if (direction < 0)
             direction += 2 * M_PI;
 
-        printf("Compass scaled data x : %f, y : %f, z : %f\n", x * SCALE_0_92_MG, y * SCALE_0_92_MG, z * SCALE_0_92_MG) ;
-        printf("Heading : %f\n", direction * 180/M_PI) ;
+        printf("Compass scaled data x : %f, y : %f, z : %f\n", x * SCALE_0_92_MG, y * SCALE_0_92_MG,
+               z * SCALE_0_92_MG);
+        printf("Heading : %f\n", direction * 180 / M_PI);
     }
 }

examples/isr_pin6.c

@@ -29,11 +29,14 @@
 static volatile int counter = 0;
 static volatile int oldcounter = 0;
 
-void interrupt (void * args) {
+void
+interrupt(void* args)
+{
     ++counter;
 }
 
-int main ()
+int
+main()
 {
     mraa_init();
     mraa_gpio_context x;
@@ -45,14 +48,14 @@ int main ()
 
     mraa_gpio_dir(x, MRAA_GPIO_IN);
 
-    gpio_edge_t edge = MRAA_GPIO_EDGE_BOTH;
-   
+    mraa_gpio_edge_t edge = MRAA_GPIO_EDGE_BOTH;
+
     mraa_gpio_isr(x, edge, &interrupt, NULL);
 
-    for(;;) {
-        if(counter != oldcounter) {
-          fprintf(stdout, "timeout counter == %d\n", counter);
-          oldcounter = counter;
+    for (;;) {
+        if (counter != oldcounter) {
+            fprintf(stdout, "timeout counter == %d\n", counter);
+            oldcounter = counter;
         }
         // got to relieve our poor CPU!
         sleep(1);

examples/java/BlinkOnboard.java

@@ -0,0 +1,76 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ * Author: Jakub Kramarz <jkramarz@virtuslab.com>
+ * Copyright (c) 2015 VirtusLab
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+public class BlinkOnboard {
+  static {
+    try {
+      System.loadLibrary("mraajava");
+    } catch (UnsatisfiedLinkError e) {
+      System.err.println(
+          "Native code library failed to load. See the chapter on Dynamic Linking Problems in the SWIG Java documentation for help.\n" +
+          e);
+      System.exit(1);
+    }
+  }
+  public static void main(String argv[]) throws InterruptedException {
+    mraa.mraa_platform_t platform = mraa.mraa.getPlatformType();
+    mraa.Gpio gpio, gpio_in;
+    if (platform == mraa.mraa_platform_t.INTEL_GALILEO_GEN1) {
+      gpio = new mraa.Gpio(3);
+    } else if (platform == mraa.mraa_platform_t.INTEL_MINNOWBOARD_MAX) {
+      gpio = new mraa.Gpio(21);
+    } else {
+      gpio = new mraa.Gpio(13);
+    }
+    System.out.format("Welcome to libmraa\n Version: %s\n Running on %s\n",
+                      mraa.mraa.getVersion(), platform.toString());
+
+    gpio.dir(mraa.Dir.DIR_OUT);
+    // on platforms with physical button use gpio_in
+    if (platform == mraa.mraa_platform_t.INTEL_MINNOWBOARD_MAX) {
+      gpio_in = new mraa.Gpio(14);
+      gpio_in.dir(mraa.Dir.DIR_IN);
+      System.out.println("Press and hold S1 to stop, Press SW1 to shutdown!");
+    } else {
+      gpio_in = null;
+    }
+
+    boolean state = false;
+    while (true) {
+      if (gpio_in != null && gpio_in.read() == 0) {
+        return;
+      }
+      if (state) {
+        state = false;
+        gpio.write(1);
+      } else {
+        state = true;
+        gpio.write(0);
+      }
+      Thread.sleep(1000);
+    }
+  }
+}

examples/java/Bmp85.java

@@ -0,0 +1,75 @@
+/*
+ * Author: Alexander Komarov <alexander.komarov@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+public class Bmp85 {
+  static {
+    try {
+      System.loadLibrary("mraajava");
+    } catch (UnsatisfiedLinkError e) {
+      System.err.println(
+          "Native code library failed to load. See the chapter on Dynamic Linking Problems in the SWIG Java documentation for help.\n" +
+          e);
+      System.exit(1);
+    }
+  }
+  public static void main(String argv[]) {
+    mraa.mraa.init();
+    System.out.println(mraa.mraa.getVersion());
+
+    // helper function to go from hex val to dec
+    // function char(x) { return parseInt(x, 16); }
+
+    mraa.I2c i2c = new mraa.I2c(0);
+    i2c.address((byte)0x77);
+    i2c.writeByte((byte)0xd0);
+    /*
+    SWIGTYPE_p_unsigned_char data0 = new SWIGTYPE_p_unsigned_char();*/
+    byte[] data = new byte[1];
+    i2c.read(data);
+    System.out.println((new Integer(data[0])).toString());
+
+    i2c.writeReg((byte)0xf4, (byte)0x2e);
+    // initialise device
+    if (i2c.readReg((byte)0xd0) != 0x55) {
+      System.out.println("error");
+    }
+
+    // we want to read temperature so write 0x2e into control reg
+    i2c.writeReg((byte)0xf4, (byte)0x2e);
+
+    // read a 16bit reg, obviously it's uncalibrated so mostly a useless value
+    // :)
+    System.out.println(i2c.readWordReg((byte)0xf6));
+
+    byte[] buf = new byte[2];
+    buf[0] = (byte)0xf4;
+    buf[1] = (byte)0x2e;
+    i2c.write(buf);
+
+    i2c.writeByte((byte)0xf6);
+    int d = i2c.readReg((byte)2);
+    System.out.println((new Integer(d)).toString());
+  };
+}
+;

examples/java/CyclePwm3.java

@@ -0,0 +1,54 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ * Author: Jakub Kramarz <jkramarz@virtuslab.com>
+ * Copyright (c) 2015 VirtusLab
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+public class CyclePwm3 {
+  static {
+    try {
+      System.loadLibrary("mraajava");
+    } catch (UnsatisfiedLinkError e) {
+      System.err.println(
+          "Native code library failed to load. See the chapter on Dynamic Linking Problems in the SWIG Java documentation for help.\n" +
+          e);
+      System.exit(1);
+    }
+  }
+  public static void main(String argv[]) throws InterruptedException {
+    mraa.mraa.init();
+    mraa.Pwm pwm = new mraa.Pwm(3);
+    pwm.period_us(200);
+    pwm.enable(true);
+
+    float value = 0;
+    while (true) {
+      value += 0.01;
+      pwm.write(value);
+      Thread.sleep(50);
+      if (value >= 1) {
+        value = 0;
+      }
+    }
+  }
+}

examples/java/Example.java

@@ -0,0 +1,41 @@
+/*
+ * Author: Alexander Komarov <alexander.komarov@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+public class Example {
+  static {
+    try {
+      System.loadLibrary("mraajava");
+    } catch (UnsatisfiedLinkError e) {
+      System.err.println(
+          "Native code library failed to load. See the chapter on Dynamic Linking Problems in the SWIG Java documentation for help.\n" +
+          e);
+      System.exit(1);
+    }
+  }
+  public static void main(String argv[]) {
+    mraa.mraa.init();
+    System.out.println(mraa.mraa.getVersion());
+  };
+}
+;

examples/java/GpioRead6.java

@@ -0,0 +1,44 @@
+/*
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ * Author: Jakub Kramarz <jkramarz@virtuslab.com>
+ * Copyright (c) 2015 VirtusLab
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+public class GpioRead6 {
+  static {
+    try {
+      System.loadLibrary("mraajava");
+    } catch (UnsatisfiedLinkError e) {
+      System.err.println(
+          "Native code library failed to load. See the chapter on Dynamic Linking Problems in the SWIG Java documentation for help.\n" +
+          e);
+      System.exit(1);
+    }
+  }
+  public static void main(String argv[]) {
+    mraa.mraa.init();
+    mraa.Gpio gpio_in = new mraa.Gpio(6);
+    gpio_in.dir(mraa.Dir.DIR_IN);
+    System.out.format("Gpio is %d\n", gpio_in.read());
+  }
+}

examples/java/Isr.java

@@ -0,0 +1,54 @@
+/*
+ * Author: Alexander Komarov <alexander.komarov@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+public class Isr {
+  static {
+    try {
+      System.loadLibrary("mraajava");
+    } catch (UnsatisfiedLinkError e) {
+      System.err.println(
+          "Native code library failed to load. See the chapter on Dynamic Linking Problems in the SWIG Java documentation for help.\n" +
+          e);
+      System.exit(1);
+    }
+  }
+  public static void main(String argv[]) {
+    mraa.mraa.init();
+
+    mraa.Gpio gpio = new mraa.Gpio(7);
+
+    mraa.IsrCallback callback = new JavaCallback();
+
+    gpio.isr(mraa.Edge.EDGE_RISING, callback, null);
+    while (true)
+      ;
+  };
+}
+;
+
+class JavaCallback extends mraa.IsrCallback {
+  public JavaCallback() { super(); }
+
+  public void run() { System.out.println("JavaCallback.run()"); }
+}

examples/javascript/AioA0.js

@@ -27,4 +27,6 @@ console.log('MRAA Version: ' + m.getVersion()); //write the mraa version to the
 
 var analogPin0 = new m.Aio(0); //setup access analog inpuput pin 0
 var analogValue = analogPin0.read(); //read the value of the analog pin
+var analogValueFloat = analogPin0.readFloat(); //read the pin value as a float
 console.log(analogValue); //write the value of the analog pin to the console
+console.log(analogValueFloat.toFixed(5)); //write the value in the float format

examples/javascript/bmp85.js

@@ -0,0 +1,55 @@
+#!/usr/bin/env node
+
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+var m = require('mraa'); //require mraa
+
+// helper function to go from hex val to dec
+function char(x) { return parseInt(x, 16); }
+
+x = new m.I2c(0)
+x.address(0x77)
+
+// initialise device
+if (x.readReg(char('0xd0')) != char('0x55')) {
+  console.log("error");
+}
+
+// we want to read temperature so write 0x2e into control reg
+x.writeReg(char('0xf4'), char('0x2e'))
+
+// read a 16bit reg, obviously it's uncalibrated so mostly a useless value :)
+console.log(x.readWordReg(char('0xf6')))
+
+// and we can do the same thing with the read()/write() calls if we wished
+// thought I'd really not recommend it!
+buf = new Buffer(2)
+buf[0] = char('0xf4')
+buf[1] = char('0x2e')
+console.log(buf.toString('hex'))
+x.write(buf)
+
+x.writeByte(char('0xf6'))
+d = x.read(2)

examples/javascript/isr.js

@@ -0,0 +1,10 @@
+#!/usr/bin/env node
+
+var m = require('mraa')
+
+function h() {
+  console.log("HELLO!!!!")
+}
+
+x = new m.Gpio(14)
+x.isr(m.EDGE_BOTH, h)

examples/javascript/rgblcd.js

@@ -0,0 +1,37 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+var m = require('mraa'); //require mraa
+
+// helper function to go from hex val to dec
+function char(x) { return parseInt(x, 16); }
+
+x = new m.I2c(0)
+x.address(0x62)
+x.writeReg(0, 0)
+x.writeReg(1, 0)
+
+x.writeReg(char('0x08'), char('0xAA'))
+x.writeReg(char('0x04'), 255)
+x.writeReg(char('0x02'), 255)

examples/javascript/spi.js

@@ -0,0 +1,41 @@
+#!/usr/bin/env node
+
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+var m = require('mraa'); //require mraa
+
+// helper function to go from hex val to dec
+function char(x) { return parseInt(x, 16); }
+
+x = new m.Spi(0)
+buf = new Buffer(4)
+buf[0] = char('0xf4')
+buf[1] = char('0x2e')
+buf[2] = char('0x3e')
+buf[3] = char('0x4e')
+buf2 = x.write(buf)
+console.log("Sent: " + buf.toString('hex') + ". Received: " + buf2.toString('hex'))
+
+

examples/javascript/uart.js

@@ -0,0 +1,28 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+var m = require('mraa'); //require mraa
+
+u = new m.Uart(0)
+console.log(u.getDevicePath())

examples/mmap-io2.c

@@ -28,9 +28,9 @@
 #include "mraa.h"
 
 int
-main(int argc, char **argv)
+main(int argc, char** argv)
 {
-//! [Interesting]
+    //! [Interesting]
     fprintf(stdout, "hello mraa\n Version: %s\n", mraa_get_version());
     mraa_gpio_context gpio;
     gpio = mraa_gpio_init(2);
@@ -38,10 +38,10 @@ main(int argc, char **argv)
     mraa_gpio_use_mmaped(gpio, 1);
 
     for (;;) {
-        mraa_gpio_write(gpio , 1);
+        mraa_gpio_write(gpio, 1);
         usleep(50000);
         mraa_gpio_write(gpio, 0);
         usleep(50000);
     }
-//! [Interesting]
+    //! [Interesting]
 }

examples/mraa-gpio.c

@@ -0,0 +1,233 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+
+#include "mraa/gpio.h"
+
+struct gpio_source {
+    int pin;
+    mraa_gpio_context context;
+};
+
+void
+print_version()
+{
+    fprintf(stdout, "Version %s on %s\n", mraa_get_version(), mraa_get_platform_name());
+}
+
+void
+print_help()
+{
+    fprintf(stdout, "list              List pins\n");
+    fprintf(stdout, "set pin level     Set pin to level (0/1)\n");
+    fprintf(stdout, "setraw pin level  Set pin to level (0/1) via mmap (if available)\n");
+    fprintf(stdout, "get pin           Get pin level\n");
+    fprintf(stdout, "getraw pin        Get pin level via mmap (if available)\n");
+    fprintf(stdout, "monitor pin       Monitor pin level changes\n");
+    fprintf(stdout, "version           Get mraa version and board name\n");
+}
+
+void
+print_command_error()
+{
+    fprintf(stdout, "Invalid command, options are:\n");
+    print_help();
+}
+
+int
+list_platform_pins(uint8_t platform_offset)
+{
+    int pin_count = mraa_get_platform_pin_count(platform_offset);
+    int i;
+    for (i = 0; i < pin_count; ++i) {
+        if (strcmp(mraa_get_pin_name(i), "INVALID") != 0) {
+            int pin_id = platform_offset > 0 ? mraa_get_sub_platform_id(i) : i;
+            fprintf(stdout, "%02d ", pin_id);
+            fprintf(stdout, "%*s: ", (MRAA_PIN_NAME_SIZE - 1), mraa_get_pin_name(i));
+            if (mraa_pin_mode_test(i, MRAA_PIN_GPIO))
+                fprintf(stdout, "GPIO ");
+            if (mraa_pin_mode_test(i, MRAA_PIN_I2C))
+                fprintf(stdout, "I2C  ");
+            if (mraa_pin_mode_test(i, MRAA_PIN_SPI))
+                fprintf(stdout, "SPI  ");
+            if (mraa_pin_mode_test(i, MRAA_PIN_PWM))
+                fprintf(stdout, "PWM  ");
+            if (mraa_pin_mode_test(i, MRAA_PIN_AIO))
+                fprintf(stdout, "AIO  ");
+            if (mraa_pin_mode_test(i, MRAA_PIN_UART))
+                fprintf(stdout, "UART ");
+            fprintf(stdout, "\n");
+        }
+    }
+    return pin_count;    
+}
+
+int
+list_pins()
+{
+    int pin_count = 0;
+    pin_count += list_platform_pins(MRAA_MAIN_PLATFORM_OFFSET);
+    pin_count += list_platform_pins(MRAA_SUB_PLATFORM_OFFSET);
+    if (pin_count == 0) {
+        fprintf(stdout, "No Pins\n");
+    }
+}
+
+
+mraa_result_t
+gpio_set(int pin, int level, mraa_boolean_t raw)
+{
+    mraa_gpio_context gpio = mraa_gpio_init(pin);
+    if (gpio != NULL) {
+        mraa_gpio_dir(gpio, MRAA_GPIO_OUT);
+        if (raw != 0) {
+            if (mraa_gpio_use_mmaped(gpio, 1) != MRAA_SUCCESS) {
+                fprintf(stdout,
+                        "mmapped access to gpio %d not supported, falling back to normal mode\n", pin);
+            }
+        }
+        mraa_gpio_write(gpio, level);
+        return MRAA_SUCCESS;
+    }
+    return MRAA_ERROR_INVALID_RESOURCE;
+}
+
+mraa_result_t
+gpio_get(int pin, int* level, mraa_boolean_t raw)
+{
+    mraa_gpio_context gpio = mraa_gpio_init(pin);
+    if (gpio != NULL) {
+        mraa_gpio_dir(gpio, MRAA_GPIO_IN);
+        if (raw != 0) {
+            if (mraa_gpio_use_mmaped(gpio, 1) != MRAA_SUCCESS) {
+                fprintf(stdout,
+                        "mmapped access to gpio %d not supported, falling back to normal mode\n", pin);
+            }
+        }
+        *level = mraa_gpio_read(gpio);
+        return MRAA_SUCCESS;
+    }
+    return MRAA_ERROR_INVALID_RESOURCE;
+}
+
+
+void
+gpio_isr_handler(void* args)
+{
+    struct gpio_source* gpio_info = (struct gpio_source*) args;
+    int level = mraa_gpio_read(gpio_info->context);
+    fprintf(stdout, "Pin %d = %d\n", gpio_info->pin, level);
+}
+
+mraa_result_t
+gpio_isr_start(struct gpio_source* gpio_info)
+{
+    gpio_info->context = mraa_gpio_init(gpio_info->pin);
+    if (gpio_info->context != NULL) {
+        mraa_result_t status = mraa_gpio_dir(gpio_info->context, MRAA_GPIO_IN);
+        if (status == MRAA_SUCCESS) {
+            status = mraa_gpio_isr(gpio_info->context, MRAA_GPIO_EDGE_BOTH, &gpio_isr_handler, gpio_info);
+        }
+        return status;
+    } else {
+        return MRAA_ERROR_INVALID_RESOURCE;
+    }
+}
+
+
+mraa_result_t
+gpio_isr_stop(struct gpio_source* gpio_info)
+{
+    mraa_gpio_isr_exit(gpio_info->context);
+    mraa_gpio_close(gpio_info->context);
+    return MRAA_SUCCESS;
+}
+
+
+int
+main(int argc, char** argv)
+{
+    if (argc == 1) {
+        print_command_error();
+    }
+
+    if (argc > 1) {
+        if (strcmp(argv[1], "list") == 0) {
+            list_pins();
+        } else if (strcmp(argv[1], "help") == 0) {
+            print_help();
+        } else if (strcmp(argv[1], "version") == 0) {
+            print_version();
+        } else if ((strcmp(argv[1], "set") == 0) || (strcmp(argv[1], "setraw") == 0)) {
+            if (argc == 4) {
+                int pin = atoi(argv[2]);
+                mraa_boolean_t rawmode = strcmp(argv[1], "setraw") == 0;
+                if (gpio_set(pin, atoi(argv[3]), rawmode) != MRAA_SUCCESS)
+                    fprintf(stdout, "Could not initialize gpio %d\n", pin);
+            } else {
+                print_command_error();
+            }
+        } else if ((strcmp(argv[1], "get") == 0) || (strcmp(argv[1], "getraw") == 0)) {
+            if (argc == 3) {
+                int pin = atoi(argv[2]);
+                int level;
+                mraa_boolean_t rawmode = strcmp(argv[1], "getraw") == 0;
+                if (gpio_get(pin, &level, rawmode) == MRAA_SUCCESS) {
+                    fprintf(stdout, "Pin %d = %d\n", pin, level);
+                } else {
+                    fprintf(stdout, "Could not initialize gpio %d\n", pin);
+                }
+            } else {
+                print_command_error();
+            }
+        } else if (strcmp(argv[1], "monitor") == 0) {
+            if (argc == 3) {
+                int pin = atoi(argv[2]);
+                struct gpio_source gpio_info;
+                gpio_info.pin = pin;
+                if (gpio_isr_start(&gpio_info) == MRAA_SUCCESS) {
+                    fprintf(stdout, "Monitoring level changes to pin %d. Press RETURN to exit.\n", pin);
+                    gpio_isr_handler(&gpio_info);
+                    char aux = 0;
+                    do {
+                        fflush(stdin);
+                        fscanf(stdin, "%c", &aux);
+                    } while (aux != '\n');
+                    gpio_isr_stop(&gpio_info);
+                } else {
+                    fprintf(stdout, "Failed to register ISR for pin %d\n", pin);
+                }
+            } else {
+                print_command_error();
+            }
+        } else {
+            print_command_error();
+        }
+    }
+    return 0;
+}

examples/mraa-i2c.c

@@ -0,0 +1,273 @@
+/*
+ * Author: Henry Bruce <henry.bruce@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include "mraa/i2c.h"
+
+#include "mraa_internal_types.h"
+
+extern mraa_board_t* plat;
+
+void
+print_version()
+{
+    fprintf(stdout, "Version %s on %s", mraa_get_version(), mraa_get_platform_name());
+    if (plat != NULL && plat->sub_platform != NULL)
+        fprintf(stdout, " with %s", plat->sub_platform->platform_name);
+    fprintf(stdout, "\n");
+}
+
+void
+print_help()
+{
+    fprintf(stdout, "version                   Get mraa version and board name\n");
+    fprintf(stdout, "list                      List available busses\n");
+    fprintf(stdout, "detect bus                List detected devices on specified bus\n");
+    fprintf(stdout, "get bus device reg        Get value from specified device register\n");
+    fprintf(stdout, "set bus device reg value  Set specified device register to value\n");
+}
+
+void
+print_command_error()
+{
+    fprintf(stdout, "Invalid command, options are:\n");
+    print_help();
+}
+
+void
+print_bus(mraa_board_t* board)
+{
+    int i, bus;
+    for (i = 0; i < board->i2c_bus_count; ++i) {
+        char* busType;
+        switch (board->platform_type) {
+            case MRAA_INTEL_GALILEO_GEN1:
+            case MRAA_INTEL_GALILEO_GEN2:
+            case MRAA_INTEL_EDISON_FAB_C:
+            case MRAA_INTEL_DE3815:
+            case MRAA_INTEL_MINNOWBOARD_MAX:
+            case MRAA_RASPBERRY_PI:
+            case MRAA_BEAGLEBONE:
+            case MRAA_BANANA:
+                bus = i;
+                busType = "linux";
+                break;
+            case MRAA_FTDI_FT4222:
+                busType = "ft4222";
+                bus = mraa_get_sub_platform_id(i);
+                break;
+            default:
+                busType = "unknown";
+                break;
+        }
+        int id = board->i2c_bus[bus].bus_id;
+        fprintf(stdout, "Bus %3d: id=%02d type=%s ", bus, id, busType);
+        if (i == board->def_i2c_bus)
+            fprintf(stdout, " default");
+        if (id == -1)
+            fprintf(stdout, " disabled");
+
+        fprintf(stdout, "\n");
+    }
+}
+
+void
+print_busses()
+{
+    print_bus(plat);
+    if (mraa_has_sub_platform())
+        print_bus(plat->sub_platform);
+}
+
+mraa_result_t
+i2c_get(int bus, uint8_t device_address, uint8_t register_address, uint8_t* data)
+{
+    mraa_result_t status = MRAA_SUCCESS;
+    mraa_i2c_context i2c = mraa_i2c_init(bus);
+    if (i2c == NULL) {
+        return MRAA_ERROR_NO_RESOURCES;
+    }
+    status = mraa_i2c_address(i2c, device_address);
+    if (status != MRAA_SUCCESS) {
+        goto i2c_get_exit;
+    }
+    status = mraa_i2c_write_byte(i2c, register_address);
+    if (status != MRAA_SUCCESS) {
+        goto i2c_get_exit;
+    }
+    status = mraa_i2c_read(i2c, data, 1) == 1 ? MRAA_SUCCESS : MRAA_ERROR_UNSPECIFIED;
+    if (status != MRAA_SUCCESS) {
+        goto i2c_get_exit;
+    }
+i2c_get_exit:
+    mraa_i2c_stop(i2c);
+    return status;
+}
+
+mraa_result_t
+i2c_set(int bus, uint8_t device_address, uint8_t register_address, uint8_t data)
+{
+    mraa_result_t status = MRAA_SUCCESS;
+    mraa_i2c_context i2c = mraa_i2c_init(bus);
+    if (i2c == NULL) {
+        return MRAA_ERROR_NO_RESOURCES;
+    }
+    status = mraa_i2c_address(i2c, device_address);
+    if (status != MRAA_SUCCESS) {
+        fprintf(stderr, "Could not set i2c device address\n");
+        goto i2c_set_exit;
+    }
+    status = mraa_i2c_write_byte_data(i2c, data, register_address);
+    if (status != MRAA_SUCCESS) {
+        fprintf(stderr, "Could not write to i2c register. Status = %d\n", status);
+        goto i2c_set_exit;
+    }
+i2c_set_exit:
+    mraa_i2c_stop(i2c);
+    return status;
+}
+
+void
+i2c_detect_devices(int bus)
+{
+    mraa_result_t status = MRAA_SUCCESS;
+    mraa_i2c_context i2c = mraa_i2c_init(bus);
+    if (i2c == NULL) {
+        return;
+    }
+    int addr;
+    for (addr = 0x0; addr < 0x80; ++addr) {
+        uint8_t value;
+        if ((addr) % 16 == 0)
+            printf("%02x: ", addr);
+        if (i2c_get(bus, addr, 0, &value) == MRAA_SUCCESS)
+            printf("%02x ", addr);
+        else
+            printf("-- ");
+        if ((addr + 1) % 16 == 0)
+            printf("\n");
+    }
+}
+
+int
+process_command(int argc, char** argv)
+{
+    if (strcmp(argv[1], "help") == 0) {
+        print_help();
+        return 0;
+    } else if (strcmp(argv[1], "version") == 0) {
+        print_version();
+        return 0;
+    } else if (strcmp(argv[1], "list") == 0) {
+        print_busses();
+        return 0;
+    } else if (strcmp(argv[1], "detect") == 0) {
+        if (argc == 3) {
+            int bus = strtol(argv[2], NULL, 0);
+            i2c_detect_devices(bus);
+            return 0;
+        } else {
+            print_command_error();
+            return 1;
+        }
+    } else if ((strcmp(argv[1], "get") == 0)) {
+        if (argc == 5) {
+            int bus = strtol(argv[2], NULL, 0);
+            uint8_t device_address = strtol(argv[3], NULL, 0);
+            uint8_t register_address = strtol(argv[4], NULL, 0);
+            // fprintf(stdout, "Device %02X, Register = %02X\n", device_address, register_address);
+            uint8_t data;
+            if (i2c_get(bus, device_address, register_address, &data) == MRAA_SUCCESS) {
+                fprintf(stdout, "Register %#02X = %#02X\n", register_address, data);
+                return 0;
+            } else {
+                fprintf(stdout, "i2c get failed\n");
+                return 1;
+            }
+        } else {
+            print_command_error();
+            return 1;
+        }
+    } else if ((strcmp(argv[1], "set") == 0)) {
+        if (argc == 6) {
+            int bus = strtol(argv[2], NULL, 0);
+            uint8_t device_address = strtol(argv[3], NULL, 0);
+            uint8_t register_address = strtol(argv[4], NULL, 0);
+            uint8_t value = strtol(argv[5], NULL, 0);
+            fprintf(stdout, "Device %02X, Register = %02X, Value = %02X\n", device_address,
+                    register_address, value);
+            if (i2c_set(bus, device_address, register_address, value) != MRAA_SUCCESS) {
+                fprintf(stdout, "i2c set failed\n");
+                return 0;
+            }
+            return 1;
+        } else {
+            print_command_error();
+            return 1;
+        }
+    } else {
+        print_command_error();
+        return 1;
+    }
+}
+
+void
+run_interactive_mode()
+{
+    char command[80];
+    while (1) {
+        int i, argc = 1;
+        char* argv[32];
+        char* arg;
+        argv[0] = "mraa-i2c";
+        fprintf(stdout, "Command: ");
+        fgets(command, 80, stdin);
+        command[strlen(command) - 1] = 0;
+        if (strcmp(command, "q") == 0)
+            return;
+        char* str = strtok(command, " ");
+        while (str != NULL) {
+            arg = malloc(strlen(str) + 1);
+            argv[argc++] = strcpy(arg, str);
+            str = strtok(NULL, " ");
+        }
+        process_command(argc, argv);
+        for (i = 1; i < argc; ++i)
+            free(argv[i]);
+    }
+}
+
+int
+main(int argc, char** argv)
+{
+    mraa_set_log_level(7);
+    if (argc == 1) {
+        run_interactive_mode();
+        return 0;
+    } else
+        return process_command(argc, argv);
+}

examples/python/aio.py

@@ -25,5 +25,10 @@
 import mraa
 
 print (mraa.getVersion())
-x = mraa.Aio(0)
-print (x.read())
+
+try:
+    x = mraa.Aio(0)
+    print (x.read())
+    print ("%.5f" % x.readFloat())
+except:
+    print ("Are you sure you have an ADC?")

examples/python/bmp85.py

@@ -22,32 +22,32 @@
 # OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
 # WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE
 
-import mraa
+import mraa as m
 
-HMC5883L_CONF_REG_A = 0x00
-HMC5883L_CONF_REG_B =  0x01
-HMC5883L_CONT_MODE = 0x00
-HMC5883L_DATA_REG = 0x03
-GA_1_3_REG = 0x01
+# this example will show the 'advanced' i2c functionality from python i2c
+# read/write
 
-x = mraa.I2c(0)
-x.address(0x1E)
-x.writeReg(HMC5883L_CONF_REG_B, GA_1_3_REG)
-x.writeReg(HMC5883L_CONF_REG_B, HMC5883L_CONT_MODE)
+x = m.I2c(0)
+x.address(0x77)
 
-x.address(0x1E)
-x.write(HMC5883L_DATA_REG)
+# initialise device
+if x.readReg(0xd0) != 0x55:
+  print("error")
 
-# this method takes a char* as an input where sizeof(m) defines the read size
-x.address(0x1E)
-m = "      "
-print (x.read(m))
-print (m)
+# we want to read temperature so write 0x2e into control reg
+x.writeReg(0xf4, 0x2e)
 
-x.address(0x1E)
-x.write(HMC5883L_DATA_REG)
+# read a 16bit reg, obviously it's uncalibrated so mostly a useless value :)
+print(str(x.readWordReg(0xf6)))
 
-# this method simply takes a size_t arg and returns an std::string, however
-# it's less efficient
-x.address(0x1E)
-print (x.read(6))
+# and we can do the same thing with the read()/write() calls if we wished
+# thought I'd really not recommend it!
+
+x.write(bytearray(b'0xf40x2e'))
+
+x.writeByte(0xf6)
+d = x.read(2)
+
+# WARNING: python 3.2+ call
+print(str(d))
+print(int.from_bytes(d, byteorder='little'))

examples/python/hello_isr.py

@@ -25,8 +25,16 @@
 import mraa
 import time
 
+class Counter:
+  count = 0
+
+c = Counter()
+
+# inside a python interupt you cannot use 'basic' types so you'll need to use
+# objects
 def test(args):
   print("wooo")
+  c.count+=1
 
 x = mraa.Gpio(6)
 x.dir(mraa.DIR_IN)

examples/python/rgblcd.py

@@ -28,10 +28,12 @@ import mraa
 # to a nice shade of purple
 x = mraa.I2c(0)
 x.address(0x62)
-x.writeReg(0,0)
-x.writeReg(1,0)
 
-# Be careful that your i2c device can actually handle a 'batch' handling of
-# such data, this is not typical in arduino type devices
-s = "\x08\xAA\x04\xFF\x02\xFF"
-x.write(s)
+# initialise device
+x.writeReg(0, 0)
+x.writeReg(1, 0)
+
+# sent RGB color data
+x.writeReg(0x08, 0xAA)
+x.writeReg(0x04, 255)
+x.writeReg(0x02, 255)

examples/python/spi.py

@@ -0,0 +1,43 @@
+#!/usr/bin/env python
+
+# Author: Brendan Le Foll <brendan.le.foll@intel.com>
+# Copyright (c) 2015 Intel Corporation.
+#
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files (the
+# "Software"), to deal in the Software without restriction, including
+# without limitation the rights to use, copy, modify, merge, publish,
+# distribute, sublicense, and/or sell copies of the Software, and to
+# permit persons to whom the Software is furnished to do so, subject to
+# the following conditions:
+#
+# The above copyright notice and this permission notice shall be
+# included in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+# LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+# OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+# WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE
+
+import mraa as m
+import random as rand
+
+# Excuse the super boring example, I was out of fun devices to play with, this
+# will write and read the same data back to itself, a few 100 times, just short
+# MISO & MOSI on your board
+
+dev = m.Spi(0)
+
+for x in range(0,100):
+  txbuf = bytearray(4)
+  for y in range(0,4):
+    txbuf[y] = rand.randrange(0, 256)
+  rxbuf = dev.write(txbuf)
+  if rxbuf != txbuf:
+    print("We have an error captain!")
+    break
+    exit(1)
+

examples/python/uart.py

@@ -0,0 +1,28 @@
+#!/usr/bin/env python
+
+# Author: Brendan Le Foll <brendan.le.foll@intel.com>
+# Copyright (c) 2015 Intel Corporation.
+#
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files (the
+# "Software"), to deal in the Software without restriction, including
+# without limitation the rights to use, copy, modify, merge, publish,
+# distribute, sublicense, and/or sell copies of the Software, and to
+# permit persons to whom the Software is furnished to do so, subject to
+# the following conditions:
+#
+# The above copyright notice and this permission notice shall be
+# included in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+# LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+# OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+# WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE
+
+import mraa
+
+u = mraa.Uart(0)
+print u.getDevicePath()

examples/spi_max7219.c

@@ -0,0 +1,88 @@
+/*
+ * Author: Michael Ring <mail@michael-ring.org>
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "mraa.h"
+#include <unistd.h>
+#include <stdint.h>
+
+int
+main(int argc, char** argv)
+{
+    //! [Interesting]
+    mraa_spi_context spi;
+    spi = mraa_spi_init(1);
+    if (spi == NULL) {
+        printf("Initialization of spi failed, check syslog for details, exit...\n");
+        exit(1);
+    }
+
+    printf("SPI initialised successfully\n");
+
+    mraa_spi_frequency(spi, 400000);
+    mraa_spi_lsbmode(spi, 0);
+
+    // The MAX7219/21 Chip needs the data in word size
+    if (mraa_spi_bit_per_word(spi, 16) != MRAA_SUCCESS) {
+        printf("Could not set SPI Device to 16Bit mode, exit...\n");
+        exit(1);
+    };
+
+    mraa_spi_write_word(spi, 0x0900); // Do not decode bits
+    mraa_spi_write_word(spi, 0x0a05); // Brightness of LEDs
+    mraa_spi_write_word(spi, 0x0b07); // Show all Scan Lines
+    mraa_spi_write_word(spi, 0x0c01); // Display on
+    mraa_spi_write_word(spi, 0x0f00); // Testmode off
+
+    // Display Pattern on the display
+    uint16_t dataAA55[] = { 0x01aa, 0x0255, 0x03aa, 0x0455, 0x05aa, 0x0655, 0x07aa, 0x0855 };
+    mraa_spi_write_buf_word(spi, dataAA55, 16);
+
+    sleep(2);
+
+    // Display inverted Pattern
+    uint16_t data55AA[] = { 0x0155, 0x02aa, 0x0355, 0x04aa, 0x0555, 0x06aa, 0x0755, 0x08aa };
+    mraa_spi_write_buf_word(spi, data55AA, 16);
+
+    sleep(2);
+
+    // Clear the display
+    uint16_t data[] = { 0x0100, 0x0200, 0x0300, 0x0400, 0x0500, 0x0600, 0x0700, 0x0800 };
+    mraa_spi_write_buf_word(spi, data, 16);
+
+    int i;
+    int j;
+    // cycle through all LED's
+    for (i = 1; i <= 8; i++) {
+        for (j = 0; j < 8; j++) {
+            mraa_spi_write_word(spi, (i << 8) + (1 << j));
+            sleep(1);
+        }
+        mraa_spi_write_word(spi, i << 8);
+    }
+
+    mraa_spi_stop(spi);
+
+    //! [Interesting]
+}

examples/spi_mcp4261.c

@@ -27,32 +27,32 @@
 #include <stdint.h>
 
 int
-main(int argc, char **argv)
+main(int argc, char** argv)
 {
     mraa_init();
-//! [Interesting]
+    //! [Interesting]
     mraa_spi_context spi;
     spi = mraa_spi_init(0);
     unsigned int response = 0;
     printf("Hello, SPI initialised\n");
-    uint8_t data[] = {0x00, 100};
-    uint8_t *recv;
-    while(1) {
+    uint8_t data[] = { 0x00, 100 };
+    uint8_t* recv;
+    while (1) {
         int i;
         for (i = 90; i < 130; i++) {
             data[1] = i;
             recv = mraa_spi_write_buf(spi, data, 2);
-            printf("Writing -%i",i);
-            printf("RECIVED-%i-%i\n",recv[0],recv[1]);
+            printf("Writing -%i", i);
+            printf("RECIVED-%i-%i\n", recv[0], recv[1]);
             usleep(100000);
         }
         for (i = 130; i > 90; i--) {
             data[1] = i;
             recv = mraa_spi_write_buf(spi, data, 2);
-            printf("Writing -%i",i);
-            printf("RECIVED-%i-%i\n",recv[0],recv[1]);
+            printf("Writing -%i", i);
+            printf("RECIVED-%i-%i\n", recv[0], recv[1]);
             usleep(100000);
         }
     }
-//! [Interesting]
+    //! [Interesting]
 }

examples/uart.c

@@ -0,0 +1,50 @@
+/*
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014, 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "stdio.h"
+//! [Interesting]
+#include "mraa.h"
+
+int
+main(int argc, char** argv)
+{
+    mraa_uart_context uart;
+    uart = mraa_uart_init(0);
+
+    if (uart == NULL) {
+        fprintf(stderr, "UART failed to setup\n");
+        return EXIT_FAILURE;
+    }
+
+    char buffer[] = "Hello Mraa!";
+    mraa_uart_write(uart, buffer, sizeof(buffer));
+
+    mraa_uart_stop(uart);
+
+    mraa_deinit();
+
+    return EXIT_SUCCESS;
+}
+//! [Interesting]

include/arm/banana.h

@@ -1,5 +1,6 @@
 /*
  * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Author: Michael Ring <mail@michael-ring.org>
  * Copyright (c) 2014 Intel Corporation.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -22,21 +23,19 @@
  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
-#include "stdio.h"
-//! [Interesting]
-#include "mraa.h"
+#pragma once
 
-int
-main(int argc, char **argv)
-{
-    mraa_uart_context uart;
-    uart = mraa_uart_init(0);
+#ifdef __cplusplus
+extern "C" {
+#endif
 
-    if (uart == NULL) {
-        fprintf(stdout, "UART failed to setup\n");
-    }
+#include "mraa_internal.h"
 
-    mraa_deinit();
-    return 0;
+#define MRAA_BANANA_PI_PINCOUNT 35
+#define MRAA_BANANA_PRO_PINCOUNT 41
+
+mraa_board_t* mraa_banana();
+
+#ifdef __cplusplus
 }
-//! [Interesting]
+#endif

include/arm/beaglebone.h

@@ -0,0 +1,41 @@
+/*
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Author: Michael Ring <mail@michael-ring.org>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mraa_internal.h"
+
+#define MRAA_BEAGLEBONE_BLACK_PINCOUNT 93
+
+mraa_board_t *
+        mraa_beaglebone();
+
+#ifdef __cplusplus
+}
+#endif

include/arm/raspberry_pi.h

@@ -0,0 +1,45 @@
+/*
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Author: Michael Ring <mail@michael-ring.org>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mraa_internal.h"
+
+#define MRAA_RASPBERRY_PI_B_REV_1_PINCOUNT 27
+#define MRAA_RASPBERRY_PI_AB_REV_2_PINCOUNT 35
+#define MRAA_RASPBERRY_PI2_B_REV_1_PINCOUNT 41
+#define MRAA_RASPBERRY_PI_AB_PLUS_PINCOUNT 41
+#define MRAA_RASPBERRY_PI_COMPUTE_MODULE_PINCOUNT 41
+
+mraa_board_t *
+        mraa_raspberry_pi();
+
+#ifdef __cplusplus
+}
+#endif

include/mraa_adv_func.h

@@ -28,36 +28,63 @@
 #include "mraa.h"
 #include "types.h"
 
+// FIXME: Nasty macro to test for presence of function in context structure function table
+#define IS_FUNC_DEFINED(dev, func)   (dev != NULL && dev->advance_func != NULL && dev->advance_func->func != NULL)
+
 typedef struct {
+    mraa_result_t (*gpio_init_internal_replace) (int pin);
     mraa_result_t (*gpio_init_pre) (int pin);
     mraa_result_t (*gpio_init_post) (mraa_gpio_context dev);
 
-    mraa_result_t (*gpio_mode_replace) (mraa_gpio_context dev, gpio_mode_t mode);
-    mraa_result_t (*gpio_mode_pre) (mraa_gpio_context dev, gpio_mode_t mode);
-    mraa_result_t (*gpio_mode_post) (mraa_gpio_context dev, gpio_mode_t mode);
+    mraa_result_t (*gpio_close_pre) (mraa_gpio_context dev);
 
-    mraa_result_t (*gpio_dir_replace) (mraa_gpio_context dev, gpio_dir_t dir);
-    mraa_result_t (*gpio_dir_pre) (mraa_gpio_context dev, gpio_dir_t dir);
-    mraa_result_t (*gpio_dir_post) (mraa_gpio_context dev, gpio_dir_t dir);
+    mraa_result_t (*gpio_mode_replace) (mraa_gpio_context dev, mraa_gpio_mode_t mode);
+    mraa_result_t (*gpio_mode_pre) (mraa_gpio_context dev, mraa_gpio_mode_t mode);
+    mraa_result_t (*gpio_mode_post) (mraa_gpio_context dev, mraa_gpio_mode_t mode);
+    
+    mraa_result_t (*gpio_edge_mode_replace) (mraa_gpio_context dev, mraa_gpio_edge_t mode);
 
+    mraa_result_t (*gpio_dir_replace) (mraa_gpio_context dev, mraa_gpio_dir_t dir);
+    mraa_result_t (*gpio_dir_pre) (mraa_gpio_context dev, mraa_gpio_dir_t dir);
+    mraa_result_t (*gpio_dir_post) (mraa_gpio_context dev, mraa_gpio_dir_t dir);
+
+    int (*gpio_read_replace) (mraa_gpio_context dev);
+    mraa_result_t (*gpio_write_replace) (mraa_gpio_context dev, int value);
     mraa_result_t (*gpio_write_pre) (mraa_gpio_context dev, int value);
     mraa_result_t (*gpio_write_post) (mraa_gpio_context dev, int value);
-
-    mraa_result_t (*gpio_mmaped_write_replace) (mraa_gpio_context dev, int value);
-    mraa_result_t (*gpio_mmaped_write_pre) (mraa_gpio_context dev, int value);
-    mraa_result_t (*gpio_mmaped_write_post) (mraa_gpio_context dev, int value);
+    mraa_result_t (*gpio_mmap_setup) (mraa_gpio_context dev, mraa_boolean_t en);
+    void* (*gpio_interrupt_handler_replace) (mraa_gpio_context dev); 
 
     mraa_result_t (*i2c_init_pre) (unsigned int bus);
+    mraa_result_t (*i2c_init_bus_replace) (mraa_i2c_context dev);
+    mraa_i2c_context (*i2c_init_raw_replace) (unsigned int bus);
     mraa_result_t (*i2c_init_post) (mraa_i2c_context dev);
+    mraa_result_t (*i2c_set_frequency_replace) (mraa_i2c_context dev, mraa_i2c_mode_t mode);
+    mraa_result_t (*i2c_address_replace) (mraa_i2c_context dev, uint8_t addr);
+    int (*i2c_read_replace) (mraa_i2c_context dev, uint8_t* data, int length);
+    uint8_t (*i2c_read_byte_replace) (mraa_i2c_context dev);
+    uint8_t (*i2c_read_byte_data_replace) (mraa_i2c_context dev, const uint8_t command);
+    uint16_t (*i2c_read_word_data_replace) (mraa_i2c_context dev, const uint8_t command);
+    int (*i2c_read_bytes_data_replace) (mraa_i2c_context dev, uint8_t command, uint8_t* data, int length);
+    mraa_result_t (*i2c_write_replace) (mraa_i2c_context dev, const uint8_t* data, int length);
+    mraa_result_t (*i2c_write_byte_replace) (mraa_i2c_context dev, uint8_t data);
+    mraa_result_t (*i2c_write_byte_data_replace) (mraa_i2c_context dev, const uint8_t data, const uint8_t command);
+    mraa_result_t (*i2c_write_word_data_replace) (mraa_i2c_context dev, const uint16_t data, const uint8_t command);
+    mraa_result_t (*i2c_stop_replace) (mraa_i2c_context dev);
 
     mraa_result_t (*aio_get_valid_fp) (mraa_aio_context dev);
     mraa_result_t (*aio_init_pre) (unsigned int aio);
     mraa_result_t (*aio_init_post) (mraa_aio_context dev);
 
+    mraa_pwm_context (*pwm_init_replace) (int pin);
     mraa_result_t (*pwm_init_pre) (int pin);
     mraa_result_t (*pwm_init_post) (mraa_pwm_context pwm);
     mraa_result_t (*pwm_period_replace) (mraa_pwm_context dev, int period);
 
     mraa_result_t (*spi_init_pre) (int bus);
     mraa_result_t (*spi_init_post) (mraa_spi_context spi);
+    mraa_result_t (*spi_lsbmode_replace) (mraa_spi_context dev, mraa_boolean_t lsb);
+
+    mraa_result_t (*uart_init_pre) (int index);
+    mraa_result_t (*uart_init_post) (mraa_uart_context uart);
 } mraa_adv_func_t;

include/mraa_func.h

@@ -0,0 +1,51 @@
+/*
+ * Author: Henry Bruce <henry.bruce@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include "common.h"
+#include "mraa.h"
+#include "types.h"
+
+typedef struct {
+    mraa_i2c_context (*i2c_init_raw) (unsigned int bus);
+    mraa_result_t (*i2c_frequency) (mraa_i2c_context dev, mraa_i2c_mode_t mode);
+    mraa_result_t (*i2c_address) (mraa_i2c_context dev, uint8_t addr);
+    int (*i2c_read) (mraa_i2c_context dev, uint8_t* data, int length);
+    uint8_t (*i2c_read_byte) (mraa_i2c_context dev);
+    uint8_t (*i2c_read_byte_data) (mraa_i2c_context dev, const uint8_t command);
+    uint16_t (*i2c_read_word_data) (mraa_i2c_context dev, const uint8_t command);
+    int (*i2c_read_bytes_data) (mraa_i2c_context dev, uint8_t command, uint8_t* data, int length);
+    mraa_result_t (*i2c_write) (mraa_i2c_context dev, const uint8_t* data, int length);
+    mraa_result_t (*i2c_write_byte) (mraa_i2c_context dev, const uint8_t data);
+    mraa_result_t (*i2c_write_byte_data) (mraa_i2c_context dev, const uint8_t data, const uint8_t command);
+    mraa_result_t (*i2c_write_word_data) (mraa_i2c_context dev, const uint16_t data, const uint8_t command);
+    mraa_result_t (*i2c_stop) (mraa_i2c_context dev);
+} mraa_i2c_func_t;
+
+
+typedef struct {
+    mraa_i2c_func_t* i2c;
+} mraa_func_t;
+

include/mraa_internal.h

@@ -34,67 +34,92 @@ extern "C" {
 #include "mraa_internal_types.h"
 #include "mraa_adv_func.h"
 
-extern mraa_adv_func_t* advance_func;
 extern mraa_board_t* plat;
 
 /**
- * Will check input is valid for gpio and will also setup required multiplexers.
- * @param pin the pin as read from the board surface. i.e IO3 would be 3/
- * @return the pin as found in the pinmap
- */
-unsigned int mraa_setup_gpio(int pin);
-
-/**
- * Will check input is valid for aio and will also setup required multiplexers.
- * @param pin the pin as read from the board surface. i.e A3 would be 3/
- * @return the pin as found in the pinmap
- */
-unsigned int mraa_setup_aio(int pin);
-
-/**
- * Setup i2c interface, sets up multiplexer on device.
+ * Takes in pin information and sets up the multiplexors.
  *
- * @return unsigned int if using /dev/i2c-2 returned would be 2
+ * @param meta
+ * @return mraa result type indicating success of actions.
  */
-unsigned int mraa_setup_i2c(int bus);
-
-/** Setup spi interface, sets up multiplexer on device.
- *
- * @return spi bus type
- */
-mraa_spi_bus_t* mraa_setup_spi(int bus);
+mraa_result_t mraa_setup_mux_mapped(mraa_pin_t meta);
 
 /**
- * Will check input is valid for pwm and will also setup required multiplexers.
- * IF the pin also does gpio (strong chance), DO NOTHING, REV D quirk
- * @param pin the pin as read from the board surface.
- * @return the pwm pin_info_t of that IO pin
+ * runtime detect running x86 platform
+ *
+ * @return mraa_platform_t of the init'ed platform
  */
-mraa_pin_t* mraa_setup_pwm(int pin);
+mraa_platform_t mraa_x86_platform();
 
 /**
- * Setup gpio mux to go straight to SoC, galileo.
+ * runtime detect running arm platforms
  *
- * @param pin physical pin to use
- * @return mraa_mmap_pin_t
+ * @return mraa_platform_t of the init'ed platform
  */
-mraa_mmap_pin_t* mraa_setup_mmap_gpio(int pin);
+mraa_platform_t mraa_arm_platform();
 
 /**
- * Swap Directional mode.
+ * runtime detect running usb platform extender
  *
- * @param pin physical pin to operate on
- * @return out direction to setup. 1 for output 0 for input
+ * @return mraa_platform_t of the detected platform extender
  */
-mraa_result_t mraa_swap_complex_gpio(int pin, int out);
+mraa_platform_t mraa_usb_platform_extender(mraa_board_t* board);
 
 /**
- * Setup uart muxes to exposes the pins physically.
+ * helper function to check if file exists
  *
- * @param index of the uart in the board definition to expose physically
- * @return mraa_result_t of operation
+ * @param filename to check
+ * @return mraa_boolean_t boolean result.
  */
-mraa_result_t mraa_setup_uart(int index);
+mraa_boolean_t mraa_file_exist(const char* filename);
+
+/**
+ * helper function to unglob filenames
+ *
+ * @param filename to unglob
+ * @return char * with the existing filename matching the pattern of input. NULL if there is no
+ *match. Caller must free result
+ */
+char* mraa_file_unglob(const char* filename);
+
+/**
+ * helper function to check if file contains a given text
+ *
+ * @param filename to check
+ * @param content to check in file
+ * @return mraa_boolean_t boolean result.
+ */
+mraa_boolean_t mraa_file_contains(const char* filename, const char* content);
+
+/**
+ * helper function to check if file contains a given text
+ *
+ * @param filename to check
+ * @param content to check in file
+ * @param content2 to check in same line of file
+ * @return mraa_boolean_t boolean result.
+ */
+mraa_boolean_t mraa_file_contains_both(const char* filename, const char* content, const char* content2);
+
+/**
+ * helper function to find out if file that is targeted by a softlink
+ * (partially) matches the given name
+ *
+ * @param filename of the softlink
+ * @param (partial) filename that is matched with the filename of the link-targeted file
+ * @return mraa_boolean_t true when targetname (partially) matches
+ */
+mraa_boolean_t mraa_link_targets(const char* filename, const char* targetname);
+
+/**
+ * helper function to find the first i2c bus containing devname starting from
+ * i2c-n where n is startfrom
+ *
+ * @param device name to match
+ * @param i2c-dev number to start search from
+ * @return the matching i2c-dev bus id or -1
+ */
+int mraa_find_i2c_bus(const char* devname, int startfrom);
 
 #ifdef __cplusplus
 }

include/mraa_internal_types.h

@@ -26,6 +26,9 @@
 #pragma once
 
 #include "common.h"
+#include "mraa.h"
+#include "mraa_func.h"
+#include "mraa_adv_func.h"
 
 // general status failures for internal functions
 #define MRAA_PLATFORM_NO_INIT -3
@@ -45,10 +48,9 @@ struct _gpio {
     pthread_t thread_id; /**< the isr handler thread id */
     int isr_value_fp; /**< the isr file pointer on the value */
     mraa_boolean_t owner; /**< If this context originally exported the pin */
-    mraa_boolean_t mmap;
-    void *reg;
-    unsigned int reg_sz;
-    unsigned int reg_bit_pos;
+    mraa_result_t (*mmap_write) (mraa_gpio_context dev, int value);
+    int (*mmap_read) (mraa_gpio_context dev);
+    mraa_adv_func_t* advance_func; /**< override function table */
     /*@}*/
 };
 
@@ -57,9 +59,26 @@ struct _gpio {
  */
 struct _i2c {
     /*@{*/
-    int hz; /**< frequency of communication */
+    int busnum; /**< the bus number of the /dev/i2c-* device */
     int fh; /**< the file handle to the /dev/i2c-* device */
     int addr; /**< the address of the i2c slave */
+    unsigned long funcs; /**< /dev/i2c-* device capabilities as per https://www.kernel.org/doc/Documentation/i2c/functionality */
+    void *handle; /**< generic handle for non-standard drivers that don't use file descriptors  */
+    mraa_adv_func_t* advance_func; /**< override function table */
+    /*@}*/
+};
+
+/**
+ * A structure representing the SPI device
+ */
+struct _spi {
+    /*@{*/
+    int devfd;          /**< File descriptor to SPI Device */
+    uint32_t mode;      /**< Spi mode see spidev.h */
+    int clock;          /**< clock to run transactions at */
+    mraa_boolean_t lsb; /**< least significant bit mode */
+    unsigned int bpw;   /**< Bits per word */
+    mraa_adv_func_t* advance_func; /**< override function table */
     /*@}*/
 };
 
@@ -71,7 +90,9 @@ struct _pwm {
     int pin; /**< the pin number, as known to the os. */
     int chipid; /**< the chip id, which the pwm resides */
     int duty_fp; /**< File pointer to duty file */
+    int period;  /**< Cache the period to speed up setting duty */
     mraa_boolean_t owner; /**< Owner of pwm context*/
+    mraa_adv_func_t* advance_func; /**< override function table */
     /*@}*/
 };
 
@@ -79,7 +100,166 @@ struct _pwm {
  * A structure representing a Analog Input Channel
  */
 struct _aio {
+    /*@{*/
     unsigned int channel; /**< the channel as on board and ADC module */
     int adc_in_fp; /**< File Pointer to raw sysfs */
     int value_bit; /**< 10 bits by default. Can be increased if board */
+    mraa_adv_func_t* advance_func; /**< override function table */
+    /*@}*/
 };
+
+/**
+ * A structure representing a UART device
+ */
+struct _uart {
+    /*@{*/
+    int index; /**< the uart index, as known to the os. */
+    const char* path; /**< the uart device path. */
+    int fd; /**< file descriptor for device. */
+    mraa_adv_func_t* advance_func; /**< override function table */
+    /*@}*/
+};
+
+/**
+ * A bitfield representing the capabilities of a pin.
+ */
+typedef struct {
+    /*@{*/
+    mraa_boolean_t valid:1;     /**< Is the pin valid at all */
+    mraa_boolean_t gpio:1;      /**< Is the pin gpio capable */
+    mraa_boolean_t pwm:1;       /**< Is the pin pwm capable */
+    mraa_boolean_t fast_gpio:1; /**< Is the pin fast gpio capable */
+    mraa_boolean_t spi:1;       /**< Is the pin spi capable */
+    mraa_boolean_t i2c:1;       /**< Is the pin i2c capable */
+    mraa_boolean_t aio:1;       /**< Is the pin analog input capable */
+    mraa_boolean_t uart:1;       /**< Is the pin uart capable */
+    /*@}*/
+} mraa_pincapabilities_t;
+
+/**
+ * A Structure representing a multiplexer and the required value
+ */
+typedef struct {
+    /*@{*/
+    unsigned int pin;   /**< Raw GPIO pin id */
+    unsigned int value; /**< Raw GPIO value */
+    /*@}*/
+} mraa_mux_t;
+
+typedef struct {
+    mraa_boolean_t complex_pin:1;
+    mraa_boolean_t output_en:1;
+    mraa_boolean_t output_en_high:1;
+    mraa_boolean_t pullup_en:1;
+    mraa_boolean_t pullup_en_hiz:1;
+} mraa_pin_cap_complex_t;
+
+typedef struct {
+    /*@{*/
+    unsigned int pinmap; /**< sysfs pin */
+    unsigned int parent_id; /** parent chip id */
+    unsigned int mux_total; /** Numfer of muxes needed for operation of pin */
+    mraa_mux_t mux[6]; /** Array holding information about mux */
+    unsigned int output_enable; /** Output Enable GPIO, for level shifting */
+    unsigned int pullup_enable; /** Pull-Up enable GPIO, inputs */
+    mraa_pin_cap_complex_t complex_cap;
+    /*@}*/
+} mraa_pin_t;
+
+typedef struct {
+    /*@{*/
+    char mem_dev[32]; /**< Memory device to use /dev/uio0 etc */
+    unsigned int mem_sz; /** Size of memory to map */
+    unsigned int bit_pos; /** Position of value bit */
+    mraa_pin_t gpio; /** GPio context containing none mmap info */
+    /*@}*/
+} mraa_mmap_pin_t;
+
+/**
+ * A Structure representing a physical Pin.
+ */
+typedef struct {
+    /*@{*/
+    char name[MRAA_PIN_NAME_SIZE]; /**< Pin's real world name */
+    mraa_pincapabilities_t capabilites; /**< Pin Capabiliites */
+    mraa_pin_t gpio; /**< GPIO structure */
+    mraa_pin_t pwm;  /**< PWM structure */
+    mraa_pin_t aio;  /**< Anaglog Pin */
+    mraa_mmap_pin_t mmap; /**< GPIO through memory */
+    mraa_pin_t i2c;  /**< i2c bus/pin */
+    mraa_pin_t spi;  /**< spi bus/pin */
+    mraa_pin_t uart;  /**< uart module/pin */
+    /*@}*/
+} mraa_pininfo_t;
+
+/**
+ * A Structure representing the physical properties of a i2c bus.
+ */
+typedef struct {
+    /*@{*/
+    unsigned int bus_id; /**< ID as exposed in the system */
+    unsigned int scl; /**< i2c SCL */
+    unsigned int sda; /**< i2c SDA */
+    // mraa_drv_api_t drv_type; /**< Driver type */
+    /*@}*/
+} mraa_i2c_bus_t;
+
+/**
+ * A Structure representing the physical properties of a spi bus.
+ */
+typedef struct {
+    /*@{*/
+    unsigned int bus_id; /**< The Bus ID as exposed to the system. */
+    unsigned int slave_s; /**< Slave select */
+    mraa_boolean_t three_wire; /**< Is the bus only a three wire system */
+    unsigned int sclk; /**< Serial Clock */
+    unsigned int mosi; /**< Master Out, Slave In. */
+    unsigned int miso; /**< Master In, Slave Out. */
+    unsigned int cs; /**< Chip Select, used when the board is a spi slave */
+    /*@}*/
+} mraa_spi_bus_t;
+
+/**
+ * A Structure representing a uart device.
+ */
+typedef struct {
+    /*@{*/
+    unsigned int index; /**< ID as exposed in the system */
+    int rx; /**< uart rx */
+    int tx; /**< uart tx */
+    const char* device_path; /**< To store "/dev/ttyS1" for example */
+    /*@}*/
+} mraa_uart_dev_t;
+
+/**
+ * A Structure representing a platform/board.
+ */
+
+typedef struct _board_t {
+    /*@{*/
+    unsigned int phy_pin_count; /**< The Total IO pins on board */
+    unsigned int gpio_count; /**< GPIO Count */
+    unsigned int aio_count;  /**< Analog side Count */
+    unsigned int i2c_bus_count; /**< Usable i2c Count */
+    mraa_i2c_bus_t  i2c_bus[12]; /**< Array of i2c */
+    unsigned int def_i2c_bus; /**< Position in array of default i2c bus */
+    unsigned int spi_bus_count; /**< Usable spi Count */
+    mraa_spi_bus_t spi_bus[12];       /**< Array of spi */
+    unsigned int def_spi_bus; /**< Position in array of defult spi bus */
+    unsigned int adc_raw; /**< ADC raw bit value */
+    unsigned int adc_supported; /**< ADC supported bit value */
+    unsigned int def_uart_dev; /**< Position in array of defult uart */
+    unsigned int uart_dev_count; /**< Usable spi Count */
+    mraa_uart_dev_t uart_dev[6]; /**< Array of UARTs */
+    int pwm_default_period; /**< The default PWM period is US */
+    int pwm_max_period; /**< Maximum period in us */
+    int pwm_min_period; /**< Minimum period in us */
+    mraa_platform_t platform_type; /**< Platform type */
+    const char* platform_name; /**< Platform Name pointer */
+    mraa_pininfo_t* pins;     /**< Pointer to pin array */
+    mraa_adv_func_t* adv_func;    /**< Pointer to advanced function disptach table */
+    struct _board_t* sub_platform;     /**< Pointer to sub platform */
+    /*@}*/
+} mraa_board_t;
+
+