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...

47 Commits
php ... v0.5.2

Author SHA1 Message Date
Brendan Le Foll
bb3228ad58 mraa: update to version 0.5.2
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-11-06 15:25:01 +00:00
Matthias Hahn
cf6c3dd144 pwm: syslog message typo correction
Signed-off-by: Matthias Hahn <matthias.hahn@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-11-06 15:23:25 +00:00
Brendan Le Foll
ac02940174 rgblcd.py: update example to use only writeReg()
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-11-05 11:25:42 +00:00
Brendan Le Foll
2896b05dcd rgblcd.js: add i2c example similar to python
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-11-05 11:25:41 +00:00
Brendan Le Foll
d0d0d3ced7 i2c_HMC5883L.c: fix type in i2c buffer
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-11-05 11:25:40 +00:00
Brendan Le Foll
274d5b2d50 i2c: use uint8_t when appropriate and remove char
Object APIs used signed chars for some operations which are not appropriate
when using i2c.

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-11-05 11:25:38 +00:00
Bernd Barsuhn
428c99f940 gpio: fix identation
Signed-off-by: Bernd Barsuhn <bernd.barsuhn@me.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-11-04 10:13:45 +00:00
Bernd Barsuhn
2a851d7cc7 gpio: make mraa_gpio_isr_exit block until the interrupt handling thread is terminated.
Signed-off-by: Bernd Barsuhn <bernd.barsuhn@me.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-11-04 10:12:34 +00:00
Brendan Le Foll
9235ed178a Pwm3-cycle.cpp: add pwm::enable() call to example
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-11-03 15:08:11 +00:00
Anton Krasovsky
cbf4c7447f i2c: add api call to read byte from a specified register
Signed-off-by: Anton Krasovsky <anton@no-mad.net>
Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-31 01:17:17 +00:00
Thomas Ingleby
c852685975 spi: expose defined CS
Add missing information for Gen 2 CS info

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-30 20:41:51 +00:00
Thomas Ingleby
3b01af1da1 pwm: add period limits, warn over syslog
Added minimum, maximum and default period settings to board definitions
PWM will now have a default period as defined in the board defintion.
When using pwm_write() writing 1.0f or above will default to 100%.

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-30 12:22:40 +00:00
Brendan Le Foll
29b0425c9b contributing.md: add a few contribution rules matching UPM
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-10-29 13:14:46 +00:00
Maximilian von Tschirschnitz
a202b3fd17 pwm: fixed wrong line ending being checked by strtol
Move from fopen to POSIX open introduced this bug in strtol

Signed-off-by: Maximilian von Tschirschnitz <maximilian.tschirschnitz@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-10-29 13:01:53 +00:00
Thomas Ingleby
e5c3e491a8 README: add Intel DE3815 to supported systems.
Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-24 14:23:56 +01:00
Thomas Ingleby
af3aa9d8b9 de3815: add initial doc
Also removed printf used during inital implementation.

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-24 14:21:20 +01:00
Thomas Ingleby
b59aecb70d de3815: added PWM support
There are two PWM pins on the custom solutions header.
10-PWM[0] and 11-PWM[1] in mraa.

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-24 14:21:20 +01:00
Thomas Ingleby
7c807b3acc intel_de3815: initial support for Baytrail NUC
* I2C only currently supported, Both bus 0 and 1

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-24 14:21:20 +01:00
Brendan Le Foll
418c198999 spi: attempt to fix spi lsb mode
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-10-23 18:05:36 +01:00
Brendan Le Foll
535d92ab79 i2c: use default i2c bus in board config if invalid
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-10-23 18:05:07 +01:00
Brendan Le Foll
a6b3d384b2 syslog: unify error msg style
syslog messages should be written as <module>: Message in order to increase
readability and usefulness

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-10-22 21:09:11 +01:00
Brendan Le Foll
a67d71ed90 spi: fix mraa_spi_bit_per_word call to use correct ioctl
This should fix #14

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-10-22 21:09:03 +01:00
Brendan Le Foll
8b7c1d80cb intel_edison_fab_c.c: If i2c bus number is invalid use the default bus (6)
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-10-22 20:51:13 +01:00
Thomas Ingleby
232fb2cf5e edison: fix uart missing information
This should fix #19

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-20 19:14:41 +01:00
Thomas Ingleby
77be6da29c uart: add pre uart hook
Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-20 18:43:58 +01:00
Brendan Le Foll
d49f20b7ba i2c: mraa_i2c_frequency now returns correct returns
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-10-20 10:01:53 +01:00
Thomas Ingleby
c8a99ee8e4 edison: add uart definitions
Needed to use a hook to make sure the SoC pins for RX TX are in the
right place.
Also added a line in documentation listed what interface is available.
This resolves #18

Co-Authored-By: Kurt Eckhardt <kurte@rockisland.com>
Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-19 16:29:27 +01:00
Thomas Ingleby
071951e926 uart: add init post hook
Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-19 16:14:24 +01:00
Kurt Eckhardt
0f2329bd95 common: c++ link error if multiple files include header
Header only C++ function definitions need to be static to avoid linking issues
when including the header multiple times.

Signed-off-by: Kurt Eckhardt <kurte@rockisland.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-10-19 09:02:58 +01:00
Brendan Le Foll
d734a661fd spi: make mraa_spi_write_buf call mraa_transfer_buf
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-10-19 09:01:01 +01:00
Kurt Eckhardt
2a11e31052 spi: Add SPI transfer function that pass in RX/TX
When using SPI, I prefer to not have to do malloc/free functions for each
transfer, so why not have a transfer function that you can pass in both
buffers.  With my ILI9341 TFT display code that gave some perf wins, also more
of a win, you can pass in NULL for recv buffer and the underlying device driver
does not have to copy the data.

Signed-off-by: Kurt Eckhardt <kurte@rockisland.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-10-19 09:00:57 +01:00
Brendan Le Foll
54deb01796 exception: Add exceptions when context creation fails
* Exceptions only fired in constructor when it would initialise with a NULL
  context causing segfaults if used any further
* Adds exception.i requirement to mraa.i for node.js and python support

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-10-16 15:07:18 +01:00
Thomas Ingleby
88341c7e56 api: correct mistake in gpio.hpp
Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-15 12:29:08 +01:00
Thomas Ingleby
0a43974175 mraa: update to version 0.5.1
Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-15 11:23:25 +01:00
Thomas Ingleby
5e20a1cc02 doc: add Edison miniboard doc
* Brings to conclusions Fix #10

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-08 18:04:30 +01:00
Thomas Ingleby
23feec94d0 edison: miniboard GPIO mode hook added
Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-08 18:02:53 +01:00
Thomas Ingleby
0cba580ca6 edison: miniboard SPI bus support added
Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-08 17:23:45 +01:00
Thomas Ingleby
1dd5f89b37 edison: miniboard i2c support added for bus 1 & 6
Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-08 17:10:11 +01:00
Thomas Ingleby
03114cbadb edison: add missing PWM hook for miniboard
Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-08 15:24:04 +01:00
Thomas Ingleby
c5102dffba pwm: fix incorrect hook check
Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-08 14:59:37 +01:00
Brendan Le Foll
d1037eda59 Revert "CMakeLists.txt: add DEBUG define when doing a debug build"
This reverts commit 52a48a728a which made debug
builds stop working.

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-10-07 20:20:20 +01:00
Thomas Ingleby
d1717fa2bb edison: add inital miniboard support
* Only GPIO will work currently
* This fixes #11

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-10-07 19:20:03 +01:00
Brendan Le Foll
2b5e38b40c coverity: Fix issues found by coverity scan
* Fix a few resource leaks in error conditions
* Makes strtol() calls safer in pwm module
* Make sure buffer is terminated after read() in aio

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-10-03 22:50:18 +01:00
Brendan Le Foll
4e5ec299ed index.md: add edison link
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-10-03 22:49:01 +01:00
Brendan Le Foll
60f2e639b2 docs: add edison to doxygen doc and coverity instructions
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-10-03 19:00:45 +01:00
Brendan Le Foll
6d5a3d796c gpio: add more error checking for mraa_gpio_context
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-10-03 12:00:11 +01:00
Brendan Le Foll
c5c5c9b700 doc: cleanup internal documentation and naming
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-10-03 10:18:26 +01:00
45 changed files with 1425 additions and 212 deletions

View File

@@ -3,9 +3,8 @@ project (mraa)
FIND_PACKAGE (Threads)
set (CMAKE_CXX_FLAGS_DEBUG "${CMAKE_CXX_FLAGS_DEBUG} -Wall -fno-omit-frame-pointer -DDEBUG")
set (CMAKE_CXX_FLAGS_DEBUG "${CMAKE_CXX_FLAGS_DEBUG} -Wall -fno-omit-frame-pointer")
set (CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -Wall")
set (CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS} -DDEBUG")
# Appends the cmake/modules path to MAKE_MODULE_PATH variable.
set (CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}/cmake/modules ${CMAKE_MODULE_PATH})
@@ -15,10 +14,10 @@ include (GetGitRevisionDescription)
git_describe (VERSION "--tags")
if ("x_${VERSION}" STREQUAL "x_GIT-NOTFOUND")
message (WARNING " - Install git to compile a production libmraa!")
set (VERSION "v0.5.0-dirty")
set (VERSION "v0.5.2-dirty")
endif ()
message (INFO " - MRAA Version ${VERSION}")
message (INFO " - libmraa Version ${VERSION}")
#parse the version information into pieces.
string (REGEX REPLACE "^v([0-9]+)\\..*" "\\1" VERSION_MAJOR "${VERSION}")

View File

@@ -1,4 +1,4 @@
MRAA - Low Level Skeleton Library for Communication on GNU/Linux platforms
libmraa - Low Level Skeleton Library for Communication on GNU/Linux platforms
==============
Library in C/C++ to interface with Galileo & other Intel platforms, in a
@@ -15,6 +15,7 @@ Supported Boards
* [Galileo Gen 1 - Rev D](../master/docs/galileorevd.md)
* [Galileo Gen 2 - Rev H](../master/docs/galileorevh.md)
* [Edison](../master/docs/edison.md)
* [Intel DE3815](../master/docs/intel_de3815.md)
Installing on your board
========

View File

@@ -24,6 +24,7 @@
#pragma once
#include <stdexcept>
#include "aio.h"
namespace mraa {
@@ -45,6 +46,9 @@ class Aio {
*/
Aio(unsigned int pin) {
m_aio = mraa_aio_init(pin);
if (m_aio == NULL) {
throw std::invalid_argument("Invalid AIO pin specified - do you have an ADC?");
}
}
/**
* Aio destructor

View File

@@ -183,6 +183,9 @@ typedef struct {
unsigned int def_uart_dev; /**< Position in array of defult uart */
unsigned int uart_dev_count; /**< Usable spi Count */
mraa_uart_dev_t uart_dev[6]; /**< Array of UARTs */
int pwm_default_period; /**< The default PWM period is US */
int pwm_max_period; /**< Maximum period in us */
int pwm_min_period; /**< Minimum period in us */
mraa_pininfo_t* pins; /**< Pointer to pin array */
/*@}*/
} mraa_board_t;

View File

@@ -44,7 +44,7 @@ namespace mraa {
*
* @return libmraa version (e.g. v0.4.0-20-gb408207)
*/
std::string getVersion()
inline std::string getVersion()
{
std::string ret = mraa_get_version();
return ret;
@@ -59,7 +59,7 @@ std::string getVersion()
* @param priority Value from typically 0 to 99
* @return The priority value set
*/
int setPriority(const unsigned int priority)
inline int setPriority(const unsigned int priority)
{
return mraa_set_priority(priority);
}
@@ -69,7 +69,7 @@ int setPriority(const unsigned int priority)
*
* @return mraa_platform_t Platform type enum
*/
mraa_platform_t getPlatformType()
inline mraa_platform_t getPlatformType()
{
return mraa_get_platform_type();
}
@@ -79,7 +79,7 @@ mraa_platform_t getPlatformType()
*
* @param result the result to print
*/
void printError(mraa_result_t result)
inline void printError(mraa_result_t result)
{
mraa_result_print(result);
}
@@ -91,7 +91,7 @@ void printError(mraa_result_t result)
* @param mode the mode to be tested.
* @return boolean if the mode is supported, 0=false.
*/
bool pinModeTest(int pin, mraa_pinmodes_t mode)
inline bool pinModeTest(int pin, mraa_pinmodes_t mode)
{
return (bool) mraa_pin_mode_test(pin,mode);
}
@@ -101,7 +101,7 @@ bool pinModeTest(int pin, mraa_pinmodes_t mode)
*
* @return raw bits being read from kernel module. Zero if no ADC
*/
unsigned int adcRawBits()
inline unsigned int adcRawBits()
{
return mraa_adc_raw_bits();
}
@@ -111,7 +111,7 @@ unsigned int adcRawBits()
*
* @return return actual bit size the adc value should be understood as.
*/
unsigned int adcSupportedBits()
inline unsigned int adcSupportedBits()
{
return mraa_adc_supported_bits();
}
@@ -122,7 +122,7 @@ unsigned int adcSupportedBits()
*
* @return Result of operation
*/
mraa_result_t setLogLevel(int level)
inline mraa_result_t setLogLevel(int level)
{
return mraa_set_log_level(level);
}

View File

@@ -157,7 +157,8 @@ mraa_result_t mraa_gpio_dir(mraa_gpio_context dev, gpio_dir_t dir);
mraa_result_t mraa_gpio_close(mraa_gpio_context dev);
/**
* Read the Gpio value.
* Read the Gpio value. This can be 0 or 1. A resonse of -1 means that there
* was a fatal error.
*
* @param dev The Gpio context
* @return Result of operation

View File

@@ -25,6 +25,7 @@
#pragma once
#include "gpio.h"
#include <stdexcept>
namespace mraa {
@@ -34,7 +35,7 @@ namespace mraa {
* Gpio Output modes
*/
typedef enum {
MODE_STRONG = 0, /**< No interrupt on Gpio */
MODE_STRONG = 0, /**< Default. Strong High and Low */
MODE_PULLUP = 1, /**< Interupt on rising & falling */
MODE_PULLDOWN = 2, /**< Interupt on rising only */
MODE_HIZ = 3 /**< Interupt on falling only */
@@ -80,12 +81,20 @@ class Gpio {
* you so this may not always work as expected.
*/
Gpio(int pin, bool owner=true, bool raw=false) {
if (raw)
if (raw) {
m_gpio = mraa_gpio_init_raw(pin);
else
}
else {
m_gpio = mraa_gpio_init(pin);
if (!owner)
}
if (m_gpio == NULL) {
throw std::invalid_argument("Invalid GPIO pin specified");
}
if (!owner) {
mraa_gpio_owner(m_gpio, 0);
}
}
/**
* Gpio object destructor, this will only unexport the gpio if we where

View File

@@ -69,7 +69,7 @@ mraa_i2c_context mraa_i2c_init(int bus);
mraa_i2c_context mraa_i2c_init_raw(unsigned int bus);
/**
* Sets the frequency of the i2c context
* Sets the frequency of the i2c context. Most platforms do not support this.
*
* @param dev The i2c context
* @param hz The bus frequency in hertz
@@ -95,6 +95,15 @@ int mraa_i2c_read(mraa_i2c_context dev, uint8_t *data, int length);
*/
uint8_t mraa_i2c_read_byte(mraa_i2c_context dev);
/**
* Read a single byte from i2c context, from designated register
*
* @param dev The i2c context
* @param command The register
* @return The result of the read or -1 if failed
*/
uint8_t mraa_i2c_read_byte_data(mraa_i2c_context dev, uint8_t command);
/**
* Write to an i2c context
*
@@ -123,7 +132,7 @@ mraa_result_t mraa_i2c_write_byte(mraa_i2c_context dev, const uint8_t data);
* general call address.
* @return Result of operation
*/
mraa_result_t mraa_i2c_address(mraa_i2c_context dev, int address);
mraa_result_t mraa_i2c_address(mraa_i2c_context dev, uint8_t address);
/**
* De-inits an mraa_i2c_context device

View File

@@ -25,6 +25,7 @@
#pragma once
#include "i2c.h"
#include <stdexcept>
namespace mraa {
@@ -48,10 +49,15 @@ class I2c {
* @param raw Whether to disable pinmapper for your board
*/
I2c(int bus, bool raw=false) {
if (raw)
if (raw) {
m_i2c = mraa_i2c_init_raw(bus);
else
}
else {
m_i2c = mraa_i2c_init(bus);
}
if (m_i2c == NULL) {
throw std::invalid_argument("Invalid i2c bus");
}
}
/**
* Closes the I2c Bus used. This does not guarrantee the bus will not
@@ -79,7 +85,7 @@ class I2c {
* @param address Communicate to the i2c slave on this address
* @return Result of operation
*/
mraa_result_t address(int address) {
mraa_result_t address(uint8_t address) {
return mraa_i2c_address(m_i2c, address);
}
/**
@@ -87,8 +93,8 @@ class I2c {
*
* @return char read from the bus
*/
unsigned char read() {
return (unsigned char) mraa_i2c_read_byte(m_i2c);
uint8_t read() {
return (uint8_t) mraa_i2c_read_byte(m_i2c);
}
/**
* Read mutliple bytes from the bus
@@ -97,7 +103,7 @@ class I2c {
* @param length Size of read
* @return length of the read or 0 if failed
*/
int read(char *data, size_t length) {
uint8_t read(char *data, size_t length) {
return mraa_i2c_read(m_i2c, (uint8_t*) data, (int) length);
}
/**
@@ -132,18 +138,28 @@ class I2c {
* @param data Value to write to register
* @return Result of operation
*/
mraa_result_t writeReg(char reg, char data) {
const unsigned char buf[2] = {(unsigned char) reg, (unsigned char) data};
mraa_result_t writeReg(uint8_t reg, uint8_t data) {
const uint8_t buf[2] = {reg, data};
return mraa_i2c_write(m_i2c, buf, 2);
}
/**
* Write multiple bytes to the bus
* Read an i2c register
*
* @param reg Register to read from
* @return char read from register
*/
uint8_t readReg(uint8_t reg) {
return mraa_i2c_read_byte_data(m_i2c, reg);
}
/**
* Write a byte on the bus
*
* @param data The byte to send on the bus
* @return Result of operation
*/
mraa_result_t write(char data) {
mraa_result_t write(uint8_t data) {
return mraa_i2c_write_byte(m_i2c, data);
}
private:

View File

@@ -25,6 +25,7 @@
#pragma once
#include "pwm.h"
#include <stdexcept>
namespace mraa {
@@ -47,12 +48,20 @@ class Pwm {
* if the pinmapper exported it
*/
Pwm(int pin, int chipid=-1, bool owner = true) {
if (chipid == -1)
if (chipid == -1) {
m_pwm = mraa_pwm_init(pin);
else
}
else {
m_pwm = mraa_pwm_init_raw(pin, chipid);
if (!owner)
}
if (m_pwm == NULL) {
throw std::invalid_argument("Error initialising PWM on pin");
}
if (!owner) {
mraa_pwm_owner(m_pwm, 0);
}
}
/**
* Pwm destructor

View File

@@ -96,7 +96,7 @@ mraa_result_t mraa_spi_frequency(mraa_spi_context dev, int hz);
uint8_t mraa_spi_write(mraa_spi_context dev, uint8_t data);
/** Write Buffer of bytes to the SPI device. The pointer return has to be
* free'd by the caller.
* free'd by the caller. It will return a NULL pointer in cases of error.
*
* @param dev The Spi context
* @param data to send
@@ -105,6 +105,17 @@ uint8_t mraa_spi_write(mraa_spi_context dev, uint8_t data);
*/
uint8_t* mraa_spi_write_buf(mraa_spi_context dev, uint8_t* data, int length);
/** Transfer Buffer of bytes to the SPI device. Both send and recv buffers
* are passed in
*
* @param dev The Spi context
* @param data to send
* @param rxbuf buffer to recv data back, may be NULL
* @param length elements within buffer, Max 4096
* @return Result of operation
*/
mraa_result_t mraa_spi_transfer_buf(mraa_spi_context dev, uint8_t* data, uint8_t* rxbuf, int length);
/**
* Change the SPI lsb mode
*

View File

@@ -25,6 +25,7 @@
#pragma once
#include "spi.h"
#include <stdexcept>
namespace mraa {
@@ -44,6 +45,10 @@ class Spi {
*/
Spi(int bus) {
m_spi = mraa_spi_init(bus);
if (m_spi == NULL) {
throw std::invalid_argument("Error initialising SPI bus");
}
}
/**
* Closes spi bus
@@ -79,7 +84,9 @@ class Spi {
return (char) mraa_spi_write(m_spi, (uint8_t) data);
}
/**
* Write buffer of bytes to SPI device
* Write buffer of bytes to SPI device The pointer return has to be
* free'd by the caller. It will return a NULL pointer in cases of
* error
*
* @param data buffer to send
* @param length size of buffer to send
@@ -88,6 +95,18 @@ class Spi {
char* write(char* data, size_t length) {
return (char*) mraa_spi_write_buf(m_spi, (uint8_t *) data, (int) length);
}
/**
* Transfer data to and from SPI device Receive pointer may be null if return
* data is not needed.
*
* @param data buffer to send
* @param rxBuf buffer to optionally receive data from spi device
* @param length size of buffer to send
* @return Result of operation
*/
mraa_result_t transfer(char* data, char* rxBuf, size_t length) {
return mraa_spi_transfer_buf(m_spi, (uint8_t *) data, (uint8_t *)rxBuf, (int) length);
}
/**
* Change the SPI lsb mode
*

View File

@@ -40,6 +40,7 @@ typedef enum {
MRAA_INTEL_GALILEO_GEN1 = 0, /**< The Generation 1 Galileo platform (RevD) */
MRAA_INTEL_GALILEO_GEN2 = 1, /**< The Generation 2 Galileo platform (RevG/H) */
MRAA_INTEL_EDISON_FAB_C = 2, /**< The Intel Edison (FAB C) */
MRAA_INTEL_DE3815 = 3, /**< The Intel DE3815 Baytrail NUC */
MRAA_UNKNOWN_PLATFORM = 99 /**< An unknown platform type, typically will load INTEL_GALILEO_GEN1 */
} mraa_platform_t;

View File

@@ -25,6 +25,7 @@
#pragma once
#include "uart.h"
#include <stdexcept>
namespace mraa {
@@ -43,6 +44,10 @@ class Uart {
*/
Uart(int uart) {
m_uart = mraa_uart_init(uart);
if (m_uart == NULL) {
throw std::invalid_argument("Error initialising UART");
}
}
/**
* Uart destructor

View File

@@ -32,3 +32,18 @@ Using clang instead of gcc:
Building with an older version of swig (swig 2.0+) requires the disabling of javascript:
-DBUILDSWIGNODE=OFF
Using coverity
--------------
Static analysis is routinely performed using coverity on libmraa's codebase.
This is the procedure to submit a build to coverity. You'll need to install
coverity-submit for your OS.
~~~~~~~~~~~~~{.sh}
mkdir covbuild/ && cd covbuild
cmake -DBUILDDOC=OFF -DBUILDSWIG=OFF ..
cmake -DBUILDDOC=OFF -DBUILDSWIG=OFF ..
cov-build --dir cov-int make
tar caf mraa.tar..bz2 cov-int
~~~~~~~~~~~~~

View File

@@ -15,3 +15,11 @@ on github.
If you'd rather not use github you are more than welcome to send git formatted
patches to brendan.le.foll@intel.com.
# Basic rules
- Your code must build
- Commits must have a sign-off line by at least yourself
- Commits must be named <file/module>: Some decent description
- Try not to break master. In any commit.
- Try to split commits up logically, you will be asked to rebase them if they
are not.
- Try to stick to the established coding style reguardless of your personal feeling for it!

View File

@@ -4,8 +4,16 @@ Intel Edison {#edison}
Edison is a dual core Silvermont Atom clocked at 500MHz. The Edison
also features 4GB of storage, 1GB ram and onboard wifi and bluetooth.
Currently the Arduino breakout board is supported by libmraa.
Currently Supported boards:
- Intel Arduino board
- Intel breakout board
UART
----
On both the Arduino board and the breakout board, The avaible UART interface is on /dev/ttyMFD1
Intel Arduino board
-------------------
The Edison used with the Arduino board has the following limitations
in libmraa:
@@ -14,3 +22,69 @@ in libmraa:
- SPI exposed is also used for the ADC. Try not to use your own CS.
- ADC kernel module will return 12bit number but the ADC itself only has an
accuracy of 10bits. This ADC is only included on the arduino board.
Intel breakout board
--------------------
- Both I2C buses are avaible 1 & 6
Please see the following table on how the physical pins map to mraa pin numbers
| MRAA Number | Physical Pin | Edison Pin | Notes | Pinmode0 | Pinmode1 | Pinmode2 |
|-------------|--------------|---------------|-------------------------|----------|------------|----------|
| 0 | J17-1 | GP182 | | GPIO-182 | PWM2 | |
| 1 | J17-2 | NC | Nothing from mraa | | | |
| 2 | J17-3 | NC | Nothing from mraa | | | |
| 3 | J17-4 | VIN | Nothing from mraa | | | |
| 4 | J17-5 | GP135 | | GPIO-135 | UART | |
| 5 | J17-6 | RCVR_MODE | Nothing from mraa | | | |
| 6 | J17-7 | GP27 | | GPIO-27 | I2C-6-SCL | |
| 7 | J17-8 | GP20 | | GPIO-20 | I2C-1-SDA | |
| 8 | J17-9 | GP28 | | GPIO-28 | I2C-6-SDA | |
| 9 | J17-10 | GP111 | | GPIO-111 | SPI-5-CS1 | |
| 10 | J17-11 | GP109 | | GPIO-109 | SPI-5-SCK | |
| 11 | J17-12 | GP115 | | GPIO-115 | SPI-5-MOSI | |
| 12 | J17-13 | OSC_CLK_OUT_0 | Nothing from mraa/check | | | |
| 13 | J17-14 | GP128 | | GPIO-128 | UART-1-CTS | |
| 14 | J18-1 | GP13 | | GPIO-13 | PWM1 | |
| 15 | J18-2 | GP165 | | GPIO-165 | | |
| 16 | J18-3 | GPI_PWRBTN_N | Nothing from mraa | | | |
| 17 | J18-4 | MSIC_SLP_CLK2 | Nothing from mraa | | | |
| 18 | J18-5 | V_VBAT_BKUP | Nothing from mraa | | | |
| 19 | J18-6 | GP19 | | GPIO-19 | I2C-1-SCL | |
| 20 | J18-7 | GP12 | PWM0 | GPIO-12 | PWM0 | |
| 21 | J18-8 | GP183 | PWM3 | GPIO-183 | PWM3 | |
| 22 | J18-9 | NC | Nothing from mraa | | | |
| 23 | J18-10 | GP110 | | GPIO-110 | SPI-5-CS0 | |
| 24 | J18-11 | GP114 | | GPIO-114 | SPI-5-MISO | |
| 25 | J18-12 | GP129 | | GPIO-129 | UART-1-RTS | |
| 26 | J18-13 | GP130 | | GPIO-130 | UART-1-RX | |
| 27 | J18-14 | FW_RCVR | Nothing from mraa | | | |
| 28 | J19-1 | NC | Nothing from mraa | | | |
| 29 | J19-2 | V_V1P80 | Nothing from mraa | | | |
| 30 | J19-3 | GND | Nothing from mraa | | | |
| 31 | J19-4 | GP44 | | GPIO-44 | | |
| 32 | J19-5 | GP46 | | GPIO-46 | | |
| 33 | J19-6 | GP48 | | GPIO-48 | | |
| 34 | J19-7 | RESET_OUT | Nothing from mraa | | | |
| 35 | J19-8 | GP131 | | GPIO-131 | UART-1-TX | |
| 36 | J19-9 | GP14 | | GPIO-14 | | |
| 37 | J19-10 | GP40 | | GPIO-40 | SSP2_CLK | |
| 38 | J19-11 | GP43 | | GPIO-43 | SSP2_TXD | |
| 39 | J19-12 | GP77 | | GPIO-77 | SD | |
| 40 | J19-13 | GP82 | | GPIO-82 | SD | |
| 41 | J19-14 | GP83 | | GPIO-83 | SD | |
| 42 | J20-1 | V_VSYS | Nothing from mraa | | | |
| 43 | J20-2 | V_V3P30 | Nothing from mraa | | | |
| 44 | J20-3 | GP134 | | | | |
| 45 | J20-4 | GP45 | | GPIO-45 | | |
| 46 | J20-5 | GP47 | | GPIO-47 | | |
| 47 | J20-6 | GP49 | | GPIO-49 | | |
| 48 | J20-7 | GP15 | | GPIO-15 | | |
| 49 | J20-8 | GP84 | | GPIO-84 | SD | |
| 50 | J20-9 | GP42 | | GPIO-42 | SSP2_RXD | |
| 51 | J20-10 | GP41 | | GPIO-41 | SSP2_FS | |
| 52 | J20-11 | GP78 | | GPIO-78 | SD | |
| 53 | J20-12 | GP79 | | GPIO-79 | SD | |
| 54 | J20-13 | GP80 | | GPIO-80 | SD | |
| 55 | J20-14 | GP81 | | GPIO-81 | SD | |

View File

@@ -1,4 +1,4 @@
MRAA - Low Level Skeleton Library for Communication on Intel platforms
libmraa - Low Level Skeleton Library for Communication on Intel platforms
==============
Library in C/C++ to interface with Galileo & other Intel platforms, in a
@@ -36,24 +36,27 @@ Specific platform information for supported platforms is documented here:
- @ref galileorevd
- @ref galileorevh
- @ref edison
- @ref de3815
### ENV RECOMENDATIONS
All of these are 'optional', however they are recommended. Only a C compiler,
cmake, libm and pthreads are technically required to compile.
- Swig 3.0.1+ built with node.js & python support (0.10.x)
- Swig 3.0.1+ built with node.js (0.10.x) & python support
- doxygen
- sphinx (requires doxygen)
- pygments
## COMPILING
More information on compiling is @ref building page
More information on compiling is @ref building page.
## CONTRIBUTING
Please see the @ref contributing page
Please see the @ref contributing page, the @ref internals page may also be of
use.
## API Changelog
@@ -61,6 +64,23 @@ This changelog is meant as a quick & rough guide to what has changed between
versions. The API is now fairly stable but when new calls/features are added
they are listed here. Anything pre 0.2.x is ignored.
**0.5.2**
* pwm improvement & bugfix
* spi mraa_spi_bit_per_word fix
* new spi transfer function
* i2c object api uses uint8_t
* i2c readReg() calls added
* edison i2c bus now defaults to a sensible value
* edison uart enable support
* edison hardware CS exposed as IO10
* DE3815tykhe NUC support
**0.5.1**
* Intel Edison - Mini breakout board support
* Change to use syslog throughout instead of printing to stderr.
* Fix misc issues brought up throuh coverity scans
* Clear up Analog call documentation
**0.5.0**
* Intel Edison - Arduino board support.
* Boost Allowable i2c busses to 12

38
docs/intel_de3815.md Normal file
View File

@@ -0,0 +1,38 @@
Intel NUC DE3815tykhe {#de3815}
=============
The DE3815 NUC Kit is a single core Atom clocked at 1.46GHz.
http://www.intel.com/content/www/us/en/nuc/nuc-kit-de3815tykhe.html
Interface notes
---------------
**GPIO** Not yet implemented.
**PWM** Functionality for the PWM is provided by the `pwm_lpss` module `CONFIG_PWM_LPSS`
**I2C** Depending on your system you may need to load `i2c-dev`
Custom Solutions Header mapping
-------------------------------
Based on: http://downloadmirror.intel.com/23745/eng/DE3815TYBE_TechProdSpec06.pdf
| MRAA Number | Physical Pin | Function | Notes |
|-------------|--------------|--------------|----------------------|
| 0 | 1 | 1.8V sby | |
| 1 | 2 | GND | |
| 2 | 3 | HDMI_CEC | |
| 3 | 4 | DMIC_CLK | |
| 4 | 5 | 3.3V sby | |
| 5 | 6 | DMIC_DATA | |
| 6 | 7 | Key (no pin) | |
| 7 | 8 | SMB_ALERT# | |
| 8 | 9 | 5V sby (2A) | |
| 9 | 10 | SCI_SMI_GPIO | |
| 10 | 11 | PWM[0] | PWM Chip 0 Channel 0 |
| 11 | 12 | PWM[1] | PWM Chip 0 Channel 1 |
| 12 | 13 | I2C0_CLK | /dev/i2c-0 SCL |
| 13 | 14 | I2C0_DATA | /dev/i2c-0 SDA |
| 14 | 15 | I2C1_CLK | /dev/i2c-1 SCL |
| 15 | 16 | I2C1_DATA | /dev/i2c-1-SDA |
| 16 | 17 | SMB_CLK | |
| 17 | 18 | SMB_DATA | |

130
docs/internals.md Normal file
View File

@@ -0,0 +1,130 @@
libmraa Internals {#internals}
=================
For building see @ref building. This will describe the general internal build
of libmraa and will be useful to developers who'd like to understand more of
how libmraa works or who'd like to add additional platforms. The internals will
deal with the C API as that is the low level API which libmraa is built around.
Note that C++ is simply a header only wrapper of the C API.
libmraa has the philosophy that the board mapping is what we typically use in
the API with the execption of i2c/spi bus numbering as they are typically not
labelled on boards and so we use the kernel numbering scheme. Whilst this can
confuse some, it's typically not an issue as platforms rarely expose more than
one of these for user use and so when this is the case, libmraa will always use
the bus in the pinmapper. For example edison uses i2c #6 but since there is
only one, libmraa will try to be helpful and everything is treated as 6 when
doing a mraa_i2c_init and so when this is the case, libmraa will always use the
bus in the pinmapper. For example edison uses i2c #6 but since there is only
one, libmraa will try to be helpful and everything is treated as 6 when doing a
mraa_i2c_init().
In libmraa, all code is split into 7 modules, src/{i2c, spi, gpio, uart, pwm,
aio and common}. These should be fairly self explanatory in goals/purpose but a
few work in different ways. Public APIs are stored in api/ and internal headers
are in include/
### Logging ###
Logging is now done purely in syslog(). Note that on platforms running systemd
journald will intercept syslog(3) calls and log to the journal instead. You can
set the log mask by using mraa_set_log_level(). Doing a DEBUG build of libmraa
will also cause the DEBUG macro to be defined which will cause the syslog mask
to be unset.
### Contexts ###
libmraa uses contexts to store all information, this context cannot be accessed
by the user and so it's layout can and may be changed without warning to users.
If an init() function fails it will return NULL and further calls with this
context will lead to undefined behaviour.
### Pinmapper ###
The mraa_board_t is defined in mraa/common.h. It's a mostly static structure
initialised during mraa_init(). The pinmap file in
src/{manufacturer}_{boardname}_{revision}.c then fills this array. It's also
where platform hooks can be defined, functions that will be run at various
'hook' points in the code.
The mraa_pininfo_t structure needs to be set for the board pincount (set in a
macro in the platform configuration header. Every pin will have a
mraa_pincapabilities_t which will define what it can do. The doxygen doc
explains how this works but it's essentially a bitfield which needs to be set
for every capability the pin can have. Gpios can have multiple muxes which will
be set at the gpio init before it can be toggled.
### i2c ###
I2c from userspace in GNU/Linux is handled by character devices handled by the
kernel driver i2c-dev. For more details the i2c/dev-interface documentation
file in the kernel is the place to go.
In libmraa, we re-use part of a library - libi2c from RoadNarrows -
i2c/smbus.c. This library simply makes it easier for us to handle the error
conditions that can arrise when writing on i2c buses. Essentially the API is
fairly simple consisting of writes & reads.
Careful - on alot of platforms i2cdetect will often crash, for finding your i2c
addresses please look at your sensors datasheet!
### spi ###
### gpio ###
GPIO is probably the most complicated and odd module in libmraa. It is based on
the gpiolib kernel driver framework which uses sysfs. There is a lot of good
documentation in gpio/sysfs.txt in the kernel docs.
The main issue is that gpios on hobbyist boards typically come with a number of
muxers or level shifters and are often mapped in crazy ways. libmraa's goal is
to make the label on your board match the API :) We hope that pleases you.
Because boards are very different we use alot of platform hooks (@ref hooks) to
make the initialisation work on all platforms. The hope is that simple
platforms with no level shifters or expanders will work with just the pinmap
definition.
GPIOs are typically interfaced via sysfs because that's easier for us but we
can also work with fast gpio. This is typically preffered to do mmap gpio
access. This is however trickier and typically relies on lots of platform
hooks. We do support by default to go hit /dev/mem or another device at
specific addresses to toggle gpios which is how mmap access works on some
boards.
### uart ###
libmraa does not support UART/serial as there are many good libraries that do
this already. In the future we may wrap or use one. However the class exists to
set the pinmapper correctly for uart to work on some platforms.
### pwm ###
### aio ###
### Initialisation ###
mraa_init() needs to be called in order to initialise the platform files or
'pinmap'. Because calling this is tedious libmraa uses a C constructor to run
mraa_init on library load. This means that it is not possible to stop this
running and all functino calls like mraa_set_log_level() will not work during
mraa_init(). This feature is supported by most sane compilers & libcs but you
can turn off CTORS in uclibc, though I've yet to find a configuration with
someone doing that. mraa_init() can be called multiple times if you feel like
being 'safe'.
In the SWIG modulse mraa_init() is called during the %init stage of the module
loading. This is simply to avoid mraa_init() running 'too' early, though I've
never seen an issue in running it in a CTOR.
### SWIG ###
At the time when libmraa was created the only - working - API/wrapper
generation tool that supported nodejs was SWIG. For more general information on
swig please see the swig documentation.
The src/{javascript, python} & src/mraa.i folders contain all the files for the
swig generation. The C++ headers in api/mraa/ are given as input sources to
SWIG. SWIG modules do not link to libmraa (although maybe that would be a good
idea...)

View File

@@ -1,16 +1,25 @@
Hooks can be defined per supported platform to allow for highly custom operations if needed.
This feature of MRAA should only be used by developers defining the board definitions, NOT an end user.
platform-hooks {#hooks}
==============
Hooks can be defined per supported platform to allow for highly custom
operations if needed. This feature of MRAA should only be used by developers
defining the board definitions, NOT an end user.
##Types of Hooks
###REPLACE
Defining a replace function will entirely replace the associate function. This should only be done if your new function can handle everything the mraa function would normally.
Defining a replace function will entirely replace the associate function. This
should only be done if your new function can handle everything the mraa
function would normally.
###PRE
Any functionality defined here will be performed when the main function is called.
Any functionality defined here will be performed when the main function is
called.
###POST
Any functionality perfomed here is done just before the normal function returns. All post functions will have passed into them the return value that would normally be returned.
Any functionality perfomed here is done just before the normal function
returns. All post functions will have passed into them the return value that
would normally be returned.
##Hooks
### GPIO

View File

@@ -49,6 +49,7 @@ int main ()
return MRAA_ERROR_UNSPECIFIED;
}
fprintf(stdout, "Cycling PWM on IO3 (pwm3) \n");
pwm->enable(true);
float value = 0.0f;
while (running == 0) {

View File

@@ -49,6 +49,7 @@ int main ()
spi = new mraa::Spi(0);
char data[] = {0x00, 100};
char rxBuf[2];
char *recv;
while (running == 0) {
int i;
@@ -56,14 +57,18 @@ int main ()
data[1] = i;
recv = spi->write(data, 2);
printf("Writing -%i",i);
printf("RECIVED-%i-%i\n",recv[0],recv[1]);
if (recv) {
printf("RECIVED-%i-%i\n",recv[0],recv[1]);
free(recv);
}
usleep(100000);
}
for (i = 130; i > 90; i--) {
data[1] = i;
recv = spi->write(data, 2);
printf("Writing -%i",i);
printf("RECIVED-%i-%i\n",recv[0],recv[1]);
if (spi->transfer(data, rxBuf, 2) == MRAA_SUCCESS) {
printf("Writing -%i",i);
printf("RECIVED-%i-%i\n",rxBuf[0],rxBuf[1]);
}
usleep(100000);
}

View File

@@ -81,7 +81,7 @@ main(int argc, char **argv)
mraa_init();
float direction = 0;
int16_t x = 0, y = 0, z = 0;
char rx_tx_buf[MAX_BUFFER_LENGTH];
uint8_t rx_tx_buf[MAX_BUFFER_LENGTH];
//! [Interesting]
mraa_i2c_context i2c;

View File

@@ -0,0 +1,37 @@
/*
* Author: Brendan Le Foll <brendan.le.foll@intel.com>
* Copyright (c) 2014 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
var m = require('mraa'); //require mraa
// helper function to go from hex val to dec
function char(x) { return parseInt(x, 16); }
x = new m.I2c(0)
x.address(0x62)
x.writeReg(0, 0)
x.writeReg(1, 0)
x.writeReg(char('0x08'), char('0xAA'))
x.writeReg(char('0x04'), 255)
x.writeReg(char('0x02'), 255)

View File

@@ -25,5 +25,9 @@
import mraa
print (mraa.getVersion())
x = mraa.Aio(0)
print (x.read())
try:
x = mraa.Aio(0)
print (x.read())
except:
print ("Are you sure you have an ADC?")

View File

@@ -28,10 +28,12 @@ import mraa
# to a nice shade of purple
x = mraa.I2c(0)
x.address(0x62)
x.writeReg(0,0)
x.writeReg(1,0)
# Be careful that your i2c device can actually handle a 'batch' handling of
# such data, this is not typical in arduino type devices
s = "\x08\xAA\x04\xFF\x02\xFF"
x.write(s)
# initialise device
x.writeReg(0, 0)
x.writeReg(1, 0)
# sent RGB color data
x.writeReg(0x08, 0xAA)
x.writeReg(0x04, 255)
x.writeReg(0x02, 255)

40
include/intel_de3815.h Normal file
View File

@@ -0,0 +1,40 @@
/*
* Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
* Copyright (c) 2014 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#include "mraa_internal.h"
#define MRAA_INTEL_DE3815_PINCOUNT 18
mraa_board_t*
mraa_intel_de3815();
#ifdef __cplusplus
}
#endif

View File

@@ -60,4 +60,7 @@ typedef struct {
mraa_result_t (*spi_init_pre) (int bus);
mraa_result_t (*spi_init_post) (mraa_spi_context spi);
mraa_result_t (*uart_init_pre) (int index);
mraa_result_t (*uart_init_post) (mraa_uart_context uart);
} mraa_adv_func_t;

View File

@@ -56,7 +56,7 @@ unsigned int mraa_setup_aio(int pin);
*
* @return unsigned int if using /dev/i2c-2 returned would be 2
*/
unsigned int mraa_setup_i2c(int bus);
unsigned int mraa_setup_i2c(int* bus);
/** Setup spi interface, sets up multiplexer on device.
*

View File

@@ -83,3 +83,12 @@ struct _aio {
int adc_in_fp; /**< File Pointer to raw sysfs */
int value_bit; /**< 10 bits by default. Can be increased if board */
};
/**
* A structure representing a UART device
*/
struct _uart {
/*@{*/
int index; /**< the uart index, as known to the os. */
/*@}*/
};

View File

@@ -16,6 +16,7 @@ set (mraa_LIB_SRCS
${PROJECT_SOURCE_DIR}/src/intel_galileo_rev_d.c
${PROJECT_SOURCE_DIR}/src/intel_galileo_rev_g.c
${PROJECT_SOURCE_DIR}/src/intel_edison_fab_c.c
${PROJECT_SOURCE_DIR}/src/intel_de3815.c
# autogenerated version file
${CMAKE_CURRENT_BINARY_DIR}/version.c
)

View File

@@ -47,8 +47,8 @@ aio_get_valid_fp(mraa_aio_context dev)
dev->adc_in_fp = open(file_path, O_RDONLY);
if (dev->adc_in_fp == -1) {
syslog(LOG_ERR, "Failed to open Analog input raw file %s for "
"reading!", file_path);
syslog(LOG_ERR, "aio: Failed to open input raw file %s for reading!",
file_path);
return MRAA_ERROR_INVALID_RESOURCE;
}
@@ -68,15 +68,15 @@ mraa_aio_init(unsigned int aio_channel)
if (checked_pin < 0) {
switch (checked_pin) {
case MRAA_NO_SUCH_IO:
syslog(LOG_ERR, "Invalid analog input channel %d specified",
syslog(LOG_ERR, "aio: Invalid input channel %d specified",
aio_channel);
return NULL;
case MRAA_IO_SETUP_FAILURE:
syslog(LOG_ERR, "Failed to set-up analog input channel %d "
syslog(LOG_ERR, "aio: Failed to set-up input channel %d "
"multiplexer", aio_channel);
return NULL;
case MRAA_PLATFORM_NO_INIT:
syslog(LOG_ERR, "Platform not initialised");
syslog(LOG_ERR, "aio: Platform not initialised");
return NULL;
default:
return NULL;
@@ -86,7 +86,7 @@ mraa_aio_init(unsigned int aio_channel)
//Create ADC device connected to specified channel
mraa_aio_context dev = malloc(sizeof(struct _aio));
if (dev == NULL) {
syslog(LOG_ERR, "Insufficient memory for specified Analog input channel "
syslog(LOG_ERR, "aio: Insufficient memory for specified input channel "
"%d\n", aio_channel);
return NULL;
}
@@ -114,7 +114,7 @@ mraa_aio_init(unsigned int aio_channel)
unsigned int
mraa_aio_read(mraa_aio_context dev)
{
char buffer[16];
char buffer[17];
unsigned int shifter_value = 0;
if (dev->adc_in_fp == -1) {
@@ -123,18 +123,20 @@ mraa_aio_read(mraa_aio_context dev)
lseek(dev->adc_in_fp, 0, SEEK_SET);
if (read(dev->adc_in_fp, buffer, sizeof(buffer)) < 1) {
syslog(LOG_ERR, "Failed to read a sensible value");
syslog(LOG_ERR, "aio: Failed to read a sensible value");
}
// force NULL termination of string
buffer[16] = '\0';
lseek(dev->adc_in_fp, 0, SEEK_SET);
errno = 0;
char *end;
unsigned int analog_value = (unsigned int) strtoul(buffer, &end, 10);
if (end == &buffer[0]) {
syslog(LOG_ERR, "%s is not a decimal number", buffer);
syslog(LOG_ERR, "aio: Value is not a decimal number");
}
else if (errno != 0) {
syslog(LOG_ERR, "errno was set");
syslog(LOG_ERR, "aio: Errno was set");
}
if (dev->value_bit != raw_bits) {
@@ -163,14 +165,10 @@ mraa_aio_close(mraa_aio_context dev)
mraa_result_t
mraa_aio_set_bit(mraa_aio_context dev, int bits)
{
if (dev == NULL) {
syslog(LOG_ERR, "AIO Device not valid");
if (dev == NULL || bits < 1) {
syslog(LOG_ERR, "aio: Device not valid");
return MRAA_ERROR_INVALID_RESOURCE;
}
if (bits < 1) {
syslog(LOG_ERR, "AIO Device not valid");
return MRAA_ERROR_INVALID_PARAMETER;
}
dev->value_bit = bits;
return MRAA_SUCCESS;
}
@@ -179,7 +177,7 @@ int
mraa_aio_get_bit(mraa_aio_context dev)
{
if (dev == NULL) {
syslog(LOG_ERR, "AIO Device not valid");
syslog(LOG_ERR, "aio: Device not valid");
return 0;
}
return dev->value_bit;

View File

@@ -87,6 +87,11 @@ mraa_gpio_init_raw(int pin)
int length;
mraa_gpio_context dev = (mraa_gpio_context) malloc(sizeof(struct _gpio));
if (dev == NULL) {
syslog(LOG_CRIT, "gpio: Failed to allocate memory for context");
return NULL;
}
memset(dev, 0, sizeof(struct _gpio));
dev->value_fp = -1;
dev->isr_value_fp = -1;
@@ -101,12 +106,13 @@ mraa_gpio_init_raw(int pin)
} else {
int export = open(SYSFS_CLASS_GPIO "/export", O_WRONLY);
if (export == -1) {
syslog(LOG_ERR, "Failed to open export for writing");
syslog(LOG_ERR, "gpio: Failed to open export for writing");
free(dev);
return NULL;
}
length = snprintf(bu, sizeof(bu), "%d", dev->pin);
if (write(export, bu, length*sizeof(char)) == -1) {
syslog(LOG_ERR, "Failed to write to export");
syslog(LOG_ERR, "gpio: Failed to write to export");
close(export);
return NULL;
}
@@ -190,11 +196,11 @@ mraa_gpio_interrupt_handler(void* arg)
PyObject *ret;
arglist = Py_BuildValue("(i)", dev->isr_args);
if (arglist == NULL) {
syslog(LOG_ERR, "Py_BuildValue NULL");
syslog(LOG_ERR, "gpio: Py_BuildValue NULL");
} else {
ret = PyEval_CallObject((PyObject*)dev->isr, arglist);
if (ret == NULL) {
syslog(LOG_ERR, "PyEval_CallObject failed");
syslog(LOG_ERR, "gpio: PyEval_CallObject failed");
} else {
Py_DECREF(ret);
}
@@ -229,7 +235,7 @@ mraa_gpio_edge_mode(mraa_gpio_context dev, gpio_edge_t mode)
int edge = open(filepath, O_RDWR);
if (edge == -1) {
syslog(LOG_ERR, "Failed to open edge for writing");
syslog(LOG_ERR, "gpio: Failed to open edge for writing");
return MRAA_ERROR_INVALID_RESOURCE;
}
@@ -253,7 +259,7 @@ mraa_gpio_edge_mode(mraa_gpio_context dev, gpio_edge_t mode)
return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
}
if (write(edge, bu, length*sizeof(char)) == -1) {
syslog(LOG_ERR, "Failed to write to edge");
syslog(LOG_ERR, "gpio: Failed to write to edge");
close(edge);
return MRAA_ERROR_INVALID_RESOURCE;
}
@@ -294,9 +300,10 @@ mraa_gpio_isr_exit(mraa_gpio_context dev)
// stop isr being useful
ret = mraa_gpio_edge_mode(dev, MRAA_GPIO_EDGE_NONE);
if ((dev->thread_id != 0) &&
(pthread_cancel(dev->thread_id) != 0)) {
ret = MRAA_ERROR_INVALID_HANDLE;
if ((dev->thread_id != 0)) {
if ((pthread_cancel(dev->thread_id) != 0) || (pthread_join(dev->thread_id, NULL) != 0)) {
ret = MRAA_ERROR_INVALID_HANDLE;
}
}
// close the filehandle in case it's still open
@@ -339,7 +346,7 @@ mraa_gpio_mode(mraa_gpio_context dev, gpio_mode_t mode)
int drive = open(filepath, O_WRONLY);
if (drive == -1) {
syslog(LOG_ERR, "Failed to open drive for writing");
syslog(LOG_ERR, "gpio: Failed to open drive for writing");
return MRAA_ERROR_INVALID_RESOURCE;
}
@@ -363,7 +370,7 @@ mraa_gpio_mode(mraa_gpio_context dev, gpio_mode_t mode)
return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
}
if (write(drive, bu, length*sizeof(char)) == -1) {
syslog(LOG_ERR, "Failed to write to drive mode");
syslog(LOG_ERR, "gpio: Failed to write to drive mode");
close(drive);
return MRAA_ERROR_INVALID_RESOURCE;
@@ -430,9 +437,12 @@ mraa_gpio_dir(mraa_gpio_context dev, gpio_dir_t dir)
int
mraa_gpio_read(mraa_gpio_context dev)
{
if (dev == NULL)
return -1;
if (dev->value_fp == -1) {
if (mraa_gpio_get_valfp(dev) != MRAA_SUCCESS) {
syslog(LOG_ERR, "Failed to get value file pointer");
syslog(LOG_ERR, "gpio: Failed to get value file pointer");
}
}
else {
@@ -441,18 +451,20 @@ mraa_gpio_read(mraa_gpio_context dev)
}
char bu[2];
if (read(dev->value_fp, bu, 2*sizeof(char)) != 2) {
syslog(LOG_ERR, "Failed to read a sensible value from sysfs");
syslog(LOG_ERR, "gpio: Failed to read a sensible value from sysfs");
return -1;
}
lseek(dev->value_fp, 0, SEEK_SET);
int ret = strtol(bu, NULL, 10);
return ret;
return 0;
return strtol(bu, NULL, 10);
}
mraa_result_t
mraa_gpio_write(mraa_gpio_context dev, int value)
{
if (dev == NULL)
return MRAA_ERROR_INVALID_HANDLE;
if (dev->mmap == 1)
return mraa_gpio_write_register(dev,value);
@@ -485,14 +497,14 @@ mraa_gpio_unexport_force(mraa_gpio_context dev)
{
int unexport = open(SYSFS_CLASS_GPIO "/unexport", O_WRONLY);
if (unexport == -1) {
syslog(LOG_ERR, "Failed to open unexport for writing");
syslog(LOG_ERR, "gpio: Failed to open unexport for writing");
return MRAA_ERROR_INVALID_RESOURCE;
}
char bu[MAX_SIZE];
int length = snprintf(bu, sizeof(bu), "%d", dev->pin);
if (write(unexport, bu, length*sizeof(char)) == -1) {
syslog(LOG_ERR, "Failed to write to unexport");
syslog(LOG_ERR, "gpio: Failed to write to unexport");
close(unexport);
return MRAA_ERROR_INVALID_RESOURCE;
}
@@ -550,7 +562,8 @@ mraa_gpio_use_mmaped(mraa_gpio_context dev, mraa_boolean_t mmap_en)
int fd;
fd = open(mmp->mem_dev, O_RDWR);
if (fd < 1) {
syslog(LOG_ERR, "Unable to open memory device");
syslog(LOG_ERR, "gpio: Unable to open memory device");
close(fd);
return MRAA_ERROR_INVALID_RESOURCE;
}
dev->reg_sz = mmp->mem_sz;

View File

@@ -29,17 +29,17 @@
mraa_i2c_context
mraa_i2c_init(int bus)
{
int checked_pin = mraa_setup_i2c(bus);
int checked_pin = mraa_setup_i2c(&bus);
if (checked_pin < 0) {
switch(checked_pin) {
case MRAA_NO_SUCH_IO:
syslog(LOG_ERR, "No i2c on board");
syslog(LOG_ERR, "i2c: No i2c on board");
return NULL;
case MRAA_IO_SETUP_FAILURE:
syslog(LOG_ERR, "Failed to set-up i2c multiplexer");
syslog(LOG_ERR, "i2c: Failed to set-up i2c multiplexer");
return NULL;
case MRAA_PLATFORM_NO_INIT:
syslog(LOG_ERR, "Platform Not Initialised");
syslog(LOG_ERR, "i2c: Platform Not Initialised");
return NULL;
default: return NULL;
}
@@ -55,13 +55,15 @@ mraa_i2c_init_raw(unsigned int bus)
return NULL;
}
mraa_i2c_context dev = (mraa_i2c_context) malloc(sizeof(struct _i2c));
if (dev == NULL)
if (dev == NULL) {
syslog(LOG_CRIT, "i2c: Failed to allocate memory for context");
return NULL;
}
char filepath[32];
snprintf(filepath, 32, "/dev/i2c-%u", bus);
if ((dev->fh = open(filepath, O_RDWR)) < 1) {
syslog(LOG_ERR, "Failed to open requested i2c port %s", filepath);
syslog(LOG_ERR, "i2c: Failed to open requested i2c port %s", filepath);
}
if (advance_func->i2c_init_post != NULL) {
@@ -79,7 +81,7 @@ mraa_i2c_frequency(mraa_i2c_context dev, int hz)
{
dev->hz = hz;
return MRAA_SUCCESS;
return MRAA_ERROR_FEATURE_NOT_SUPPORTED;
}
int
@@ -96,9 +98,13 @@ uint8_t
mraa_i2c_read_byte(mraa_i2c_context dev)
{
uint8_t byte = i2c_smbus_read_byte(dev->fh);
if (byte < 0) {
return -1;
}
return byte;
}
uint8_t
mraa_i2c_read_byte_data(mraa_i2c_context dev, uint8_t command)
{
uint8_t byte = i2c_smbus_read_byte_data(dev->fh, command);
return byte;
}
@@ -106,7 +112,7 @@ mraa_result_t
mraa_i2c_write(mraa_i2c_context dev, const uint8_t* data, int length)
{
if (i2c_smbus_write_i2c_block_data(dev->fh, data[0], length-1, (uint8_t*) data+1) < 0) {
syslog(LOG_ERR, "Failed to write to i2c");
syslog(LOG_ERR, "i2c: Failed to write");
return MRAA_ERROR_INVALID_HANDLE;
}
return MRAA_SUCCESS;
@@ -116,18 +122,18 @@ mraa_result_t
mraa_i2c_write_byte(mraa_i2c_context dev, const uint8_t data)
{
if (i2c_smbus_write_byte(dev->fh, data) < 0) {
syslog(LOG_ERR, "Failed to write to i2c");
syslog(LOG_ERR, "i2c: Failed to write");
return MRAA_ERROR_INVALID_HANDLE;
}
return MRAA_SUCCESS;
}
mraa_result_t
mraa_i2c_address(mraa_i2c_context dev, int addr)
mraa_i2c_address(mraa_i2c_context dev, uint8_t addr)
{
dev->addr = addr;
dev->addr = (int) addr;
if (ioctl(dev->fh, I2C_SLAVE_FORCE, addr) < 0) {
syslog(LOG_ERR, "Failed to set slave address %d", addr);
syslog(LOG_ERR, "i2c: Failed to set slave address %d", addr);
return MRAA_ERROR_INVALID_HANDLE;
}
return MRAA_SUCCESS;

132
src/intel_de3815.c Normal file
View File

@@ -0,0 +1,132 @@
/*
* Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
* Copyright (c) 2014 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include <stdlib.h>
#include <string.h>
#include "common.h"
#include "intel_de3815.h"
#define MAX_SIZE 64
#define SYSFS_CLASS_GPIO "/sys/class/gpio"
mraa_board_t*
mraa_intel_de3815()
{
mraa_board_t* b = (mraa_board_t*) malloc(sizeof(mraa_board_t));
if (b == NULL)
return NULL;
b->phy_pin_count = 18;
//b->gpio_count = 14;
b->aio_count = 0;
b->adc_raw = 0;
b->adc_supported = 0;
b->pwm_default_period = 500;
b->pwm_max_period = 2147483;
b->pwm_min_period = 1;
b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*MRAA_INTEL_DE3815_PINCOUNT);
strncpy(b->pins[0].name, "1.8v", 8);
b->pins[0].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
strncpy(b->pins[1].name, "GND", 8);
b->pins[1].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
strncpy(b->pins[2].name, "HDMIcec", 8);
b->pins[2].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
strncpy(b->pins[3].name, "DMICclk", 8);
b->pins[3].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
strncpy(b->pins[4].name, "3.3v", 8);
b->pins[4].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
strncpy(b->pins[5].name, "DMICda", 8);
b->pins[5].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
strncpy(b->pins[6].name, "Key", 8);
b->pins[6].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
strncpy(b->pins[7].name, "SMB-A", 8);
b->pins[7].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
strncpy(b->pins[8].name, "5v", 8);
b->pins[8].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
strncpy(b->pins[9].name, "SCI", 8);
b->pins[9].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
strncpy(b->pins[10].name, "PWM0", 8);
b->pins[10].capabilites = (mraa_pincapabilities_t) {1,0,1,0,0,0,0,0};
b->pins[10].pwm.pinmap = 0;
b->pins[10].pwm.parent_id = 0;
b->pins[10].pwm.mux_total = 0;
strncpy(b->pins[11].name, "PWM1", 8);
b->pins[11].capabilites = (mraa_pincapabilities_t) {1,0,1,0,0,0,0,0};
b->pins[11].pwm.pinmap = 0;
b->pins[11].pwm.parent_id = 1;
b->pins[11].pwm.mux_total = 0;
strncpy(b->pins[12].name, "I2C0-SCL", 8);
b->pins[12].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,1,0,0};
b->pins[12].i2c.pinmap = 1;
b->pins[12].i2c.mux_total = 0;
strncpy(b->pins[13].name, "I2C0-SDA", 8);
b->pins[13].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,1,0,0};
b->pins[13].i2c.pinmap = 1;
b->pins[13].i2c.mux_total = 0;
strncpy(b->pins[14].name, "I2C1-SCL", 8);
b->pins[14].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,1,0,0};
b->pins[14].i2c.pinmap = 1;
b->pins[14].i2c.mux_total = 0;
strncpy(b->pins[15].name, "I2C1-SDA", 8);
b->pins[15].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,1,0,0};
b->pins[15].i2c.pinmap = 1;
b->pins[15].i2c.mux_total = 0;
strncpy(b->pins[16].name, "SMB_CLK", 8);
b->pins[16].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
strncpy(b->pins[17].name, "SMB_SDA", 8);
b->pins[17].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
//BUS DEFINITIONS
b->i2c_bus_count = 2;
b->def_i2c_bus = 0;
b->i2c_bus[0].bus_id = 0;
b->i2c_bus[0].sda = 12;
b->i2c_bus[0].scl = 13;
b->i2c_bus[1].bus_id = 1;
b->i2c_bus[1].sda = 14;
b->i2c_bus[1].scl = 15;
b->spi_bus_count = 1;
b->def_spi_bus = 0;
b->spi_bus[0].bus_id = 1;
b->spi_bus[0].slave_s = 0;
b->spi_bus[0].cs = 10;
b->spi_bus[0].mosi = 11;
b->spi_bus[0].miso = 12;
b->spi_bus[0].sclk = 13;
return b;
}

View File

@@ -51,6 +51,7 @@ static mraa_gpio_context tristate;
static mraa_intel_edison_pinmodes_t pinmodes[MRAA_INTEL_EDISON_PINCOUNT];
static unsigned int outputen[] = {248,249,250,251,252,253,254,255,256,257,258,259,260,261,232,233,234,235,236,237};
static unsigned int pullup_map[] = {216,217,218,219,220,221,222,223,224,225,226,227,228,229,208,209,210,211,212,213};
static int miniboard = 0;
static mraa_result_t
mraa_intel_edison_pinmode_change(int sysfs, int mode)
@@ -62,13 +63,14 @@ mraa_intel_edison_pinmode_change(int sysfs, int mode)
snprintf(buffer, MAX_SIZE, SYSFS_PINMODE_PATH "%i/current_pinmux",sysfs);
int modef = open(buffer, O_WRONLY);
if (modef == -1) {
syslog(LOG_ERR, "Failed to open SoC pinmode for opening");
syslog(LOG_ERR, "edison: Failed to open SoC pinmode for opening");
return MRAA_ERROR_INVALID_RESOURCE;
}
char mode_buf[MAX_MODE_SIZE];
int length = sprintf(mode_buf, "mode%u",mode);
if (write(modef, mode_buf, length*sizeof(char)) == -1) {
close(modef);
return MRAA_ERROR_INVALID_RESOURCE;
}
close(modef);
@@ -109,8 +111,14 @@ mraa_intel_edison_gpio_init_post(mraa_gpio_context dev)
if (dev == NULL)
return MRAA_ERROR_INVALID_RESOURCE;
int sysfs = pinmodes[dev->phy_pin].gpio.sysfs;
int mode = pinmodes[dev->phy_pin].gpio.mode;
int sysfs, mode;
if (miniboard == 1) {
sysfs = dev->pin;
mode = 0;
} else {
sysfs = pinmodes[dev->phy_pin].gpio.sysfs;
mode = pinmodes[dev->phy_pin].gpio.mode;
}
mraa_result_t ret = mraa_intel_edison_pinmode_change(sysfs, mode);
return ret;
@@ -119,38 +127,50 @@ mraa_intel_edison_gpio_init_post(mraa_gpio_context dev)
mraa_result_t
mraa_intel_edison_i2c_init_pre(unsigned int bus)
{
if(bus != 6) {
syslog(LOG_ERR, "Edison: You can't use that bus :/");
return MRAA_ERROR_INVALID_RESOURCE;
if (miniboard == 0) {
if(bus != 6) {
syslog(LOG_ERR, "edison: You can't use that bus, switching to bus 6");
bus = 6;
}
mraa_gpio_write(tristate, 0);
mraa_gpio_context io18_gpio = mraa_gpio_init_raw(14);
mraa_gpio_context io19_gpio = mraa_gpio_init_raw(165);
mraa_gpio_dir(io18_gpio, MRAA_GPIO_IN);
mraa_gpio_dir(io19_gpio, MRAA_GPIO_IN);
mraa_gpio_close(io18_gpio);
mraa_gpio_close(io19_gpio);
mraa_gpio_context io18_enable = mraa_gpio_init_raw(236);
mraa_gpio_context io19_enable = mraa_gpio_init_raw(237);
mraa_gpio_dir(io18_enable, MRAA_GPIO_OUT);
mraa_gpio_dir(io19_enable, MRAA_GPIO_OUT);
mraa_gpio_write(io18_enable, 0);
mraa_gpio_write(io19_enable, 0);
mraa_gpio_close(io18_enable);
mraa_gpio_close(io19_enable);
mraa_gpio_context io18_pullup = mraa_gpio_init_raw(212);
mraa_gpio_context io19_pullup = mraa_gpio_init_raw(213);
mraa_gpio_dir(io18_pullup, MRAA_GPIO_IN);
mraa_gpio_dir(io19_pullup, MRAA_GPIO_IN);
mraa_gpio_close(io18_pullup);
mraa_gpio_close(io19_pullup);
mraa_intel_edison_pinmode_change(28, 1);
mraa_intel_edison_pinmode_change(27, 1);
mraa_gpio_write(tristate, 1);
} else {
if(bus != 6 && bus != 1) {
syslog(LOG_ERR, "edison: You can't use that bus, switching to bus 6");
bus = 6;
}
int scl = plat->pins[plat->i2c_bus[bus].scl].gpio.pinmap;
int sda = plat->pins[plat->i2c_bus[bus].sda].gpio.pinmap;
mraa_intel_edison_pinmode_change(sda, 1);
mraa_intel_edison_pinmode_change(scl, 1);
}
mraa_gpio_write(tristate, 0);
mraa_gpio_context io18_gpio = mraa_gpio_init_raw(14);
mraa_gpio_context io19_gpio = mraa_gpio_init_raw(165);
mraa_gpio_dir(io18_gpio, MRAA_GPIO_IN);
mraa_gpio_dir(io19_gpio, MRAA_GPIO_IN);
mraa_gpio_close(io18_gpio);
mraa_gpio_close(io19_gpio);
mraa_gpio_context io18_enable = mraa_gpio_init_raw(236);
mraa_gpio_context io19_enable = mraa_gpio_init_raw(237);
mraa_gpio_dir(io18_enable, MRAA_GPIO_OUT);
mraa_gpio_dir(io19_enable, MRAA_GPIO_OUT);
mraa_gpio_write(io18_enable, 0);
mraa_gpio_write(io19_enable, 0);
mraa_gpio_close(io18_enable);
mraa_gpio_close(io19_enable);
mraa_gpio_context io18_pullup = mraa_gpio_init_raw(212);
mraa_gpio_context io19_pullup = mraa_gpio_init_raw(213);
mraa_gpio_dir(io18_pullup, MRAA_GPIO_IN);
mraa_gpio_dir(io19_pullup, MRAA_GPIO_IN);
mraa_gpio_close(io18_pullup);
mraa_gpio_close(io19_pullup);
mraa_intel_edison_pinmode_change(28, 1);
mraa_intel_edison_pinmode_change(27, 1);
mraa_gpio_write(tristate, 1);
return MRAA_SUCCESS;
}
@@ -205,7 +225,7 @@ mraa_intel_edison_aio_get_fp(mraa_aio_context dev)
dev->adc_in_fp = open(file_path, O_RDONLY);
if (dev->adc_in_fp == -1) {
syslog(LOG_ERR, "Failed to open Analog input raw file %s for "
syslog(LOG_ERR, "edison: Failed to open Analog input raw file %s for "
"reading!", file_path);
return MRAA_ERROR_INVALID_RESOURCE;
}
@@ -217,7 +237,7 @@ mraa_result_t
mraa_intel_edison_aio_init_pre(unsigned int aio)
{
if (aio > plat->aio_count) {
syslog(LOG_ERR, "Invalid analog input channel");
syslog(LOG_ERR, "edison: Invalid analog input channel");
return MRAA_ERROR_INVALID_RESOURCE;
}
@@ -249,6 +269,9 @@ mraa_intel_edison_aio_init_post(mraa_aio_context dev)
mraa_result_t
mraa_intel_edison_pwm_init_pre(int pin)
{
if (miniboard == 1) {
return mraa_intel_edison_pinmode_change(plat->pins[pin].gpio.pinmap, 1);
}
if (pin < 0 || pin > 19)
return MRAA_ERROR_INVALID_RESOURCE;
@@ -283,6 +306,13 @@ mraa_intel_edison_pwm_init_post(mraa_pwm_context pwm)
mraa_result_t
mraa_intel_edison_spi_init_pre(int bus)
{
if (miniboard == 1) {
mraa_intel_edison_pinmode_change(111, 1);
mraa_intel_edison_pinmode_change(115, 1);
mraa_intel_edison_pinmode_change(114, 1);
mraa_intel_edison_pinmode_change(109, 1);
return MRAA_SUCCESS;
}
mraa_gpio_write(tristate, 0);
mraa_gpio_context io10_out = mraa_gpio_init_raw(258);
@@ -341,7 +371,7 @@ mraa_intel_edison_gpio_mode_replace(mraa_gpio_context dev, gpio_mode_t mode)
pullup_e = mraa_gpio_init_raw(pullup_map[dev->phy_pin]);
mraa_result_t sta = mraa_gpio_dir(pullup_e, MRAA_GPIO_IN);
if(sta != MRAA_SUCCESS) {
syslog(LOG_ERR, "Edison: Failed to set gpio mode-pullup");
syslog(LOG_ERR, "edison: Failed to set gpio mode-pullup");
return MRAA_ERROR_INVALID_RESOURCE;
}
@@ -365,7 +395,7 @@ mraa_intel_edison_gpio_mode_replace(mraa_gpio_context dev, gpio_mode_t mode)
sta = mraa_gpio_dir(pullup_e, MRAA_GPIO_OUT);
sta = mraa_gpio_write(pullup_e, value);
if (sta != MRAA_SUCCESS) {
syslog(LOG_ERR, "Edison: Error Setting pullup");
syslog(LOG_ERR, "edison: Error setting pullup");
return sta;
}
}
@@ -373,6 +403,451 @@ mraa_intel_edison_gpio_mode_replace(mraa_gpio_context dev, gpio_mode_t mode)
return MRAA_SUCCESS;
}
mraa_result_t
mraa_intel_edsion_mb_gpio_mode(mraa_gpio_context dev, gpio_mode_t mode)
{
if (dev->value_fp != -1) {
close(dev->value_fp);
dev->value_fp = -1;
}
char filepath[MAX_SIZE];
snprintf(filepath, MAX_SIZE,
SYSFS_PINMODE_PATH "%d/current_pullmode", dev->pin);
int drive = open(filepath, O_WRONLY);
if (drive == -1) {
syslog(LOG_ERR, "edison: Failed to open drive for writing");
return MRAA_ERROR_INVALID_RESOURCE;
}
char bu[MAX_SIZE];
int length;
switch(mode) {
case MRAA_GPIO_STRONG:
close(drive);
return MRAA_SUCCESS;
case MRAA_GPIO_PULLUP:
length = snprintf(bu, sizeof(bu), "pullup");
break;
case MRAA_GPIO_PULLDOWN:
length = snprintf(bu, sizeof(bu), "pulldown");
break;
case MRAA_GPIO_HIZ:
length = snprintf(bu, sizeof(bu), "nopull");
break;
default:
close(drive);
return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
}
if (write(drive, bu, length*sizeof(char)) == -1) {
syslog(LOG_ERR, "edison: Failed to write to drive mode");
close(drive);
return MRAA_ERROR_INVALID_RESOURCE;
}
close(drive);
return MRAA_SUCCESS;
}
mraa_result_t
mraa_intel_edison_uart_init_pre(int index)
{
if (miniboard == 0) {
mraa_gpio_write(tristate, 0);
mraa_gpio_context io0_output = mraa_gpio_init_raw(248);
mraa_gpio_context io0_pullup = mraa_gpio_init_raw(216);
mraa_gpio_context io1_output = mraa_gpio_init_raw(249);
mraa_gpio_context io1_pullup = mraa_gpio_init_raw(217);
mraa_gpio_dir(io0_output, MRAA_GPIO_OUT);
mraa_gpio_dir(io0_pullup, MRAA_GPIO_OUT);
mraa_gpio_dir(io1_output, MRAA_GPIO_OUT);
mraa_gpio_dir(io1_pullup, MRAA_GPIO_IN);
mraa_gpio_write(io0_output, 0);
mraa_gpio_write(io0_pullup, 0);
mraa_gpio_write(io1_output, 1);
mraa_gpio_close(io0_output);
mraa_gpio_close(io0_pullup);
mraa_gpio_close(io1_output);
mraa_gpio_close(io1_pullup);
}
mraa_result_t ret;
ret = mraa_intel_edison_pinmode_change(130,1); //IO0 RX
ret = mraa_intel_edison_pinmode_change(131,1); //IO1 TX
return ret;
}
mraa_result_t
mraa_intel_edison_uart_init_post(mraa_uart_context uart)
{
return mraa_gpio_write(tristate, 1);
}
mraa_result_t
mraa_intel_edsion_miniboard(mraa_board_t* b)
{
miniboard = 1;
b->phy_pin_count = 56;
b->gpio_count = 56; // A bit of a hack I suppose
b->aio_count = 0;
b->pwm_default_period = 5000;
b->pwm_max_period = 218453;
b->pwm_min_period = 1;
b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*56);
advance_func->gpio_init_post = &mraa_intel_edison_gpio_init_post;
advance_func->pwm_init_pre = &mraa_intel_edison_pwm_init_pre;
advance_func->i2c_init_pre = &mraa_intel_edison_i2c_init_pre;
advance_func->spi_init_pre = &mraa_intel_edison_spi_init_pre;
advance_func->gpio_mode_replace = &mraa_intel_edsion_mb_gpio_mode;
advance_func->uart_init_post = &mraa_intel_edison_uart_init_post;
int pos = 0;
strncpy(b->pins[pos].name, "J17-1", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[pos].gpio.pinmap = 182;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].pwm.pinmap = 2;
b->pins[pos].pwm.parent_id = 0;
b->pins[pos].pwm.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J17-2", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
pos++;
strncpy(b->pins[pos].name, "J17-3", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
pos++;
strncpy(b->pins[pos].name, "J17-4", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
pos++;
strncpy(b->pins[pos].name, "J17-5", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 135;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J17-6", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
pos++;
strncpy(b->pins[pos].name, "J17-7", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,0,0};
b->pins[pos].gpio.pinmap = 27;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].i2c.pinmap = 1;
b->pins[pos].i2c.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J17-8", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,0,0};
b->pins[pos].gpio.pinmap = 20;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].i2c.pinmap = 1;
b->pins[pos].i2c.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J17-9", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,0,0};
b->pins[pos].gpio.pinmap = 28;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].i2c.pinmap = 1;
b->pins[pos].i2c.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J17-10", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
b->pins[pos].gpio.pinmap = 111;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].spi.pinmap = 5;
b->pins[pos].spi.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J17-11", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
b->pins[pos].gpio.pinmap = 109;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].spi.pinmap = 5;
b->pins[pos].spi.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J17-12", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
b->pins[pos].gpio.pinmap = 115;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].spi.pinmap = 5;
b->pins[pos].spi.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J17-13", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
pos++;
strncpy(b->pins[pos].name, "J17-14", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 128;
b->pins[pos].gpio.parent_id = 0;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J18-1", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[pos].gpio.pinmap = 13;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].pwm.pinmap = 1;
b->pins[pos].pwm.parent_id = 0;
b->pins[pos].pwm.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J18-2", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 165;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J18-3", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
pos++;
strncpy(b->pins[pos].name, "J18-4", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
pos++;
strncpy(b->pins[pos].name, "J18-5", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
pos++;
strncpy(b->pins[pos].name, "J18-6", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,0,0};
b->pins[pos].gpio.pinmap = 19;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].i2c.pinmap = 1;
b->pins[pos].i2c.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J18-7", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[pos].gpio.pinmap = 12;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].pwm.pinmap = 0;
b->pins[pos].pwm.parent_id = 0;
b->pins[pos].pwm.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J18-8", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[pos].gpio.pinmap = 182;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].pwm.pinmap = 3;
b->pins[pos].pwm.parent_id = 0;
b->pins[pos].pwm.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J18-9", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
pos++;
strncpy(b->pins[pos].name, "J18-10", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
b->pins[pos].gpio.pinmap = 110;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].spi.pinmap = 5;
b->pins[pos].spi.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J18-11", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
b->pins[pos].gpio.pinmap = 114;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].spi.pinmap = 5;
b->pins[pos].spi.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J18-12", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 129;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J18-13", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,1};
b->pins[pos].gpio.pinmap = 130;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].uart.pinmap = 0;
b->pins[pos].uart.parent_id = 0;
b->pins[pos].uart.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J18-14", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
pos++;
strncpy(b->pins[pos].name, "J19-1", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
pos++;
strncpy(b->pins[pos].name, "J19-2", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
pos++;
strncpy(b->pins[pos].name, "J19-3", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
pos++;
strncpy(b->pins[pos].name, "J19-4", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 44;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J19-5", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 46;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J19-6", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 48;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J19-7", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
pos++;
strncpy(b->pins[pos].name, "J19-8", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,1};
b->pins[pos].gpio.pinmap = 131;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].uart.pinmap = 0;
b->pins[pos].uart.parent_id = 0;
b->pins[pos].uart.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J19-9", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 14;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J19-10", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 40;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J19-11", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 43;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J19-12", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 77;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J19-13", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 82;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J19-14", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 83;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J20-1", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
pos++;
strncpy(b->pins[pos].name, "J20-2", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
pos++;
strncpy(b->pins[pos].name, "J20-3", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
pos++;
strncpy(b->pins[pos].name, "J20-4", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 45;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J20-5", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 47;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J20-6", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 49;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J20-7", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 15;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J20-8", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 84;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J20-9", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 42;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J20-10", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 41;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J20-11", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 78;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J20-12", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 79;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J20-13", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 80;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "J20-14", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
b->pins[pos].gpio.pinmap = 81;
b->pins[pos].gpio.mux_total = 0;
pos++;
//BUS DEFINITIONS
b->i2c_bus_count = 9;
b->def_i2c_bus = 6;
int ici;
for (ici = 0; ici < 9; ici++) {
b->i2c_bus[ici].bus_id = -1;
}
b->i2c_bus[1].bus_id = 1;
b->i2c_bus[1].sda = 7;
b->i2c_bus[1].scl = 19;
b->i2c_bus[6].bus_id = 6;
b->i2c_bus[6].sda = 8;
b->i2c_bus[6].scl = 6;
b->spi_bus_count = 1;
b->def_spi_bus = 0;
b->spi_bus[0].bus_id = 5;
b->spi_bus[0].slave_s = 1;
b->spi_bus[0].cs = 23;
b->spi_bus[0].mosi = 11;
b->spi_bus[0].miso = 24;
b->spi_bus[0].sclk = 10;
b->uart_dev_count = 1;
b->def_uart_dev = 0;
b->uart_dev[0].rx = 26;
b->uart_dev[0].tx = 35;
return MRAA_SUCCESS;
}
mraa_board_t*
mraa_intel_edison_fab_c()
@@ -381,6 +856,18 @@ mraa_intel_edison_fab_c()
if (b == NULL)
return NULL;
// This seciton will also check if the arduino board is there
tristate = mraa_gpio_init_raw(214);
if (tristate == NULL) {
syslog(LOG_INFO, "edison: Failed to initialise Arduino board TriState,\
assuming Intel Edison Miniboard\n");
if (mraa_intel_edsion_miniboard(b) != MRAA_SUCCESS) {
free(b);
return NULL;
}
return b;
}
// Now Assuming the edison is attached to the Arduino board.
b->phy_pin_count = 20;
b->gpio_count = 14;
b->aio_count = 6;
@@ -397,32 +884,37 @@ mraa_intel_edison_fab_c()
advance_func->spi_init_pre = &mraa_intel_edison_spi_init_pre;
advance_func->spi_init_post = &mraa_intel_edison_spi_init_post;
advance_func->gpio_mode_replace = &mraa_intel_edison_gpio_mode_replace;
advance_func->uart_init_pre = &mraa_intel_edison_uart_init_pre;
advance_func->uart_init_post = &mraa_intel_edison_uart_init_post;
b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*MRAA_INTEL_EDISON_PINCOUNT);
tristate = mraa_gpio_init_raw(214);
if (tristate == NULL) {
syslog(LOG_CRIT, "Intel Edison Failed to initialise Arduino board TriState,\
check i2c devices! FATAL\n");
return NULL;
}
mraa_gpio_dir(tristate, MRAA_GPIO_OUT);
mraa_intel_edison_misc_spi();
b->adc_raw = 12;
b->adc_supported = 10;
b->pwm_default_period = 5000;
b->pwm_max_period = 218453;
b->pwm_min_period = 1;
strncpy(b->pins[0].name, "IO0", 8);
b->pins[0].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[0].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,1};
b->pins[0].gpio.pinmap = 130;
b->pins[0].gpio.parent_id = 0;
b->pins[0].gpio.mux_total = 0;
b->pins[0].uart.pinmap = 0;
b->pins[0].uart.parent_id = 0;
b->pins[0].uart.mux_total = 0;
strncpy(b->pins[1].name, "IO1", 8);
b->pins[1].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[1].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,1};
b->pins[1].gpio.pinmap = 131;
b->pins[1].gpio.parent_id = 0;
b->pins[1].gpio.mux_total = 0;
b->pins[1].uart.pinmap = 0;
b->pins[1].uart.parent_id = 0;
b->pins[1].uart.mux_total = 0;
strncpy(b->pins[2].name, "IO2", 8);
b->pins[2].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
@@ -634,6 +1126,11 @@ mraa_intel_edison_fab_c()
b->spi_bus[0].miso = 12;
b->spi_bus[0].sclk = 13;
b->uart_dev_count = 1;
b->def_uart_dev = 0;
b->uart_dev[0].rx = 0;
b->uart_dev[0].tx = 1;
int il;
for (il =0; il < MRAA_INTEL_EDISON_PINCOUNT; il++) {
pinmodes[il].gpio.sysfs = -1;

View File

@@ -42,6 +42,9 @@ mraa_intel_galileo_rev_d()
b->adc_raw = 12;
b->adc_supported = 10;
b->pwm_default_period = 500;
b->pwm_max_period = 7968;
b->pwm_min_period = 1;
b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*MRAA_INTEL_GALILEO_REV_D_PINCOUNT);

View File

@@ -84,7 +84,7 @@ mraa_intel_galileo_gen2_pwm_period_replace(mraa_pwm_context dev, int period)
int period_f = open(bu, O_RDWR);
if (period_f == -1) {
syslog(LOG_ERR, "Failed to open period for writing!");
syslog(LOG_ERR, "galileo2: Failed to open period for writing!");
return MRAA_ERROR_INVALID_RESOURCE;
}
char out[MAX_SIZE];
@@ -110,7 +110,7 @@ mraa_intel_galileo_gen2_gpio_mode_replace(mraa_gpio_context dev, gpio_mode_t mod
pullup_e = mraa_gpio_init_raw(pullup_map[dev->phy_pin]);
mraa_result_t sta = mraa_gpio_dir(pullup_e, MRAA_GPIO_IN);
if (sta != MRAA_SUCCESS) {
syslog(LOG_ERR, "Galileo Gen 2: Failed to set gpio pullup");
syslog(LOG_ERR, "galileo2: Failed to set gpio pullup");
return MRAA_ERROR_INVALID_RESOURCE;
}
@@ -119,7 +119,7 @@ mraa_intel_galileo_gen2_gpio_mode_replace(mraa_gpio_context dev, gpio_mode_t mod
int drive = open(filepath, O_WRONLY);
if (drive == -1) {
syslog(LOG_ERR, "Failed to open drive for writing");
syslog(LOG_ERR, "galileo2: Failed to open drive for writing");
return MRAA_ERROR_INVALID_RESOURCE;
}
@@ -147,15 +147,16 @@ mraa_intel_galileo_gen2_gpio_mode_replace(mraa_gpio_context dev, gpio_mode_t mod
return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
}
if (write(drive, bu, length*sizeof(char)) == -1) {
syslog(LOG_ERR, "Failed to write to drive mode");
syslog(LOG_ERR, "galileo2: Failed to write to drive mode");
close(drive);
return MRAA_ERROR_INVALID_RESOURCE;
}
if (value != -1) {
sta = mraa_gpio_dir(pullup_e, MRAA_GPIO_OUT);
sta = mraa_gpio_write(pullup_e, value);
sta += mraa_gpio_write(pullup_e, value);
if (sta != MRAA_SUCCESS) {
syslog(LOG_ERR, "Galileo Gen 2: Error Setting pullup");
syslog(LOG_ERR, "galileo2: Error Setting pullup");
close(drive);
return sta;
}
}
@@ -176,6 +177,9 @@ mraa_intel_galileo_gen2()
b->aio_count = 6;
b->adc_raw = 12;
b->adc_supported = 10;
b->pwm_default_period = 5000;
b->pwm_max_period = 41666;
b->pwm_min_period = 666;
advance_func->gpio_dir_pre = &mraa_intel_galileo_gen2_dir_pre;
advance_func->i2c_init_pre = &mraa_intel_galileo_gen2_i2c_init_pre;
@@ -361,7 +365,7 @@ mraa_intel_galileo_gen2()
b->pins[9].pwm.mux[1].value = 0;
strncpy(b->pins[10].name, "IO10", 8);
b->pins[10].capabilites = (mraa_pincapabilities_t) {1,1,1,1,0,0,0};
b->pins[10].capabilites = (mraa_pincapabilities_t) {1,1,1,1,1,0,0};
b->pins[10].gpio.pinmap = 10;
b->pins[10].gpio.parent_id = 0;
b->pins[10].gpio.mux_total = 1;
@@ -388,6 +392,10 @@ mraa_intel_galileo_gen2()
b->pins[10].mmap.gpio.mux[2].value = 0;
b->pins[10].mmap.mem_sz = 0x1000;
b->pins[10].mmap.bit_pos = 2;
b->pins[10].spi.parent_id = 1;
b->pins[10].spi.mux_total = 1;
b->pins[10].spi.mux[0].pin = 74;
b->pins[10].spi.mux[0].value = 0;
strncpy(b->pins[11].name, "IO11", 8);
b->pins[11].capabilites = (mraa_pincapabilities_t) {1,1,1,0,1,0,0};

View File

@@ -32,6 +32,7 @@
#include "intel_galileo_rev_d.h"
#include "intel_galileo_rev_g.h"
#include "intel_edison_fab_c.h"
#include "intel_de3815.h"
#include "gpio.h"
#include "version.h"
@@ -89,6 +90,8 @@ mraa_init()
platform_type = MRAA_INTEL_EDISON_FAB_C;
} else if (strncmp(line, "SALT BAY", 7) == 0) {
platform_type = MRAA_INTEL_EDISON_FAB_C;
} else if (strncmp(line, "DE3815", 6) == 0) {
platform_type = MRAA_INTEL_DE3815;
} else {
platform_type = MRAA_INTEL_GALILEO_GEN1;
}
@@ -110,6 +113,9 @@ mraa_init()
case MRAA_INTEL_EDISON_FAB_C:
plat = mraa_intel_edison_fab_c();
break;
case MRAA_INTEL_DE3815:
plat = mraa_intel_de3815();
break;
default:
plat = mraa_intel_galileo_rev_d();
syslog(LOG_ERR, "Platform not found, initialising MRAA_INTEL_GALILEO_GEN1");
@@ -198,7 +204,7 @@ mraa_setup_aio(int aio)
}
unsigned int
mraa_setup_i2c(int bus)
mraa_setup_i2c(int* bus)
{
if (plat == NULL)
return MRAA_PLATFORM_NO_INIT;
@@ -207,27 +213,27 @@ mraa_setup_i2c(int bus)
syslog(LOG_ERR, "No i2c buses defined in platform");
return MRAA_NO_SUCH_IO;
}
if (bus >= plat->i2c_bus_count) {
if (*bus >= plat->i2c_bus_count) {
syslog(LOG_ERR, "Above i2c bus count");
return MRAA_NO_SUCH_IO;
}
if (plat->i2c_bus[bus].bus_id == -1) {
syslog(LOG_ERR, "Platform not currently allowed for mraa use");
return MRAA_NO_SUCH_IO;
if (plat->i2c_bus[*bus].bus_id == -1) {
syslog(LOG_ERR, "Invalid i2c bus, moving to default i2c bus");
*bus = plat->def_i2c_bus;
}
int pos = plat->i2c_bus[bus].sda;
int pos = plat->i2c_bus[*bus].sda;
if (plat->pins[pos].i2c.mux_total > 0)
if (mraa_setup_mux_mapped(plat->pins[pos].i2c) != MRAA_SUCCESS)
return MRAA_IO_SETUP_FAILURE;
pos = plat->i2c_bus[bus].scl;
pos = plat->i2c_bus[*bus].scl;
if (plat->pins[pos].i2c.mux_total > 0)
if (mraa_setup_mux_mapped(plat->pins[pos].i2c) != MRAA_SUCCESS)
return MRAA_IO_SETUP_FAILURE;
return plat->i2c_bus[bus].bus_id;
return plat->i2c_bus[*bus].bus_id;
}
mraa_spi_bus_t*
@@ -263,6 +269,11 @@ mraa_setup_spi(int bus)
if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS)
return NULL;
pos = plat->spi_bus[bus].cs;
if (plat->pins[pos].spi.mux_total > 0)
if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS)
return NULL;
mraa_spi_bus_t *spi = &(plat->spi_bus[bus]);
return spi;
}

View File

@@ -1,5 +1,6 @@
%include stdint.i
%include std_string.i
%include exception.i
#ifdef DOXYGEN
%include common_hpp_doc.i
@@ -26,8 +27,16 @@
mraa_init();
%}
%typemap(in) uint8_t = char;
%typemap(in) unsigned char* = char*;
%exception {
try {
$action
} catch(const std::invalid_argument& e) {
SWIG_exception(SWIG_ValueError, e.what());
} catch(...) {
SWIG_exception(SWIG_RuntimeError, "Unknown exception");
}
}
%apply (char *STRING, size_t LENGTH) { (char *data, size_t length) };
%include "common.hpp"

View File

@@ -25,6 +25,7 @@
#include <stdlib.h>
#include <sys/stat.h>
#include <unistd.h>
#include <limits.h>
#include "pwm.h"
#include "mraa_internal.h"
@@ -56,7 +57,7 @@ mraa_pwm_write_period(mraa_pwm_context dev, int period)
int period_f = open(bu, O_RDWR);
if (period_f == -1) {
syslog(LOG_ERR, "Failed to open period for writing");
syslog(LOG_ERR, "pwm: Failed to open period for writing");
return MRAA_ERROR_INVALID_RESOURCE;
}
char out[MAX_SIZE];
@@ -92,7 +93,7 @@ mraa_pwm_read_period(mraa_pwm_context dev)
int period_f = open(bu, O_RDWR);
if (period_f == -1) {
syslog(LOG_ERR, "Failed to open period for reading");
syslog(LOG_ERR, "pwm: Failed to open period for reading");
return 0;
}
off_t size = lseek(period_f, 0, SEEK_END);
@@ -100,9 +101,18 @@ mraa_pwm_read_period(mraa_pwm_context dev)
read(period_f, output, size + 1);
close(period_f);
int ret = strtol(output, NULL, 10);
return ret;
char *endptr;
long int ret = strtol(output, &endptr, 10);
if ('\0' != *endptr && '\n' != *endptr) {
syslog(LOG_ERR, "pwm: Error in string conversion");
return -1;
}
else if (ret > INT_MAX || ret < INT_MIN) {
syslog(LOG_ERR, "pwm: Number is invalid");
return -1;
}
return (int) ret;
}
static int
@@ -118,8 +128,17 @@ mraa_pwm_read_duty(mraa_pwm_context dev)
char output[MAX_SIZE];
read(dev->duty_fp, output, size+1);
int ret = strtol(output, NULL, 10);
return ret;
char *endptr;
long int ret = strtol(output, &endptr, 10);
if ('\0' != *endptr && '\n' != *endptr) {
syslog(LOG_ERR, "pwm: Error in string converstion");
return -1;
}
else if (ret > INT_MAX || ret < INT_MIN) {
syslog(LOG_ERR, "pwm: Number is invalid");
return -1;
}
return (int) ret;
}
mraa_pwm_context
@@ -135,7 +154,7 @@ mraa_pwm_init(int pin) {
int pinn = pinm->pinmap;
free(pinm);
if (advance_func->gpio_init_post != NULL) {
if (advance_func->pwm_init_post != NULL) {
mraa_pwm_context pret = mraa_pwm_init_raw(chip,pinn);
mraa_result_t ret = advance_func->pwm_init_post(pret);
if (ret != MRAA_SUCCESS) {
@@ -161,14 +180,14 @@ mraa_pwm_init_raw(int chipin, int pin)
snprintf(directory, MAX_SIZE, SYSFS_PWM "/pwmchip%d/pwm%d", dev->chipid, dev->pin);
struct stat dir;
if (stat(directory, &dir) == 0 && S_ISDIR(dir.st_mode)) {
syslog(LOG_NOTICE, "PWM Pin already exporting, continuing");
syslog(LOG_NOTICE, "pwm: Pin already exported, continuing");
dev->owner = 0; // Not Owner
} else {
char buffer[MAX_SIZE];
snprintf(buffer, MAX_SIZE, "/sys/class/pwm/pwmchip%d/export", dev->chipid);
int export_f = open(buffer, O_WRONLY);
if (export_f == -1) {
syslog(LOG_ERR, "Failed to open export for writing");
syslog(LOG_ERR, "pwm: Failed to open export for writing");
free(dev);
return NULL;
}
@@ -176,11 +195,13 @@ mraa_pwm_init_raw(int chipin, int pin)
char out[MAX_SIZE];
int size = snprintf(out, MAX_SIZE, "%d", dev->pin);
if (write(export_f, out, size*sizeof(char)) == -1) {
syslog(LOG_WARNING, "Failed to write to export! Potentially already enabled");
syslog(LOG_WARNING, "pwm: Failed to write to export! Potentially already enabled");
close(export_f);
free(dev);
return NULL;
}
dev->owner = 1;
mraa_pwm_period_us(dev, plat->pwm_default_period);
close(export_f);
}
mraa_pwm_setup_duty_fp(dev);
@@ -190,6 +211,9 @@ mraa_pwm_init_raw(int chipin, int pin)
mraa_result_t
mraa_pwm_write(mraa_pwm_context dev, float percentage)
{
if (percentage >= 1.0f) {
return mraa_pwm_write_duty(dev, mraa_pwm_read_period(dev));
}
return mraa_pwm_write_duty(dev, percentage * mraa_pwm_read_period(dev));
}
@@ -215,6 +239,11 @@ mraa_pwm_period_ms(mraa_pwm_context dev, int ms)
mraa_result_t
mraa_pwm_period_us(mraa_pwm_context dev, int us)
{
if (us < plat->pwm_min_period ||
us > plat->pwm_max_period) {
syslog(LOG_ERR, "pwm: period value outside platform range");
return MRAA_ERROR_INVALID_PARAMETER;
}
return mraa_pwm_write_period(dev, us*1000);
}
@@ -251,13 +280,13 @@ mraa_pwm_enable(mraa_pwm_context dev, int enable)
int enable_f = open(bu, O_RDWR);
if (enable_f == -1) {
syslog(LOG_ERR, "Failed to open enable for writing");
syslog(LOG_ERR, "pwm: Failed to open enable for writing");
return MRAA_ERROR_INVALID_RESOURCE;
}
char out[2];
int size = snprintf(out, sizeof(out), "%d", enable);
if (write(enable_f, out, size * sizeof(char)) == -1) {
syslog(LOG_ERR, "Failed to write to enable");
syslog(LOG_ERR, "pwm: Failed to write to enable");
close(enable_f);
return MRAA_ERROR_INVALID_RESOURCE;
}
@@ -273,14 +302,14 @@ mraa_pwm_unexport_force(mraa_pwm_context dev)
int unexport_f = open(filepath, O_WRONLY);
if (unexport_f == -1) {
syslog(LOG_ERR, "Failed to open unexport for writing");
syslog(LOG_ERR, "pwm: Failed to open unexport for writing");
return MRAA_ERROR_INVALID_RESOURCE;
}
char out[MAX_SIZE];
int size = snprintf(out, MAX_SIZE, "%d", dev->pin);
if (write(unexport_f, out, size*sizeof(char)) == -1) {
syslog(LOG_ERR, "Failed to write to unexport");
syslog(LOG_ERR, "pwm: Failed to write to unexport");
close(unexport_f);
return MRAA_ERROR_INVALID_RESOURCE;
}

View File

@@ -20,7 +20,10 @@ GPIO Interupt (isr)
===================
The GPIO module allows you to set an interupt on a GPIO. This interupt is
controlled by the mode that the 'edge' is in.
controlled by the mode that the 'edge' is in. Before setting another isr please
remove the first one, multiple isrs on one pin are not supported. Some
platforms will not support interupts on all pins so please check your return
values.
**Note:** Galileo Gen1 only supports EDGE_BOTH
@@ -31,6 +34,9 @@ controlled by the mode that the 'edge' is in.
**Note:** If the python script is ended the destructors will run meaning that
the ISR will not run. The sleep call is there for that function.
**Note:** The python isr module treats only objects. This means that int
counters will not work inside your isr. Please use the different edge modes.
I2c
===

View File

@@ -59,7 +59,7 @@ mraa_spi_init(int bus)
mraa_spi_bus_t *spi = mraa_setup_spi(bus);
if (bus < 0) {
syslog(LOG_ERR, "Failed. SPI platform Error");
syslog(LOG_ERR, "spi: Failed. SPI platform Error");
return NULL;
}
mraa_spi_context dev = (mraa_spi_context) malloc(sizeof(struct _spi));
@@ -70,7 +70,7 @@ mraa_spi_init(int bus)
dev->devfd = open(path, O_RDWR);
if (dev->devfd < 0) {
syslog(LOG_ERR, "Failed opening SPI Device. bus:%s", path);
syslog(LOG_ERR, "spi: Failed opening SPI Device. bus:%s", path);
free(dev);
return NULL;
}
@@ -113,7 +113,7 @@ mraa_spi_mode(mraa_spi_context dev, mraa_spi_mode_t mode)
}
if (ioctl (dev->devfd, SPI_IOC_WR_MODE, &spi_mode) < 0) {
syslog(LOG_ERR, "Failed to set spi mode");
syslog(LOG_ERR, "spi: Failed to set spi mode");
return MRAA_ERROR_INVALID_RESOURCE;
}
@@ -131,12 +131,13 @@ mraa_spi_frequency(mraa_spi_context dev, int hz)
mraa_result_t
mraa_spi_lsbmode(mraa_spi_context dev, mraa_boolean_t lsb)
{
uint8_t lsb_mode = 0;
if (lsb == 1) {
lsb_mode = 1;
}
uint8_t lsb_mode = (uint8_t) lsb;
if (ioctl (dev->devfd, SPI_IOC_WR_LSB_FIRST, &lsb_mode) < 0) {
syslog(LOG_ERR, "Failed to set bit order");
syslog(LOG_ERR, "spi: Failed to set bit order");
return MRAA_ERROR_INVALID_RESOURCE;
}
if (ioctl (dev->devfd, SPI_IOC_RD_LSB_FIRST, &lsb_mode) < 0) {
syslog(LOG_ERR, "spi: Failed to set bit order");
return MRAA_ERROR_INVALID_RESOURCE;
}
dev->lsb = lsb;
@@ -146,6 +147,10 @@ mraa_spi_lsbmode(mraa_spi_context dev, mraa_boolean_t lsb)
mraa_result_t
mraa_spi_bit_per_word(mraa_spi_context dev, unsigned int bits)
{
if (ioctl(dev->devfd, SPI_IOC_WR_BITS_PER_WORD, &bits) < 0) {
syslog(LOG_ERR, "spi: Failed to set bit per word");
return MRAA_ERROR_INVALID_RESOURCE;
}
dev->bpw = bits;
return MRAA_SUCCESS;
}
@@ -166,28 +171,38 @@ mraa_spi_write(mraa_spi_context dev, uint8_t data)
msg.delay_usecs = 0;
msg.len = length;
if (ioctl(dev->devfd, SPI_IOC_MESSAGE(1), &msg) < 0) {
syslog(LOG_ERR, "Failed to perform dev transfer");
syslog(LOG_ERR, "spi: Failed to perform dev transfer");
return -1;
}
return recv;
}
uint8_t*
mraa_spi_write_buf(mraa_spi_context dev, uint8_t* data, int length)
mraa_result_t
mraa_spi_transfer_buf(mraa_spi_context dev, uint8_t* data, uint8_t* rxbuf, int length)
{
struct spi_ioc_transfer msg;
memset(&msg, 0, sizeof(msg));
uint8_t* recv = malloc(sizeof(uint8_t) * length);
msg.tx_buf = (unsigned long) data;
msg.rx_buf = (unsigned long) recv;
msg.rx_buf = (unsigned long) rxbuf;
msg.speed_hz = dev->clock;
msg.bits_per_word = dev->bpw;
msg.delay_usecs = 0;
msg.len = length;
if (ioctl(dev->devfd, SPI_IOC_MESSAGE(1), &msg) < 0) {
syslog(LOG_ERR, "Failed to perform dev transfer");
syslog(LOG_ERR, "spi: Failed to perform dev transfer");
return MRAA_ERROR_INVALID_RESOURCE;
}
return MRAA_SUCCESS;
}
uint8_t*
mraa_spi_write_buf(mraa_spi_context dev, uint8_t* data, int length)
{
uint8_t* recv = malloc(sizeof(uint8_t) * length);
if (mraa_spi_transfer_buf(dev, data, recv, length) != MRAA_SUCCESS) {
free(recv);
return NULL;
}
return recv;

View File

@@ -30,25 +30,28 @@
#include "uart.h"
#include "mraa_internal.h"
/**
* A structure representing a UART device
*/
struct _uart {
/*@{*/
int index; /**< the uart index, as known to the os. */
/*@}*/
};
mraa_uart_context
mraa_uart_init(int index)
{
if ( mraa_setup_uart(index) != MRAA_SUCCESS)
if (advance_func->uart_init_pre != NULL) {
if (advance_func->uart_init_pre(index) != MRAA_SUCCESS)
return NULL;
}
if (mraa_setup_uart(index) != MRAA_SUCCESS)
return NULL;
mraa_uart_context dev = (mraa_uart_context) malloc(sizeof(struct _uart));
memset(dev, 0, sizeof(struct _uart));
dev->index = index;
if (advance_func->uart_init_post != NULL) {
mraa_result_t ret = advance_func->uart_init_post(dev);
if (ret != MRAA_SUCCESS) {
free(dev);
return NULL;
}
}
return dev;
}