mraa: Update to v.1.7.0

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>

.clang-format

@@ -0,0 +1,50 @@
+AccessModifierOffset: -2
+AlignEscapedNewlinesLeft: true
+AlignTrailingComments: true
+AllowAllParametersOfDeclarationOnNextLine: false
+AllowShortFunctionsOnASingleLine: false
+AllowShortIfStatementsOnASingleLine: false
+AllowShortLoopsOnASingleLine: false
+AlwaysBreakBeforeMultilineStrings: false
+AlwaysBreakTemplateDeclarations: false
+AlwaysBreakAfterDefinitionReturnType: true
+BinPackParameters: false
+BreakBeforeBinaryOperators: false
+BreakBeforeBraces: Linux
+BreakBeforeTernaryOperators: false
+BreakConstructorInitializersBeforeComma: false
+ColumnLimit: 100
+CommentPragmas: ''
+ConstructorInitializerAllOnOneLineOrOnePerLine: false
+ConstructorInitializerIndentWidth: 0
+ContinuationIndentWidth: 0
+Cpp11BracedListStyle: false
+DerivePointerBinding: false
+IndentCaseLabels: true
+IndentFunctionDeclarationAfterType: false
+IndentWidth: 4
+Language: Cpp
+MaxEmptyLinesToKeep: 2
+NamespaceIndentation: None
+ObjCSpaceAfterProperty: true
+ObjCSpaceBeforeProtocolList: true
+PenaltyBreakBeforeFirstCallParameter: 100
+PenaltyBreakComment: 100
+PenaltyBreakFirstLessLess: 0
+PenaltyBreakString: 100
+PenaltyExcessCharacter: 1
+PenaltyReturnTypeOnItsOwnLine: 20
+PointerBindsToType: true
+PointerAlignment: Left
+SpaceBeforeAssignmentOperators: true
+SpaceBeforeParens: ControlStatements
+SpaceInEmptyParentheses: false
+SpacesBeforeTrailingComments: 1
+SpacesInAngles: false
+SpacesInCStyleCastParentheses: false
+SpaceAfterCStyleCast: true
+SpacesInContainerLiterals: false
+SpacesInParentheses: false
+Standard: Cpp11
+TabWidth: 4
+UseTab: Never

.gitignore

@@ -10,4 +10,13 @@ build/
 
 # Temp files
 *.swp
+*.swo
 *~
+
+# npmpub files
+src/mraajsJAVASCRIPT_wrap.cxx
+src/version.c
+package.json
+binding.gyp
+READMEFIRST
+npm-debug.log

.gitmodules

@@ -0,0 +1,4 @@
+[submodule "doxygen2jsdoc"]
+	path = doxygen2jsdoc
+	url = https://github.com/arfoll/doxygen2jsdoc.git
+	branch = master

.travis.yml

@@ -0,0 +1,49 @@
+language: cpp
+sudo: required
+dist: trusty
+env:
+  - NODE4=true
+  - NODE5=true
+  - JSONPLAT=true NODE4=true
+  - JSONPLAT=true NODE5=true
+  - MOCK=true NODE4=true
+  - MOCK=true NODE5=true
+  - NPM=true NODE4=true
+  - NPM=true NODE5=true
+compiler:
+  - clang
+  - gcc
+before_install:
+  # Via https://github.com/travis-ci/travis-ci/issues/5326
+  - export PATH="$(echo $PATH | tr ':' "\n" | sed '/\/opt\/python/d' | tr "\n" ":" | sed "s|::|:|g")"
+install:
+  - if [ "${NODE4}" ]; then export CC=gcc-4.8 CXX=g++-4.8; fi
+before_script:
+  # Turn off JAVA SWIG for clang++, use 4.8 for all g++ builds
+  - if [ "$CC" == "gcc" ]; then export BUILDJAVA=ON; export CC=gcc-4.8; export CXX=g++-4.8; else export BUILDJAVA=OFF; fi
+  - if [ "${JSONPLAT}" ]; then export JSONPLAT=ON; else export JSONPLAT=OFF; fi
+  - if [ "${MOCK}" ]; then export BUILDARCH="MOCK"; else export BUILDARCH=""; fi
+  - if [ "${NODE4}" ]; then nvm install 4.1; fi
+  - if [ "${NODE5}" ]; then nvm install 5; fi
+  - npm install node-gyp && export NODE_GYP="$TRAVIS_BUILD_DIR/node_modules/node-gyp/bin/node-gyp.js"
+  - wget http://iotdk.intel.com/misc/tr/swig-3.0.10.tar.gz && tar xf swig-3.0.10.tar.gz && cd swig-3.0.10 && ./configure --prefix=/home/travis/ && make && make install && cd ..
+script:
+  - echo "CC=$CC BUILDJAVA=$BUILDJAVA BUILDARCH=$BUILDARCH JSONPLAT=$JSONPLAT NODE4=$NODE4 NODE5=$NODE5 NODE_ROOT_DIR=$NODE_ROOT_DIR"
+  - if [ -z ${NPM} ]; then mkdir build && cd build && cmake -DBUILDSWIGJAVA="$BUILDJAVA" -DBUILDARCH="$BUILDARCH" -DJSONPLAT=$JSONPLAT -DNODE_ROOT_DIR:PATH="${NVM_BIN}/.." -DCMAKE_INSTALL_PREFIX:PATH=../install -DSWIG_EXECUTABLE=/home/travis/bin/swig -DSWIG_DIR:PATH=/home/travis/share/swig/3.0.10/ .. && make install && make test; else mkdir build && cd build && cmake -DBUILDSWIGJAVA="$BUILDJAVA" -DJSONPLAT=$JSONPLAT -DNODE_ROOT_DIR:PATH="${NVM_BIN}/.." -DCMAKE_INSTALL_PREFIX:PATH=../install -DSWIG_EXECUTABLE=/home/travis/bin/swig -DSWIG_DIR:PATH=/home/travis/share/swig/3.0.10/ .. && make npmpkg && cd .. && ${NODE_GYP} configure && ${NODE_GYP} build; fi
+  # simple test to see if we can load our node module
+  - if [ ${NPM} ]; then cd build/Release/obj.target/ && node -e  "var m = require('./mraa.node'); m.getVersion()";fi
+addons:
+  apt:
+    sources:
+      - ubuntu-toolchain-r-test
+      - kalakris-cmake
+    packages:
+      - g++-4.8
+      - cmake
+      - python
+      - python-dev
+      - python3
+      - python3-dev
+      - git
+      - libjson0
+      - libjson0-dev

CMakeLists.txt

@@ -1,11 +1,87 @@
 cmake_minimum_required (VERSION 2.8)
-project (mraa)
+project (mraa C CXX)
 
-FIND_PACKAGE (Threads)
+FIND_PACKAGE (Threads REQUIRED)
 
-set (CMAKE_CXX_FLAGS_DEBUG "${CMAKE_CXX_FLAGS_DEBUG} -Wall -fno-omit-frame-pointer -DDEBUG")
-set (CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -Wall")
-set (CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS} -DDEBUG")
+###############################################################################
+# Detect supported warning flags
+# Modified from work By Dan Liew (fpbench - MIT)
+# https://github.com/delcypher/fp-bench/blob/master/CMakeLists.txt
+###############################################################################
+# Warnings for both the C and C++ compiler
+
+set (MRAA_BOTH_WARNING_FLAGS
+  -Wall
+  -Werror=main
+  -Wformat
+  -Wmain
+  -Wuninitialized
+  -Winit-self
+)
+
+# Warning flags for the C compiler only
+set (MRAA_C_WARNING_FLAGS
+  -Werror=implicit
+  -Werror=missing-parameter-type
+)
+
+# Warning flags for the C++ compiler only
+set (MRAA_CXX_WARNING_FLAGS
+  -Wnon-virtual-dtor
+  -Woverloaded-virtual
+  -Wreorder
+)
+
+include (CheckCCompilerFlag)
+include (CheckCXXCompilerFlag)
+function (MRAA_SANITIZE_FLAG_NAME OUTPUT_VAR FLAG)
+  string (REPLACE "-" "_" SANITIZED_FLAG_NAME "${FLAG}")
+  string (REPLACE "/" "_" SANITIZED_FLAG_NAME "${SANITIZED_FLAG_NAME}")
+  string (REPLACE "=" "_" SANITIZED_FLAG_NAME "${SANITIZED_FLAG_NAME}")
+  string (REPLACE " " "_" SANITIZED_FLAG_NAME "${SANITIZED_FLAG_NAME}")
+  set (${OUTPUT_VAR} "${SANITIZED_FLAG_NAME}" PARENT_SCOPE)
+endfunction ()
+
+# Globally set C compiler warning flags that are supported and emit
+# a warning about unsupported flags
+foreach (flag ${MRAA_BOTH_WARNING_FLAGS} ${MRAA_C_WARNING_FLAGS})
+  MRAA_SANITIZE_FLAG_NAME(SANITIZED_FLAG_NAME "${flag}")
+  CHECK_C_COMPILER_FLAG("${flag}" HAS_C_${SANITIZED_FLAG_NAME})
+  if (HAS_C_${SANITIZED_FLAG_NAME})
+    set (CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${flag}")
+  else ()
+    message (WARNING "C compiler does not support flag \"${flag}\"")
+  endif ()
+endforeach ()
+
+# Globally set C++ compiler warning flags that are supported and emit
+# a warning about unsupported flags
+foreach (flag ${MRAA_BOTH_WARNING_FLAGS} ${MRAA_CXX_WARNING_FLAGS})
+  MRAA_SANITIZE_FLAG_NAME (SANITIZED_FLAG_NAME "${flag}")
+  CHECK_CXX_COMPILER_FLAG ("${flag}" HAS_CXX_${SANITIZED_FLAG_NAME})
+  if (HAS_CXX_${SANITIZED_FLAG_NAME})
+    set (CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${flag}")
+  else ()
+    message (WARNING "C++ compiler does not support flag \"${flag}\"")
+  endif ()
+endforeach ()
+
+# Set CMAKE_INSTALL_LIBDIR if not defined
+include(GNUInstallDirs)
+
+# Older cmake might not pick CMAKE_INSTALL_LIBDIR right
+if (CMAKE_INSTALL_LIBDIR)
+  set (LIB_INSTALL_DIR "${CMAKE_INSTALL_LIBDIR}" CACHE PATH "Installation path for libraries")
+else ()
+  set (LIB_INSTALL_DIR "lib" CACHE PATH "Installation path for libraries")
+endif ()
+
+# By default, build shared object libraries on linux
+if (UNIX AND NOT APPLE)
+  if (NOT DEFINED BUILD_SHARED_LIBS)
+    set(BUILD_SHARED_LIBS ON)
+  endif()
+endif()
 
 # Appends the cmake/modules path to MAKE_MODULE_PATH variable.
 set (CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}/cmake/modules ${CMAKE_MODULE_PATH})
@@ -13,12 +89,13 @@ set (CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}/cmake/modules ${CMAKE_MODULE_
 # Make a version file containing the current version from git.
 include (GetGitRevisionDescription)
 git_describe (VERSION "--tags")
-if ("x_${VERSION}" STREQUAL "x_GIT-NOTFOUND")
+if ("x_${VERSION}" STREQUAL "x_GIT-NOTFOUND" OR "x_${VERSION}" STREQUAL "x_HEAD-HASH-NOTFOUND" OR "x_${VERSION}" STREQUAL "x_-128-NOTFOUND")
   message (WARNING " - Install git to compile a production libmraa!")
-  set (VERSION "v0.5.0-dirty")
+  set (VERSION "v1.7.0")
 endif ()
 
-message (INFO " - MRAA Version ${VERSION}")
+message (STATUS "INFO - libmraa Version ${VERSION}")
+message (STATUS "INFO - cmake Version ${CMAKE_MAJOR_VERSION}.${CMAKE_MINOR_VERSION}.${CMAKE_PATCH_VERSION}")
 
 #parse the version information into pieces.
 string (REGEX REPLACE "^v([0-9]+)\\..*" "\\1" VERSION_MAJOR "${VERSION}")
@@ -46,16 +123,58 @@ set (CMAKE_SWIG_FLAGS "")
 find_path (SYSTEM_USR_DIR "stdlib.h")
 include_directories (${SYSTEM_USR_DIR})
 
-option (GTEST "Build all gtests." OFF)
 option (BUILDDOC "Build all doc." OFF)
 option (BUILDSWIG "Build swig modules." ON)
 option (BUILDSWIGPYTHON "Build swig python modules." ON)
 option (BUILDSWIGNODE "Build swig node modules." ON)
+option (BUILDSWIGJAVA "Build Java API." OFF)
+option (USBPLAT "Detection USB platform." OFF)
+option (FIRMATA "Add Firmata support to mraa." OFF)
+option (ONEWIRE "Add Onewire support to mraa." ON)
+option (JSONPLAT "Add Platform loading via a json file." ON)
+option (IMRAA "Add Imraa support to mraa." OFF)
+option (FTDI4222 "Build with FTDI FT4222 subplatform support." OFF)
 option (IPK "Generate IPK using CPack" OFF)
+option (RPM "Generate RPM using CPack" OFF)
+option (ENABLEEXAMPLES "Disable building of examples" ON)
+option (INSTALLGPIOTOOL "Install gpio tool" OFF)
+option (INSTALLTOOLS "Install all tools" ON)
+option (BUILDTESTS "Override the addition of tests" ON)
 
-if (GTEST)
-  enable_testing ()
-  add_subdirectory (tests)
+set (BUILDARCH "" CACHE STRING "Override architecture to build for")
+
+set (MRAAPLATFORMFORCE "ALL" CACHE STRING "Override platform to build for")
+
+if (NOT BUILDSWIG)
+  set (BUILDSWIGPYTHON OFF)
+  set (BUILDSWIGNODE OFF)
+  set (BUILDSWIGJAVA OFF)
+endif()
+
+if (NOT BUILDARCH)
+  include (TargetArch)
+  target_architecture (DETECTED_ARCH)
+  message (STATUS "INFO - Target arch is ${DETECTED_ARCH}")
+else ()
+  set (DETECTED_ARCH ${BUILDARCH})
+  message (STATUS "INFO - Override arch is ${DETECTED_ARCH}")
+endif()
+
+if (DETECTED_ARCH STREQUAL "i586" OR DETECTED_ARCH STREQUAL "x86_64"
+    OR DETECTED_ARCH STREQUAL "i386")
+  set (X86PLAT ON)
+elseif (DETECTED_ARCH MATCHES "arm.*")
+  set (ARMPLAT ON)
+elseif (DETECTED_ARCH STREQUAL "MOCK")
+  set (MOCKPLAT ON)
+elseif (DETECTED_ARCH STREQUAL "PERIPHERALMAN")
+  set (PERIPHERALMAN ON)
+else ()
+  message (FATAL_ERROR "Only x86, arm, PERIPHERALMAN and mock platforms currently supported")
+endif()
+
+if (BUILDSWIGPYTHON OR BUILDTESTS)
+  include (cmake/modules/OpenCVDetectPython.cmake)
 endif ()
 
 if (BUILDDOC)
@@ -63,6 +182,9 @@ if (BUILDDOC)
   find_package (Doxygen)
   if (DOXYGEN_FOUND)
     configure_file (${CMAKE_CURRENT_SOURCE_DIR}/Doxyfile.in ${CMAKE_CURRENT_BINARY_DIR}/Doxyfile @ONLY)
+    if (BUILDSWIGJAVA)
+      configure_file (${CMAKE_CURRENT_SOURCE_DIR}/Doxyfile.java.in ${CMAKE_CURRENT_BINARY_DIR}/src/java/Doxyfile @ONLY)
+    endif ()
     add_custom_target (doc
       ${DOXYGEN_EXECUTABLE} ${CMAKE_CURRENT_BINARY_DIR}/Doxyfile
       WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
@@ -72,30 +194,75 @@ if (BUILDDOC)
 endif ()
 
 if (IPK)
-  include (TargetArch)
-  target_architecture (DETECTED_ARCH)
-  message( INFO " - Target arch is ${DETECTED_ARCH}")
+  # Get target package arch from Yocto ADT sysroot if set or host OS, mapping to Ubuntu name if necessary
+  if (DEFINED ENV{OECORE_TARGET_SYSROOT})
+    GET_FILENAME_COMPONENT (DETECTED_SYSROOT $ENV{OECORE_TARGET_SYSROOT} NAME)
+    string (REGEX REPLACE "-poky-linux" "" TARGET_ARCH "${DETECTED_SYSROOT}")
+  else ()
+    # debian uses amd64 to denote x86_64
+    if (DETECTED_ARCH STREQUAL "x86_64")
+      set (TARGET_ARCH "amd64")
+    else ()
+      set (TARGET_ARCH ${DETECTED_ARCH})
+    endif ()
+  endif ()
+  message (STATUS "INFO - Package arch is ${TARGET_ARCH}")
 
-  set(CPACK_GENERATOR "DEB" "TGZ")
-  set(OPKG_ARCH ${DETECTED_ARCH})
+  set(CPACK_GENERATOR "DEB")
+  set(OPKG_ARCH ${TARGET_ARCH})
   set(CPACK_BINARY_DIR ${CMAKE_BINARY_DIR})
   set(CPACK_DEBIAN_PACKAGE_MAINTAINER "Intel IoT-Devkit") #required
   set(mraa_PACKAGE_ON_TAG ".")
   if ("${VERSION_COMMIT}" STREQUAL "")
     set(mraa_PACKAGE_ON_TAG "")
   endif()
-  set(CPACK_PACKAGE_VERSION 
+  set(CPACK_PACKAGE_VERSION
       "${mraa_VERSION_MAJOR}.${mraa_VERSION_MINOR}.${mraa_VERSION_PATCH}${mraa_PACKAGE_ON_TAG}${VERSION_COMMIT}")
-  set(CPACK_PACKAGE_NAME "libmraa${mraa_VERSION_MAJOR}")
+  set(CPACK_PACKAGE_NAME "mraa")
   set(CPACK_DEBIAN_PACKAGE_SECTION "libs")
-  set(CPACK_DEBIAN_PACKAGE_ARCHITECTURE ${DETECTED_ARCH})
-  set(CPACK_SYSTEM_NAME ${DETECTED_ARCH})
-  set(CPACK_DEBIAN_PACKAGE_PROVIDES "libmraa-dev, libmraa-dbg, libmraa-doc, libmaa-dev, libmaa-dbg, libmaa-doc, libmaa0")
-  set(CPACK_DEBIAN_PACKAGE_REPLACES ${CPACK_DEBIAN_PACKAGE_PROVIDES})
+  set(CPACK_DEBIAN_PACKAGE_ARCHITECTURE ${TARGET_ARCH})
+  set(CPACK_SYSTEM_NAME ${TARGET_ARCH})
+  set(CPACK_DEBIAN_PACKAGE_PROVIDES "mraa-dev, mraa-dbg, mraa-doc")
+  set(CPACK_DEBIAN_PACKAGE_REPLACES "${CPACK_DEBIAN_PACKAGE_PROVIDES}, libmraa, libmraa-dev, libmraa-doc")
   set(CPACK_DEBIAN_PACKAGE_CONFLICTS ${CPACK_DEBIAN_PACKAGE_PROVIDES})
   set(WDIR "${CPACK_TOPLEVEL_DIRECTORY}/${CPACK_PACKAGE_FILE_NAME}")
   include (CPack)
 endif()
 
+if (RPM)
+  message (STATUS "INFO - Enabled RPM packaging for ${DETECTED_ARCH}")
+  set(CMAKE_INSTALL_PREFIX "/usr")
+  set(CPACK_PACKAGE_VERSION ${VERSION})
+  set(CPACK_GENERATOR "RPM")
+  set(CPACK_PACKAGE_NAME "libmraa${mraa_VERSION_MAJOR}")
+  set(CPACK_PACKAGE_RELEASE 1)
+  set(CPACK_PACKAGE_VERSION
+      "${mraa_VERSION_MAJOR}.${mraa_VERSION_MINOR}.${mraa_VERSION_PATCH}${mraa_PACKAGE_ON_TAG}${VERSION_COMMIT}")
+  set(CPACK_PACKAGE_CONTACT "Intel IoT-Devkit")
+  set(CPACK_PACKAGE_VENDOR "Intel IoT-Devkit")
+  set(CPACK_RPM_PACKAGE_PROVIDES "${CPACK_PACKAGE_NAME}-devel")
+  # Get distro tag (e.g. 'fc20') by parsing output of rpm --showrc
+  EXECUTE_PROCESS(
+    COMMAND rpm --showrc
+    COMMAND grep -w dist
+    COMMAND sed -e "s/\\t./ /"
+    COMMAND awk "{printf \"%s\", \$NF}"
+    OUTPUT_VARIABLE DIST_TAG
+  )
+  set(CPACK_PACKAGE_FILE_NAME "${CPACK_PACKAGE_NAME}-${CPACK_PACKAGE_VERSION}-${CPACK_PACKAGE_RELEASE}.${DIST_TAG}.${DETECTED_ARCH}")
+  include(CPack)
+endif()
+
 add_subdirectory (src)
-add_subdirectory (examples)
+if (ENABLEEXAMPLES)
+  add_subdirectory (examples)
+endif ()
+
+if (IMRAA)
+  add_subdirectory (imraa)
+endif ()
+
+if (BUILDTESTS AND PYTHON_DEFAULT_EXECUTABLE)
+  enable_testing ()
+  add_subdirectory (tests)
+endif ()

CONTRIBUTING.md

@@ -0,0 +1,101 @@
+Contributing to libmraa                           {#contributing}
+======================
+
+libmraa is an opensource project and we are actively looking for people to help
+with:
+
+- Writing platform supports for all types of boards running linux
+- People to extend the functionality, API with useful functions
+- Anything we haven't thought about :) Ideas always welcome!
+
+The recommended method to contribute is to fork on github, and then send pull
+requests to the main project. You can open issues if you find any bugs/have
+questions. If you want to work on a large feature then we suggest you file an
+issue first so we can avoid dissapointments come merging time!
+
+If you'd rather not use github you are more than welcome to send git formatted
+patches to our mailing list mraa@lists.01.org which you can register for access
+on: https://lists.01.org/mailman/listinfo/mraa
+
+Basic rules
+-----------
+- Your code must build
+- Commits must have a sign-off line by at least yourself
+- Commits must be named <file/module>: Some decent description
+- Try not to break master. In any commit.
+- Try to split commits up logically, you will be asked to rebase them if they
+  are not.
+- Try to stick to the established coding style regardless of your personal
+  feeling for it! Use clang-format (3.6+ required)
+
+Coding Style
+------------
+
+Coding style for all code is defined by clang-format, have a look at it. Avoid
+styling fixes as they make history difficult to read. Javascript & Java can
+also be parsed through the clang-format, it complains but seems to do an ok
+job. Few exceptions to coding styles:
+- All python code is indented by 2 spaces
+- CmakeLists files are 2 space indented and a space is required before all
+  brackets so endif () and if () and command (). Also use lowercase for
+  everything but variables. Cmake is case insensitive but this isn't the wild
+  wild west ;-)
+
+Use common sense and don't be afraid to challenge something if it doesn't make sense!
+
+Author Rules
+------------
+
+If you create a file, then add yourself as the Author at the top. If you did a
+large contribution to it (or if you want to ;-)), then fee free to add yourself
+to the contributors list in that file. You can also add your own copyright
+statement to the file but cannot add a license of your own. If you're borrowing
+code that comes from a project with another license, make sure to explicitly
+note this in your PR.
+
+Code signing
+------------
+
+The sign-off is a simple line at the end of the explanation for the
+patch, which certifies that you wrote it or otherwise have the right to pass it
+on as an open-source patch.  The rules are pretty simple: if you can certify
+the below:
+
+        Developer's Certificate of Origin 1.1
+
+        By making a contribution to this project, I certify that:
+
+        (a) The contribution was created in whole or in part by me and I
+            have the right to submit it under the open source license
+            indicated in the file; or
+
+        (b) The contribution is based upon previous work that, to the best
+            of my knowledge, is covered under an appropriate open source
+            license and I have the right under that license to submit that
+            work with modifications, whether created in whole or in part
+            by me, under the same open source license (unless I am
+            permitted to submit under a different license), as indicated
+            in the file; or
+
+        (c) The contribution was provided directly to me by some other
+            person who certified (a), (b) or (c) and I have not modified
+            it.
+
+        (d) I understand and agree that this project and the contribution
+            are public and that a record of the contribution (including all
+            personal information I submit with it, including my sign-off) is
+            maintained indefinitely and may be redistributed consistent with
+            this project or the open source license(s) involved.
+
+then you just add a line saying
+
+	Signed-off-by: Random J Developer <random@developer.example.org>
+
+Using your real name (sorry, no pseudonyms or anonymous contributions.)
+
+Where to find us
+----------------
+
+Hop onto the freenode network on IRC and join #mraa. Please be patient as we're
+not always online.
+

COPYING

@@ -1,4 +1,5 @@
-Copyright © 2014 Intel Corporation
+The MIT License (MIT)
+Copyright © 2014-2016 Intel Corporation
 
 Permission is hereby granted, free of charge, to any person obtaining
 a copy of this software and associated documentation files (the

Doxyfile.in

@@ -154,7 +154,7 @@ FULL_PATH_NAMES        = YES
 # will be relative from the directory where doxygen is started.
 # This tag requires that the tag FULL_PATH_NAMES is set to YES.
 
-STRIP_FROM_PATH        = 
+STRIP_FROM_PATH        = @PROJECT_SOURCE_DIR@
 
 # The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of the
 # path mentioned in the documentation of a class, which tells the reader which
@@ -755,7 +755,8 @@ WARN_LOGFILE           =
 
 INPUT                  = @CMAKE_CURRENT_SOURCE_DIR@/api/ \
                          @CMAKE_CURRENT_SOURCE_DIR@/api/mraa/ \
-                         @CMAKE_CURRENT_SOURCE_DIR@/docs/
+                         @CMAKE_CURRENT_SOURCE_DIR@/docs/ \
+                         @CMAKE_CURRENT_SOURCE_DIR@/CONTRIBUTING.md
 
 # This tag can be used to specify the character encoding of the source files
 # that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses

README.md

@@ -1,32 +1,137 @@
-MRAA - Low Level Skeleton Library for Communication on GNU/Linux platforms
-==============
+<p align="center">
+  <img src="http://iotdk.intel.com/misc/logos/mraa.png" height="150px" width="auto" algt="Mraa Logo"/>
+</p>
 
-Library in C/C++ to interface with Galileo & other Intel platforms, in a
-structured and sane API with port names/numbering that match boards & with
-bindings to javascript & python.
+libmraa - Low Level Skeleton Library for Communication on GNU/Linux platforms
+=============================================================================
+
+Libmraa is a C/C++ library with bindings to Java, Python and JavaScript to
+interface with the IO on Galileo, Edison & other platforms, with a structured
+and sane API where port names/numbering matches the board that you are on. Use
+of libmraa does not tie you to specific hardware with board detection done at
+runtime you can create portable code that will work across the supported
+platforms.
 
 The intent is to make it easier for developers and sensor manufacturers to map
 their sensors & actuators on top of supported hardware and to allow control of
 low level communication protocol by high level languages & constructs.
 
+[![Build Status](https://travis-ci.org/intel-iot-devkit/mraa.svg?branch=master)](https://travis-ci.org/intel-iot-devkit/mraa)
+
 Supported Boards
 ================
 
+X86
+---
 * [Galileo Gen 1 - Rev D](../master/docs/galileorevd.md)
 * [Galileo Gen 2 - Rev H](../master/docs/galileorevh.md)
 * [Edison](../master/docs/edison.md)
+* [Intel DE3815](../master/docs/intel_de3815.md)
+* [Minnowboard](../master/docs/minnow_max.md)
+* [NUC 5th generation](../master/docs/intel_nuc5.md)
+* [UP](../master/docs/up.md)
+* [Intel Joule](../master/docs/joule.md)
+
+ARM
+---
+* [Raspberry Pi](../master/docs/raspberry_pi.md)
+* [Banana Pi](../master/docs/banana_pi.md)
+* [Beaglebone Black](../master/docs/beaglebone.md)
+* [phyBOARD-Wega](../master/docs/phyboard-wega.md)
+* [96Boards](../master/docs/96boards.md)
+
+FPGA
+----
+* [DE10-Nano](../master/docs/de_nano_soc.md)
+
+USB
+---
+* [FT4222](../master/docs/ftdi_ft4222.md)
+* [Firmata](../master/docs/firmata.md)
+
+Mock
+----
+* [Generic simulated board](../master/docs/mock.md)
+
+JSON platform
+----
+* [Platform loading](../master/docs/jsonplatform.md)
 
 Installing on your board
-========
+========================
 
-See the section below on compiling or use our repository to install on an
-eglibc based yocto poky image that supports opkg. Adding this repository is as
-simple as:
+Installing on Ubuntu
+--------------------
+
+Here is a PPA for installing on ubuntu:
+https://launchpad.net/~mraa/+archive/ubuntu/mraa
+
+```bash
+sudo add-apt-repository ppa:mraa/mraa
+sudo apt-get update
+sudo apt-get install libmraa1 libmraa-dev mraa-tools python-mraa python3-mraa
+```
+
+Node.js package is available separately.
+
+Install on Arch Linux
+---------------------
+
+There is an AUR package for mraa here: https://aur.archlinux.org/packages/mraa
+
+Install on openSUSE
+-------------------
+
+```bash
+REPO="openSUSE_Tumbleweed"
+if test "$(arch)" == "aarch64"; then
+  REPO="openSUSE_Factory_ARM"
+fi
+sudo zypper ar http://download.opensuse.org/repositories/hardware/$REPO/hardware.repo
+sudo zypper in mraa
+```
+
+Installing for Node.js only
+---------------------------
+
+> Note: Node.js 7.0.0+ is not supported. You'll have to downgrade to 6.x.x.
+
+You can also install just the node.js mraa module by using npm. You will need a
+C++ compiler and the node development headers, however it's not required to
+have SWIG installed.
+
+```bash
+npm install mraa
+```
+
+Note that installing mraa in this way builds mraa without json-c so you cannot
+use mraa_init_json_platform(). Also building this way means the mraa.node
+includes a static version of libmraa rather than relying on a dynamic library
+in /usr/lib.
+
+Subplatforms (i.e. Firmata) have to be added manually with this kind of install
+from your application, as shown in [this example](examples/javascript/firmata.js).
+
+Installing on Intel 32bit Yocto based opkg image
+------------------------------------------------
+
+See the section below on compiling or use our repository to install on a glibc
+based yocto poky image that supports opkg. Adding this repository is as simple
+as and you'll have the latest stable tagged build of mraa installed!
 
 ``` bash
-echo "src mraa-upm http://iotdk.intel.com/repos/1.1/intelgalactic" > /etc/opkg/mraa-upm.conf
+echo "src mraa-upm http://iotdk.intel.com/repos/3.5/intelgalactic/opkg/i586" > /etc/opkg/mraa-upm.conf
 opkg update
-opkg install libmraa0
+opkg install mraa
+```
+
+If you would like to get the latest & greatest builds from master HEAD you can
+use our -dev repository
+
+```bash
+echo "src mraa-upm http://iotdk.intel.com/repos/3.5/intelgalactic-dev/opkg/i586" > /etc/opkg/mraa-upm.conf
+opkg update
+opkg install mraa
 ```
 
 Compiling
@@ -39,20 +144,32 @@ Examples
 
 See the [examples](../../tree/master/examples) available for various languages
 
-C/C++ API Documentation
-===========
+Debugging
+=========
 
-The C/C++ documentation is available [here](http://iotdk.intel.com/docs/master/mraa/)
+Sometimes it just doesn't want to work, let us try and help you, you can file
+issues in github or join us in #mraa on freenode IRC, hang around for a little
+while because we're not necessarily on 24/7, but we'll get back to you! Have a
+glance at our [debugging](../master/docs/debugging.md) page too.
 
-Python API Documentation
-===========
+API Documentation
+=================
 
-The Python documentation is available [here](http://iotdk.intel.com/docs/master/mraa/python)
+<a href="http://c.mraa.io"><img src="http://iotdk.intel.com/misc/logos/c++.png"/></a>
+<a href="http://java.mraa.io"><img src="http://iotdk.intel.com/misc/logos/java.png"/></a>
+<a href="http://py.mraa.io"><img src="http://iotdk.intel.com/misc/logos/python.png"/></a>
+<a href="http://js.mraa.io"><img src="http://iotdk.intel.com/misc/logos/node.png"/></a>
 
-NodeJS API documentation
-===========
+Contact Us
+==========
 
-There is no explicit nodejs API documentation, see the examples. The API itself
-is very similar to the python one but with a js syntax. If you know of an
-autodoc tool for generating nodejs APIs from a native C++ nodejs extension
-please get in touch!
+To ask questions either file issues in github or send emails on our [mailing
+list](https://lists.01.org/mailman/listinfo/mraa). You might also catch us on
+the mraa channel on freenode IRC.
+
+See the [Contribution](CONTRIBUTING.md) documentation for more details.
+
+Changelog
+=========
+
+Version changelog [here](docs/changelog.md).

api/mraa.h

@@ -33,6 +33,7 @@ extern "C" {
 #include "mraa/spi.h"
 #include "mraa/i2c.h"
 #include "mraa/uart.h"
+#include "mraa/uart_ow.h"
 
 #ifdef __cplusplus
 }

api/mraa/aio.h

@@ -59,13 +59,22 @@ typedef struct _aio* mraa_aio_context;
 mraa_aio_context mraa_aio_init(unsigned int pin);
 
 /**
- * Read the input voltage. By default mraa will shift
- * the raw value up or down to a 10 bit value.
+ * Read the input voltage. By default mraa will shift the raw value up or down
+ * to a 10 bit value.
  *
  * @param dev The AIO context
- * @returns The current input voltage.
+ * @returns The current input voltage or -1 for error
  */
-unsigned int mraa_aio_read(mraa_aio_context dev);
+int mraa_aio_read(mraa_aio_context dev);
+
+/**
+ * Read the input voltage and return it as a normalized float (0.0f-1.0f).
+ *
+ * @param dev The AIO context
+ * @returns The current input voltage as a normalized float (0.0f-1.0f), error
+ * will be signaled by -1.0f
+ */
+float mraa_aio_read_float(mraa_aio_context dev);
 
 /**
  * Close the analog input context, this will free the memory for the context

api/mraa/aio.hpp

@@ -24,63 +24,110 @@
 
 #pragma once
 
+#include <stdexcept>
 #include "aio.h"
+#include "types.hpp"
 
-namespace mraa {
+namespace mraa
+{
 
 /**
  * @brief API to Analog IO
  *
  * This file defines the aio interface for libmraa
  *
- * @snippet examples/c++/AioA0.cpp Interesting
+ * @snippet AioA0.cpp Interesting
  */
-class Aio {
-    public:
-        /**
-         * Aio Constructor, takes a pin number which will map directly to the
-         * board number
-         *
-         * @param pin channel number to read ADC inputs
-         */
-        Aio(unsigned int pin) {
-            m_aio = mraa_aio_init(pin);
+class Aio
+{
+  public:
+    /**
+     * Aio Constructor, takes a pin number which will map directly to the
+     * board number
+     *
+     * @param pin channel number to read ADC inputs
+     */
+    Aio(int pin)
+    {
+        m_aio = mraa_aio_init(pin);
+        if (m_aio == NULL) {
+            throw std::invalid_argument("Invalid AIO pin specified - do you have an ADC?");
         }
-        /**
-         * Aio destructor
-         */
-        ~Aio() {
-            mraa_aio_close(m_aio);
+    }
+    /**
+     * Aio Constructor, takes a pointer to the AIO context and initialises
+     * the AIO class
+     *
+     * @param void * to an AIO context
+     */
+    Aio(void* aio_context)
+    {
+        m_aio = (mraa_aio_context) aio_context;
+        if (m_aio == NULL) {
+            throw std::invalid_argument("Invalid AIO context");
         }
-        /**
-         * Read a value from the AIO pin. By default mraa will shift
-         * the raw value up or down to a 10 bit value.
-         *
-         * @returns The current input voltage. By default, a 10bit value
-         */
-        int read() {
-            return mraa_aio_read(m_aio);
+    }
+    /**
+     * Aio destructor
+     */
+    ~Aio()
+    {
+        mraa_aio_close(m_aio);
+    }
+    /**
+     * Read a value from the AIO pin. By default mraa will shift
+     * the raw value up or down to a 10 bit value.
+     *
+     * @throws std::invalid_argument in case of error
+     * @returns The current input voltage. By default, a 10bit value
+     */
+    unsigned int
+    read()
+    {
+        int x = mraa_aio_read(m_aio);
+	if (x == -1) {
+            throw std::invalid_argument("Unknown error in Aio::read()");
         }
-        /**
-         * Set the bit value which mraa will shift the raw reading
-         * from the ADC to. I.e. 10bits
-         * @param bits the bits the return from read should be i.e 10
-         * @return mraa result type
-         */
-        mraa_result_t setBit(int bits) {
-            return mraa_aio_set_bit(m_aio, bits);
-        }
-        /**
-         * Gets the bit value mraa is shifting the analog read to.
-         *
-         * @return bit value mraa is set return from the read function
-         */
-        int getBit() {
-            return mraa_aio_get_bit(m_aio);
+        return (unsigned int) x;
+    }
+    /**
+     * Read a value from the AIO pin and return it as a normalized float.
+     *
+     * @throws std::invalid_argument in case of error
+     * @returns The current input voltage as a normalized float (0.0f-1.0f)
+     */
+    float
+    readFloat()
+    {
+        float x = mraa_aio_read_float(m_aio);
+	if (x == -1.0f) {
+            throw std::invalid_argument("Unknown error in Aio::readFloat()");
         }
+        return x;
+    }
+    /**
+     * Set the bit value which mraa will shift the raw reading
+     * from the ADC to. I.e. 10bits
+     * @param bits the bits the return from read should be i.e 10
+     * @return mraa::Result type
+     */
+    Result
+    setBit(int bits)
+    {
+        return (Result) mraa_aio_set_bit(m_aio, bits);
+    }
+    /**
+     * Gets the bit value mraa is shifting the analog read to.
+     *
+     * @return bit value mraa is set return from the read function
+     */
+    int
+    getBit()
+    {
+        return mraa_aio_get_bit(m_aio);
+    }
 
-    private:
-        mraa_aio_context m_aio;
+  private:
+    mraa_aio_context m_aio;
 };
-
 }

api/mraa/common.h

@@ -24,8 +24,27 @@
 
 #pragma once
 
+#include <stdint.h>
 #include "types.h"
 
+#define MRAA_PLATFORM_NAME_MAX_SIZE 64
+#define MRAA_PIN_NAME_SIZE 12
+
+#define MRAA_SUB_PLATFORM_BIT_SHIFT 9
+#define MRAA_SUB_PLATFORM_MASK (1<<MRAA_SUB_PLATFORM_BIT_SHIFT)
+
+#define MRAA_MAIN_PLATFORM_OFFSET 0
+#define MRAA_SUB_PLATFORM_OFFSET 1
+
+/** Executes function func and returns its result in case of error
+ */
+#define MRAA_RETURN_FOR_ERROR(func) do { \
+                                      mraa_result_t res; \
+                                      res = func; \
+                                      if (res != MRAA_SUCCESS) \
+                                      return res;} while(0)
+
+
 /** @file
  *
  * This file defines the basic shared values for libmraa
@@ -41,156 +60,12 @@ extern "C" {
  */
 typedef unsigned int mraa_boolean_t;
 
-/**
- * Enum representing different possible modes for a pin.
- */
-typedef enum {
-    MRAA_PIN_VALID       = 0, /**< Pin Valid */
-    MRAA_PIN_GPIO        = 1, /**< General Purpose IO */
-    MRAA_PIN_PWM         = 2, /**< Pulse Width Modulation */
-    MRAA_PIN_FAST_GPIO   = 3, /**< Faster GPIO */
-    MRAA_PIN_SPI         = 4, /**< SPI */
-    MRAA_PIN_I2C         = 5, /**< I2C */
-    MRAA_PIN_AIO         = 6, /**< Analog in */
-    MRAA_PIN_UART        = 7  /**< UART */
-} mraa_pinmodes_t;
-
-/**
- * A bitfield representing the capabilities of a pin.
- */
-typedef struct {
-    /*@{*/
-    mraa_boolean_t valid:1;     /**< Is the pin valid at all */
-    mraa_boolean_t gpio:1;      /**< Is the pin gpio capable */
-    mraa_boolean_t pwm:1;       /**< Is the pin pwm capable */
-    mraa_boolean_t fast_gpio:1; /**< Is the pin fast gpio capable */
-    mraa_boolean_t spi:1;       /**< Is the pin spi capable */
-    mraa_boolean_t i2c:1;       /**< Is the pin i2c capable */
-    mraa_boolean_t aio:1;       /**< Is the pin analog input capable */
-    mraa_boolean_t uart:1;       /**< Is the pin uart capable */
-    /*@}*/
-} mraa_pincapabilities_t;
-
-/**
- * A Structure representing a multiplexer and the required value
- */
-typedef struct {
-    /*@{*/
-    unsigned int pin;   /**< Raw GPIO pin id */
-    unsigned int value; /**< Raw GPIO value */
-    /*@}*/
-} mraa_mux_t;
-
-typedef struct {
-    mraa_boolean_t complex_pin:1;
-    mraa_boolean_t output_en:1;
-    mraa_boolean_t output_en_high:1;
-    mraa_boolean_t pullup_en:1;
-    mraa_boolean_t pullup_en_hiz:1;
-} mraa_pin_cap_complex_t;
-
-typedef struct {
-    /*@{*/
-    unsigned int pinmap; /**< sysfs pin */
-    unsigned int parent_id; /** parent chip id */
-    unsigned int mux_total; /** Numfer of muxes needed for operation of pin */
-    mraa_mux_t mux[6]; /** Array holding information about mux */
-    unsigned int output_enable; /** Output Enable GPIO, for level shifting */
-    unsigned int pullup_enable; /** Pull-Up enable GPIO, inputs */
-    mraa_pin_cap_complex_t complex_cap;
-    /*@}*/
-} mraa_pin_t;
-
-typedef struct {
-    /*@{*/
-    char mem_dev[32]; /**< Memory device to use /dev/uio0 etc */
-    unsigned int mem_sz; /** Size of memory to map */
-    unsigned int bit_pos; /** Position of value bit */
-    mraa_pin_t gpio; /** GPio context containing none mmap info */
-    /*@}*/
-} mraa_mmap_pin_t;
-
-/**
- * A Structure representing a physical Pin.
- */
-typedef struct {
-    /*@{*/
-    char name[8];                      /**< Pin's real world name */
-    mraa_pincapabilities_t capabilites; /**< Pin Capabiliites */
-    mraa_pin_t gpio; /**< GPIO structure */
-    mraa_pin_t pwm;  /**< PWM structure */
-    mraa_pin_t aio;  /**< Anaglog Pin */
-    mraa_mmap_pin_t mmap; /**< GPIO through memory */
-    mraa_pin_t i2c;  /**< i2c bus/pin */
-    mraa_pin_t spi;  /**< spi bus/pin */
-    mraa_pin_t uart;  /**< uart module/pin */
-    /*@}*/
-} mraa_pininfo_t;
-
-/**
- * A Structure representing the physical properties of a i2c bus.
- */
-typedef struct {
-    /*@{*/
-    unsigned int bus_id; /**< ID as exposed in the system */
-    unsigned int scl; /**< i2c SCL */
-    unsigned int sda; /**< i2c SDA */
-    /*@}*/
-} mraa_i2c_bus_t;
-
-/**
- * A Structure representing the physical properties of a spi bus.
- */
-typedef struct {
-    /*@{*/
-    unsigned int bus_id; /**< The Bus ID as exposed to the system. */
-    unsigned int slave_s; /**< Slave select */
-    mraa_boolean_t three_wire; /**< Is the bus only a three wire system */
-    unsigned int sclk; /**< Serial Clock */
-    unsigned int mosi; /**< Master Out, Slave In. */
-    unsigned int miso; /**< Master In, Slave Out. */
-    unsigned int cs; /**< Chip Select, used when the board is a spi slave */
-    /*@}*/
-} mraa_spi_bus_t;
-
-/**
- * A Structure representing a uart device.
- */
-typedef struct {
-    /*@{*/
-    unsigned int index; /**< ID as exposed in the system */
-    int rx; /**< uart rx */
-    int tx; /**< uart tx */
-    /*@}*/
-} mraa_uart_dev_t;
-
-/**
- * A Structure representing a platform/board.
- */
-typedef struct {
-    /*@{*/
-    unsigned int phy_pin_count; /**< The Total IO pins on board */
-    unsigned int gpio_count; /**< GPIO Count */
-    unsigned int aio_count;  /**< Analog side Count */
-    unsigned int i2c_bus_count; /**< Usable i2c Count */
-    mraa_i2c_bus_t  i2c_bus[12]; /**< Array of i2c */
-    unsigned int def_i2c_bus; /**< Position in array of default i2c bus */
-    unsigned int spi_bus_count; /**< Usable spi Count */
-    mraa_spi_bus_t spi_bus[12];       /**< Array of spi */
-    unsigned int def_spi_bus; /**< Position in array of defult spi bus */
-    unsigned int adc_raw; /**< ADC raw bit value */
-    unsigned int adc_supported; /**< ADC supported bit value */
-    unsigned int def_uart_dev; /**< Position in array of defult uart */
-    unsigned int uart_dev_count; /**< Usable spi Count */
-    mraa_uart_dev_t uart_dev[6]; /**< Array of UARTs */
-    mraa_pininfo_t* pins;     /**< Pointer to pin array */
-    /*@}*/
-} mraa_board_t;
-
 /**
  * Initialise MRAA
  *
- * Detects running platform and attempts to use included pinmap
+ * Detects running platform and attempts to use included pinmap, this is run on
+ * module/library init/load but is handy to rerun to check board initialised
+ * correctly. MRAA_SUCCESS inidicates correct initialisation.
  *
  * @return Result of operation
  */
@@ -210,7 +85,7 @@ mraa_result_t mraa_init() __attribute__((constructor));
  * people who like super clean code. If dynamically loading & unloading
  * libmraa you need to call this before unloading the library.
  */
-void mraa_deinit();
+void mraa_deinit() __attribute__((destructor));
 
 /**
  * Checks if a pin is able to use the passed in mode.
@@ -228,6 +103,14 @@ mraa_boolean_t mraa_pin_mode_test(int pin, mraa_pinmodes_t mode);
  */
 unsigned int mraa_adc_raw_bits();
 
+/**
+ * Check the specified board's bit size when reading the value
+ *
+ * @param specified platform offset; 0 for main platform, 1 foor sub platform
+ * @return raw bits being read from kernel module. zero if no ADC
+ */
+unsigned int mraa_get_platform_adc_raw_bits(uint8_t platform_offset);
+
 /**
  * Return value that the raw value should be shifted to. Zero if no ADC
  *
@@ -235,6 +118,13 @@ unsigned int mraa_adc_raw_bits();
  */
 unsigned int mraa_adc_supported_bits();
 
+/**
+ * Return value that the raw value should be shifted to. Zero if no ADC
+ *
+ * @param specified platform offset; 0 for main platform, 1 foor sub platform
+ * @return return actual bit size the adc value should be understood as.
+ */
+unsigned int mraa_get_platform_adc_supported_bits(int platform_offset);
 
 /**
  * Sets the log level to use from 0-7 where 7 is very verbose. These are the
@@ -244,6 +134,221 @@ unsigned int mraa_adc_supported_bits();
  */
 mraa_result_t mraa_set_log_level(int level);
 
+/**
+ * Return the Platform's Name, If no platform detected return NULL
+ *
+ * @return platform name
+ */
+const char* mraa_get_platform_name();
+
+/**
+ * Return the platform's versioning info, the information given depends per
+ * platform and can be NULL. platform_offset has to be given. Do not modify
+ * this pointer
+ *
+ * @param specified platform offset; 0 for main platform, 1 for sub platform
+ * @return platform's versioning string
+ */
+const char* mraa_get_platform_version(int platform_offset);
+
+/**
+ * This function attempts to set the mraa process to a given priority and the
+ * scheduler to SCHED_RR. Highest * priority is typically 99 and minimum is 0.
+ * This function * will set to MAX if * priority is > MAX. Function will return
+ * -1 on failure.
+ *
+ * @param priority Value from typically 0 to 99
+ * @return The priority value set
+ */
+int mraa_set_priority(const int priority);
+
+/** Get the version string of mraa autogenerated from git tag
+ *
+ * The version returned may not be what is expected however it is a reliable
+ * number associated with the git tag closest to that version at build time
+ *
+ * @return version string from version.h
+ */
+const char* mraa_get_version();
+
+/**
+ * Print a textual representation of the mraa_result_t
+ *
+ * @param result the result to print
+ */
+void mraa_result_print(mraa_result_t result);
+
+/**
+ * Get platform type, board must be initialised.
+ *
+ * @return mraa_platform_t Platform type enum
+ */
+mraa_platform_t mraa_get_platform_type();
+
+/**
+ * Get combined platform type, board must be initialised.
+ * The combined type is represented as
+ * (sub_platform_type << 8) | main_platform_type
+ *
+ * @return int combined platform type
+ */
+int mraa_get_platform_combined_type();
+
+/**
+ * Get platform pincount, board must be initialised.
+ *
+ * @return uint of physical pin count on the in-use platform
+ */
+unsigned int mraa_get_pin_count();
+
+/**
+ * Get platform usable I2C bus count, board must be initialised.
+ *
+ * @return number f usable I2C bus count on the current platform. Function will
+ * return -1 on failure
+ */
+int mraa_get_i2c_bus_count();
+
+/**
+ * Get I2C adapter number in sysfs.
+ *
+ * @param i2c_bus the logical I2C bus number
+ * @return I2C adapter number in sysfs. Function will return -1 on failure
+ */
+int mraa_get_i2c_bus_id(int i2c_bus);
+
+/**
+ * Get specified platform pincount, board must be initialised.
+ *
+ * @param specified platform offset; 0 for main platform, 1 foor sub platform
+ * @return uint of physical pin count on the in-use platform
+ */
+unsigned int mraa_get_platform_pin_count(uint8_t platform_offset);
+
+/**
+* Get name of pin, board must be initialised.
+*
+* @param pin number
+* @return char* of pin name
+*/
+char* mraa_get_pin_name(int pin);
+
+/**
+* Get GPIO index by pin name, board must be initialised.
+*
+* @param pin_name: GPIO pin name. Eg: IO0
+* @return int of MRAA index for GPIO or -1 if not found.
+*/
+int mraa_gpio_lookup(const char* pin_name);
+
+/**
+* Get I2C bus index by bus name, board must be initialised.
+*
+* @param i2c_name: I2C bus name. Eg: I2C6
+* @return int of MRAA index for I2C bus or -1 if not found.
+*/
+int mraa_i2c_lookup(const char* i2c_name);
+
+/**
+* Get SPI bus index by bus name, board must be initialised.
+*
+* @param spi_name: Name of SPI bus. Eg: SPI2
+* @return int of MRAA index for SPI bus or -1 if not found.
+*/
+int mraa_spi_lookup(const char* spi_name);
+
+/**
+* Get PWM index by PWM name, board must be initialised.
+*
+* @param pwm_name: Name of PWM. Eg:PWM0
+* @return int of MRAA index for PWM or -1 if not found.
+*/
+int mraa_pwm_lookup(const char* pwm_name);
+
+/**
+ * Get default i2c bus, board must be initialised.
+ *
+ * @return int default i2c bus index
+ */
+int mraa_get_default_i2c_bus(uint8_t platform_offset);
+
+/**
+ * Detect presence of sub platform.
+ *
+ * @return mraa_boolean_t 1 if sub platform is present and initialized, 0 otherwise
+ */
+mraa_boolean_t mraa_has_sub_platform();
+
+
+/**
+ * Check if pin or bus id includes sub platform mask.
+ *
+ * @param int pin or bus number
+ *
+ * @return mraa_boolean_t 1 if pin or bus is for sub platform, 0 otherwise
+ */
+mraa_boolean_t mraa_is_sub_platform_id(int pin_or_bus_id);
+
+/**
+ * Convert pin or bus index to corresponding sub platform id.
+ *
+ * @param int pin or bus index
+ *
+ * @return int sub platform pin or bus number
+ */
+int mraa_get_sub_platform_id(int pin_or_bus_index);
+
+/**
+ * Convert pin or bus sub platform id to index.
+ *
+ * @param int sub platform pin or bus id
+ *
+ * @return int pin or bus index
+ */
+int mraa_get_sub_platform_index(int pin_or_bus_id);
+
+/**
+ * Add mraa subplatform
+ *
+ * @param subplatform type
+ * @param uart device subplatform is on
+ *
+ * @return mraa_result_t indicating success
+ */
+mraa_result_t mraa_add_subplatform(mraa_platform_t subplatformtype, const char* uart_dev);
+
+/**
+ * Remove a mraa subplatform
+ *
+ * @param subplatform type
+ *
+ * @return mraa_result indicating success
+ */
+mraa_result_t mraa_remove_subplatform(mraa_platform_t subplatformtype);
+
+/**
+ * Create IO using a description in the format:
+ * [io]-[pin]
+ * [io]-[raw]-[pin]
+ * [io]-[raw]-[id]-[pin]
+ * [io]-[raw]-[path]
+ *
+ * @param IO description
+ *
+ * @return void* to IO context or NULL
+ */
+void* mraa_init_io(const char* desc);
+
+/**
+ * Instantiate an unknown board using a json file
+ *
+ * @param Path to the json file, relative to the folder the program
+ * was initially run in or a direct path
+ *
+ * @return mraa_result indicating success
+ */
+mraa_result_t mraa_init_json_platform(const char* path);
+
 #ifdef __cplusplus
 }
 #endif

api/mraa/common.hpp

@@ -25,12 +25,16 @@
 #pragma once
 
 #include "common.h"
+#include "types.hpp"
 #include <string>
+#include <sstream>
+#include <stdexcept>
 
 /**
  * @namespace mraa namespace
  */
-namespace mraa {
+namespace mraa
+{
 
 /**
  * @file
@@ -39,12 +43,28 @@ namespace mraa {
  * This file defines the interface for libmraa common functions
  */
 
+/**
+ * Initialise MRAA
+ *
+ * Detects running platform and attempts to use included pinmap, this is run on
+ * module/library init/load but is handy to rerun to check board initialised
+ * correctly. mraa::SUCCESS inidicates correct initialisation.
+ *
+ * @return Result of operation
+ */
+inline Result
+init()
+{
+    return (Result) mraa_init();
+}
+
 /**
  * Get libmraa version.
  *
  * @return libmraa version (e.g. v0.4.0-20-gb408207)
  */
-std::string getVersion()
+inline std::string
+getVersion()
 {
     std::string ret = mraa_get_version();
     return ret;
@@ -59,7 +79,8 @@ std::string getVersion()
  * @param priority Value from typically 0 to 99
  * @return The priority value set
  */
-int setPriority(const unsigned int priority)
+inline int
+setPriority(const int priority)
 {
     return mraa_set_priority(priority);
 }
@@ -67,21 +88,23 @@ int setPriority(const unsigned int priority)
 /**
  * Get platform type, board must be initialised.
  *
- * @return mraa_platform_t Platform type enum
+ * @return mraa::platform Platform type enum
  */
-mraa_platform_t getPlatformType()
+inline Platform
+getPlatformType()
 {
-    return mraa_get_platform_type();
+    return (Platform) mraa_get_platform_type();
 }
 
 /**
- * Print a textual representation of the mraa_result_t
+ * Print a textual representation of the mraa::Result
  *
- * @param result the result to print
+ * @param Result the Result to print
  */
-void printError(mraa_result_t result)
+inline void
+printError(Result result)
 {
-    mraa_result_print(result);
+    mraa_result_print((mraa_result_t) result);
 }
 
 /**
@@ -91,9 +114,10 @@ void printError(mraa_result_t result)
  * @param mode the mode to be tested.
  * @return boolean if the mode is supported, 0=false.
  */
-bool pinModeTest(int pin, mraa_pinmodes_t mode)
+inline bool
+pinModeTest(int pin, Pinmodes mode)
 {
-    return (bool) mraa_pin_mode_test(pin,mode);
+    return (bool) mraa_pin_mode_test(pin, (mraa_pinmodes_t) mode);
 }
 
 /**
@@ -101,7 +125,8 @@ bool pinModeTest(int pin, mraa_pinmodes_t mode)
  *
  * @return raw bits being read from kernel module. Zero if no ADC
  */
-unsigned int adcRawBits()
+inline unsigned int
+adcRawBits()
 {
     return mraa_adc_raw_bits();
 }
@@ -111,20 +136,295 @@ unsigned int adcRawBits()
  *
  * @return return actual bit size the adc value should be understood as.
  */
-unsigned int adcSupportedBits()
+inline unsigned int
+adcSupportedBits()
 {
     return mraa_adc_supported_bits();
 }
 
+/**
+ * Return Platform Name. Returns NULL if no platform inited.
+ *
+ * @return platform name
+ */
+inline std::string
+getPlatformName()
+{
+    std::string ret_val(mraa_get_platform_name());
+    return ret_val;
+}
+
+/**
+ * Return platform versioning info. Returns NULL if no info present.
+ *
+ * @param optional subplatform identifier
+ * @return platform versioning info
+ */
+inline std::string
+getPlatformVersion(int platform_offset=MRAA_MAIN_PLATFORM_OFFSET)
+{
+    std::string ret_val(mraa_get_platform_version(platform_offset));
+    return ret_val;
+}
+
+/**
+ * Return count of physical pins on the running platform
+ *
+ * @return uint of physical pins.
+ */
+inline unsigned int
+getPinCount()
+{
+    return mraa_get_pin_count();
+}
+
+/**
+ * Get platform usable I2C bus count, board must be initialised.
+ *
+ * @return number f usable I2C bus count on the current platform. Function will
+ * return -1 on failure
+ */
+inline int
+getI2cBusCount()
+{
+    return mraa_get_i2c_bus_count();
+}
+
+/**
+ * Get I2C adapter number in sysfs.
+ *
+ * @param i2c_bus the logical I2C bus number
+ * @return I2C adapter number in sysfs. Function will return -1 on failure
+ */
+inline int
+getI2cBusId(int i2c_bus)
+{
+    return mraa_get_i2c_bus_id(i2c_bus);
+}
+
+/**
+* Get name of pin, board must be initialised.
+*
+* @param pin number
+*
+* @return char* of pin name
+*/
+inline std::string
+getPinName(int pin)
+{
+    std::string ret_val(mraa_get_pin_name(pin));
+    return ret_val;
+}
+
+/**
+* Get GPIO index by pin name, board must be initialised.
+*
+* @param pin_name: GPIO pin name. Eg: IO0
+* @throws std::invalid_argument if name is not found
+* @return int of MRAA index for GPIO
+*/
+inline int
+getGpioLookup(std::string pin_name)
+{
+    int index = mraa_gpio_lookup(pin_name.c_str());
+
+    if (index < 0){
+        std::ostringstream oss;
+        oss << "Gpio name " << pin_name << " is not valid";
+        throw std::invalid_argument(oss.str());
+    }
+
+    return index;
+}
+
+/**
+* Get I2C bus index by bus name, board must be initialised.
+*
+* @param i2c_name: I2C bus name. Eg: I2C6
+* @throws std::invalid_argument if name is not found
+* @return int of MRAA index for I2C bus
+*/
+inline int
+getI2cLookup(std::string i2c_name)
+{
+    int index = mraa_i2c_lookup(i2c_name.c_str());
+
+    if (index < 0){
+        std::ostringstream oss;
+        oss << "i2c name " << i2c_name << " is not valid";
+        throw std::invalid_argument(oss.str());
+    }
+
+    return index;
+}
+
+/**
+* Get SPI bus index by bus name, board must be initialised.
+*
+* @param spi_name: Name of SPI bus. Eg: SPI2
+* @throws std::invalid_argument if name is not found
+* @return int of MRAA index for SPI bus
+*/
+inline int
+getSpiLookup(std::string spi_name)
+{
+    int index = mraa_spi_lookup(spi_name.c_str());
+
+    if (index < 0){
+        std::ostringstream oss;
+        oss << "Spi name " << spi_name << " is not valid";
+        throw std::invalid_argument(oss.str());
+    }
+
+    return index;
+}
+
+/**
+* Get PWM index by PWM name, board must be initialised.
+*
+* @param pwm_name: Name of PWM. Eg:PWM0
+* @throws std::invalid_argument if name is not found
+* @return int of MRAA index for PWM
+*/
+inline int
+getPwmLookup(std::string pwm_name)
+{
+    int index = mraa_pwm_lookup(pwm_name.c_str());
+
+    if (index < 0){
+        std::ostringstream oss;
+        oss << "PWM name " << pwm_name << " is not valid";
+        throw std::invalid_argument(oss.str());
+    }
+
+    return index;
+}
+
 /**
  * Sets the log level to use from 0-7 where 7 is very verbose. These are the
  * syslog log levels, see syslog(3) for more information on the levels.
  *
+ * @param level
  * @return Result of operation
  */
-mraa_result_t setLogLevel(int level)
+inline Result
+setLogLevel(int level)
 {
-    return mraa_set_log_level(level);
+    return (Result) mraa_set_log_level(level);
+}
+
+/**
+ * Detect presence of sub platform.
+ *
+ * @return bool true if sub platform is present and initialized, false otherwise
+ */
+inline bool
+hasSubPlatform()
+{
+    return static_cast<bool>(mraa_has_sub_platform());
+}
+
+/**
+ * Check if pin or bus id includes sub platform mask.
+ *
+ * @param int pin or bus number
+ *
+ * @return mraa_boolean_t 1 if pin or bus is for sub platform, 0 otherwise
+ */
+inline bool
+isSubPlatformId(int pin_or_bus_id)
+{
+    return static_cast<bool>(mraa_is_sub_platform_id(pin_or_bus_id));
+}
+
+/**
+ * Convert pin or bus index to corresponding sub platform id.
+ *
+ * @param int pin or bus index
+ *
+ * @return int sub platform pin or bus number
+ */
+inline int
+getSubPlatformId(int pin_or_bus_index)
+{
+    return mraa_get_sub_platform_id(pin_or_bus_index);
+}
+
+/**
+ * Convert pin or bus sub platform id to index.
+ *
+ * @param int sub platform pin or bus id
+ *
+ * @return int pin or bus index
+ */
+inline int
+getSubPlatformIndex(int pin_or_bus_id)
+{
+    return mraa_get_sub_platform_index(pin_or_bus_id);
+}
+
+/**
+ * Get default i2c bus, board must be initialised.
+ *
+ * @param optional subplatform identifier
+ * @return default i2c bus for paltform
+ */
+inline int
+getDefaultI2cBus(int platform_offset=MRAA_MAIN_PLATFORM_OFFSET)
+{
+    return mraa_get_default_i2c_bus(platform_offset);
+}
+
+/**
+ * Add mraa subplatform
+ *
+ * @param subplatformtype the type of subplatform to add
+ * (e.g. MRAA_GENERIC_FIRMATA)
+ * @param uart_dev subplatform device string (e.g. "/dev/ttyACM0")
+ * @return Result of operation
+ */
+inline Result
+addSubplatform(Platform subplatformtype, std::string uart_dev)
+{
+    return (Result) mraa_add_subplatform((mraa_platform_t) subplatformtype, uart_dev.c_str());
+}
+
+inline Result
+removeSubplatform(Platform subplatformtype)
+{
+    return (Result) mraa_remove_subplatform((mraa_platform_t) subplatformtype);
+}
+
+/**
+ * Create IO using a description in the format:
+ * [io]-[pin]
+ * [io]-[raw]-[pin]
+ * [io]-[raw]-[id]-[pin]
+ * [io]-[raw]-[path]
+ *
+ * @param IO description
+ *
+ * @return class T initialised using pointer to IO or NULL
+ */
+template <class T>
+inline T*
+initIo(std::string desc)
+{
+    return new T(mraa_init_io(desc.c_str()));
+}
+
+/**
+ * Instantiate an unknown board using a json file
+ *
+ * @param Path to the json file, relative to the folder the program
+ * was initially run in or a direct path
+ *
+ * @return Result indicating success
+ */
+inline Result
+initJsonPlatform(std::string path)
+{
+    return (Result) mraa_init_json_platform(path.c_str());
 }
 
 }

api/mraa/firmata.h

@@ -0,0 +1,101 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2016 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+/**
+ * @file
+ * @brief Firmata IO
+ *
+ * Firmata IO lets you SYSEX messages construct and ask for a callback on a
+ * SYSEX messages. This is meant to provide a way to call custom firmata APIs
+ * especially using the Custom firmata API
+ *
+ * @snippet firmata_curie_imu.c Interesting
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "common.h"
+
+/**
+ * Opaque pointer definition to the internal struct _firmata. This context
+ * refers to one firmata 'extension' letting you write/return SYSEX messages
+ * directly
+ */
+typedef struct _firmata* mraa_firmata_context;
+
+/**
+ * Initialise firmata context on a feature. This feature is what will be
+ * listened on if you request a response callback
+ *
+ * @param firmata feature
+ * @return firmata context or NULL
+ */
+mraa_firmata_context mraa_firmata_init(int feature);
+
+/**
+ * Sends a custom SYSEX message to the firmata board.
+ *
+ * @param dev The Firmata context
+ * @param msg The SYSEX message
+ * @param length The length of the sysex message
+ */
+mraa_result_t mraa_firmata_write_sysex(mraa_firmata_context dev, char* msg, int length);
+
+/**
+ * Set a callback on 'feature'. This function is not thread safe and threads
+ * calling it need to make sure they are the only thread calling this.
+ *
+ * @param dev The Firmata context
+ * @param fptr Function pointer to function to be called when interrupt is
+ * triggered, the returned buffer and length are the arguments.
+ * @return Result of operation
+ */
+mraa_result_t mraa_firmata_response(mraa_firmata_context dev, void (*fptr)(uint8_t*, int));
+
+/**
+ * Stop getting events on feature. This is more efficient than mraa_firmata_close
+ * as it can be re-enabled without adding a feature
+ *
+ * @param dev The Firmata context
+ * @return Result of operation
+ */
+mraa_result_t mraa_firmata_response_stop(mraa_firmata_context dev);
+
+/**
+ * Free all firmata handle resources, this will leave an element in an array
+ * internally that will be skipped, avoid closing many firmata contexts often
+ * as there is a cost to doing this
+ *
+ * @param dev The Firmata context
+ * @return Result of operation
+ */
+mraa_result_t mraa_firmata_close(mraa_firmata_context dev);
+
+#ifdef __cplusplus
+}
+#endif

api/mraa/gpio.h

@@ -28,11 +28,10 @@
  * @file
  * @brief General Purpose IO
  *
- * Gpio is the General Purpose IO interface to libmraa. It's features depends on
+ * Gpio is the General Purpose IO interface to libmraa. Its features depend on
  * the board type used, it can use gpiolibs (exported via a kernel module
  * through sysfs), or memory mapped IO via a /dev/uio device or /dev/mem
- * depending again on the board configuratio, or memory mapped IO via a
- * /dev/uio device or /dev/mem depending again on the board configuration
+ * depending again on the board configuration.
  *
  * @snippet gpio_read6.c Interesting
  */
@@ -41,15 +40,15 @@
 extern "C" {
 #endif
 
-#ifdef SWIGPYTHON
-#include <Python.h>
-#endif
-
 #include <stdio.h>
 #include <pthread.h>
-
 #include "common.h"
 
+#if defined(SWIGJAVA) || defined(JAVACALLBACK)
+#include <jni.h>
+void mraa_java_isr_callback(void *args);
+#endif
+
 /**
  * Opaque pointer definition to the internal struct _gpio
  */
@@ -59,29 +58,31 @@ typedef struct _gpio* mraa_gpio_context;
  * Gpio Output modes
  */
 typedef enum {
-    MRAA_GPIO_STRONG     = 0, /**< Default. Strong high and low */
-    MRAA_GPIO_PULLUP     = 1, /**< Resistive High */
-    MRAA_GPIO_PULLDOWN   = 2, /**< Resistive Low */
-    MRAA_GPIO_HIZ        = 3  /**< High Z State */
-} gpio_mode_t;
+    MRAA_GPIO_STRONG = 0,   /**< Default. Strong high and low */
+    MRAA_GPIO_PULLUP = 1,   /**< Resistive High */
+    MRAA_GPIO_PULLDOWN = 2, /**< Resistive Low */
+    MRAA_GPIO_HIZ = 3       /**< High Z State */
+} mraa_gpio_mode_t;
 
 /**
  * Gpio Direction options
  */
 typedef enum {
-    MRAA_GPIO_OUT    = 0, /**< Output. A Mode can also be set */
-    MRAA_GPIO_IN     = 1  /**< Input */
-} gpio_dir_t;
+    MRAA_GPIO_OUT = 0,      /**< Output. A Mode can also be set */
+    MRAA_GPIO_IN = 1,       /**< Input */
+    MRAA_GPIO_OUT_HIGH = 2, /**< Output. Init High */
+    MRAA_GPIO_OUT_LOW = 3   /**< Output. Init Low */
+} mraa_gpio_dir_t;
 
 /**
- * Gpio Edge types for interupts
+ * Gpio Edge types for interrupts
  */
 typedef enum {
-    MRAA_GPIO_EDGE_NONE    = 0, /**< No interrupt on Gpio */
-    MRAA_GPIO_EDGE_BOTH    = 1, /**< Interupt on rising & falling */
-    MRAA_GPIO_EDGE_RISING  = 2, /**< Interupt on rising only */
-    MRAA_GPIO_EDGE_FALLING = 3  /**< Interupt on falling only */
-} gpio_edge_t;
+    MRAA_GPIO_EDGE_NONE = 0,   /**< No interrupt on Gpio */
+    MRAA_GPIO_EDGE_BOTH = 1,   /**< Interrupt on rising & falling */
+    MRAA_GPIO_EDGE_RISING = 2, /**< Interrupt on rising only */
+    MRAA_GPIO_EDGE_FALLING = 3 /**< Interrupt on falling only */
+} mraa_gpio_edge_t;
 
 /**
  * Initialise gpio_context, based on board number
@@ -106,22 +107,22 @@ mraa_gpio_context mraa_gpio_init_raw(int gpiopin);
  * @param mode The edge mode to set the gpio into
  * @return Result of operation
  */
-mraa_result_t mraa_gpio_edge_mode(mraa_gpio_context dev, gpio_edge_t mode);
+mraa_result_t mraa_gpio_edge_mode(mraa_gpio_context dev, mraa_gpio_edge_t mode);
 
 /**
- * Set an interupt on pin
+ * Set an interrupt on pin
  *
  * @param dev The Gpio context
  * @param edge The edge mode to set the gpio into
- * @param fptr Function pointer to function to be called when interupt is
+ * @param fptr Function pointer to function to be called when interrupt is
  * triggered
  * @param args Arguments passed to the interrupt handler (fptr)
  * @return Result of operation
  */
-mraa_result_t mraa_gpio_isr(mraa_gpio_context dev, gpio_edge_t edge, void (*fptr)(void *), void * args);
+mraa_result_t mraa_gpio_isr(mraa_gpio_context dev, mraa_gpio_edge_t edge, void (*fptr)(void*), void* args);
 
 /**
- * Stop the current interupt watcher on this Gpio, and set the Gpio edge mode
+ * Stop the current interrupt watcher on this Gpio, and set the Gpio edge mode
  * to MRAA_GPIO_EDGE_NONE
  *
  * @param dev The Gpio context
@@ -136,7 +137,7 @@ mraa_result_t mraa_gpio_isr_exit(mraa_gpio_context dev);
  * @param mode The Gpio Output Mode
  * @return Result of operation
  */
-mraa_result_t mraa_gpio_mode(mraa_gpio_context dev, gpio_mode_t mode);
+mraa_result_t mraa_gpio_mode(mraa_gpio_context dev, mraa_gpio_mode_t mode);
 
 /**
  * Set Gpio direction
@@ -145,7 +146,16 @@ mraa_result_t mraa_gpio_mode(mraa_gpio_context dev, gpio_mode_t mode);
  * @param dir The direction of the Gpio
  * @return Result of operation
  */
-mraa_result_t mraa_gpio_dir(mraa_gpio_context dev, gpio_dir_t dir);
+mraa_result_t mraa_gpio_dir(mraa_gpio_context dev, mraa_gpio_dir_t dir);
+
+/**
+ * Read Gpio direction
+ *
+ * @param dev The Gpio context
+ * @param dir The address where to store the Gpio direction
+ * @return Result of operation
+ */
+mraa_result_t mraa_gpio_read_dir(mraa_gpio_context dev, mraa_gpio_dir_t *dir);
 
 /**
  * Close the Gpio context
@@ -157,7 +167,8 @@ mraa_result_t mraa_gpio_dir(mraa_gpio_context dev, gpio_dir_t dir);
 mraa_result_t mraa_gpio_close(mraa_gpio_context dev);
 
 /**
- * Read the Gpio value.
+ * Read the Gpio value. This can be 0 or 1. A resonse of -1 means that there
+ * was a fatal error.
  *
  * @param dev The Gpio context
  * @return Result of operation
@@ -191,6 +202,22 @@ mraa_result_t mraa_gpio_owner(mraa_gpio_context dev, mraa_boolean_t owner);
  */
 mraa_result_t mraa_gpio_use_mmaped(mraa_gpio_context dev, mraa_boolean_t mmap);
 
+/**
+ * Get a pin number of the gpio, invalid will return -1
+ *
+ * @param dev The Gpio context
+ * @return Pin number
+ */
+int mraa_gpio_get_pin(mraa_gpio_context dev);
+
+/**
+ * Get a gpio number as used within sysfs, invalid will return -1
+ *
+ * @param dev The Gpio context
+ * @return gpio number
+ */
+int mraa_gpio_get_pin_raw(mraa_gpio_context dev);
+
 #ifdef __cplusplus
 }
 #endif

api/mraa/gpio.hpp

@@ -25,8 +25,17 @@
 #pragma once
 
 #include "gpio.h"
+#include "types.hpp"
+#include <stdexcept>
 
-namespace mraa {
+#if defined(SWIGJAVASCRIPT)
+#if NODE_MODULE_VERSION >= 0x000D
+#include <uv.h>
+#endif
+#endif
+
+namespace mraa
+{
 
 // These enums must match the enums in gpio.h
 
@@ -34,28 +43,30 @@ namespace mraa {
  * Gpio Output modes
  */
 typedef enum {
-    MODE_STRONG   = 0, /**< No interrupt on Gpio */
-    MODE_PULLUP   = 1, /**< Interupt on rising & falling */
-    MODE_PULLDOWN = 2, /**< Interupt on rising only */
-    MODE_HIZ      = 3  /**< Interupt on falling only */
+    MODE_STRONG = 0,   /**< Default. Strong High and Low */
+    MODE_PULLUP = 1,   /**< Resistive High */
+    MODE_PULLDOWN = 2, /**< Resistive Low */
+    MODE_HIZ = 3       /**< High Z State */
 } Mode;
 
 /**
  * Gpio Direction options
  */
 typedef enum {
-    DIR_OUT = 0, /**< Output. A Mode can also be set */
-    DIR_IN  = 1  /**< Input */
+    DIR_OUT = 0,      /**< Output. A Mode can also be set */
+    DIR_IN = 1,       /**< Input */
+    DIR_OUT_HIGH = 2, /**< Output. Init High */
+    DIR_OUT_LOW = 3   /**< Output. Init Low */
 } Dir;
 
 /**
- * Gpio Edge types for interupts
+ * Gpio Edge types for interrupts
  */
 typedef enum {
-    EDGE_NONE    = 0, /**< No interrupt on Gpio */
-    EDGE_BOTH    = 1, /**< Interupt on rising & falling */
-    EDGE_RISING  = 2, /**< Interupt on rising only */
-    EDGE_FALLING = 3  /**< Interupt on falling only */
+    EDGE_NONE = 0,   /**< No interrupt on Gpio */
+    EDGE_BOTH = 1,   /**< Interrupt on rising & falling */
+    EDGE_RISING = 2, /**< Interrupt on rising only */
+    EDGE_FALLING = 3 /**< Interrupt on falling only */
 } Edge;
 
 /**
@@ -65,117 +76,250 @@ typedef enum {
  *
  * @snippet Blink-IO.cpp Interesting
  */
-class Gpio {
-    public:
-        /**
-         * Instanciates a Gpio object
-         *
-         * @param pin pin number to use
-         * @param owner (optional) Set pin owner, default behaviour is to 'own'
-         * the pin if we exported it. This means we will close it on destruct.
-         * Otherwise it will get left open. This is only valid in sysfs use
-         * cases
-         * @param raw (optional) Raw pins will use gpiolibs pin numbering from
-         * the kernel module. Note that you will not get any muxers set up for
-         * you so this may not always work as expected.
-         */
-        Gpio(int pin, bool owner=true, bool raw=false) {
-            if (raw)
-                m_gpio = mraa_gpio_init_raw(pin);
-            else
-                m_gpio = mraa_gpio_init(pin);
-            if (!owner)
-                mraa_gpio_owner(m_gpio, 0);
+class Gpio
+{
+  public:
+    /**
+     * Instantiates a Gpio object
+     *
+     * @param pin pin number to use
+     * @param owner (optional) Set pin owner, default behaviour is to 'own'
+     * the pin if we exported it. This means we will close it on destruct.
+     * Otherwise it will get left open. This is only valid in sysfs use
+     * cases
+     * @param raw (optional) Raw pins will use gpiolibs pin numbering from
+     * the kernel module. Note that you will not get any muxers set up for
+     * you so this may not always work as expected.
+     */
+    Gpio(int pin, bool owner = true, bool raw = false)
+    {
+        if (raw) {
+            m_gpio = mraa_gpio_init_raw(pin);
+        } else {
+            m_gpio = mraa_gpio_init(pin);
         }
-        /**
-         * Gpio object destructor, this will only unexport the gpio if we where
-         * the owner
-         */
-        ~Gpio() {
-            mraa_gpio_close(m_gpio);
-        }
-        /**
-         * Set the edge mode for ISR
-         *
-         * @param mode The edge mode to set
-         * @return Result of operation
-         */
-        mraa_result_t edge(Edge mode) {
-            return mraa_gpio_edge_mode(m_gpio, (gpio_edge_t) mode);
-        }
-#if defined(SWIGPYTHON)
-        mraa_result_t isr(Edge mode, PyObject *pyfunc, PyObject* args) {
-            return mraa_gpio_isr(m_gpio, (gpio_edge_t) mode, (void (*) (void *)) pyfunc, (void *) args);
-        }
-#else
-        /**
-         * Sets a callback to be called when pin value changes
-         *
-         * @param mode The edge mode to set
-         * @param fptr Function pointer to function to be called when interupt is
-         * triggered
-         * @param args Arguments passed to the interrupt handler (fptr)
-         * @return Result of operation
-         */
-        mraa_result_t isr(Edge mode, void (*fptr)(void *), void * args) {
-            return mraa_gpio_isr(m_gpio, (gpio_edge_t) mode, fptr, args);
-        }
-#endif
-        /**
-         * Exits callback - this call will not kill the isr thread imediatlu
-         * but only when it is out of it's critical section
-         *
-         * @return Result of operation
-         */
-        mraa_result_t isrExit() {
-            return mraa_gpio_isr_exit(m_gpio);
-        }
-        /**
-         * Change Gpio mode
-         *
-         * @param mode The mode to change the gpio into
-         * @return Result of operation
-         */
-        mraa_result_t mode(Mode mode) {
-            return mraa_gpio_mode(m_gpio, (gpio_mode_t) mode);
-        }
-        /**
-         * Change Gpio direction
-         *
-         * @param dir The direction to change the gpio into
-         * @return Result of operation
-         */
-        mraa_result_t dir(Dir dir) {
-            return mraa_gpio_dir(m_gpio, (gpio_dir_t) dir);
-        }
-        /**
-         * Read value from Gpio
-         *
-         * @return Gpio value
-         */
-        int read() {
-            return mraa_gpio_read(m_gpio);
-        }
-        /**
-         * Write value to Gpio
-         *
-         * @param value Value to write to Gpio
-         * @return Result of operation
-         */
-        mraa_result_t write(int value) {
-            return mraa_gpio_write(m_gpio, value);
-        }
-        /**
-         * Enable use of mmap i/o if available.
-         *
-         * @param enable true to use mmap
-         * @return Result of operation
-         */
-        mraa_result_t useMmap(bool enable) {
-            return mraa_gpio_use_mmaped(m_gpio, (mraa_boolean_t) enable);
-        }
-    private:
-        mraa_gpio_context m_gpio;
-};
 
+        if (m_gpio == NULL) {
+            throw std::invalid_argument("Invalid GPIO pin specified");
+        }
+
+        if (!owner) {
+            mraa_gpio_owner(m_gpio, 0);
+        }
+    }
+    /**
+     * Gpio Constructor, takes a pointer to the GPIO context and initialises
+     * the GPIO class
+     *
+     * @param void * to GPIO context
+     */
+    Gpio(void* gpio_context)
+    {
+        m_gpio = (mraa_gpio_context) gpio_context;
+        if (m_gpio == NULL) {
+            throw std::invalid_argument("Invalid GPIO context");
+        }
+    }
+    /**
+     * Gpio object destructor, this will only unexport the gpio if we where
+     * the owner
+     */
+    ~Gpio()
+    {
+        mraa_gpio_close(m_gpio);
+    }
+    /**
+     * Set the edge mode for ISR
+     *
+     * @param mode The edge mode to set
+     * @return Result of operation
+     */
+    Result
+    edge(Edge mode)
+    {
+        return (Result) mraa_gpio_edge_mode(m_gpio, (mraa_gpio_edge_t) mode);
+    }
+#if defined(SWIGPYTHON)
+    Result
+    isr(Edge mode, PyObject* pyfunc, PyObject* args)
+    {
+        return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, (void (*) (void*)) pyfunc, (void*) args);
+    }
+#elif defined(SWIGJAVASCRIPT)
+    static void
+    v8isr(uv_work_t* req, int status)
+    {
+#if NODE_MODULE_VERSION >= 0x000D
+        v8::HandleScope scope(v8::Isolate::GetCurrent());
+#endif
+        mraa::Gpio* This = (mraa::Gpio*) req->data;
+        int argc = 1;
+        v8::Local<v8::Value> argv[] = { SWIGV8_INTEGER_NEW(-1) };
+#if NODE_MODULE_VERSION >= 0x000D
+        v8::Local<v8::Function> f = v8::Local<v8::Function>::New(v8::Isolate::GetCurrent(), This->m_v8isr);
+        f->Call(SWIGV8_CURRENT_CONTEXT()->Global(), argc, argv);
+#else
+        This->m_v8isr->Call(SWIGV8_CURRENT_CONTEXT()->Global(), argc, argv);
+#endif
+        delete req;
+    }
+
+    static void
+    nop(uv_work_t* req)
+    {
+        // Do nothing.
+    }
+
+    static void
+    uvwork(void* ctx)
+    {
+        uv_work_t* req = new uv_work_t;
+        req->data = ctx;
+        uv_queue_work(uv_default_loop(), req, nop, v8isr);
+    }
+
+    Result
+    isr(Edge mode, v8::Handle<v8::Function> func)
+    {
+#if NODE_MODULE_VERSION >= 0x000D
+        m_v8isr.Reset(v8::Isolate::GetCurrent(), func);
+#else
+        m_v8isr = v8::Persistent<v8::Function>::New(func);
+#endif
+        return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, &uvwork, this);
+    }
+#elif defined(SWIGJAVA) || defined(JAVACALLBACK)
+    Result
+    isr(Edge mode, jobject runnable)
+    {
+        return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, mraa_java_isr_callback, runnable);
+    }
+#endif
+    /**
+     * Sets a callback to be called when pin value changes
+     *
+     * @param mode The edge mode to set
+     * @param fptr Function pointer to function to be called when interrupt is
+     * triggered
+     * @param args Arguments passed to the interrupt handler (fptr)
+     * @return Result of operation
+     */
+    Result
+    isr(Edge mode, void (*fptr)(void*), void* args)
+    {
+        return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, fptr, args);
+    }
+
+    /**
+     * Exits callback - this call will not kill the isr thread immediately
+     * but only when it is out of it's critical section
+     *
+     * @return Result of operation
+     */
+    Result
+    isrExit()
+    {
+#if defined(SWIGJAVASCRIPT)
+#if NODE_MODULE_VERSION >= 0x000D
+        m_v8isr.Reset();
+#else
+        m_v8isr.Dispose();
+        m_v8isr.Clear();
+#endif
+#endif
+        return (Result) mraa_gpio_isr_exit(m_gpio);
+    }
+    /**
+     * Change Gpio mode
+     *
+     * @param mode The mode to change the gpio into
+     * @return Result of operation
+     */
+    Result
+    mode(Mode mode)
+    {
+        return (Result )mraa_gpio_mode(m_gpio, (mraa_gpio_mode_t) mode);
+    }
+    /**
+     * Change Gpio direction
+     *
+     * @param dir The direction to change the gpio into
+     * @return Result of operation
+     */
+    Result
+    dir(Dir dir)
+    {
+        return (Result )mraa_gpio_dir(m_gpio, (mraa_gpio_dir_t) dir);
+    }
+
+    /**
+     * Read Gpio direction
+     *
+     * @throw std::runtime_error in case of failure
+     * @return Result of operation
+     */
+    Dir
+    readDir()
+    {
+        mraa_gpio_dir_t dir;
+        if (mraa_gpio_read_dir(m_gpio, &dir) != MRAA_SUCCESS) {
+            throw std::runtime_error("Failed to read direction");
+        }
+        return (Dir) dir;
+    }
+
+    /**
+     * Read value from Gpio
+     *
+     * @return Gpio value
+     */
+    int
+    read()
+    {
+        return mraa_gpio_read(m_gpio);
+    }
+    /**
+     * Write value to Gpio
+     *
+     * @param value Value to write to Gpio
+     * @return Result of operation
+     */
+    Result
+    write(int value)
+    {
+        return (Result) mraa_gpio_write(m_gpio, value);
+    }
+    /**
+     * Enable use of mmap i/o if available.
+     *
+     * @param enable true to use mmap
+     * @return Result of operation
+     */
+    Result
+    useMmap(bool enable)
+    {
+        return (Result) mraa_gpio_use_mmaped(m_gpio, (mraa_boolean_t) enable);
+    }
+    /**
+     * Get pin number of Gpio. If raw param is True will return the
+     * number as used within sysfs. Invalid will return -1.
+     *
+     * @param raw (optional) get the raw gpio number.
+     * @return Pin number
+     */
+    int
+    getPin(bool raw = false)
+    {
+        if (raw) {
+            return mraa_gpio_get_pin_raw(m_gpio);
+        }
+        return mraa_gpio_get_pin(m_gpio);
+    }
+
+  private:
+    mraa_gpio_context m_gpio;
+#if defined(SWIGJAVASCRIPT)
+    v8::Persistent<v8::Function> m_v8isr;
+#endif
+};
 }

api/mraa/i2c.h

@@ -61,7 +61,7 @@ typedef struct _i2c* mraa_i2c_context;
 mraa_i2c_context mraa_i2c_init(int bus);
 
 /**
- * Initialise i2c context, passing in spi bus to use.
+ * Initialise i2c context, passing in the i2c bus to use.
  *
  * @param bus The i2c bus to use i.e. /dev/i2c-2 would be "2"
  * @return i2c context or NULL
@@ -69,41 +69,71 @@ mraa_i2c_context mraa_i2c_init(int bus);
 mraa_i2c_context mraa_i2c_init_raw(unsigned int bus);
 
 /**
- * Sets the frequency of the i2c context
+ * Sets the frequency of the i2c context. Most platforms do not support this.
  *
  * @param dev The i2c context
- * @param hz The bus frequency in hertz
+ * @param mode The bus mode
  * @return Result of operation
  */
-mraa_result_t mraa_i2c_frequency(mraa_i2c_context dev, int hz);
+mraa_result_t mraa_i2c_frequency(mraa_i2c_context dev, mraa_i2c_mode_t mode);
 
 /**
- * Read from an i2c context
+ * Simple bulk read from an i2c context
  *
  * @param dev The i2c context
  * @param data pointer to the byte array to read data in to
  * @param length max number of bytes to read
- * @return length of the read in bytes or 0
+ * @return length of the read in bytes or -1
  */
-int mraa_i2c_read(mraa_i2c_context dev, uint8_t *data, int length);
+int mraa_i2c_read(mraa_i2c_context dev, uint8_t* data, int length);
 
 /**
- * Read a single byte from the i2c context
+ * Simple read for a single byte from the i2c context
  *
  * @param dev The i2c context
  * @return The result of the read or -1 if failed
  */
-uint8_t mraa_i2c_read_byte(mraa_i2c_context dev);
+int mraa_i2c_read_byte(mraa_i2c_context dev);
 
 /**
- * Write to an i2c context
+ * Read a single byte from i2c context, from designated register
+ *
+ * @param dev The i2c context
+ * @param command The register
+ * @return The result of the read or -1 if failed
+ */
+int mraa_i2c_read_byte_data(mraa_i2c_context dev, const uint8_t command);
+
+/**
+ * Read a single word from i2c context, from designated register
+ *
+ * @param dev The i2c context
+ * @param command The register
+ * @return The result of the read or -1 if failed
+ */
+int mraa_i2c_read_word_data(mraa_i2c_context dev, const uint8_t command);
+
+/**
+ * Bulk read from i2c context, starting from designated register
+ *
+ * @param dev The i2c context
+ * @param command The register
+ * @param data pointer to the byte array to read data in to
+ * @param length max number of bytes to read
+ * @return The length in bytes passed to the function or -1
+ */
+int mraa_i2c_read_bytes_data(mraa_i2c_context dev, uint8_t command, uint8_t* data, int length);
+
+/**
+ * Write length bytes to the bus, the first byte in the array is the
+ * command/register to write
  *
  * @param dev The i2c context
  * @param data pointer to the byte array to be written
  * @param length the number of bytes to transmit
  * @return Result of operation
  */
-mraa_result_t mraa_i2c_write(mraa_i2c_context dev, const uint8_t *data, int length);
+mraa_result_t mraa_i2c_write(mraa_i2c_context dev, const uint8_t* data, int length);
 
 /**
  * Write a single byte to an i2c context
@@ -115,15 +145,33 @@ mraa_result_t mraa_i2c_write(mraa_i2c_context dev, const uint8_t *data, int leng
 mraa_result_t mraa_i2c_write_byte(mraa_i2c_context dev, const uint8_t data);
 
 /**
- * Sets the i2c context address.
+ * Write a single byte to an i2c context
  *
  * @param dev The i2c context
- * @param address The address to set for the slave (ignoring the least
- *   signifcant bit). If set to 0, the slave will only respond to the
- *   general call address.
+ * @param data The byte to write
+ * @param command The register
  * @return Result of operation
  */
-mraa_result_t mraa_i2c_address(mraa_i2c_context dev, int address);
+mraa_result_t mraa_i2c_write_byte_data(mraa_i2c_context dev, const uint8_t data, const uint8_t command);
+
+/**
+ * Write a single word to an i2c context
+ *
+ * @param dev The i2c context
+ * @param data The word to write
+ * @param command The register
+ * @return Result of operation
+ */
+mraa_result_t mraa_i2c_write_word_data(mraa_i2c_context dev, const uint16_t data, const uint8_t command);
+
+/**
+ * Sets the i2c slave address.
+ *
+ * @param dev The i2c context
+ * @param address The address to set for the slave (7-bit address)
+ * @return Result of operation
+ */
+mraa_result_t mraa_i2c_address(mraa_i2c_context dev, uint8_t address);
 
 /**
  * De-inits an mraa_i2c_context device

api/mraa/i2c.hpp

@@ -25,8 +25,11 @@
 #pragma once
 
 #include "i2c.h"
+#include "types.hpp"
+#include <stdexcept>
 
-namespace mraa {
+namespace mraa
+{
 
 /**
  * @brief API to Inter-Integrated Circuit
@@ -37,117 +40,211 @@ namespace mraa {
  *
  * @snippet I2c-compass.cpp Interesting
  */
-class I2c {
-    public:
-        /**
-         * Instantiates an i2c bus. Multiple instances of the same bus can
-         * exist and the bus is not guarranteed to be on the correct address
-         * before read/write.
-         *
-         * @param bus The i2c bus to use
-         * @param raw Whether to disable pinmapper for your board
-         */
-        I2c(int bus, bool raw=false) {
-            if (raw)
-                m_i2c = mraa_i2c_init_raw(bus);
-            else
-                m_i2c = mraa_i2c_init(bus);
+class I2c
+{
+  public:
+    /**
+     * Instantiates an i2c bus. Multiple instances of the same bus can
+     * exist and the bus is not guaranteed to be on the correct address
+     * before read/write.
+     *
+     * @param bus The i2c bus to use
+     * @param raw Whether to disable pinmapper for your board
+     */
+    I2c(int bus, bool raw = false)
+    {
+        if (raw) {
+            m_i2c = mraa_i2c_init_raw(bus);
+        } else {
+            m_i2c = mraa_i2c_init(bus);
         }
-        /**
-         * Closes the I2c Bus used. This does not guarrantee the bus will not
-         * be usable by anyone else or communicates this disconnect to any
-         * slaves.
-         */
-        ~I2c() {
-            mraa_i2c_stop(m_i2c);
+        if (m_i2c == NULL) {
+            throw std::invalid_argument("Invalid i2c bus");
         }
-        /**
-         * Sets the i2c Frequency for communication. Your board may not support
-         * the set frequency. Anyone can change this at any time and this will
-         * affect every slave on the bus
-         *
-         * @param hz Frequency to set the bus to in hz
-         * @return Result of operation
-         */
-        mraa_result_t frequency(int hz) {
-            return mraa_i2c_frequency(m_i2c, hz);
-        }
-        /**
-         * Set the slave to talk to, typically called before every read/write
-         * operation
-         *
-         * @param address Communicate to the i2c slave on this address
-         * @return Result of operation
-         */
-        mraa_result_t address(int address) {
-            return mraa_i2c_address(m_i2c, address);
-        }
-        /**
-         * Read exactly one byte from the bus
-         *
-         * @return char read from the bus
-         */
-        unsigned char read() {
-            return (unsigned char) mraa_i2c_read_byte(m_i2c);
-        }
-        /**
-         * Read mutliple bytes from the bus
-         *
-         * @param data Buffer to write into
-         * @param length Size of read
-         * @return length of the read or 0 if failed
-         */
-        int read(char *data, size_t length) {
-            return mraa_i2c_read(m_i2c, (uint8_t*) data, (int) length);
-        }
-	/**
-	 * Read length bytes from the bus, and return as a std::string note
-	 * that this is not a null terminated string
-	 *
-	 * @param length Size of read to make
-	 * @return pointer to std::string
-	 */
-        std::string read(size_t length) {
-            char* data = (char*) malloc(sizeof(char) * length);
-            mraa_i2c_read(m_i2c, (uint8_t*) data, (int) length);
-            std::string str(data, (int) length);
-            free(data);
-            return str;
-        }
-        /**
-         * Write one byte to the bus
-         *
-         * @param data Buffer to send on the bus
-         * @param length Size of buffer to send
-         * @return Result of operation
-         */
-        mraa_result_t write(char* data, size_t length) {
-            return mraa_i2c_write(m_i2c, (const unsigned char *)data, (int) length);
+    }
+    /**
+     * I2C constructor, takes a pointer to a I2C context and initialises the I2C class
+     *
+     * @param void * to an I2C context
+     */
+    I2c(void* i2c_context)
+    {
+        m_i2c = (mraa_i2c_context) i2c_context;
+        if (m_i2c == NULL) {
+            throw std::invalid_argument("Invalid I2C context");
         }
+    }
 
-        /**
-         * Write to an i2c register
-         *
-         * @param reg Register to write to
-         * @param data Value to write to register
-         * @return Result of operation
-         */
-        mraa_result_t writeReg(char reg, char data) {
-            const unsigned char buf[2] = {(unsigned char) reg, (unsigned char) data};
-            return mraa_i2c_write(m_i2c, buf, 2);
-        }
+    /**
+     * Closes the I2c Bus used. This does not guarantee the bus will not
+     * be usable by anyone else or communicates this disconnect to any
+     * slaves.
+     */
+    ~I2c()
+    {
+        mraa_i2c_stop(m_i2c);
+    }
 
-        /**
-         * Write multiple bytes to the bus
-         *
-         * @param data The byte to send on the bus
-         * @return Result of operation
-         */
-        mraa_result_t write(char data) {
-            return mraa_i2c_write_byte(m_i2c, data);
+    /**
+     * Sets the i2c Frequency for communication. Your board may not support
+     * the set frequency. Anyone can change this at any time and this will
+     * affect every slave on the bus
+     *
+     * @param mode Frequency to set the bus to
+     * @return Result of operation
+     */
+    Result
+    frequency(I2cMode mode)
+    {
+        return (Result) mraa_i2c_frequency(m_i2c, (mraa_i2c_mode_t) mode);
+    }
+
+    /**
+     * Set the slave to talk to, typically called before every read/write
+     * operation
+     *
+     * @param address Communicate to the i2c slave on this address
+     * @return Result of operation
+     */
+    Result
+    address(uint8_t address)
+    {
+        return (Result) mraa_i2c_address(m_i2c, address);
+    }
+
+    /**
+     * Read exactly one byte from the bus
+     *
+     * @throws std::invalid_argument in case of error
+     * @return char read from the bus
+     */
+    uint8_t
+    readByte()
+    {
+        int x = mraa_i2c_read_byte(m_i2c);
+        if (x == -1) {
+            throw std::invalid_argument("Unknown error in I2c::readByte()");
         }
-    private:
-        mraa_i2c_context m_i2c;
+        return (uint8_t) x;
+    }
+
+    /**
+     * Read length bytes from the bus into *data pointer
+     *
+     * @param data Data to read into
+     * @param length Size of read in bytes to make
+     * @return length of read, should match length
+     */
+    int
+    read(uint8_t* data, int length)
+    {
+        return mraa_i2c_read(m_i2c, data, length);
+    }
+
+    /**
+     * Read byte from an i2c register
+     *
+     * @param reg Register to read from
+     *
+     * @throws std::invalid_argument in case of error
+     * @return char read from register
+     */
+    uint8_t
+    readReg(uint8_t reg)
+    {
+        int x = mraa_i2c_read_byte_data(m_i2c, reg);
+        if (x == -1) {
+            throw std::invalid_argument("Unknown error in I2c::readReg()");
+        }
+        return (uint8_t) x;
+    }
+
+    /**
+     * Read word from an i2c register
+     *
+     * @param reg Register to read from
+     *
+     * @throws std::invalid_argument in case of error
+     * @return char read from register
+     */
+    uint16_t
+    readWordReg(uint8_t reg)
+    {
+        int x = mraa_i2c_read_word_data(m_i2c, reg);
+	if (x == -1) {
+            throw std::invalid_argument("Unknown error in I2c::readReg()");
+        }
+        return (uint16_t) x;
+    }
+
+    /**
+     * Read length bytes from the bus into *data pointer starting from
+     * an i2c register
+     *
+     * @param reg Register to read from
+     * @param data pointer to the byte array to read data in to
+     * @param length max number of bytes to read
+     * @return length passed to the function or -1
+     */
+    int
+    readBytesReg(uint8_t reg, uint8_t* data, int length)
+    {
+        return mraa_i2c_read_bytes_data(m_i2c, reg, data, length);
+    }
+
+    /**
+     * Write a byte on the bus
+     *
+     * @param data The byte to send on the bus
+     * @return Result of operation
+     */
+    Result
+    writeByte(uint8_t data)
+    {
+        return (Result) mraa_i2c_write_byte(m_i2c, data);
+    }
+
+    /**
+     * Write length bytes to the bus, the first byte in the array is the
+     * command/register to write
+     *
+     * @param data Buffer to send on the bus, first byte is i2c command
+     * @param length Size of buffer to send
+     * @return Result of operation
+     */
+    Result
+    write(const uint8_t* data, int length)
+    {
+        return (Result) mraa_i2c_write(m_i2c, data, length);
+    }
+
+    /**
+     * Write a byte to an i2c register
+     *
+     * @param reg Register to write to
+     * @param data Value to write to register
+     * @return Result of operation
+     */
+    Result
+    writeReg(uint8_t reg, uint8_t data)
+    {
+        return (Result) mraa_i2c_write_byte_data(m_i2c, data, reg);
+    }
+
+    /**
+     * Write a word to an i2c register
+     *
+     * @param reg Register to write to
+     * @param data Value to write to register
+     * @return Result of operation
+     */
+    Result
+    writeWordReg(uint8_t reg, uint16_t data)
+    {
+        return (Result) mraa_i2c_write_word_data(m_i2c, data, reg);
+    }
+
+  private:
+    mraa_i2c_context m_i2c;
 };
-
 }

api/mraa/iio.h

@@ -0,0 +1,139 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include "common.h"
+#include "iio_kernel_headers.h"
+
+typedef struct {
+    int index;
+    int enabled;
+    char* type;
+    mraa_boolean_t lendian;
+    int signedd;
+    unsigned int offset;
+    uint64_t mask;
+    unsigned int bits_used;
+    unsigned int bytes;
+    unsigned int shift;
+    unsigned int location;
+} mraa_iio_channel;
+
+typedef struct {
+    char* name;
+    int enabled;
+} mraa_iio_event;
+
+/**
+ * @file
+ * @brief iio
+ *
+ * An iio context represents an IIO device
+ *
+ * @snippet iio_driver.c Interesting
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <fcntl.h>
+#include <stdint.h>
+
+#include "common.h"
+
+/**
+ * Opaque pointer definition to the internal struct _iio
+ */
+typedef struct _iio* mraa_iio_context;
+
+/**
+ * Initialise iio context
+ *
+ * @param bus iio device to use
+ * @return i2c context or NULL
+ */
+mraa_iio_context mraa_iio_init(int device);
+
+mraa_result_t mraa_iio_trigger_buffer(mraa_iio_context dev, void (*fptr)(char* data), void* args);
+
+const char* mraa_iio_get_device_name(mraa_iio_context dev);
+
+int mraa_iio_get_device_num_by_name(const char* name);
+
+int mraa_iio_read_size(mraa_iio_context dev);
+
+mraa_iio_channel* mraa_iio_get_channels(mraa_iio_context dev);
+
+int mraa_iio_get_channel_count(mraa_iio_context dev);
+
+mraa_result_t mraa_iio_read_float(mraa_iio_context dev, const char* filename, float* data);
+
+mraa_result_t mraa_iio_read_int(mraa_iio_context dev, const char* filename, int* data);
+
+mraa_result_t mraa_iio_read_string(mraa_iio_context dev, const char* filename, char* data, int max_len);
+
+mraa_result_t mraa_iio_write_float(mraa_iio_context dev, const char* attr_chan, const float data);
+
+mraa_result_t mraa_iio_write_int(mraa_iio_context dev, const char* attr_chan, const int data);
+
+mraa_result_t mraa_iio_write_string(mraa_iio_context dev, const char* attr_chan, const char* data);
+
+mraa_result_t mraa_iio_get_channel_data(mraa_iio_context dev);
+
+mraa_result_t mraa_iio_get_event_data(mraa_iio_context dev);
+
+mraa_result_t mraa_iio_event_poll(mraa_iio_context dev, struct iio_event_data* data);
+
+mraa_result_t
+mraa_iio_event_setup_callback(mraa_iio_context dev, void (*fptr)(struct iio_event_data* data, void* args), void* args);
+
+mraa_result_t mraa_iio_event_extract_event(struct iio_event_data* event,
+                                           int* chan_type,
+                                           int* modifier,
+                                           int* type,
+                                           int* direction,
+                                           int* channel,
+                                           int* channel2,
+                                           int* different);
+
+mraa_result_t mraa_iio_get_mount_matrix(mraa_iio_context dev, const char *sysfs_name, float mm[9]);
+
+mraa_result_t mraa_iio_create_trigger(mraa_iio_context dev, const char* trigger);
+
+mraa_result_t mraa_iio_update_channels(mraa_iio_context dev);
+/**
+ * De-inits an mraa_iio_context device
+ *
+ * @param dev The iio context
+ * @return Result of operation
+ */
+mraa_result_t mraa_iio_close(mraa_iio_context dev);
+
+#ifdef __cplusplus
+}
+#endif

api/mraa/iio.hpp

@@ -0,0 +1,246 @@
+/*
+ * Author: Henry Bruce <henry.bruce@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <stdexcept>
+ #include <sstream>
+#include "iio.h"
+#include "types.hpp"
+
+namespace mraa
+{
+
+struct IioEventData
+{
+    int channelType;
+    int modifier;
+    int type;
+    int direction;
+    int channel;
+    int channel2;
+    int diff;
+};
+
+class IioHandler
+{
+public:
+  virtual void onIioEvent(const IioEventData& eventData) = 0;
+  virtual ~IioHandler() {};     // add an empty destructor to get rid of warning
+};
+
+
+/**
+ * @brief API to Industrial IO
+ *
+ * This file defines the C++ iio interface for libmraa
+ *
+ * @snippet iio_dummy_test.cpp Interesting
+ */
+class Iio
+{
+  public:
+    /**
+     * Iio Constructor, takes a device number which will map directly to sysfs
+     * e.g. device 0 maps to /sys/bus/iio/devices/iio:device0
+     *
+     * @param device IIO device number
+     *
+     * @throws std::invalid_argument if initialization fails
+     */
+    Iio(int device)
+    {
+        m_iio = mraa_iio_init(device);
+        if (m_iio == NULL) {
+            std::ostringstream oss;
+            oss << "IIO device " << device << " is not valid";
+            throw std::invalid_argument(oss.str());
+        }
+    }
+
+    /**
+     * Iio Constructor
+     *
+     * @param deviceName IIO device name
+     *
+     * @throws std::invalid_argument if initialization fails
+     */
+    Iio(const std::string& deviceName)
+    {
+        std::ostringstream oss;
+        int id = mraa_iio_get_device_num_by_name(deviceName.c_str());
+        if (id == -1) {
+            oss << "IIO device name " << deviceName << " not found";
+            throw std::invalid_argument(oss.str());
+        }
+        m_iio = mraa_iio_init(id);
+        if (m_iio == NULL) {
+            oss << "IIO device " << deviceName << " is not valid";
+            throw std::invalid_argument(oss.str());
+        }
+    }
+
+    /**
+     * Iio destructor
+     */
+    ~Iio()
+    {
+        mraa_iio_close(m_iio);
+    }
+
+
+    /**
+     * Get device name
+     *
+     * @returns The device name
+     */
+    std::string
+    getDeviceName() const
+    {
+        return mraa_iio_get_device_name(m_iio);
+    }
+
+    /**
+     * Read an int value from specified attribute.
+     *
+     * @param attributeName attribute mame
+     *
+     * @returns The int value
+     *
+     * @throws std::invalid_argument if read fails
+     */
+    int
+    readInt(const std::string& attributeName) const
+    {
+        int value;
+        mraa_result_t res = mraa_iio_read_int(m_iio, attributeName.c_str(), &value);
+        if (res != MRAA_SUCCESS) {
+            std::ostringstream oss;
+            oss << "IIO readInt for attibute " << attributeName << " failed";
+            throw std::runtime_error(oss.str());
+        }
+        return value;
+    }
+
+    /**
+     * Read a float value from specified attribute.
+     *
+     * @param attributeName attribute mame
+     *
+     * @returns The float value
+     *
+     * @throws std::invalid_argument if read fails
+     */
+    float
+    readFloat(const std::string& attributeName) const
+    {
+        float value;
+        mraa_result_t res = mraa_iio_read_float(m_iio, attributeName.c_str(), &value);
+        if (res != MRAA_SUCCESS) {
+            std::ostringstream oss;
+            oss << "IIO readFloat for attibute " << attributeName << " failed";
+            throw std::runtime_error(oss.str());
+        }
+        return value;
+    }
+
+    /**
+     * Write an int value to specified attribute.
+     *
+     * @param attributeName attribute mame
+     * @param value int value
+     *
+     * @throws std::invalid_argument if write fails
+     */
+    void
+    writeInt(const std::string& attributeName, int value) const
+    {
+        mraa_result_t res = mraa_iio_write_int(m_iio, attributeName.c_str(), value);
+        if (res != MRAA_SUCCESS) {
+            std::ostringstream oss;
+            oss << "IIO writeInt for attibute " << attributeName << " failed";
+            throw std::runtime_error(oss.str());
+        }
+
+    }
+
+    /**
+     * Write a float value to specified attribute.
+     *
+     * @param attributeName attribute mame
+     * @param value float value
+     *
+     * @throws std::invalid_argument if write fails
+     */
+    void
+    writeFloat(const std::string& attributeName, float value) const
+    {
+        mraa_result_t res = mraa_iio_write_float(m_iio, attributeName.c_str(), value);
+        if (res != MRAA_SUCCESS) {
+            std::ostringstream oss;
+            oss << "IIO writeFloat for attibute " << attributeName << " failed";
+            throw std::runtime_error(oss.str());
+        }
+
+    }
+
+    /**
+     * Register event handler.
+     *
+     * @param handler handler class that implements IioHandler
+     *
+     * @throws std::invalid_argument on failure
+     */
+    void
+    registerEventHandler(IioHandler* handler) const
+    {
+        mraa_result_t res = mraa_iio_event_setup_callback(m_iio, private_event_handler, handler);
+        if (res != MRAA_SUCCESS) {
+            throw std::runtime_error("registerEventHandler failed");
+        }
+    }
+
+  private:
+    static void private_event_handler(iio_event_data* data, void *args)
+    {
+        if (args != NULL) {
+            IioHandler* handler = (IioHandler*)args;
+            IioEventData eventData;
+            int chan_type, modifier, type, direction, channel, channel2, different;
+            mraa_iio_event_extract_event(data, &chan_type, &modifier, &type, &direction, &channel, &channel2, &different);
+            eventData.channelType = chan_type;
+            eventData.modifier = modifier;
+            eventData.type = type;
+            eventData.direction = direction;
+            eventData.channel = channel;
+            eventData.channel2 = channel2;
+            eventData.diff = different;
+            handler->onIioEvent(eventData);
+        }
+    }
+
+    mraa_iio_context m_iio;
+};
+
+}

api/mraa/iio_kernel_headers.h

@@ -0,0 +1,141 @@
+/*
+ * Author: Lay, Kuan Loon <kuan.loon.lay@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+//For kernel 4.1+,
+//#include <linux/iio/types.h>
+//#include <linux/iio/events.h>
+
+//linux/iio/types.h
+enum iio_chan_type {
+        IIO_VOLTAGE,
+        IIO_CURRENT,
+        IIO_POWER,
+        IIO_ACCEL,
+        IIO_ANGL_VEL,
+        IIO_MAGN,
+        IIO_LIGHT,
+        IIO_INTENSITY,
+        IIO_PROXIMITY,
+        IIO_TEMP,
+        IIO_INCLI,
+        IIO_ROT,
+        IIO_ANGL,
+        IIO_TIMESTAMP,
+        IIO_CAPACITANCE,
+        IIO_ALTVOLTAGE,
+        IIO_CCT,
+        IIO_PRESSURE,
+        IIO_HUMIDITYRELATIVE,
+        IIO_ACTIVITY,
+        IIO_STEPS,
+        IIO_ENERGY,
+        IIO_DISTANCE,
+        IIO_VELOCITY,
+};
+
+enum iio_modifier {
+        IIO_NO_MOD,
+        IIO_MOD_X,
+        IIO_MOD_Y,
+        IIO_MOD_Z,
+        IIO_MOD_X_AND_Y,
+        IIO_MOD_X_AND_Z,
+        IIO_MOD_Y_AND_Z,
+        IIO_MOD_X_AND_Y_AND_Z,
+        IIO_MOD_X_OR_Y,
+        IIO_MOD_X_OR_Z,
+        IIO_MOD_Y_OR_Z,
+        IIO_MOD_X_OR_Y_OR_Z,
+        IIO_MOD_LIGHT_BOTH,
+        IIO_MOD_LIGHT_IR,
+        IIO_MOD_ROOT_SUM_SQUARED_X_Y,
+        IIO_MOD_SUM_SQUARED_X_Y_Z,
+        IIO_MOD_LIGHT_CLEAR,
+        IIO_MOD_LIGHT_RED,
+        IIO_MOD_LIGHT_GREEN,
+        IIO_MOD_LIGHT_BLUE,
+        IIO_MOD_QUATERNION,
+        IIO_MOD_TEMP_AMBIENT,
+        IIO_MOD_TEMP_OBJECT,
+        IIO_MOD_NORTH_MAGN,
+        IIO_MOD_NORTH_TRUE,
+        IIO_MOD_NORTH_MAGN_TILT_COMP,
+        IIO_MOD_NORTH_TRUE_TILT_COMP,
+        IIO_MOD_RUNNING,
+        IIO_MOD_JOGGING,
+        IIO_MOD_WALKING,
+        IIO_MOD_STILL,
+        IIO_MOD_ROOT_SUM_SQUARED_X_Y_Z,
+};
+
+enum iio_event_type {
+        IIO_EV_TYPE_THRESH,
+        IIO_EV_TYPE_MAG,
+        IIO_EV_TYPE_ROC,
+        IIO_EV_TYPE_THRESH_ADAPTIVE,
+        IIO_EV_TYPE_MAG_ADAPTIVE,
+        IIO_EV_TYPE_CHANGE,
+};
+
+enum iio_event_direction {
+        IIO_EV_DIR_EITHER,
+        IIO_EV_DIR_RISING,
+        IIO_EV_DIR_FALLING,
+        IIO_EV_DIR_NONE,
+};
+
+//linux/iio/events.h
+#if defined(MSYS)
+#define __USE_LINUX_IOCTL_DEFS
+#include <sys/ioctl.h>
+#else
+#include <linux/ioctl.h>
+#endif
+
+/**
+ * struct iio_event_data - The actual event being pushed to userspace
+ * @id:		event identifier
+ * @timestamp:	best estimate of time of event occurrence (often from
+ *		the interrupt handler)
+ */
+struct iio_event_data {
+	unsigned long long int	id;
+	long long int	timestamp;
+};
+
+#define IIO_GET_EVENT_FD_IOCTL _IOR('i', 0x90, int)
+
+#define IIO_EVENT_CODE_EXTRACT_TYPE(mask) ((mask >> 56) & 0xFF)
+
+#define IIO_EVENT_CODE_EXTRACT_DIR(mask) ((mask >> 48) & 0x7F)
+
+#define IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(mask) ((mask >> 32) & 0xFF)
+
+/* Event code number extraction depends on which type of event we have.
+ * Perhaps review this function in the future*/
+#define IIO_EVENT_CODE_EXTRACT_CHAN(mask) ((short int)(mask & 0xFFFF))
+#define IIO_EVENT_CODE_EXTRACT_CHAN2(mask) ((short int)(((mask) >> 16) & 0xFFFF))
+
+#define IIO_EVENT_CODE_EXTRACT_MODIFIER(mask) ((mask >> 40) & 0xFF)
+#define IIO_EVENT_CODE_EXTRACT_DIFF(mask) (((mask) >> 55) & 0x1)

api/mraa/pwm.h

@@ -65,7 +65,7 @@ mraa_pwm_context mraa_pwm_init(int pin);
 mraa_pwm_context mraa_pwm_init_raw(int chipid, int pin);
 
 /**
- * Set the ouput duty-cycle percentage, as a float
+ * Set the output duty-cycle percentage, as a float
  *
  * @param dev The Pwm context to use
  * @param percentage A floating-point value representing percentage of output.
@@ -76,7 +76,7 @@ mraa_pwm_context mraa_pwm_init_raw(int chipid, int pin);
 mraa_result_t mraa_pwm_write(mraa_pwm_context dev, float percentage);
 
 /**
- * Read the ouput duty-cycle percentage, as a float
+ * Read the output duty-cycle percentage, as a float
  *
  * @param dev The Pwm context to use
  * @return percentage A floating-point value representing percentage of output.
@@ -167,24 +167,20 @@ mraa_result_t mraa_pwm_owner(mraa_pwm_context dev, mraa_boolean_t owner);
 mraa_result_t mraa_pwm_close(mraa_pwm_context dev);
 
 /**
- * Set Both Period and DutyCycle on a PWM context
+ * Get the maximum pwm period in us
  *
  * @param dev The pwm context to use
- * @param period represented in ms.
- * @param duty dutycycle of the pwm signal.
- * @return Result of operation
+ * @return max pwm in us
  */
-mraa_result_t mraa_pwm_config_ms(mraa_pwm_context dev, int period, float duty);
+int mraa_pwm_get_max_period(mraa_pwm_context dev);
 
 /**
- * Set Both Period and DutyCycle on a PWM context. Duty represented as percentage.
+ * Get the minimum pwm period in us
  *
  * @param dev The pwm context to use
- * @param period represented in ms.
- * @param duty duty percantage. i.e. 50% = 0.5f
- * @return Result of operation
+ * @return min pwm in us
  */
-mraa_result_t mraa_pwm_config_percent(mraa_pwm_context dev, int period, float duty);
+int mraa_pwm_get_min_period(mraa_pwm_context dev);
 
 #ifdef __cplusplus
 }

api/mraa/pwm.hpp

@@ -25,8 +25,11 @@
 #pragma once
 
 #include "pwm.h"
+#include "types.hpp"
+#include <stdexcept>
 
-namespace mraa {
+namespace mraa
+{
 
 /**
  * @brief API to Pulse Width Modulation
@@ -35,144 +38,182 @@ namespace mraa {
  *
  * @snippet Pwm3-cycle.cpp Interesting
  */
-class Pwm {
-    public:
-        /**
-         * instanciates a PWM object on a pin
-         *
-         * @param pin the pin number used on your board
-         * @param chipid the pwmchip to use, use only in raw mode
-         * @param owner if you are the owner of the pin the destructor will
-         * unexport the pin from sysfs, default behaviour is you are the owner
-         * if the pinmapper exported it
-         */
-        Pwm(int pin, int chipid=-1, bool owner = true) {
-            if (chipid == -1)
-                m_pwm = mraa_pwm_init(pin);
-            else
-                m_pwm = mraa_pwm_init_raw(pin, chipid);
-            if (!owner)
-                mraa_pwm_owner(m_pwm, 0);
-        }
-        /**
-         * Pwm destructor
-         */
-        ~Pwm() {
-            mraa_pwm_close(m_pwm);
-        }
-        /**
-         * Set the output duty-cycle percentage, as a float
-         *
-         * @param percentage A floating-point value representing percentage of
-         * output. The value should lie between 0.0f (representing on 0%) and
-         * 1.0f Values above or below this range will be set at either 0.0f or
-         * 1.0f
-         * @return Result of operation
-         */
-        mraa_result_t write(float percentage) {
-            return mraa_pwm_write(m_pwm, percentage);
-        }
-        /**
-         * Read the ouput duty-cycle percentage, as a float
-         *
-         * @return A floating-point value representing percentage of
-         * output. The value should lie between 0.0f (representing on 0%) and
-         * 1.0f Values above or below this range will be set at either 0.0f or
-         * 1.0f
-         */
-        float read() {
-            return mraa_pwm_read(m_pwm);
-        }
-        /**
-         * Set the PWM period as seconds represented in a float
-         *
-         * @param period Period represented as a float in seconds
-         * @return Result of operation
-         */
-        mraa_result_t period(float period) {
-            return mraa_pwm_period(m_pwm, period);
-        }
-        /**
-         * Set period, milliseconds
-         *
-         * @param ms milliseconds for period
-         * @return Result of operation
-         */
-        mraa_result_t period_ms(int ms) {
-            return mraa_pwm_period_ms(m_pwm, ms);
-        }
-        /**
-         * Set period, microseconds
-         *
-         * @param us microseconds as period
-         * @return Result of operation
-         */
-        mraa_result_t period_us(int us) {
-            return mraa_pwm_period_us(m_pwm, us);
-        }
-        /**
-         * Set pulsewidth, As represnted by seconds in a (float)
-         *
-         * @param seconds The duration of a pulse
-         * @return Result of operation
-         */
-        mraa_result_t pulsewidth(float seconds) {
-            return mraa_pwm_pulsewidth(m_pwm, seconds);
-        }
-        /**
-         * Set pulsewidth, milliseconds
-         *
-         * @param ms milliseconds for pulsewidth
-         * @return Result of operation
-         */
-        mraa_result_t pulsewidth_ms(int ms) {
-            return mraa_pwm_pulsewidth_ms(m_pwm, ms);
-        }
-        /**
-         * The pulsewidth, microseconds
-         *
-         * @param us microseconds for pulsewidth
-         * @return Result of operation
-         */
-        mraa_result_t pulsewidth_us(int us) {
-            return mraa_pwm_pulsewidth_us(m_pwm, us);
-        }
-        /**
-         * Set the enable status of the PWM pin. None zero will assume on with
-         * output being driven and 0 will disable the output
-         *
-         * @param enable enable status of pin
-         * @return Result of operation
-         */
-        mraa_result_t enable(bool enable) {
-            if (enable)
-                return mraa_pwm_enable(m_pwm, 1);
-            else
-                return mraa_pwm_enable(m_pwm, 0);
-        }
-        /**
-         * Set the period and duty of a PWM object.
-         *
-         * @param period represented in ms.
-         * @param duty represnted in ms as float.
-         * @return Result of operation
-         */
-        mraa_result_t config_ms(int period, float duty) {
-            return mraa_pwm_config_ms(m_pwm, period, duty);
-        }
-        /**
-         * Set the period and duty (percent) of a PWM object.
-         *
-         * @param period as represented in ms.
-         * @param duty percentage i.e. 50% = 0.5f
-         * @return Result of operation
-         */
-        mraa_result_t config_percent(int period, float duty) {
-            return mraa_pwm_config_percent(m_pwm, period, duty);
+class Pwm
+{
+  public:
+    /**
+     * instanciates a PWM object on a pin
+     *
+     * @param pin the pin number used on your board
+     * @param owner if you are the owner of the pin the destructor will
+     * unexport the pin from sysfs, default behaviour is you are the owner
+     * if the pinmapper exported it
+     * @param chipid the pwmchip to use, use only in raw mode
+     */
+    Pwm(int pin, bool owner = true, int chipid = -1)
+    {
+        if (chipid == -1) {
+            m_pwm = mraa_pwm_init(pin);
+        } else {
+            m_pwm = mraa_pwm_init_raw(chipid, pin);
         }
 
-    private:
-        mraa_pwm_context m_pwm;
+        if (m_pwm == NULL) {
+            throw std::invalid_argument("Error initialising PWM on pin");
+        }
+
+        if (!owner) {
+            mraa_pwm_owner(m_pwm, 0);
+        }
+    }
+
+    /**
+     * Pwm constructor, takes a pointer to the PWM context and
+     * initialises the class
+     *
+     * @param void * to a PWM context
+     */
+    Pwm(void* pwm_context)
+    {
+        m_pwm = (mraa_pwm_context) pwm_context;
+        if (m_pwm == NULL) {
+            throw std::invalid_argument("Invalid PWM context");
+        }
+    }
+    /**
+     * Pwm destructor
+     */
+    ~Pwm()
+    {
+        mraa_pwm_close(m_pwm);
+    }
+    /**
+     * Set the output duty-cycle percentage, as a float
+     *
+     * @param percentage A floating-point value representing percentage of
+     * output. The value should lie between 0.0f (representing 0%) and
+     * 1.0f Values above or below this range will be set at either 0.0f or
+     * 1.0f
+     * @return Result of operation
+     */
+    Result
+    write(float percentage)
+    {
+        return (Result) mraa_pwm_write(m_pwm, percentage);
+    }
+    /**
+     * Read the output duty-cycle percentage, as a float
+     *
+     * @return A floating-point value representing percentage of
+     * output. The value should lie between 0.0f (representing 0%) and
+     * 1.0f Values above or below this range will be set at either 0.0f or
+     * 1.0f
+     */
+    float
+    read()
+    {
+        return mraa_pwm_read(m_pwm);
+    }
+    /**
+     * Set the PWM period as seconds represented in a float
+     *
+     * @param period Period represented as a float in seconds
+     * @return Result of operation
+     */
+    Result
+    period(float period)
+    {
+        return (Result) mraa_pwm_period(m_pwm, period);
+    }
+    /**
+     * Set period, milliseconds
+     *
+     * @param ms milliseconds for period
+     * @return Result of operation
+     */
+    Result
+    period_ms(int ms)
+    {
+        return (Result) mraa_pwm_period_ms(m_pwm, ms);
+    }
+    /**
+     * Set period, microseconds
+     *
+     * @param us microseconds as period
+     * @return Result of operation
+     */
+    Result
+    period_us(int us)
+    {
+        return (Result) mraa_pwm_period_us(m_pwm, us);
+    }
+    /**
+     * Set pulsewidth, as represented by seconds in a float
+     *
+     * @param seconds The duration of a pulse
+     * @return Result of operation
+     */
+    Result
+    pulsewidth(float seconds)
+    {
+        return (Result) mraa_pwm_pulsewidth(m_pwm, seconds);
+    }
+    /**
+     * Set pulsewidth, milliseconds
+     *
+     * @param ms milliseconds for pulsewidth
+     * @return Result of operation
+     */
+    Result
+    pulsewidth_ms(int ms)
+    {
+        return (Result) mraa_pwm_pulsewidth_ms(m_pwm, ms);
+    }
+    /**
+     * The pulsewidth, microseconds
+     *
+     * @param us microseconds for pulsewidth
+     * @return Result of operation
+     */
+    Result
+    pulsewidth_us(int us)
+    {
+        return (Result) mraa_pwm_pulsewidth_us(m_pwm, us);
+    }
+    /**
+     * Set the enable status of the PWM pin. None zero will assume on with
+     * output being driven and 0 will disable the output
+     *
+     * @param enable enable status of pin
+     * @return Result of operation
+     */
+    Result
+    enable(bool enable)
+    {
+        return (Result) mraa_pwm_enable(m_pwm, enable);
+    }
+    /**
+     * Get the maximum PWM period in us
+     *
+     * @return max PWM period in us
+     */
+    int
+    max_period()
+    {
+        return mraa_pwm_get_max_period(m_pwm);
+    }
+    /**
+     * Get the minimum PWM period in us
+     *
+     * @return min PWM period in us
+     */
+    int
+    min_period()
+    {
+        return mraa_pwm_get_min_period(m_pwm);
+    }
+
+  private:
+    mraa_pwm_context m_pwm;
 };
-
 }

api/mraa/spi.h

@@ -26,7 +26,7 @@
 
 /**
  * @file
- * @brief System Packet Interface
+ * @brief Serial Peripheral Interface
  *
  * This file defines the spi interface for libmraa. A Spi object in libmraa
  * represents a spidev device. Linux spidev devices are created per spi bus and
@@ -48,13 +48,17 @@ extern "C" {
 #include "common.h"
 
 /**
- * MRAA supported platform types
+ * MRAA SPI Modes
  */
 typedef enum {
-    MRAA_SPI_MODE0 = 0, /**< CPOL = 0, CPHA = 0, Clock idle low, data is clocked in on rising edge, output data (change) on falling edge */
-    MRAA_SPI_MODE1 = 1, /**< CPOL = 0, CPHA = 1, Clock idle low, data is clocked in on falling edge, output data (change) on rising edge */
-    MRAA_SPI_MODE2 = 2, /**< CPOL = 1, CPHA = 0, Clock idle low, data is clocked in on falling edge, output data (change) on rising edge */
-    MRAA_SPI_MODE3 = 3, /**< CPOL = 1, CPHA = 1, Clock idle low, data is clocked in on rising, edge output data (change) on falling edge */
+    MRAA_SPI_MODE0 = 0, /**< CPOL = 0, CPHA = 0, Clock idle low, data is clocked in on rising edge,
+                           output data (change) on falling edge */
+    MRAA_SPI_MODE1 = 1, /**< CPOL = 0, CPHA = 1, Clock idle low, data is clocked in on falling edge,
+                           output data (change) on rising edge */
+    MRAA_SPI_MODE2 = 2, /**< CPOL = 1, CPHA = 0, Clock idle low, data is clocked in on falling edge,
+                           output data (change) on rising edge */
+    MRAA_SPI_MODE3 = 3, /**< CPOL = 1, CPHA = 1, Clock idle low, data is clocked in on rising, edge
+                           output data (change) on falling edge */
 } mraa_spi_mode_t;
 
 /**
@@ -70,33 +74,54 @@ typedef struct _spi* mraa_spi_context;
  */
 mraa_spi_context mraa_spi_init(int bus);
 
+/**
+ * Initialise SPI_context without any board configuration, selects a bus and a mux.
+ *
+ * @param bus Bus to use as listed by spidev
+ * @param cs Chip select to use as listed in spidev
+ * @return Spi context or NULL
+ */
+mraa_spi_context mraa_spi_init_raw(unsigned int bus, unsigned int cs);
+
 /**
  * Set the SPI device mode. see spidev 0-3.
  *
  * @param dev The Spi context
  * @param mode The SPI mode, See Linux spidev
- * @return Spi context or NULL
+ * @return Result of operation
  */
 mraa_result_t mraa_spi_mode(mraa_spi_context dev, mraa_spi_mode_t mode);
 
-/** Set the SPI device operating clock frequency.
+/**
+ * Set the SPI device operating clock frequency.
  *
  * @param dev the Spi context
  * @param hz the frequency in hz
- * @return mraa_spi_context The returned initialised SPI context
+ * @return Result of operation
  */
 mraa_result_t mraa_spi_frequency(mraa_spi_context dev, int hz);
 
-/** Write Single Byte to the SPI device.
+/**
+ * Write Single Byte to the SPI device.
+ *
+ * @param dev The Spi context
+ * @param data Data to send
+ * @return Data received on the miso line or -1 in case of error
+ */
+int mraa_spi_write(mraa_spi_context dev, uint8_t data);
+
+/**
+ * Write Two Bytes to the SPI device.
  *
  * @param dev The Spi context
  * @param data Data to send
  * @return Data received on the miso line
  */
-uint8_t mraa_spi_write(mraa_spi_context dev, uint8_t data);
+int mraa_spi_write_word(mraa_spi_context dev, uint16_t data);
 
-/** Write Buffer of bytes to the SPI device. The pointer return has to be
- * free'd by the caller.
+/**
+ * Write Buffer of bytes to the SPI device. The pointer return has to be
+ * free'd by the caller. It will return a NULL pointer in cases of error.
  *
  * @param dev The Spi context
  * @param data to send
@@ -105,6 +130,41 @@ uint8_t mraa_spi_write(mraa_spi_context dev, uint8_t data);
  */
 uint8_t* mraa_spi_write_buf(mraa_spi_context dev, uint8_t* data, int length);
 
+/**
+ * Write Buffer of uint16 to the SPI device. The pointer return has to be
+ * free'd by the caller. It will return a NULL pointer in cases of error.
+ *
+ * @param dev The Spi context
+ * @param data to send
+ * @param length elements (in bytes) within buffer, Max 4096
+ * @return Data received on the miso line, same length as passed in
+ */
+uint16_t* mraa_spi_write_buf_word(mraa_spi_context dev, uint16_t* data, int length);
+
+/**
+ * Transfer Buffer of bytes to the SPI device. Both send and recv buffers
+ * are passed in
+ *
+ * @param dev The Spi context
+ * @param data to send
+ * @param rxbuf buffer to recv data back, may be NULL
+ * @param length elements within buffer, Max 4096
+ * @return Result of operation
+ */
+mraa_result_t mraa_spi_transfer_buf(mraa_spi_context dev, uint8_t* data, uint8_t* rxbuf, int length);
+
+/**
+ * Transfer Buffer of uint16 to the SPI device. Both send and recv buffers
+ * are passed in
+ *
+ * @param dev The Spi context
+ * @param data to send
+ * @param rxbuf buffer to recv data back, may be NULL
+ * @param length elements (in bytes) within buffer, Max 4096
+ * @return Result of operation
+ */
+mraa_result_t mraa_spi_transfer_buf_word(mraa_spi_context dev, uint16_t* data, uint16_t* rxbuf, int length);
+
 /**
  * Change the SPI lsb mode
  *

api/mraa/spi.hpp

@@ -25,88 +25,225 @@
 #pragma once
 
 #include "spi.h"
+#include "types.hpp"
+#include <stdexcept>
 
-namespace mraa {
+namespace mraa
+{
 
 /**
- * @brief API to System Packet Interface
- *
- * This file defines the SPI interface for libmraa
- *
- * @snippet Spi-pot.cpp Interesting
+ * MRAA SPI Modes
  */
-class Spi {
-    public:
-        /**
-         * Initialise SPI object using the board mapping to set muxes
-         *
-         * @param bus to use, as listed in the platform definition, normally 0
-         */
-        Spi(int bus) {
-            m_spi = mraa_spi_init(bus);
+typedef enum {
+    SPI_MODE0 = 0, /**< CPOL = 0, CPHA = 0, Clock idle low, data is clocked in on rising edge,
+                      output data (change) on falling edge */
+    SPI_MODE1 = 1, /**< CPOL = 0, CPHA = 1, Clock idle low, data is clocked in on falling edge,
+                      output data (change) on rising edge */
+    SPI_MODE2 = 2, /**< CPOL = 1, CPHA = 0, Clock idle low, data is clocked in on falling edge,
+                      output data (change) on rising edge */
+    SPI_MODE3 = 3, /**< CPOL = 1, CPHA = 1, Clock idle low, data is clocked in on rising, edge
+                      output data (change) on falling edge */
+} Spi_Mode;
+
+
+/**
+* @brief API to Serial Peripheral Interface
+*
+* This file defines the SPI interface for libmraa
+*
+* @snippet Spi-pot.cpp Interesting
+*/
+class Spi
+{
+  public:
+    /**
+     * Initialise SPI object using the board mapping to set muxes
+     *
+     * @param bus to use, as listed in the platform definition, normally 0
+     */
+    Spi(int bus)
+    {
+        m_spi = mraa_spi_init(bus);
+
+        if (m_spi == NULL) {
+            throw std::invalid_argument("Error initialising SPI bus");
         }
-        /**
-         * Closes spi bus
-         */
-        ~Spi() {
-            mraa_spi_stop(m_spi);
+    }
+
+    /**
+     * Initialise SPI object using 'raw' mode. Mraa will go and grab the spidev device lablled /dev/spidev<bus>.<cs>
+     *
+     * @param bus to use
+     * @param cs to use
+     */
+    Spi(int bus, int cs)
+    {
+        m_spi = mraa_spi_init_raw(bus, cs);
+
+        if (m_spi == NULL) {
+            throw std::invalid_argument("Error initialising SPI bus");
         }
-        /**
-         * Set the SPI device mode. see spidev0-3
-         *
-         * @param mode the mode. See Linux spidev doc
-         * @return Result of operation
-         */
-        mraa_result_t mode(mraa_spi_mode_t mode) {
-            return mraa_spi_mode(m_spi, mode);
+    }
+
+    /**
+     * Spi Constructor, takes a pointer to a SPI context and initialises
+     * the SPI class
+     *
+     * @param void * to SPI context
+     */
+    Spi(void* spi_context)
+    {
+        m_spi = (mraa_spi_context) spi_context;
+        if (m_spi == NULL) {
+            throw std::invalid_argument("Invalid SPI context");
         }
-        /**
-         * Set the SPI device operating clock frequency
-         *
-         * @param hz the frequency to set in hz
-         * @return Result of operation
-         */
-        mraa_result_t frequency(int hz) {
-            return mraa_spi_frequency(m_spi, hz);
-        }
-        /**
-         * Write single byte to the SPI device
-         *
-         * @param data the byte to send
-         * @return data received on the miso line
-         */
-        char write(char data) {
-            return (char) mraa_spi_write(m_spi, (uint8_t) data);
-        }
-        /**
-         * Write buffer of bytes to SPI device
-         *
-         * @param data buffer to send
-         * @param length size of buffer to send
-         * @return char* data received on the miso line. Same length as passed in
-         */
-        char* write(char* data, size_t length) {
-            return (char*) mraa_spi_write_buf(m_spi, (uint8_t *) data, (int) length);
-        }
-        /**
-         * Change the SPI lsb mode
-         *
-         * @param lsb Use least significant bit transmission - 0 for msbi
-         * @return Result of operation
-         */
-        mraa_result_t lsbmode(bool lsb) {
-            return mraa_spi_lsbmode(m_spi, (mraa_boolean_t) lsb);
-        }
-        /**
-         * Set bits per mode on transaction, default is 8
-         *
-         * @param bits bits per word
-         * @return Result of operation
-         */
-        mraa_result_t bitPerWord(unsigned int bits) {
-            return mraa_spi_bit_per_word(m_spi, bits);
-        }
-            private:
-                mraa_spi_context m_spi;
-        };
+    }
+
+    /**
+     * Closes spi bus
+     */
+    ~Spi()
+    {
+        mraa_spi_stop(m_spi);
+    }
+
+    /**
+     * Set the SPI device mode. see spidev0-3
+     *
+     * @param mode the mode. See Linux spidev doc
+     * @return Result of operation
+     */
+    Result
+    mode(Spi_Mode mode)
+    {
+        return (Result) mraa_spi_mode(m_spi, (mraa_spi_mode_t) mode);
+    }
+
+    /**
+     * Set the SPI device operating clock frequency
+     *
+     * @param hz the frequency to set in hz
+     * @return Result of operation
+     */
+    Result
+    frequency(int hz)
+    {
+        return (Result) mraa_spi_frequency(m_spi, hz);
+    }
+
+    /**
+     * Write single byte to the SPI device
+     *
+     * @param data the byte to send
+     * @return data received on the miso line or -1 in case of error
+     */
+    int
+    writeByte(uint8_t data)
+    {
+        return mraa_spi_write(m_spi, (uint8_t) data);
+    }
+
+    /**
+     * Write single byte to the SPI device
+     *
+     * @param data the byte to send
+     * @return data received on the miso line or -1 in case of error
+     */
+    int
+    writeWord(uint16_t data)
+    {
+        return mraa_spi_write_word(m_spi, (uint16_t) data);
+    }
+
+    /**
+     * Write buffer of bytes to SPI device The pointer return has to be
+     * free'd by the caller. It will return a NULL pointer in cases of
+     * error
+     *
+     * @param txBuf buffer to send
+     * @param length size of buffer to send
+     * @return uint8_t* data received on the miso line. Same length as passed in
+     */
+    uint8_t*
+    write(uint8_t* txBuf, int length)
+    {
+        return mraa_spi_write_buf(m_spi, txBuf, length);
+    }
+
+#ifndef SWIG
+    /**
+     * Write buffer of bytes to SPI device The pointer return has to be
+     * free'd by the caller. It will return a NULL pointer in cases of
+     * error
+     *
+     * @param txBuf buffer to send
+     * @param length size of buffer (in bytes) to send
+     * @return uint8_t* data received on the miso line. Same length as passed in
+     */
+    uint16_t*
+    writeWord(uint16_t* txBuf, int length)
+    {
+        return mraa_spi_write_buf_word(m_spi, txBuf, length);
+    }
+#endif
+
+#ifndef SWIG
+    /**
+     * Transfer data to and from SPI device Receive pointer may be null if
+     * return data is not needed.
+     *
+     * @param txBuf buffer to send
+     * @param rxBuf buffer to optionally receive data from spi device
+     * @param length size of buffer to send
+     * @return Result of operation
+     */
+    Result
+    transfer(uint8_t* txBuf, uint8_t* rxBuf, int length)
+    {
+        return (Result) mraa_spi_transfer_buf(m_spi, txBuf, rxBuf, length);
+    }
+
+    /**
+     * Transfer data to and from SPI device Receive pointer may be null if
+     * return data is not needed.
+     *
+     * @param txBuf buffer to send
+     * @param rxBuf buffer to optionally receive data from spi device
+     * @param length size of buffer to send
+     * @return Result of operation
+     */
+    Result
+    transfer_word(uint16_t* txBuf, uint16_t* rxBuf, int length)
+    {
+        return (Result) mraa_spi_transfer_buf_word(m_spi, txBuf, rxBuf, length);
+    }
+#endif
+
+    /**
+     * Change the SPI lsb mode
+     *
+     * @param lsb Use least significant bit transmission - 0 for msbi
+     * @return Result of operation
+     */
+    Result
+    lsbmode(bool lsb)
+    {
+        return (Result) mraa_spi_lsbmode(m_spi, (mraa_boolean_t) lsb);
+    }
+
+    /**
+     * Set bits per mode on transaction, default is 8
+     *
+     * @param bits bits per word
+     * @return Result of operation
+     */
+    Result
+    bitPerWord(unsigned int bits)
+    {
+        return (Result) mraa_spi_bit_per_word(m_spi, bits);
+    }
+
+  private:
+    mraa_spi_context m_spi;
+};
 }

api/mraa/types.h

@@ -37,67 +37,221 @@ extern "C" {
  * MRAA supported platform types
  */
 typedef enum {
-    MRAA_INTEL_GALILEO_GEN1 = 0, /**< The Generation 1 Galileo platform (RevD) */
-    MRAA_INTEL_GALILEO_GEN2 = 1, /**< The Generation 2 Galileo platform (RevG/H) */
-    MRAA_INTEL_EDISON_FAB_C = 2, /**< The Intel Edison (FAB C) */
+    MRAA_INTEL_GALILEO_GEN1 = 0,    /**< The Generation 1 Galileo platform (RevD) */
+    MRAA_INTEL_GALILEO_GEN2 = 1,    /**< The Generation 2 Galileo platform (RevG/H) */
+    MRAA_INTEL_EDISON_FAB_C = 2,    /**< The Intel Edison (FAB C) */
+    MRAA_INTEL_DE3815 = 3,          /**< The Intel DE3815 Baytrail NUC */
+    MRAA_INTEL_MINNOWBOARD_MAX = 4, /**< The Intel Minnow Board Max */
+    MRAA_RASPBERRY_PI = 5,          /**< The different Raspberry PI Models -like  A,B,A+,B+ */
+    MRAA_BEAGLEBONE = 6,            /**< The different BeagleBone Black Modes B/C */
+    MRAA_BANANA = 7,                /**< Allwinner A20 based Banana Pi and Banana Pro */
+    MRAA_INTEL_NUC5 = 8,            /**< The Intel 5th generations Broadwell NUCs */
+    MRAA_96BOARDS = 9,              /**< Linaro 96boards */
+    MRAA_INTEL_SOFIA_3GR = 10,      /**< The Intel SoFIA 3GR */
+    MRAA_INTEL_CHERRYHILLS = 11,    /**< The Intel Braswell Cherryhills */
+    MRAA_UP = 12,                   /**< The UP Board */
+    MRAA_INTEL_JOULE_EXPANSION = 13,/**< The Intel Joule Expansion Board */
+#if __STDC_VERSION__ >= 199901L
+    MRAA_INTEL_GT_TUCHUCK = MRAA_INTEL_JOULE_EXPANSION, // deprecated
+#endif
+    MRAA_PHYBOARD_WEGA = 14,        /**< The phyBOARD-Wega */
+    MRAA_DE_NANO_SOC = 15,          /**< Terasic DE-Nano-SoC Board */
 
-    MRAA_UNKNOWN_PLATFORM = 99 /**< An unknown platform type, typically will load INTEL_GALILEO_GEN1 */
+    // USB platform extenders start at 256
+    MRAA_FTDI_FT4222 = 256,         /**< FTDI FT4222 USB to i2c bridge */
+
+    // contains bit 9 so is subplatform
+    MRAA_GENERIC_FIRMATA = 1280,    /**< Firmata uart platform/bridge */
+
+    MRAA_ANDROID_PERIPHERALMANAGER = 95, /**< Android Things peripheral manager platform */
+    MRAA_MOCK_PLATFORM = 96,        /**< Mock platform, which requires no real hardware */
+    MRAA_JSON_PLATFORM = 97,        /**< User initialised platform from json*/
+    MRAA_NULL_PLATFORM = 98,        /**< Platform with no capabilities that hosts a sub platform  */
+    MRAA_UNKNOWN_PLATFORM =
+    99 /**< An unknown platform type, typically will load INTEL_GALILEO_GEN1 */
 } mraa_platform_t;
 
+/**
+ * Intel edison miniboard numbering enum
+ */
+typedef enum {
+    MRAA_INTEL_EDISON_MINIBOARD_J17_1 = 0,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_5 = 4,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_7 = 6,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_8 = 7,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_9 = 8,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_10 = 9,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_11 = 10,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_12 = 11,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_14 = 13,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_1 = 14,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_2 = 15,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_6 = 19,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_7 = 20,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_8 = 21,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_10 = 23,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_11 = 24,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_12 = 25,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_13 = 26,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_4 = 31,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_5 = 32,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_6 = 33,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_8 = 35,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_9 = 36,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_10 = 37,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_11 = 38,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_12 = 39,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_13 = 40,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_14 = 41,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_3 = 44,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_4 = 45,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_5 = 46,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_6 = 47,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_7 = 48,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_8 = 49,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_9 = 50,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_10 = 51,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_11 = 52,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_12 = 53,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_13 = 54,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_14 = 55
+} mraa_intel_edison_miniboard_t;
+
+/**
+ * Intel Edison raw GPIO numbering enum
+ */
+typedef enum {
+    MRAA_INTEL_EDISON_GP182 = 0,
+    MRAA_INTEL_EDISON_GP135 = 4,
+    MRAA_INTEL_EDISON_GP27 = 6,
+    MRAA_INTEL_EDISON_GP20 = 7,
+    MRAA_INTEL_EDISON_GP28 = 8,
+    MRAA_INTEL_EDISON_GP111 = 0,
+    MRAA_INTEL_EDISON_GP109 = 10,
+    MRAA_INTEL_EDISON_GP115 = 11,
+    MRAA_INTEL_EDISON_GP128 = 13,
+    MRAA_INTEL_EDISON_GP13 = 14,
+    MRAA_INTEL_EDISON_GP165 = 15,
+    MRAA_INTEL_EDISON_GP19 = 19,
+    MRAA_INTEL_EDISON_GP12 = 20,
+    MRAA_INTEL_EDISON_GP183 = 21,
+    MRAA_INTEL_EDISON_GP110 = 23,
+    MRAA_INTEL_EDISON_GP114 = 24,
+    MRAA_INTEL_EDISON_GP129 = 25,
+    MRAA_INTEL_EDISON_GP130 = 26,
+    MRAA_INTEL_EDISON_GP44 = 31,
+    MRAA_INTEL_EDISON_GP46 = 32,
+    MRAA_INTEL_EDISON_GP48 = 33,
+    MRAA_INTEL_EDISON_GP131 = 35,
+    MRAA_INTEL_EDISON_GP14 = 36,
+    MRAA_INTEL_EDISON_GP40 = 37,
+    MRAA_INTEL_EDISON_GP43 = 38,
+    MRAA_INTEL_EDISON_GP77 = 39,
+    MRAA_INTEL_EDISON_GP82 = 40,
+    MRAA_INTEL_EDISON_GP83 = 41,
+    MRAA_INTEL_EDISON_GP134 = 44,
+    MRAA_INTEL_EDISON_GP45 = 45,
+    MRAA_INTEL_EDISON_GP47 = 46,
+    MRAA_INTEL_EDISON_GP49 = 47,
+    MRAA_INTEL_EDISON_GP15 = 48,
+    MRAA_INTEL_EDISON_GP84 = 49,
+    MRAA_INTEL_EDISON_GP42 = 50,
+    MRAA_INTEL_EDISON_GP41 = 51,
+    MRAA_INTEL_EDISON_GP78 = 52,
+    MRAA_INTEL_EDISON_GP79 = 53,
+    MRAA_INTEL_EDISON_GP80 = 54,
+    MRAA_INTEL_EDISON_GP81 = 55
+} mraa_intel_edison_t;
+
+/**
+* Raspberry PI Wiring compatible numbering enum
+*/
+typedef enum {
+    MRAA_RASPBERRY_WIRING_PIN8 = 3,
+    MRAA_RASPBERRY_WIRING_PIN9 = 5,
+    MRAA_RASPBERRY_WIRING_PIN7 = 7,
+    MRAA_RASPBERRY_WIRING_PIN15 = 8,
+    MRAA_RASPBERRY_WIRING_PIN16 = 10,
+    MRAA_RASPBERRY_WIRING_PIN0 = 11,
+    MRAA_RASPBERRY_WIRING_PIN1 = 12,
+    MRAA_RASPBERRY_WIRING_PIN2 = 13,
+    MRAA_RASPBERRY_WIRING_PIN3 = 15,
+    MRAA_RASPBERRY_WIRING_PIN4 = 16,
+    MRAA_RASPBERRY_WIRING_PIN5 = 18,
+    MRAA_RASPBERRY_WIRING_PIN12 = 19,
+    MRAA_RASPBERRY_WIRING_PIN13 = 21,
+    MRAA_RASPBERRY_WIRING_PIN6 = 22,
+    MRAA_RASPBERRY_WIRING_PIN14 = 23,
+    MRAA_RASPBERRY_WIRING_PIN10 = 24,
+    MRAA_RASPBERRY_WIRING_PIN11 = 26,
+    MRAA_RASPBERRY_WIRING_PIN17 = 29, // RPi B V2
+    MRAA_RASPBERRY_WIRING_PIN21 = 29,
+    MRAA_RASPBERRY_WIRING_PIN18 = 30, // RPi B V2
+    MRAA_RASPBERRY_WIRING_PIN19 = 31, // RPI B V2
+    MRAA_RASPBERRY_WIRING_PIN22 = 31,
+    MRAA_RASPBERRY_WIRING_PIN20 = 32, // RPi B V2
+    MRAA_RASPBERRY_WIRING_PIN26 = 32,
+    MRAA_RASPBERRY_WIRING_PIN23 = 33,
+    MRAA_RASPBERRY_WIRING_PIN24 = 35,
+    MRAA_RASPBERRY_WIRING_PIN27 = 36,
+    MRAA_RASPBERRY_WIRING_PIN25 = 37,
+    MRAA_RASPBERRY_WIRING_PIN28 = 38,
+    MRAA_RASPBERRY_WIRING_PIN29 = 40
+} mraa_raspberry_wiring_t;
+
 /**
  * MRAA return codes
  */
 typedef enum {
-    MRAA_SUCCESS                              =  0, /**< Expected response */
-    MRAA_ERROR_FEATURE_NOT_IMPLEMENTED        =  1, /**< Feature TODO */
-    MRAA_ERROR_FEATURE_NOT_SUPPORTED          =  2, /**< Feature not supported by HW */
-    MRAA_ERROR_INVALID_VERBOSITY_LEVEL        =  3, /**< Verbosity level wrong */
-    MRAA_ERROR_INVALID_PARAMETER              =  4, /**< Parameter invalid */
-    MRAA_ERROR_INVALID_HANDLE                 =  5, /**< Handle invalid */
-    MRAA_ERROR_NO_RESOURCES                   =  6, /**< No resource of that type avail */
-    MRAA_ERROR_INVALID_RESOURCE               =  7, /**< Resource invalid */
-    MRAA_ERROR_INVALID_QUEUE_TYPE             =  8, /**< Queue type incorrect */
-    MRAA_ERROR_NO_DATA_AVAILABLE              =  9, /**< No data available */
-    MRAA_ERROR_INVALID_PLATFORM               = 10, /**< Platform not recognised */
-    MRAA_ERROR_PLATFORM_NOT_INITIALISED       = 11, /**< Board information not initialised */
-    MRAA_ERROR_PLATFORM_ALREADY_INITIALISED   = 12, /**< Board is already initialised */
+    MRAA_SUCCESS = 0,                             /**< Expected response */
+    MRAA_ERROR_FEATURE_NOT_IMPLEMENTED = 1,       /**< Feature TODO */
+    MRAA_ERROR_FEATURE_NOT_SUPPORTED = 2,         /**< Feature not supported by HW */
+    MRAA_ERROR_INVALID_VERBOSITY_LEVEL = 3,       /**< Verbosity level wrong */
+    MRAA_ERROR_INVALID_PARAMETER = 4,             /**< Parameter invalid */
+    MRAA_ERROR_INVALID_HANDLE = 5,                /**< Handle invalid */
+    MRAA_ERROR_NO_RESOURCES = 6,                  /**< No resource of that type avail */
+    MRAA_ERROR_INVALID_RESOURCE = 7,              /**< Resource invalid */
+    MRAA_ERROR_INVALID_QUEUE_TYPE = 8,            /**< Queue type incorrect */
+    MRAA_ERROR_NO_DATA_AVAILABLE = 9,             /**< No data available */
+    MRAA_ERROR_INVALID_PLATFORM = 10,             /**< Platform not recognised */
+    MRAA_ERROR_PLATFORM_NOT_INITIALISED = 11,     /**< Board information not initialised */
+    MRAA_ERROR_UART_OW_SHORTED = 12,              /**< UART OW Short Circuit Detected*/
+    MRAA_ERROR_UART_OW_NO_DEVICES = 13,           /**< UART OW No devices detected */
+    MRAA_ERROR_UART_OW_DATA_ERROR = 14,           /**< UART OW Data/Bus error detected */
 
-    MRAA_ERROR_UNSPECIFIED                    = 99 /**< Unknown Error */
+    MRAA_ERROR_UNSPECIFIED = 99 /**< Unknown Error */
 } mraa_result_t;
 
 /**
- * This function attempts to set the mraa process to a given priority and the
- * scheduler to SCHED_RR. Highest * priority is typically 99 and minimum is 0.
- * This function * will set to MAX if * priority is > MAX. Function will return
- * -1 on failure.
- *
- * @param priority Value from typically 0 to 99
- * @return The priority value set
+ * Enum representing different possible modes for a pin.
  */
-int mraa_set_priority(const unsigned int priority);
-
-/** Get the version string of mraa autogenerated from git tag
- *
- * The version returned may not be what is expected however it is a reliable
- * number associated with the git tag closest to that version at build time
- *
- * @return version string from version.h
- */
-const char* mraa_get_version();
+typedef enum {
+    MRAA_PIN_VALID = 0,     /**< Pin Valid */
+    MRAA_PIN_GPIO = 1,      /**< General Purpose IO */
+    MRAA_PIN_PWM = 2,       /**< Pulse Width Modulation */
+    MRAA_PIN_FAST_GPIO = 3, /**< Faster GPIO */
+    MRAA_PIN_SPI = 4,       /**< SPI */
+    MRAA_PIN_I2C = 5,       /**< I2C */
+    MRAA_PIN_AIO = 6,       /**< Analog in */
+    MRAA_PIN_UART = 7       /**< UART */
+} mraa_pinmodes_t;
 
 /**
- * Print a textual representation of the mraa_result_t
- *
- * @param result the result to print
+ * Enum reprensenting different i2c speeds/modes
  */
-void mraa_result_print(mraa_result_t result);
+typedef enum {
+    MRAA_I2C_STD = 0,  /**< up to 100Khz */
+    MRAA_I2C_FAST = 1, /**< up to 400Khz */
+    MRAA_I2C_HIGH = 2  /**< up to 3.4Mhz */
+} mraa_i2c_mode_t;
 
-/**
- * Get platform type, board must be initialised.
- *
- * @return mraa_platform_t Platform type enum
- */
-mraa_platform_t mraa_get_platform_type();
+typedef enum {
+    MRAA_UART_PARITY_NONE = 0,
+    MRAA_UART_PARITY_EVEN = 1,
+    MRAA_UART_PARITY_ODD = 2,
+    MRAA_UART_PARITY_MARK = 3,
+    MRAA_UART_PARITY_SPACE = 4
+} mraa_uart_parity_t;
 
 #ifdef __cplusplus
 }

api/mraa/types.hpp

@@ -0,0 +1,250 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright © 2014 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#pragma once
+
+/** @file
+ *
+ * This file defines the basic shared types for libmraa
+ * this file is different to common.h in that swig takes this as an input
+ */
+
+namespace mraa
+{
+
+//These enums must match the enums in types.h
+
+/**
+ * MRAA supported platform types
+ */
+typedef enum {
+    INTEL_GALILEO_GEN1 = 0,    /**< The Generation 1 Galileo platform (RevD) */
+    INTEL_GALILEO_GEN2 = 1,    /**< The Generation 2 Galileo platform (RevG/H) */
+    INTEL_EDISON_FAB_C = 2,    /**< The Intel Edison (FAB C) */
+    INTEL_DE3815 = 3,          /**< The Intel DE3815 Baytrail NUC */
+    INTEL_MINNOWBOARD_MAX = 4, /**< The Intel Minnow Board Max */
+    RASPBERRY_PI = 5,          /**< The different Raspberry PI Models -like  A,B,A+,B+ */
+    BEAGLEBONE = 6,            /**< The different BeagleBone Black Modes B/C */
+    BANANA = 7,                /**< Allwinner A20 based Banana Pi and Banana Pro */
+    INTEL_NUC5 = 8,            /**< The Intel 5th generations Broadwell NUCs */
+    A96BOARDS = 9,             /**< Linaro 96boards, A prefix for 'ARM' since not allowed numerical */
+    INTEL_SOFIA_3GR = 10,      /**< The Intel SoFIA 3GR */
+    INTEL_CHERRYHILLS = 11,    /**< The Intel Braswell Cherryhills */
+    INTEL_UP = 12,             /**< The UP Board */
+    INTEL_JOULE_EXPANSION = 13,/**< The Intel Joule Expansion Board */
+    PHYBOARD_WEGA = 14,        /**< The phyBOARD-Wega */
+    DE_NANO_SOC = 15,          /**< Terasic DE-Nano-SoC Board */
+
+    FTDI_FT4222 = 256,         /**< FTDI FT4222 USB to i2c bridge */
+
+    GENERIC_FIRMATA = 1280,    /**< Firmata uart platform/bridge */
+
+    ANDROID_PERIPHERALMANAGER = 95, /**< Android Things peripheral manager platform */
+    NULL_PLATFORM = 98,
+    UNKNOWN_PLATFORM =
+    99 /**< An unknown platform type, typically will load INTEL_GALILEO_GEN1 */
+} Platform;
+
+/**
+ * Intel edison miniboard numbering enum
+ */
+typedef enum {
+    INTEL_EDISON_MINIBOARD_J17_1 = 0,
+    INTEL_EDISON_MINIBOARD_J17_5 = 4,
+    INTEL_EDISON_MINIBOARD_J17_7 = 6,
+    INTEL_EDISON_MINIBOARD_J17_8 = 7,
+    INTEL_EDISON_MINIBOARD_J17_9 = 8,
+    INTEL_EDISON_MINIBOARD_J17_10 = 9,
+    INTEL_EDISON_MINIBOARD_J17_11 = 10,
+    INTEL_EDISON_MINIBOARD_J17_12 = 11,
+    INTEL_EDISON_MINIBOARD_J17_14 = 13,
+    INTEL_EDISON_MINIBOARD_J18_1 = 14,
+    INTEL_EDISON_MINIBOARD_J18_2 = 15,
+    INTEL_EDISON_MINIBOARD_J18_6 = 19,
+    INTEL_EDISON_MINIBOARD_J18_7 = 20,
+    INTEL_EDISON_MINIBOARD_J18_8 = 21,
+    INTEL_EDISON_MINIBOARD_J18_10 = 23,
+    INTEL_EDISON_MINIBOARD_J18_11 = 24,
+    INTEL_EDISON_MINIBOARD_J18_12 = 25,
+    INTEL_EDISON_MINIBOARD_J18_13 = 26,
+    INTEL_EDISON_MINIBOARD_J19_4 = 31,
+    INTEL_EDISON_MINIBOARD_J19_5 = 32,
+    INTEL_EDISON_MINIBOARD_J19_6 = 33,
+    INTEL_EDISON_MINIBOARD_J19_8 = 35,
+    INTEL_EDISON_MINIBOARD_J19_9 = 36,
+    INTEL_EDISON_MINIBOARD_J19_10 = 37,
+    INTEL_EDISON_MINIBOARD_J19_11 = 38,
+    INTEL_EDISON_MINIBOARD_J19_12 = 39,
+    INTEL_EDISON_MINIBOARD_J19_13 = 40,
+    INTEL_EDISON_MINIBOARD_J19_14 = 41,
+    INTEL_EDISON_MINIBOARD_J20_3 = 44,
+    INTEL_EDISON_MINIBOARD_J20_4 = 45,
+    INTEL_EDISON_MINIBOARD_J20_5 = 46,
+    INTEL_EDISON_MINIBOARD_J20_6 = 47,
+    INTEL_EDISON_MINIBOARD_J20_7 = 48,
+    INTEL_EDISON_MINIBOARD_J20_8 = 49,
+    INTEL_EDISON_MINIBOARD_J20_9 = 50,
+    INTEL_EDISON_MINIBOARD_J20_10 = 51,
+    INTEL_EDISON_MINIBOARD_J20_11 = 52,
+    INTEL_EDISON_MINIBOARD_J20_12 = 53,
+    INTEL_EDISON_MINIBOARD_J20_13 = 54,
+    INTEL_EDISON_MINIBOARD_J20_14 = 55
+} IntelEdisonMiniboard;
+
+/**
+ * Intel Edison raw GPIO numbering enum
+ */
+typedef enum {
+    INTEL_EDISON_GP182 = 0,
+    INTEL_EDISON_GP135 = 4,
+    INTEL_EDISON_GP27 = 6,
+    INTEL_EDISON_GP20 = 7,
+    INTEL_EDISON_GP28 = 8,
+    INTEL_EDISON_GP111 = 0,
+    INTEL_EDISON_GP109 = 10,
+    INTEL_EDISON_GP115 = 11,
+    INTEL_EDISON_GP128 = 13,
+    INTEL_EDISON_GP13 = 14,
+    INTEL_EDISON_GP165 = 15,
+    INTEL_EDISON_GP19 = 19,
+    INTEL_EDISON_GP12 = 20,
+    INTEL_EDISON_GP183 = 21,
+    INTEL_EDISON_GP110 = 23,
+    INTEL_EDISON_GP114 = 24,
+    INTEL_EDISON_GP129 = 25,
+    INTEL_EDISON_GP130 = 26,
+    INTEL_EDISON_GP44 = 31,
+    INTEL_EDISON_GP46 = 32,
+    INTEL_EDISON_GP48 = 33,
+    INTEL_EDISON_GP131 = 35,
+    INTEL_EDISON_GP14 = 36,
+    INTEL_EDISON_GP40 = 37,
+    INTEL_EDISON_GP43 = 38,
+    INTEL_EDISON_GP77 = 39,
+    INTEL_EDISON_GP82 = 40,
+    INTEL_EDISON_GP83 = 41,
+    INTEL_EDISON_GP134 = 44,
+    INTEL_EDISON_GP45 = 45,
+    INTEL_EDISON_GP47 = 46,
+    INTEL_EDISON_GP49 = 47,
+    INTEL_EDISON_GP15 = 48,
+    INTEL_EDISON_GP84 = 49,
+    INTEL_EDISON_GP42 = 50,
+    INTEL_EDISON_GP41 = 51,
+    INTEL_EDISON_GP78 = 52,
+    INTEL_EDISON_GP79 = 53,
+    INTEL_EDISON_GP80 = 54,
+    INTEL_EDISON_GP81 = 55
+} IntelEdison;
+
+/**
+* Raspberry PI Wiring compatible numbering enum
+*/
+typedef enum {
+    RASPBERRY_WIRING_PIN8 = 3,
+    RASPBERRY_WIRING_PIN9 = 5,
+    RASPBERRY_WIRING_PIN7 = 7,
+    RASPBERRY_WIRING_PIN15 = 8,
+    RASPBERRY_WIRING_PIN16 = 10,
+    RASPBERRY_WIRING_PIN0 = 11,
+    RASPBERRY_WIRING_PIN1 = 12,
+    RASPBERRY_WIRING_PIN2 = 13,
+    RASPBERRY_WIRING_PIN3 = 15,
+    RASPBERRY_WIRING_PIN4 = 16,
+    RASPBERRY_WIRING_PIN5 = 18,
+    RASPBERRY_WIRING_PIN12 = 19,
+    RASPBERRY_WIRING_PIN13 = 21,
+    RASPBERRY_WIRING_PIN6 = 22,
+    RASPBERRY_WIRING_PIN14 = 23,
+    RASPBERRY_WIRING_PIN10 = 24,
+    RASPBERRY_WIRING_PIN11 = 26,
+    RASPBERRY_WIRING_PIN17 = 29, // RPi B V2
+    RASPBERRY_WIRING_PIN21 = 29,
+    RASPBERRY_WIRING_PIN18 = 30, // RPi B V2
+    RASPBERRY_WIRING_PIN19 = 31, // RPI B V2
+    RASPBERRY_WIRING_PIN22 = 31,
+    RASPBERRY_WIRING_PIN20 = 32, // RPi B V2
+    RASPBERRY_WIRING_PIN26 = 32,
+    RASPBERRY_WIRING_PIN23 = 33,
+    RASPBERRY_WIRING_PIN24 = 35,
+    RASPBERRY_WIRING_PIN27 = 36,
+    RASPBERRY_WIRING_PIN25 = 37,
+    RASPBERRY_WIRING_PIN28 = 38,
+    RASPBERRY_WIRING_PIN29 = 40
+} RaspberryWiring;
+
+/**
+ * MRAA return codes
+ */
+typedef enum {
+    SUCCESS = 0,                             /**< Expected response */
+    ERROR_FEATURE_NOT_IMPLEMENTED = 1,       /**< Feature TODO */
+    ERROR_FEATURE_NOT_SUPPORTED = 2,         /**< Feature not supported by HW */
+    ERROR_INVALID_VERBOSITY_LEVEL = 3,       /**< Verbosity level wrong */
+    ERROR_INVALID_PARAMETER = 4,             /**< Parameter invalid */
+    ERROR_INVALID_HANDLE = 5,                /**< Handle invalid */
+    ERROR_NO_RESOURCES = 6,                  /**< No resource of that type avail */
+    ERROR_INVALID_RESOURCE = 7,              /**< Resource invalid */
+    ERROR_INVALID_QUEUE_TYPE = 8,            /**< Queue type incorrect */
+    ERROR_NO_DATA_AVAILABLE = 9,             /**< No data available */
+    ERROR_INVALID_PLATFORM = 10,             /**< Platform not recognised */
+    ERROR_PLATFORM_NOT_INITIALISED = 11,     /**< Board information not initialised */
+    ERROR_UART_OW_SHORTED = 12,              /**< UART OW Short Circuit Detected*/
+    ERROR_UART_OW_NO_DEVICES = 13,           /**< UART OW No devices detected */
+    ERROR_UART_OW_DATA_ERROR = 14,           /**< UART OW Data/Bus error detected */
+
+    ERROR_UNSPECIFIED = 99 /**< Unknown Error */
+} Result;
+
+/**
+ * Enum representing different possible modes for a pin.
+ */
+typedef enum {
+    PIN_VALID = 0,     /**< Pin Valid */
+    PIN_GPIO = 1,      /**< General Purpose IO */
+    PIN_PWM = 2,       /**< Pulse Width Modulation */
+    PIN_FAST_GPIO = 3, /**< Faster GPIO */
+    PIN_SPI = 4,       /**< SPI */
+    PIN_I2C = 5,       /**< I2C */
+    PIN_AIO = 6,       /**< Analog in */
+    PIN_UART = 7       /**< UART */
+} Pinmodes;
+
+/**
+ * Enum reprensenting different i2c speeds/modes
+ */
+typedef enum {
+    I2C_STD = 0,  /**< up to 100Khz */
+    I2C_FAST = 1, /**< up to 400Khz */
+    I2C_HIGH = 2  /**< up to 3.4Mhz */
+} I2cMode;
+
+typedef enum {
+    UART_PARITY_NONE = 0,
+    UART_PARITY_EVEN = 1,
+    UART_PARITY_ODD = 2,
+    UART_PARITY_MARK = 3,
+    UART_PARITY_SPACE = 4
+} UartParity;
+
+}

api/mraa/uart.h

@@ -1,6 +1,8 @@
 /*
  * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
- * Copyright (c) 2014 Intel Corporation.
+ * Contributions: Jon Trulson <jtrulson@ics.com>
+ *                Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014 - 2015 Intel Corporation
  *
  * Permission is hereby granted, free of charge, to any person obtaining
  * a copy of this software and associated documentation files (the
@@ -32,7 +34,7 @@
  * libmraa. It allows the exposure of UART pins on supported boards.
  * With functionality to expand at a later date.
  *
- * @snippet uart_setup.c Interesting
+ * @snippet uart.c Interesting
  */
 
 #ifdef __cplusplus
@@ -40,7 +42,6 @@ extern "C" {
 #endif
 
 #include <stdio.h>
-#include <fcntl.h>
 
 #include "common.h"
 
@@ -54,6 +55,136 @@ typedef struct _uart* mraa_uart_context;
  */
 mraa_uart_context mraa_uart_init(int uart);
 
+/**
+ * Initialise a raw uart_context. No board setup.
+ *
+ * @param path for example "/dev/ttyS0"
+ * @return uart context or NULL
+ */
+mraa_uart_context mraa_uart_init_raw(const char* path);
+
+/**
+ * Flush the outbound data.
+ * Blocks until complete.
+ *
+ * @param dev The UART context
+ * @return Result of operation
+ */
+mraa_result_t mraa_uart_flush(mraa_uart_context dev);
+
+/**
+ * Send a break to the device.
+ * Blocks until complete.
+ *
+ * @param dev The UART context
+ * @param duration When 0, send a break lasting at least 250
+ * milliseconds, and not more than 500 milliseconds.  When non zero,
+ * the break duration is implementation specific.
+ * @return Result of operation
+ */
+mraa_result_t mraa_uart_sendbreak(mraa_uart_context dev, int duration);
+
+/**
+ * Set the baudrate.
+ * Takes an int and will attempt to decide what baudrate  is
+ * to be used on the UART hardware.
+ *
+ * @param dev The UART context
+ * @param baud unsigned int of baudrate i.e. 9600
+ * @return Result of operation
+ */
+mraa_result_t mraa_uart_set_baudrate(mraa_uart_context dev, unsigned int baud);
+
+/**
+ * Set the transfer mode
+ * For example setting the mode to 8N1 would be
+ * "mraa_uart_set_mode(dev, 8,MRAA_UART_PARITY_NONE , 1)"
+ *
+ * @param dev The UART context
+ * @param bytesize data bits
+ * @param parity Parity bit setting
+ * @param stopbits stop bits
+ * @return Result of operation
+ */
+mraa_result_t mraa_uart_set_mode(mraa_uart_context dev, int bytesize, mraa_uart_parity_t parity, int stopbits);
+
+/**
+ * Set the flowcontrol
+ *
+ * @param dev The UART context
+ * @param xonxoff XON/XOFF Software flow control.
+ * @param rtscts RTS/CTS out of band hardware flow control
+ * @return Result of operation
+ */
+mraa_result_t mraa_uart_set_flowcontrol(mraa_uart_context dev, mraa_boolean_t xonxoff, mraa_boolean_t rtscts);
+
+/**
+ * Set the timeout for read and write operations
+ * <= 0 will disable that timeout
+ *
+ * @param dev The UART context
+ * @param read read timeout
+ * @param write write timeout
+ * @param interchar inbetween char timeout
+ * @return Result of operation
+ */
+mraa_result_t mraa_uart_set_timeout(mraa_uart_context dev, int read, int write, int interchar);
+
+/**
+ * Set the blocking state for write operations
+ *
+ * @param dev The UART context
+ * @param nonblock new nonblocking state
+ * @return Result of operation
+ */
+mraa_result_t mraa_uart_set_non_blocking(mraa_uart_context dev, mraa_boolean_t nonblock);
+
+/**
+ * Get Char pointer with tty device path within Linux
+ * For example. Could point to "/dev/ttyS0"
+ *
+ * @param dev uart context
+ * @return char pointer of device path
+ */
+const char* mraa_uart_get_dev_path(mraa_uart_context dev);
+
+/**
+ * Destroy a mraa_uart_context
+ *
+ * @param dev uart context
+ * @return mraa_result_t
+ */
+mraa_result_t mraa_uart_stop(mraa_uart_context dev);
+
+/**
+ * Read bytes from the device into a buffer
+ *
+ * @param dev uart context
+ * @param buf buffer pointer
+ * @param length maximum size of buffer
+ * @return the number of bytes read, or -1 if an error occurred
+ */
+int mraa_uart_read(mraa_uart_context dev, char* buf, size_t length);
+
+/**
+ * Write bytes in buffer to a device
+ *
+ * @param dev uart context
+ * @param buf buffer pointer
+ * @param length maximum size of buffer
+ * @return the number of bytes written, or -1 if an error occurred
+ */
+int mraa_uart_write(mraa_uart_context dev, const char* buf, size_t length);
+
+/**
+ * Check to see if data is available on the device for reading
+ *
+ * @param dev uart context
+ * @param millis number of milliseconds to wait, or 0 to return immediately
+ * @return 1 if there is data available to read, 0 otherwise
+ */
+mraa_boolean_t mraa_uart_data_available(mraa_uart_context dev, unsigned int millis);
+
 #ifdef __cplusplus
 }
 #endif

api/mraa/uart.hpp

@@ -1,6 +1,8 @@
 /*
  * Author: Brendan Le Foll <brendan.le.foll@intel.com>
- * Copyright (c) 2014 Intel Corporation.
+ * Contributions: Jon Trulson <jtrulson@ics.com>
+ * Contributions: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 - 2015 Intel Corporation.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
  * a copy of this software and associated documentation files (the
@@ -25,33 +27,263 @@
 #pragma once
 
 #include "uart.h"
+#include "types.hpp"
+#include <stdlib.h>
+#include <stdexcept>
+#include <cstring>
 
-namespace mraa {
+namespace mraa
+{
 
 /**
  * @brief API to UART (enabling only)
  *
  * This file defines the UART interface for libmraa
+ *
+ * @snippet Uart-example.cpp Interesting
  */
-class Uart {
-    public:
-        /**
-         * Uart Constructor, takes a pin number which will map directly to the
-         * linux uart number, this 'enables' the uart, nothing more
-         *
-         * @param uart the index of the uart set to use
-         */
-        Uart(int uart) {
-            m_uart = mraa_uart_init(uart);
-        }
-        /**
-         * Uart destructor
-         */
-        ~Uart() {
-            return;
-        }
-    private:
-        mraa_uart_context m_uart;
-};
+class Uart
+{
+  public:
+    /**
+     * Uart Constructor, takes a pin number which will map directly to the
+     * linux uart number, this 'enables' the uart, nothing more
+     *
+     * @param uart the index of the uart set to use
+     */
+    Uart(int uart)
+    {
+        m_uart = mraa_uart_init(uart);
 
+        if (m_uart == NULL) {
+            throw std::invalid_argument("Error initialising UART");
+        }
+    }
+
+    /**
+     * Uart Constructor, takes a string to the path of the serial
+     * interface that is needed.
+     *
+     * @param uart the index of the uart set to use
+     */
+    Uart(std::string path)
+    {
+        m_uart = mraa_uart_init_raw(path.c_str());
+
+        if (m_uart == NULL) {
+            throw std::invalid_argument("Error initialising UART");
+        }
+    }
+
+    /**
+     * Uart Constructor, takes a pointer to the UART context and initialises
+     * the UART class
+     *
+     * @param void * to a UART context
+     */
+    Uart(void* uart_context)
+    {
+        m_uart = (mraa_uart_context) uart_context;
+
+        if (m_uart == NULL) {
+            throw std::invalid_argument("Invalid UART context");
+        }
+    }
+    /**
+     * Uart destructor
+     */
+    ~Uart()
+    {
+        mraa_uart_stop(m_uart);
+    }
+
+    /**
+     * Get string with tty device path within Linux
+     * For example. Could point to "/dev/ttyS0"
+     *
+     * @return char pointer of device path
+     */
+    std::string
+    getDevicePath()
+    {
+        std::string ret_val(mraa_uart_get_dev_path(m_uart));
+        return ret_val;
+    }
+
+    /**
+     * Read bytes from the device into char* buffer
+     *
+     * @param data buffer pointer
+     * @param length maximum size of buffer
+     * @return numbers of bytes read
+     */
+    int
+    read(char* data, int length)
+    {
+        return mraa_uart_read(m_uart, data, (size_t) length);
+    }
+
+    /**
+     * Write bytes in char* buffer to a device
+     *
+     * @param data buffer pointer
+     * @param length maximum size of buffer
+     * @return the number of bytes written, or -1 if an error occurred
+     */
+    int
+    write(const char* data, int length)
+    {
+        return mraa_uart_write(m_uart, data, (size_t) length);
+    }
+
+    /**
+     * Read bytes from the device into a String object
+     *
+     * @param length to read
+     * @throws std::bad_alloc If there is no space left for read.
+     * @return string of data
+     */
+    std::string
+    readStr(int length)
+    {
+        char* data = (char*) malloc(sizeof(char) * length);
+        if (data == NULL) {
+            throw std::bad_alloc();
+        }
+
+        int v = mraa_uart_read(m_uart, data, (size_t) length);
+        std::string ret(data, v);
+        free(data);
+        return ret;
+    }
+
+    /**
+     * Write bytes in String object to a device
+     *
+     * @param string to write
+     * @return the number of bytes written, or -1 if an error occurred
+     */
+    int
+    writeStr(std::string data)
+    {
+        // this is data.length() not +1 because we want to avoid the '\0' char
+        return mraa_uart_write(m_uart, data.c_str(), (data.length()));
+    }
+
+    /**
+     * Check to see if data is available on the device for reading
+     *
+     * @param millis number of milliseconds to wait, or 0 to return immediately
+     * @return true if there is data available to read, false otherwise
+     */
+    bool
+    dataAvailable(unsigned int millis = 0)
+    {
+        if (mraa_uart_data_available(m_uart, millis))
+            return true;
+        else
+            return false;
+    }
+
+    /**
+     * Flush the outbound data.
+     * Blocks until complete.
+     *
+     * @return Result of operation
+     */
+    Result
+    flush()
+    {
+        return (Result) mraa_uart_flush(m_uart);
+    }
+
+    /**
+     * Send a break to the device.
+     * Blocks until complete.
+     *
+     * @param duration When 0, send a break lasting at least 250
+     * milliseconds, and not more than 500 milliseconds.  When non zero,
+     * the break duration is implementation specific.
+     * @return Result of operation
+     */
+    Result
+    sendBreak(int duration)
+    {
+        return (Result) mraa_uart_sendbreak(m_uart, duration);
+    }
+
+    /**
+     * Set the baudrate.
+     * Takes an int and will attempt to decide what baudrate  is
+     * to be used on the UART hardware.
+     *
+     * @param baud unsigned int of baudrate i.e. 9600
+     * @return Result of operation
+     */
+    Result
+    setBaudRate(unsigned int baud)
+    {
+        return (Result) mraa_uart_set_baudrate(m_uart, baud);
+    }
+
+    /**
+     * Set the transfer mode
+     * For example setting the mode to 8N1 would be
+     * "dev.setMode(8,UART_PARITY_NONE , 1)"
+     *
+     * @param bytesize data bits
+     * @param parity Parity bit setting
+     * @param stopbits stop bits
+     * @return Result of operation
+     */
+    Result
+    setMode(int bytesize, UartParity parity, int stopbits)
+    {
+        return (Result) mraa_uart_set_mode(m_uart, bytesize, (mraa_uart_parity_t) parity, stopbits);
+    }
+
+    /**
+     * Set the flowcontrol
+     *
+     * @param xonxoff XON/XOFF Software flow control.
+     * @param rtscts RTS/CTS out of band hardware flow control
+     * @return Result of operation
+     */
+    Result
+    setFlowcontrol(bool xonxoff, bool rtscts)
+    {
+        return (Result) mraa_uart_set_flowcontrol(m_uart, xonxoff, rtscts);
+    }
+
+    /**
+     * Set the timeout for read and write operations
+     * <= 0 will disable that timeout
+     *
+     * @param read read timeout
+     * @param write write timeout
+     * @param interchar inbetween char timeout
+     * @return Result of operation
+     */
+    Result
+    setTimeout(int read, int write, int interchar)
+    {
+        return (Result) mraa_uart_set_timeout(m_uart, read, write, interchar);
+    }
+
+    /**
+     * Set the blocking state for write operations
+     *
+     * @param dev The UART context
+     * @param nonblock new nonblocking state
+     * @return Result of operation
+     */
+    Result
+    setNonBlocking(bool nonblock)
+    {
+        return (Result) mraa_uart_set_non_blocking(m_uart, nonblock);
+    }
+
+  private:
+    mraa_uart_context m_uart;
+};
 }

api/mraa/uart_ow.h

@@ -0,0 +1,197 @@
+/*
+ * Author: Jon Trulson <jtrulson@ics.com>
+ * Copyright (c) 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+/**
+ * @file
+ * @brief UART OW module
+ *
+ * This module allows one to use MRAA's UART support in order to
+ * interact with Dallas 1-wire compliant devices on a 1-wire bus.  It
+ * makes use of the UART for timing purposes.  The principle of
+ * operation is described here:
+ * https://www.maximintegrated.com/en/app-notes/index.mvp/id/214
+ *
+ * It is important the you use a UART with CMOS/TTL level voltages
+ * (3.3v/5v) RX and TX lines.  DO NOT use standard RS232 level
+ * voltages, or you are going to have a bad day.
+ *
+ * In addition, a diode should be placed across the RX and
+ * TX lines like so:
+ *
+ * -|
+ * U|
+ * A| TX---|<--+
+ * R|          |
+ * T| RX-------o--------o 1-wire data bus
+ * -|
+ *
+ * The diode on TX is a 1N4148 (cheap and common), with the cathode
+ * connected to TX, and the anode connected to RX and the rest of the
+ * 1-wire data line.
+ *
+ * @snippet uart_ow.c Interesting
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdio.h>
+
+#include "common.h"
+#include "uart.h"
+
+/* 8 bytes (64 bits) for a device rom code */
+#define MRAA_UART_OW_ROMCODE_SIZE 8
+
+/* for now, we simply use the normal MRAA UART context */
+typedef struct _mraa_uart_ow {
+    mraa_uart_context uart;
+    /* search state */
+    unsigned char ROM_NO[MRAA_UART_OW_ROMCODE_SIZE]; /* 8 byte (64b) rom code */
+    int LastDiscrepancy;
+    int LastFamilyDiscrepancy;
+    mraa_boolean_t LastDeviceFlag;
+} *mraa_uart_ow_context;
+
+/**
+ * UART One Wire ROM related Command bytes
+ */
+typedef enum {
+    MRAA_UART_OW_CMD_READ_ROM = 0x33,         /**< read rom, when only one device on bus */
+    MRAA_UART_OW_CMD_MATCH_ROM = 0x55,        /**< match a specific rom code */
+    MRAA_UART_OW_CMD_SKIP_ROM = 0xcc,         /**< skip match/search rom */
+    MRAA_UART_OW_CMD_SEARCH_ROM_ALARM = 0xec, /**< search all roms in alarm state */
+    MRAA_UART_OW_CMD_SEARCH_ROM = 0xf0        /**< search all rom codes */
+} mraa_uart_ow_rom_cmd_t;
+
+/**
+ * Initialise uart_ow_context, uses UART board mapping
+ *
+ * @param uart the index of the uart set to use
+ * @return uart_ow context or NULL
+ */
+mraa_uart_ow_context mraa_uart_ow_init(int uart);
+
+/**
+ * Initialise a raw uart_ow_context. No board setup.
+ *
+ * @param path for example "/dev/ttyS0"
+ * @return uart_ow context or NULL
+ */
+mraa_uart_ow_context mraa_uart_ow_init_raw(const char* path);
+
+/**
+ * Get char pointer with tty device path within Linux
+ * For example. Could point to "/dev/ttyS0"
+ *
+ * @param dev uart_ow context
+ * @return char pointer of device path
+ */
+const char* mraa_uart_ow_get_dev_path(mraa_uart_ow_context dev);
+
+/**
+ * Destroy a mraa_uart_ow_context
+ *
+ * @param dev uart_ow context
+ * @return mraa_result_t
+ */
+mraa_result_t mraa_uart_ow_stop(mraa_uart_ow_context dev);
+
+/**
+ * Read a byte from the 1-wire bus
+ *
+ * @param dev uart_ow context
+ * @return the byte read or -1 for error
+ */
+int mraa_uart_ow_read_byte(mraa_uart_ow_context dev);
+
+/**
+ * Write a byte to a 1-wire bus
+ *
+ * @param dev uart_ow context
+ * @param byte the byte to write to the bus
+ * @return the byte read back during the time slot or -1 for error
+ */
+int mraa_uart_ow_write_byte(mraa_uart_ow_context dev, uint8_t byte);
+
+/**
+ * Write a bit to a 1-wire bus and read a bit corresponding to the
+ * time slot back.  This is possible due to the way we wired the TX
+ * and RX together with a diode, forming a loopback.
+ *
+ * @param dev uart_ow context
+ * @param bit the bit to write to the bus
+ * @return the bit read back during the time slot or -1 for error
+ */
+int mraa_uart_ow_bit(mraa_uart_ow_context dev, uint8_t bit);
+
+/**
+ * Send a reset pulse to the 1-wire bus and test for device presence
+ *
+ * @param dev uart_ow context
+ * @return one of the mraa_result_t values
+ */
+mraa_result_t mraa_uart_ow_reset(mraa_uart_ow_context dev);
+
+/**
+ * Begin a rom code search of the 1-wire bus.  This function
+ * implements the 1-wire search algorithm.  See the uart_ow.c example
+ * for an idea on how to use this function to identify all devices
+ * present on the bus.
+ *
+ * @param dev uart_ow context
+ * @param start true to start a new search from scratch, false to
+ * continue an existing search
+ * @param id the 8-byte rom code id of the current matched device when
+ * a device is found
+ * @return one of the mraa_result_t values
+ */
+mraa_result_t mraa_uart_ow_rom_search(mraa_uart_ow_context dev, mraa_boolean_t start, uint8_t* id);
+
+/**
+ * Send a command byte to a device on the 1-wire bus
+ *
+ * @param dev uart_ow context
+ * @param command the command byte to send
+ * @param id the rom code id of the device to receive the command,
+ * NULL for all devices on the bus
+ * @return one of the mraa_result_t values
+ */
+mraa_result_t mraa_uart_ow_command(mraa_uart_ow_context dev, uint8_t command, uint8_t* id);
+
+/**
+ * Perform a Dallas 1-wire compliant CRC8 computation on a buffer
+ *
+ * @param buffer the buffer containing the data
+ * @param length the length of the buffer
+ * @return the computed CRC
+ */
+uint8_t mraa_uart_ow_crc8(uint8_t* buffer, uint16_t length);
+
+#ifdef __cplusplus
+}
+#endif

api/mraa/uart_ow.hpp

@@ -0,0 +1,277 @@
+/*
+ * Author: Jon Trulson <jtrulson@ics.com>
+ * Copyright (c) 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include "uart_ow.h"
+#include "types.hpp"
+#include <stdexcept>
+#include <cstring>
+
+namespace mraa
+{
+
+/**
+ * @brief API for UART One Wire
+ *
+ * This file defines the UartOW (UART to Dallas 1-wire) interface for libmraa
+ *
+ * @snippet UartOW.cpp Interesting
+ */
+class UartOW
+{
+  public:
+    /**
+     * UartOW Constructor, takes a pin number which will map directly to the
+     * linux uart number, this 'enables' the uart, nothing more
+     *
+     * @throws std::invalid_argument in case of error
+     * @param uart the index of the uart to use
+     */
+    UartOW(int uart)
+    {
+        m_uart = mraa_uart_ow_init(uart);
+
+        if (m_uart == NULL) {
+            throw std::invalid_argument("Error initialising UART_OW");
+        }
+    }
+
+    /**
+     * UartOW Constructor, takes a string to the path of the serial
+     * interface that is needed.
+     *
+     * @throws std::invalid_argument in case of error
+     * @param path the file path for the UART to use
+     */
+    UartOW(std::string path)
+    {
+        m_uart = mraa_uart_ow_init_raw(path.c_str());
+
+        if (m_uart == NULL) {
+            throw std::invalid_argument("Error initialising UART");
+        }
+    }
+
+    /**
+     * Uart destructor
+     */
+    ~UartOW()
+    {
+        mraa_uart_ow_stop(m_uart);
+    }
+
+    /**
+     * Get string with tty device path within Linux
+     * For example. Could point to "/dev/ttyS0"
+     *
+     * @return char pointer of device path
+     */
+    std::string
+    getDevicePath()
+    {
+        std::string ret_val(mraa_uart_ow_get_dev_path(m_uart));
+        return ret_val;
+    }
+
+    /**
+     * Read a byte from the 1-wire bus
+     *
+     * @throws std::invalid_argument in case of error
+     * @return the byte read
+     */
+    uint8_t
+    readByte()
+    {
+        int res = mraa_uart_ow_read_byte(m_uart);
+        if (res == -1) {
+            throw std::invalid_argument("Unknown UART_OW error");
+        }
+        return (uint8_t) res;
+    }
+
+    /**
+     * Write a byte to a 1-wire bus
+     *
+     * @param byte the byte to write to the bus
+     *
+     * @throws std::invalid_argument in case of error
+     * @return the byte read back during the time slot
+     */
+    uint8_t
+    writeByte(uint8_t byte)
+    {
+        int res = mraa_uart_ow_write_byte(m_uart, byte);
+        if (res == -1) {
+            throw std::invalid_argument("Unknown UART_OW error");
+        }
+        return (uint8_t) res;
+    }
+
+    /**
+     * Write a bit to a 1-wire bus and read a bit corresponding to the
+     * time slot back.  This is possible due to the way we wired the TX
+     * and RX together with a diode, forming a loopback.
+     *
+     * @param bit the bit to write to the bus
+     * @throws std::invalid_argument in case of error
+     * @return the bit read back during the time slot
+     */
+    bool
+    writeBit(bool bit)
+    {
+        int res = mraa_uart_ow_bit(m_uart, (bit) ? 1 : 0);
+        if (res == -1) {
+            throw std::invalid_argument("Unknown UART_OW error");
+        }
+        return ((res) ? true : false);
+    }
+
+    /**
+     * Send a reset pulse to the 1-wire bus and test for device presence
+     *
+     * @return one of the mraa::Result values
+     */
+    mraa::Result
+    reset()
+    {
+        return (mraa::Result) mraa_uart_ow_reset(m_uart);
+    }
+
+    /**
+     * Begin a rom code search of the 1-wire bus.  This function
+     * implements the 1-wire search algorithm.  See the uart_ow.c example
+     * for an idea on how to use this function to identify all devices
+     * present on the bus.
+     *
+     * @param start true to start a search from scratch, false to
+     * continue a previously started search
+     * @param id the 8-byte rom code id of the current matched device when a
+     * device is found
+     * @return one of the mraa::Result values
+     */
+    mraa::Result
+    search(bool start, uint8_t* id)
+    {
+        return (mraa::Result) mraa_uart_ow_rom_search(m_uart, (start) ? 1 : 0, id);
+    }
+
+    /**
+     * Begin a rom code search of the 1-wire bus.  This function
+     * implements the 1-wire search algorithm.  See the UartOW.cpp
+     * example for an idea on how to use this function to identify all
+     * devices present on the bus.
+     *
+     * @param start true to start a search from scratch, false to
+     * continue a previously started search
+     * @return an empty string if no [more] devices are found, or a
+     * string containing the 8-byte romcode of a detected device.
+     */
+    std::string
+    search(bool start)
+    {
+        uint8_t id[MRAA_UART_OW_ROMCODE_SIZE];
+        mraa_result_t rv;
+
+        rv = mraa_uart_ow_rom_search(m_uart, (start) ? 1 : 0, id);
+
+        if (rv == MRAA_SUCCESS) {
+            // we found one
+            std::string idStr((char*) id, MRAA_UART_OW_ROMCODE_SIZE);
+            return idStr;
+        } else {
+            // failure, or end of search
+            return "";
+        }
+    }
+
+    /**
+     * Send a command byte to a device on the 1-wire bus
+     *
+     * @param command the command byte to send
+     * @param id the rom code id of the device to receive the command,
+     * NULL for all devices on the bus
+     * @return one of the mraa::Result values
+     */
+    mraa::Result
+    command(uint8_t command, uint8_t* id)
+    {
+        return (mraa::Result) mraa_uart_ow_command(m_uart, command, id);
+    }
+
+    /**
+     * Send a command byte to a device on the 1-wire bus, supplying
+     * the id as a std::string
+     *
+     * @param command the command byte to send
+     * @param id std::string representing the code id of the device to
+     * receive the command, or an empty string for all devices on the
+     * bus.  This string should be 8 bytes in size.
+     * @return one of the mraa::Result values
+     */
+    mraa::Result
+    command(uint8_t command, std::string id)
+    {
+        if (id.empty())
+            return (mraa::Result) mraa_uart_ow_command(m_uart, command, NULL);
+        else {
+            if (id.size() != 8) {
+                // Only 8 byte romcodes are legal.
+                throw std::invalid_argument(std::string(__FUNCTION__) +
+                                            ": id must be 8 bytes only");
+            }
+            return (mraa::Result) mraa_uart_ow_command(m_uart, command, (uint8_t*) id.data());
+        }
+    }
+
+    /**
+     * Perform a Dallas 1-wire compliant CRC8 computation on a buffer
+     *
+     * @param buffer the buffer containing the data
+     * @param length the length of the buffer
+     * @return the computed CRC
+     */
+    uint8_t
+    crc8(uint8_t* buffer, uint16_t length)
+    {
+        return mraa_uart_ow_crc8(buffer, length);
+    }
+
+    /**
+     * Perform a Dallas 1-wire compliant CRC8 computation on a
+     * std::string based buffer
+     *
+     * @param buffer std::string buffer containing the data
+     * @return the computed CRC
+     */
+    uint8_t
+    crc8(std::string buffer)
+    {
+        return mraa_uart_ow_crc8((uint8_t*) buffer.data(), buffer.size());
+    }
+
+  private:
+    mraa_uart_ow_context m_uart;
+};
+}

cmake/Toolchains/oe-sdk_cross.cmake

@@ -0,0 +1,25 @@
+# this toolchain file comes from gnuradio project
+
+set( CMAKE_SYSTEM_NAME Linux )
+#set( CMAKE_C_COMPILER  $ENV{CC} )
+#set( CMAKE_CXX_COMPILER  $ENV{CXX} )
+string(REGEX MATCH "sysroots/([a-zA-Z0-9]+)" CMAKE_SYSTEM_PROCESSOR $ENV{SDKTARGETSYSROOT})
+string(REGEX REPLACE "sysroots/" "" CMAKE_SYSTEM_PROCESSOR ${CMAKE_SYSTEM_PROCESSOR})
+set( CMAKE_CXX_FLAGS $ENV{CXXFLAGS}  CACHE STRING "" FORCE )
+set( CMAKE_C_FLAGS $ENV{CFLAGS} CACHE STRING "" FORCE ) #same flags for C sources
+set( CMAKE_LDFLAGS_FLAGS ${CMAKE_CXX_FLAGS} CACHE STRING "" FORCE ) #same flags for C sources
+set( CMAKE_LIBRARY_PATH ${OECORE_TARGET_SYSROOT}/usr/lib )
+set( CMAKE_FIND_ROOT_PATH $ENV{OECORE_TARGET_SYSROOT} $ENV{OECORE_NATIVE_SYSROOT} )
+set( CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER )
+set( CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY )
+set( CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY )
+set( CMAKE_INSTALL_PREFIX $ENV{OECORE_TARGET_SYSROOT}/usr CACHE STRING "" FORCE)
+set( ORC_INCLUDE_DIRS $ENV{OECORE_TARGET_SYSROOT}/usr/include/orc-0.4 )
+set( ORC_LIBRARY_DIRS $ENV{OECORE_TARGET_SYSROOT}/usr/lib )
+
+# for java
+set( JAVA_AWT_INCLUDE_PATH $ENV{JAVA_HOME}/include CACHE PATH "" FORCE)
+set( JAVA_AWT_LIBRARY $ENV{JAVA_HOME}/jre/lib/amd64/libjawt.so CACHE FILEPATH "" FORCE)
+set( JAVA_INCLUDE_PATH $ENV{JAVA_HOME}/include CACHE PATH "" FORCE)
+set( JAVA_INCLUDE_PATH2 $ENV{JAVA_HOME}/include/linux CACHE PATH "" FORCE)
+set( JAVA_JVM_LIBRARY $ENV{JAVA_HOME}/jre/lib/amd64/libjvm.so CACHE FILEPATH "" FORCE)

cmake/modules/COPYING-CMAKE-SCRIPTS

@@ -0,0 +1,22 @@
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+1. Redistributions of source code must retain the copyright
+   notice, this list of conditions and the following disclaimer.
+2. Redistributions in binary form must reproduce the copyright
+   notice, this list of conditions and the following disclaimer in the
+   documentation and/or other materials provided with the distribution.
+3. The name of the author may not be used to endorse or promote products
+   derived from this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

cmake/modules/Copyright.txt

@@ -0,0 +1,57 @@
+CMake - Cross Platform Makefile Generator
+Copyright 2000-2015 Kitware, Inc.
+Copyright 2000-2011 Insight Software Consortium
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+* Redistributions of source code must retain the above copyright
+  notice, this list of conditions and the following disclaimer.
+
+* Redistributions in binary form must reproduce the above copyright
+  notice, this list of conditions and the following disclaimer in the
+  documentation and/or other materials provided with the distribution.
+
+* Neither the names of Kitware, Inc., the Insight Software Consortium,
+  nor the names of their contributors may be used to endorse or promote
+  products derived from this software without specific prior written
+  permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+------------------------------------------------------------------------------
+
+The above copyright and license notice applies to distributions of
+CMake in source and binary form.  Some source files contain additional
+notices of original copyright by their contributors; see each source
+for details.  Third-party software packages supplied with CMake under
+compatible licenses provide their own copyright notices documented in
+corresponding subdirectories.
+
+------------------------------------------------------------------------------
+
+CMake was initially developed by Kitware with the following sponsorship:
+
+ * National Library of Medicine at the National Institutes of Health
+   as part of the Insight Segmentation and Registration Toolkit (ITK).
+
+ * US National Labs (Los Alamos, Livermore, Sandia) ASC Parallel
+   Visualization Initiative.
+
+ * National Alliance for Medical Image Computing (NAMIC) is funded by the
+   National Institutes of Health through the NIH Roadmap for Medical Research,
+   Grant U54 EB005149.
+
+ * Kitware, Inc.

cmake/modules/FindFtd2xx.cmake

@@ -0,0 +1,73 @@
+# - Try to find libftd2xx
+# Once done this will define
+#
+#  LIBFTD2XX_FOUND - system has libftd2xx
+#  LIBFTD2XX_INCLUDE_DIRS - the libftd2xx include directory
+#  LIBFTD2XX_LIBRARIES - Link these to use libftd2xx
+#  LIBFTD2XX_DEFINITIONS - Compiler switches required for using libftd2xx
+#
+#  Adapted from cmake-modules Google Code project
+#
+#  Copyright (c) 2006 Andreas Schneider <mail@cynapses.org>
+#
+#  (Changes for libftd2xx) Copyright (c) 2008 Kyle Machulis <kyle@nonpolynomial.com>
+#
+# Redistribution and use is allowed according to the terms of the New BSD license.
+# For details see the accompanying COPYING-CMAKE-SCRIPTS file.
+
+if (LIBFTD2XX_LIBRARIES AND LIBFTD2XX_INCLUDE_DIRS)
+  # in cache already
+  set(LIBFTD2XX_FOUND TRUE)
+else (LIBFTD2XX_LIBRARIES AND LIBFTD2XX_INCLUDE_DIRS)
+  find_path(LIBFTD2XX_INCLUDE_DIR
+    NAMES
+    ftd2xx.h
+    PATHS
+    /usr/include
+    /usr/local/include
+    /opt/local/include
+    /sw/include
+	)
+
+  SET(FTD2XX_LIBNAME ftd2xx)
+  IF(WIN32)
+	SET(FTD2XX_LIBNAME ftd2xx.lib)
+  ENDIF(WIN32)
+
+  find_library(LIBFTD2XX_LIBRARY
+    NAMES
+    ${FTD2XX_LIBNAME}
+    PATHS
+    /usr/lib
+    /usr/local/lib
+    /opt/local/lib
+    /sw/lib
+	)
+
+  if(LIBFTD2XX_INCLUDE_DIR)
+	set(LIBFTD2XX_INCLUDE_DIRS
+      ${LIBFTD2XX_INCLUDE_DIR}
+	  )
+  endif(LIBFTD2XX_INCLUDE_DIR)
+  set(LIBFTD2XX_LIBRARIES
+    ${LIBFTD2XX_LIBRARY}
+	)
+
+  if (LIBFTD2XX_INCLUDE_DIRS AND LIBFTD2XX_LIBRARIES)
+    set(LIBFTD2XX_FOUND TRUE)
+  endif (LIBFTD2XX_INCLUDE_DIRS AND LIBFTD2XX_LIBRARIES)
+
+  if (LIBFTD2XX_FOUND)
+    if (NOT libftd2xx_FIND_QUIETLY)
+	  message(STATUS "Found libftd2xx: ${LIBFTD2XX_LIBRARIES}")
+    endif (NOT libftd2xx_FIND_QUIETLY)
+  else (LIBFTD2XX_FOUND)
+    if (libftd2xx_FIND_REQUIRED)
+	  message(FATAL_ERROR "Could not find libftd2xx")
+    endif (libftd2xx_FIND_REQUIRED)
+  endif (LIBFTD2XX_FOUND)
+
+  # show the LIBFTD2XX_INCLUDE_DIRS and LIBFTD2XX_LIBRARIES variables only in the advanced view
+  mark_as_advanced(LIBFTD2XX_INCLUDE_DIRS LIBFTD2XX_LIBRARIES)
+
+endif (LIBFTD2XX_LIBRARIES AND LIBFTD2XX_INCLUDE_DIRS)

cmake/modules/FindFtd4222.cmake

@@ -0,0 +1,75 @@
+# - Try to find LIBFT4222
+# Once done this will define
+#
+#  LIBFT4222_FOUND - system has LIBFT4222
+#  LIBFT4222_INCLUDE_DIRS - the LIBFT4222 include directory
+#  LIBFT4222_LIBRARIES - Link these to use LIBFT4222
+#  LIBFT4222_DEFINITIONS - Compiler switches required for using LIBFT4222
+#
+#  Adapted from cmake-modules Google Code project
+#
+#  Copyright (c) 2006 Andreas Schneider <mail@cynapses.org>
+#
+#  (Changes for LIBFTD2XX) Copyright (c) 2008 Kyle Machulis <kyle@nonpolynomial.com>
+#  (Changes for LIBFT4222) Henry Bruce <henry.bruce@intel.com> Copyright (c) 2015 Intel Corporation. 
+#
+# Redistribution and use is allowed according to the terms of the New BSD license.
+# For details see the accompanying COPYING-CMAKE-SCRIPTS file.
+
+if (LIBFT4222_LIBRARIES AND LIBFT4222_INCLUDE_DIRS)
+  # in cache already
+  set(LIBFT4222_FOUND TRUE)
+else (LIBFT4222_LIBRARIES AND LIBFT4222_INCLUDE_DIRS)
+  find_path(LIBFT4222_INCLUDE_DIR
+    NAMES
+    libft4222.h
+    PATHS
+    /usr/include
+    /usr/local/include
+    /opt/local/include
+    /sw/include
+	)
+
+  SET(FTD4222_LIBNAME ft4222)
+  IF(WIN32)
+	SET(FTD4222_LIBNAME LibFT4222.lib)
+  ENDIF(WIN32)
+
+  find_library(LIBFT4222_LIBRARY
+    NAMES
+    ${FTD4222_LIBNAME}
+    PATHS
+    /usr/lib
+    /usr/local/lib
+    /opt/local/lib
+    /sw/lib
+	)
+
+  if(LIBFT4222_INCLUDE_DIR)
+	set(LIBFT4222_INCLUDE_DIRS
+      ${LIBFT4222_INCLUDE_DIR}
+	  )
+  endif(LIBFT4222_INCLUDE_DIR)
+  set(LIBFT4222_LIBRARIES
+    ${LIBFT4222_LIBRARY}
+	)
+
+  if (LIBFT4222_INCLUDE_DIRS AND LIBFT4222_LIBRARIES)
+    set(LIBFT4222_FOUND TRUE)
+  endif (LIBFT4222_INCLUDE_DIRS AND LIBFT4222_LIBRARIES)
+
+  if (LIBFT4222_FOUND)
+    if (NOT LIBFT4222_FIND_QUIETLY)
+	  message(STATUS "Found LIBFT4222: ${LIBFT4222_LIBRARIES}")
+    endif (NOT LIBFT4222_FIND_QUIETLY)
+  else (LIBFT4222_FOUND)
+    if (LIBFT4222_FIND_REQUIRED)
+	  message(FATAL_ERROR "Could not find LIBFT4222")
+    endif (LIBFT4222_FIND_REQUIRED)
+  endif (LIBFT4222_FOUND)
+
+  # show the LIBFT4222_INCLUDE_DIRS and LIBFT4222_LIBRARIES variables only in the advanced view
+  mark_as_advanced(LIBFT4222_INCLUDE_DIRS LIBFT4222_LIBRARIES)
+
+endif (LIBFT4222_LIBRARIES AND LIBFT4222_INCLUDE_DIRS)
+

cmake/modules/FindJSON-C.cmake

@@ -0,0 +1,21 @@
+# JSON-C_FOUND - true if library and headers were found
+# JSON-C_INCLUDE_DIRS - include directories
+# JSON-C_LIBRARIES - library directories
+
+find_package (PkgConfig)
+pkg_search_module (PC_JSON-C QUIET json-c json)
+
+find_path (JSON-C_INCLUDE_DIR json.h HINTS ${PC_JSON-C_INCLUDEDIR}
+${PC_JSON-C_INCLUDE_DIRS} PATH_SUFFIXES json-c json)
+
+find_library (JSON-C_LIBRARY NAMES json-c libjson-c HINTS ${PC_JSON-C_LIBDIR}
+${PC_JSON-C_LIBRARY_DIRS})
+
+set (JSON-C_LIBRARIES ${JSON-C_LIBRARY})
+set (JSON-C_INCLUDE_DIRS ${JSON-C_INCLUDE_DIR})
+
+include (FindPackageHandleStandardArgs)
+
+find_package_handle_standard_args (JSON-C DEFAULT_MSG JSON-C_LIBRARY JSON-C_INCLUDE_DIR)
+
+mark_as_advanced (JSON-C_INCLUDE_DIR JSON-C_LIBRARY)

cmake/modules/FindNodejs.cmake

@@ -0,0 +1,97 @@
+ # Macro to add directory to NODEJS_INCLUDE_DIRS if it exists and is not /usr/include
+ macro(add_include_dir dir)
+    if (IS_DIRECTORY ${dir} AND NOT ${dir} STREQUAL "/usr/include")
+      set(NODEJS_INCLUDE_DIRS ${NODEJS_INCLUDE_DIRS} ${dir})
+    endif()
+endmacro()
+
+
+find_program (NODEJS_EXECUTABLE NAMES node nodejs
+    HINTS
+    $ENV{NODE_DIR}
+    PATH_SUFFIXES bin
+    DOC "Node.js interpreter"
+)
+
+include (FindPackageHandleStandardArgs)
+
+# If compat-libuv package exists, it must be at start of include path
+find_path (UV_ROOT_DIR "uv.h" PATHS /usr/include/compat-libuv010 NO_DEFAULT_PATH)
+if (UV_ROOT_DIR)
+  # set (NODEJS_INCLUDE_DIRS ${UV_ROOT_DIR})
+  add_include_dir(${UV_ROOT_DIR})
+endif()
+
+# Now look for node. Flag an error if not found
+find_path (NODE_ROOT_DIR "include/node/node.h" "include/src/node.h" "src/node.h"
+  PATHS /usr/include/nodejs /usr/local/include/nodejs /usr/local/include)
+if (NODE_ROOT_DIR)
+  add_include_dir(${NODE_ROOT_DIR}/include/src)
+  add_include_dir(${NODE_ROOT_DIR}/src)
+  add_include_dir(${NODE_ROOT_DIR}/include/node)
+  add_include_dir(${NODE_ROOT_DIR}/include/deps/v8/include)
+  add_include_dir(${NODE_ROOT_DIR}/deps/v8/include)
+  add_include_dir(${NODE_ROOT_DIR}/include/deps/uv/include)
+  add_include_dir(${NODE_ROOT_DIR}/deps/uv/include)
+else()
+  unset(NODEJS_INCLUDE_DIRS)
+  message(ERROR " - node.h not found")
+endif()
+
+# Check that v8.h is in NODEJS_INCLUDE_DIRS
+find_path (V8_ROOT_DIR "v8.h" PATHS ${NODEJS_INCLUDE_DIRS})
+if (NOT V8_ROOT_DIR)
+  unset(NODEJS_INCLUDE_DIRS)
+  message(ERROR " - v8.h not found")
+endif()
+
+# Check that uv.h is in NODEJS_INCLUDE_DIRS
+find_path (UV_ROOT_DIR "uv.h" PATHS ${NODEJS_INCLUDE_DIRS})
+if (NOT UV_ROOT_DIR)
+  unset(NODEJS_INCLUDE_DIRS)
+  message(ERROR " - uv.h not found")
+endif()
+
+find_package_handle_standard_args (Nodejs DEFAULT_MSG
+    NODEJS_EXECUTABLE
+    NODEJS_INCLUDE_DIRS
+)
+
+if (NODEJS_EXECUTABLE)
+    execute_process(COMMAND ${NODEJS_EXECUTABLE} --version
+                    OUTPUT_VARIABLE _VERSION
+                    RESULT_VARIABLE _NODE_VERSION_RESULT)
+    execute_process(COMMAND ${NODEJS_EXECUTABLE} -e "console.log(process.versions.v8)"
+                    OUTPUT_VARIABLE _V8_VERSION
+                    RESULT_VARIABLE _V8_RESULT)
+    if (NOT _NODE_VERSION_RESULT AND NOT _V8_RESULT)
+        string (REPLACE "v" "" NODE_VERSION_STRING "${_VERSION}")
+        string (REPLACE "." ";" _VERSION_LIST "${NODE_VERSION_STRING}")
+        list (GET _VERSION_LIST 0 NODE_VERSION_MAJOR)
+        list (GET _VERSION_LIST 1 NODE_VERSION_MINOR)
+        list (GET _VERSION_LIST 2 NODE_VERSION_PATCH)
+        set (V8_VERSION_STRING ${_V8_VERSION})
+        string (REPLACE "." ";" _V8_VERSION_LIST "${_V8_VERSION}")
+        list (GET _V8_VERSION_LIST 0 V8_VERSION_MAJOR)
+        list (GET _V8_VERSION_LIST 1 V8_VERSION_MINOR)
+        list (GET _V8_VERSION_LIST 2 V8_VERSION_PATCH)
+        # we end up with a nasty newline so strip everything that isn't a number
+        string (REGEX MATCH "^[0-9]*" V8_VERSION_PATCH ${V8_VERSION_PATCH})
+    else ()
+        set (NODE_VERSION_STRING "0.10.30")
+        set (NODE_VERSION_MAJOR "0")
+        set (NODE_VERSION_MINOR "10")
+        set (NODE_VERSION_PATCH "30")
+        set (V8_VERSION_MAJOR "3")
+        set (V8_VERSION_MINOR"14")
+        set (V8_VERSION_PATCH "5")
+        set (V8_VERSION_STRING "3.28.72")
+        message ("defaulted to node 0.10.30")
+    endif ()
+    string (REGEX REPLACE "\n" "" NODE_VERSION_STRING ${NODE_VERSION_STRING})
+    string (REGEX REPLACE "\n" "" V8_VERSION_STRING ${V8_VERSION_STRING})
+    message ("INFO - Node version is " ${NODE_VERSION_STRING})
+    message ("INFO - Node using v8 " ${V8_VERSION_STRING})
+    mark_as_advanced (NODEJS_EXECUTABLE)
+endif ()
+

cmake/modules/FindUDEV.cmake

@@ -0,0 +1,21 @@
+# UDEV_FOUND - true if library and headers were found
+# UDEV_INCLUDE_DIRS - include directories
+# UDEV_LIBRARIES - library directories
+
+find_package (PkgConfig)
+pkg_check_modules (PC_UDEV QUIET udev)
+
+find_path (UDEV_INCLUDE_DIR libudev.h HINTS ${PC_UDEV_INCLUDEDIR}
+${PC_UDEV_INCLUDE_DIRS} PATH_SUFFIXES udev)
+
+find_library (UDEV_LIBRARY NAMES udev libudev HINTS ${PC_UDEV_LIBDIR}
+${PC_UDEV_LIBRARY_DIRS})
+
+set (UDEV_LIBRARIES ${UDEV_LIBRARY})
+set (UDEV_INCLUDE_DIRS ${UDEV_INCLUDE_DIR})
+
+include (FindPackageHandleStandardArgs)
+
+find_package_handle_standard_args (UDEV DEFAULT_MSG UDEV_LIBRARY UDEV_INCLUDE_DIR)
+
+mark_as_advanced (UDEV_INCLUDE_DIR UDEV_LIBRARY)

cmake/modules/FindYuidoc.cmake

@@ -0,0 +1,21 @@
+find_program (YUIDOC_EXECUTABLE NAMES yuidoc
+  HINTS $ENV{YUIDOC_DIR}
+    PATHS usr usr/local
+  PATH_SUFFIXES bin
+  DOC "Yuidoc documentation generator"
+)
+
+include (FindPackageHandleStandardArgs)
+
+find_package_handle_standard_args (Yuidoc DEFAULT_MSG
+  YUIDOC_EXECUTABLE
+)
+
+# Get Yuidoc version
+if (YUIDOC_EXECUTABLE)
+  execute_process(COMMAND ${YUIDOC_EXECUTABLE} --version
+                  ERROR_VARIABLE YUIDOC_VERSION)
+  message ("INFO - Yuidoc version is " ${YUIDOC_VERSION})
+endif ()
+
+mark_as_advanced (YUIDOC_EXECUTABLE)

cmake/modules/LICENSE.LGPL

@@ -0,0 +1,504 @@
+		  GNU LESSER GENERAL PUBLIC LICENSE
+		       Version 2.1, February 1999
+
+ Copyright (C) 1991, 1999 Free Software Foundation, Inc.
+ 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+[This is the first released version of the Lesser GPL.  It also counts
+ as the successor of the GNU Library Public License, version 2, hence
+ the version number 2.1.]
+
+			    Preamble
+
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+Licenses are intended to guarantee your freedom to share and change
+free software--to make sure the software is free for all its users.
+
+  This license, the Lesser General Public License, applies to some
+specially designated software packages--typically libraries--of the
+Free Software Foundation and other authors who decide to use it.  You
+can use it too, but we suggest you first think carefully about whether
+this license or the ordinary General Public License is the better
+strategy to use in any particular case, based on the explanations below.
+
+  When we speak of free software, we are referring to freedom of use,
+not price.  Our General Public Licenses are designed to make sure that
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+it if you want it; that you can change the software and use pieces of
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+
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+
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+
+  We protect your rights with a two-step method: (1) we copyright the
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+
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+modified by someone else and passed on, the recipients should know
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+
+  Finally, software patents pose a constant threat to the existence of
+any free program.  We wish to make sure that a company cannot
+effectively restrict the users of a free program by obtaining a
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+  Most GNU software, including some libraries, is covered by the
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+General Public License, applies to certain designated libraries, and
+is quite different from the ordinary General Public License.  We use
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+libraries into non-free programs.
+
+  When a program is linked with a library, whether statically or using
+a shared library, the combination of the two is legally speaking a
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+Public License permits more lax criteria for linking other code with
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+
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+
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+
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+
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+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
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+EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR
+OTHER PARTIES PROVIDE THE LIBRARY "AS IS" WITHOUT WARRANTY OF ANY
+KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+PURPOSE.  THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE
+LIBRARY IS WITH YOU.  SHOULD THE LIBRARY PROVE DEFECTIVE, YOU ASSUME
+THE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION.
+
+  16. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN
+WRITING WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY
+AND/OR REDISTRIBUTE THE LIBRARY AS PERMITTED ABOVE, BE LIABLE TO YOU
+FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR
+CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE
+LIBRARY (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA BEING
+RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A
+FAILURE OF THE LIBRARY TO OPERATE WITH ANY OTHER SOFTWARE), EVEN IF
+SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+DAMAGES.
+
+		     END OF TERMS AND CONDITIONS
+
+           How to Apply These Terms to Your New Libraries
+
+  If you develop a new library, and you want it to be of the greatest
+possible use to the public, we recommend making it free software that
+everyone can redistribute and change.  You can do so by permitting
+redistribution under these terms (or, alternatively, under the terms of the
+ordinary General Public License).
+
+  To apply these terms, attach the following notices to the library.  It is
+safest to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least the
+"copyright" line and a pointer to where the full notice is found.
+
+    <one line to give the library's name and a brief idea of what it does.>
+    Copyright (C) <year>  <name of author>
+
+    This library is free software; you can redistribute it and/or
+    modify it under the terms of the GNU Lesser General Public
+    License as published by the Free Software Foundation; either
+    version 2.1 of the License, or (at your option) any later version.
+
+    This library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Lesser General Public License for more details.
+
+    You should have received a copy of the GNU Lesser General Public
+    License along with this library; if not, write to the Free Software
+    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
+
+Also add information on how to contact you by electronic and paper mail.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the library, if
+necessary.  Here is a sample; alter the names:
+
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the
+  library `Frob' (a library for tweaking knobs) written by James Random Hacker.
+
+  <signature of Ty Coon>, 1 April 1990
+  Ty Coon, President of Vice
+
+That's all there is to it!
+
+

cmake/modules/OpenCVDetectPython.cmake

@@ -0,0 +1,160 @@
+# Find specified Python version
+# Arguments:
+#   preferred_version (value): Version to check for first
+#   min_version (value): Minimum supported version
+#   library_env (value): Name of Python library ENV variable to check
+#   include_dir_env (value): Name of Python include directory ENV variable to check
+#   found (variable): Set if interpreter found
+#   executable (variable): Output of executable found
+#   version_string (variable): Output of found version
+#   version_major (variable): Output of found major version
+#   version_minor (variable): Output of found minor version
+#   libs_found (variable): Set if libs found
+#   libs_version_string (variable): Output of found libs version
+#   libraries (variable): Output of found Python libraries
+#   library (variable): Output of found Python library
+#   debug_libraries (variable): Output of found Python debug libraries
+#   debug_library (variable): Output of found Python debug library
+#   include_path (variable): Output of found Python include path
+#   include_dir (variable): Output of found Python include dir
+#   include_dir2 (variable): Output of found Python include dir2
+#   packages_path (variable): Output of found Python packages path
+function(find_python preferred_version min_version library_env include_dir_env
+         found executable version_string version_major version_minor
+         libs_found libs_version_string libraries library debug_libraries
+         debug_library include_path include_dir include_dir2 packages_path)
+if(NOT ${found})
+  if(${executable})
+    set(PYTHON_EXECUTABLE "${${executable}}")
+  endif()
+
+  find_package(PythonInterp "${preferred_version}")
+  if(NOT PYTHONINTERP_FOUND)
+    find_package(PythonInterp "${min_version}")
+  endif()
+
+  if(PYTHONINTERP_FOUND)
+    # Copy outputs
+    set(_found ${PYTHONINTERP_FOUND})
+    set(_executable ${PYTHON_EXECUTABLE})
+    set(_version_string ${PYTHON_VERSION_STRING})
+    set(_version_major ${PYTHON_VERSION_MAJOR})
+    set(_version_minor ${PYTHON_VERSION_MINOR})
+    set(_version_patch ${PYTHON_VERSION_PATCH})
+
+    # Clear find_host_package side effects
+    unset(PYTHONINTERP_FOUND)
+    unset(PYTHON_EXECUTABLE CACHE)
+    unset(PYTHON_VERSION_STRING)
+    unset(PYTHON_VERSION_MAJOR)
+    unset(PYTHON_VERSION_MINOR)
+    unset(PYTHON_VERSION_PATCH)
+  endif()
+
+  if(_found)
+    set(_version_major_minor "${_version_major}.${_version_minor}")
+
+    if(NOT ANDROID AND NOT APPLE_FRAMEWORK)
+      # not using _version_string here, because it might not conform to the CMake version format
+      if(CMAKE_CROSSCOMPILING)
+        # builder version can differ from target, matching base version (e.g. 2.7)
+        find_package(PythonLibs "${_version_major_minor}")
+      else()
+        find_package(PythonLibs "${_version_major_minor}.${_version_patch}" EXACT)
+      endif()
+
+      if(PYTHONLIBS_FOUND)
+        # Copy outputs
+        set(_libs_found ${PYTHONLIBS_FOUND})
+        set(_libraries ${PYTHON_LIBRARIES})
+        set(_include_path ${PYTHON_INCLUDE_PATH})
+        set(_include_dirs ${PYTHON_INCLUDE_DIRS})
+        set(_debug_libraries ${PYTHON_DEBUG_LIBRARIES})
+        set(_libs_version_string ${PYTHONLIBS_VERSION_STRING})
+        set(_debug_library ${PYTHON_DEBUG_LIBRARY})
+        set(_library ${PYTHON_LIBRARY})
+        set(_library_debug ${PYTHON_LIBRARY_DEBUG})
+        set(_library_release ${PYTHON_LIBRARY_RELEASE})
+        set(_include_dir ${PYTHON_INCLUDE_DIR})
+        set(_include_dir2 ${PYTHON_INCLUDE_DIR2})
+
+        # Clear find_package side effects
+        unset(PYTHONLIBS_FOUND)
+        unset(PYTHON_LIBRARIES)
+        unset(PYTHON_INCLUDE_PATH)
+        unset(PYTHON_INCLUDE_DIRS)
+        unset(PYTHON_DEBUG_LIBRARIES)
+        unset(PYTHONLIBS_VERSION_STRING)
+        unset(PYTHON_DEBUG_LIBRARY CACHE)
+        unset(PYTHON_LIBRARY)
+        unset(PYTHON_LIBRARY_DEBUG)
+        unset(PYTHON_LIBRARY_RELEASE)
+        unset(PYTHON_LIBRARY CACHE)
+        unset(PYTHON_LIBRARY_DEBUG CACHE)
+        unset(PYTHON_LIBRARY_RELEASE CACHE)
+        unset(PYTHON_INCLUDE_DIR CACHE)
+        unset(PYTHON_INCLUDE_DIR2 CACHE)
+      endif()
+    endif()
+
+    execute_process(COMMAND ${_executable} -c "from distutils.sysconfig import *; print(get_python_lib())"
+                    RESULT_VARIABLE _cvpy_process
+                    OUTPUT_VARIABLE _std_packages_path
+                    OUTPUT_STRIP_TRAILING_WHITESPACE)
+    if("${_std_packages_path}" MATCHES "site-packages")
+      set(_packages_path "python${_version_major_minor}/site-packages")
+    else() #debian based assumed, install to the dist-packages.
+      set(_packages_path "python${_version_major_minor}/dist-packages")
+    endif()
+      if(EXISTS "${CMAKE_INSTALL_PREFIX}/lib${LIB_SUFFIX}/${${packages_path}}")
+        set(_packages_path "lib${LIB_SUFFIX}/${_packages_path}")
+      else()
+        set(_packages_path "lib/${_packages_path}")
+    endif()
+  endif()
+
+  # Export return values
+  set(${found} "${_found}" CACHE INTERNAL "")
+  set(${executable} "${_executable}" CACHE FILEPATH "Path to Python interpretor")
+  set(${version_string} "${_version_string}" CACHE INTERNAL "")
+  set(${version_major} "${_version_major}" CACHE INTERNAL "")
+  set(${version_minor} "${_version_minor}" CACHE INTERNAL "")
+  set(${libs_found} "${_libs_found}" CACHE INTERNAL "")
+  set(${libs_version_string} "${_libs_version_string}" CACHE INTERNAL "")
+  set(${libraries} "${_libraries}" CACHE INTERNAL "Python libraries")
+  set(${library} "${_library}" CACHE FILEPATH "Path to Python library")
+  set(${debug_libraries} "${_debug_libraries}" CACHE INTERNAL "")
+  set(${debug_library} "${_debug_library}" CACHE FILEPATH "Path to Python debug")
+  set(${include_path} "${_include_path}" CACHE INTERNAL "")
+  set(${include_dir} "${_include_dir}" CACHE PATH "Python include dir")
+  set(${include_dir2} "${_include_dir2}" CACHE PATH "Python include dir 2")
+  set(${packages_path} "${_packages_path}" CACHE PATH "Where to install the python packages.")
+endif()
+endfunction(find_python)
+
+set(MIN_VER_PYTHON2 2.7)
+set(MIN_VER_PYTHON3 3.2)
+
+find_python(2.7 "${MIN_VER_PYTHON2}" PYTHON2_LIBRARY PYTHON2_INCLUDE_DIR
+    PYTHON2INTERP_FOUND PYTHON2_EXECUTABLE PYTHON2_VERSION_STRING
+    PYTHON2_VERSION_MAJOR PYTHON2_VERSION_MINOR PYTHON2LIBS_FOUND
+    PYTHON2LIBS_VERSION_STRING PYTHON2_LIBRARIES PYTHON2_LIBRARY
+    PYTHON2_DEBUG_LIBRARIES PYTHON2_LIBRARY_DEBUG PYTHON2_INCLUDE_PATH
+    PYTHON2_INCLUDE_DIR PYTHON2_INCLUDE_DIR2 PYTHON2_PACKAGES_PATH)
+
+find_python(3 "${MIN_VER_PYTHON3}" PYTHON3_LIBRARY PYTHON3_INCLUDE_DIR
+    PYTHON3INTERP_FOUND PYTHON3_EXECUTABLE PYTHON3_VERSION_STRING
+    PYTHON3_VERSION_MAJOR PYTHON3_VERSION_MINOR PYTHON3LIBS_FOUND
+    PYTHON3LIBS_VERSION_STRING PYTHON3_LIBRARIES PYTHON3_LIBRARY
+    PYTHON3_DEBUG_LIBRARIES PYTHON3_LIBRARY_DEBUG PYTHON3_INCLUDE_PATH
+    PYTHON3_INCLUDE_DIR PYTHON3_INCLUDE_DIR2 PYTHON3_PACKAGES_PATH)
+
+if(PYTHON_DEFAULT_EXECUTABLE)
+    set(PYTHON_DEFAULT_AVAILABLE "TRUE")
+elseif(PYTHON2INTERP_FOUND) # Use Python 2 as default Python interpreter
+    set(PYTHON_DEFAULT_AVAILABLE "TRUE")
+    set(PYTHON_DEFAULT_EXECUTABLE "${PYTHON2_EXECUTABLE}")
+elseif(PYTHON3INTERP_FOUND) # Use Python 2 as fallback Python interpreter (if there is no Python 2)
+    set(PYTHON_DEFAULT_AVAILABLE "TRUE")
+    set(PYTHON_DEFAULT_EXECUTABLE "${PYTHON3_EXECUTABLE}")
+endif()

cmake/modules/TargetArch.cmake

@@ -2,11 +2,20 @@
 # https://qt.gitorious.org/qt/qtbase/blobs/master/src/corelib/global/qprocessordetection.h
 # Currently handles arm (v5, v6, v7), x86 (32/64), ia64, and ppc (32/64)
 
+# This file is under the terms of the GNU Lesser General Public License version
+# 2.1 as published by the Free Software Foundation and appearing in the file
+# LICENSE.LGPL included in the packaging of this file. Please review the
+# following information to ensure the GNU Lesser General Public License version
+# 2.1 requirements will be met:
+# http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
+
 # Regarding POWER/PowerPC, just as is noted in the Qt source,
 # "There are many more known variants/revisions that we do not handle/detect."
 
 set(archdetect_c_code "
-#if defined(__arm__) || defined(__TARGET_ARCH_ARM)
+#if defined(__aarch64__)
+        #error cmake_ARCH armv8
+#elif defined(__arm__) || defined(__TARGET_ARCH_ARM)
     #if defined(__ARM_ARCH_7__) \\
         || defined(__ARM_ARCH_7A__) \\
         || defined(__ARM_ARCH_7R__) \\

docs/96boards.md

@@ -0,0 +1,56 @@
+96Boards Development Platform    {#96boards}
+=============================
+
+96Boards is a range of hardware specifications created by Linaro to make the latest ARM-based processors available to developers at a reasonable cost. The specifications are open and define a standard board layout for SoC-agnostic (processor independent)  development platforms that can be used by software application, hardware device, kernel and other system software developers. Boards produced to the 96Boards specifications are suitable for rapid prototyping, hobbyist projects or incorporation into new systems for a wide range of applications including desktop and laptop computing, the digital home, digital signage, point of sale (POS), high-end audio, robotics and drones, artificial intelligence, virtual reality, IoT and industrial control. 
+
+Standardized expansion buses for peripheral I/O have led to a wide range of compatible add-on mezzanine boards  that will work across a variety of 96Boards products. Users have access to a wide range of boards with different features at various price points. In addition, some SoC vendors have announced long term availability of the SoC to encourage their use in products with long life cycles.
+
+Board Support
+-------------
+
+- [DragonBoard 410c](http://www.96boards.org/product/dragonboard410c/)
+- [HiKey](http://www.96boards.org/product/hikey/)
+- [Bubblegum-96](http://www.96boards.org/product/bubblegum-96/)
+
+Interface notes
+---------------
+
+- **GPIO**: Pin 28 / GPIO-F is a Multi-Purpose pin
+- **UART**: UART1 can be used for serial access
+
+Pin Mapping
+-----------
+
+Pin mapping table shows signals pertaining to 40-pin low speed expansion header based on [96Boards Consumer Edition Specification](https://github.com/96boards/documentation/blob/master/Specifications/96Boards-CE-Specification.pdf).
+
+|  96Boards Signals |  PIN  |  PIN  |  96Boards Signals  |
+|:------------------|:------|------:|:-------------------|
+|     GND           |   1   |   2   |    GND             |
+|     UART0_CTS     |   3   |   4   |    PWR_BTN_N       |
+|     UART0_TxD     |   5   |   6   |    RST_BTN_N       |
+|     UART0_RxD     |   7   |   8   |    SPI0_SCLK       |
+|     UART1_RTS     |   9   |   10  |    SPI0_DIN        |
+|     UART1_TxD     |   11  |   12  |    SPI0_CS         |
+|     UART1_RxD     |   13  |   14  |    SPI0_DOUT       |
+|     I2C0_SCL      |   15  |   16  |    PCM_FS          |
+|     I2C0_SDA      |   17  |   18  |    PCM_CLK         |
+|     I2C1_SCL      |   19  |   20  |    PCM_DO          |
+|     I2C1_SDA      |   21  |   22  |    PCM_DI          |
+|     GPIO-A        |   23  |   24  |    GPIO-B          |
+|     GPIO-C        |   25  |   26  |    GPIO-D          |
+|     GPIO-E        |   27  |   28  |    GPIO-F          |
+|     GPIO-G        |   29  |   30  |    GPIO-H          |
+|     GPIO-I        |   31  |   32  |    GPIO-J          |
+|     GPIO-K        |   33  |   34  |    GPIO-L          |
+|     +1V8          |   35  |   36  |    SYS_DCIN        |
+|     +5V           |   37  |   38  |    SYC_DCIN        |
+|     GND           |   39  |   40  |    GND             |
+
+Resources
+---------
+
+The following links will take you to addition 96Boards resources
+
+- [Website](http://www.96boards.org/)
+- [Forums](https://discuss.96boards.org/)
+- [Documentation Repo](https://github.com/96boards/documentation)

docs/banana_pi.md

@@ -0,0 +1,87 @@
+Banana Pi/Pro    {#bananapi}
+============
+
+The Banana Pi/Pro is a clone of the well known Raspberry Pi. It has advantages
+compared to the 'old' Raspberry Pi A/B/A+/B+ devices as it is based on the
+Allwinner A20 Dual Core Cortex-A7. It also has 1G Ethernet compared to 100M
+Ethernet on the Raspberry.
+
+There is a lot of effort on Mainline Kernel to fully support the Allwinner
+Chips, for example Fedora 22 Arm will come with support for BananaPi/Pro which
+means that you will be able to have HDMI Output and a number of periperal
+modules work out of the box.
+
+Pin-wise the Banana Pi matches the Raspberry Pi, the Banana Pro has a connector
+similar to the Raspberry Pi A+/B+
+
+Revision Support
+----------------
+Banana Pi
+Banana Pro
+
+Interface notes
+---------------
+
+**PWM** Whilst the Banana Pi is meant to have 1 PWM channel this is currently
+not supported.
+
+**SPI** works fine when used with old 3.4 Kernels provided by Lemaker, on
+Mainline Kernel SPI does currently not work
+
+**COM** I have created devicetree patches so that Mainline Kernel supports all
+COM-Interfaces, this is not yet visible in Kernel
+
+Mainline Kernel requires the use of Device-Trees, mraa tries it's best to guess
+which gpio/serial/i2c/spi is connected where but there is currently no support
+to manipulate the Device-Tree settings from within mraa. If a device does not
+work as expected then please check syslog, mraa usually complains with a
+meaningful message when it is unable to initialize the device.
+
+Pin Mapping
+-----------
+
+This pin mapping refers to the Banana Pi but gives an idea
+as to what the values are from mraa. Note that there is an emum to use wiringPi
+style numbers.
+
+| MRAA Number | Physical Pin | Function  |
+|-------------|--------------|-----------|
+| 1           | P1-01        | 3V3 VCC   |
+| 2           | P1-02        | 5V VCC    |
+| 3           | P1-03        | I2C SDA   |
+| 4           | P1-04        | 5V VCC    |
+| 5           | P1-05        | I2C SCL   |
+| 6           | P1-06        | GND       |
+| 7           | P1-07        | GPIO(PI03)|
+| 8           | P1-08        | UART4 TX  |
+| 9           | P1-09        | GND       |
+| 10          | P1-10        | UART4 RX  |
+| 11          | P1-11        | GPIO(PI19)|
+| 12          | P1-12        | GPIO(PH02)|
+| 13          | P1-13        | GPIO(PI18)|
+| 14          | P1-14        | GND       |
+| 15          | P1-15        | GPIO(PI17)|
+| 16          | P1-16        | GPIO(PH20)|
+| 17          | P1-17        | 3V3 VCC   |
+| 18          | P1-18        | GPIO(PH21)|
+| 19          | P1-19        | SPI MOSI  |
+| 20          | P1-20        | GND       |
+| 21          | P1-21        | SPI MISO  |
+| 22          | P1-22        | GPIO(PI16)|
+| 23          | P1-23        | SPI SCL   |
+| 24          | P1-24        | SPI CS0   |
+| 25          | P1-25        | GND       |
+| 26          | P1-26        | SPI CS1   |
+
+There is also a second 8-pin connector on the Banana Pi, the pins are as follows:
+
+| MRAA Number | Physical Pin | Function  |
+|-------------|--------------|-----------|
+| 27          | P1-19        | 5V VCC    |
+| 28          | P1-20        | 3V3 VCC   |
+| 29          | P1-21        | GPIO(PH5) |
+| 30          | P1-22        | GPIO(PI22)|
+| 31          | P1-23        | GPIO(PH03)|
+| 32          | P1-24        | GPIO(PI20)|
+| 33          | P1-25        | GND       |
+| 34          | P1-26        | GND       |

docs/beaglebone.md

@@ -0,0 +1,74 @@
+Beaglebone Black    {#beaglebone}
+================
+
+The Beaglebone Black is a very maker friendly Board with a huge amount of
+available I/O Pins. It consists of an Cortex-A8 single core CPU plus two
+additional microcontroller cores called 'pru' that can be used for realtime
+tasks.
+
+The official Beaglebone Black Image runs Debian on a 3.8.13 Kernel. But there
+are also mainline kernels available, either from Robert C. Nelson or also as
+part of the upcoming Fedora 22 release.
+
+The kernel releases from Robert C. Nelson have usually more complete support as
+not all code is yet commited to mainline kernel, your mileage may vary!
+
+In Kernel 3.8.13 there is a Capemanager included, a mechanism to load
+configuration data for devices and extension boards from userland.
+
+This mechanism does not (yet) exist in Mainline kernels, so for mainline
+kernels you need to either rely on the pre-delivered devicetree's or you will
+need to build your own devicetree to support hardware not available by default.
+
+Revision Support
+----------------
+Beaglebone Black Rev. B
+Beaglebone Black Rev. C
+
+Interface notes
+---------------
+
+**SPI** works fine with 3.8.13 kernels, on Mainline Kernel SPI does currently
+not work. mraa will activate spi on 3.8.13 if it finds out that spi is not yet
+configured
+
+**I2C** works both on 3.8.13 and mainline. i2c is activated if missing for
+3.8.13 kernels
+
+Mainline Kernel requires the use of Device-Trees, mraa tries it's best to guess
+which gpio/serial/i2c/spi is connected where but there is currently no support
+to manipulate the Device-Tree settings from within mraa.  If a device does not
+work as expected then please check syslog, mraa usually complains with a
+meaningful message when it is unable to initialize the device.
+
+It will also tell you which overlay for SPI/COM/I2C/PWM it tries to load, on
+some older Debian distributions (or heaven forbid, on Angström) you may need to
+install thoses overlays to /lib/firmware
+
+Capes and further documentation
+-------------------------------
+
+Correctly configuring i2c/spi/serial can get a little challenging as some pins
+have double functionality or are not available at all because hdmi is enabled.
+When something does not work as expected make sure to first check the syslog,
+then check the Beaglebone documentation. Some pointers for good descriptions
+are:
+
+http://elinux.org/BeagleBone_Black_Enable_SPIDEV
+http://elinux.org/Interfacing_with_I2C_Devices
+
+When working with mainline kernels take every hit you have on google with a
+grain of salt, a lot of documentation is based on 3.8 and older kernels. Using
+mainline kernels can be very rewarding, but at least at time of writing also
+can have some nasty
+pitfalls.
+
+Pin Mapping
+-----------
+
+mraa will take into account if you have hdmi cape or mmc enabled and will show
+you the gpio's available for your given configuration.
+
+To see the pin mapping use the command:
+
+$ sudo mraa-gpio list

docs/building.md

@@ -1,13 +1,33 @@
 Building libmraa                         {#building}
 ===============
+libmraa uses cmake in order to make compilation relatively painless. CMake runs
+build out of tree so the recommended way is to clone from git and make a `build/`
+directory inside the clone directory.
 
-libmraa uses cmake in order to make compilation relatively painless. Cmake runs
-build out of tree so the recommended way is to clone from git and make a build/ directory.
+For building imraa check [building imraa](./imraa.md)
+## Build dependencies
+Not all these are required but if you're unsure of what you're doing this is
+what you'll need:
+* [SWIG](http://swig.org) 3.0.5+
+* [git](http://git-scm.com)
+* [python](http://python.org) 2.7 or 3.4+ (you'll need not just the interpreter but python-dev)
+* [node.js](http://nodejs.org) 4.x recommended (you'll need not just the interpreter but nodejs-dev)
+* [CMake](http://cmake.org) 2.8.8+ (3.1+ is recommended for node.js version 2+)
+* [json-c](https://github.com/json-c/json-c) 0.12+ (0.10+ probably works in reality)
 
-You'll need swig version 3.0.1+, currently I'm using
-8d226e39dc7a958013ff9ffd15e231ef206ba265 from the swig master branch. This is
-only required for javascript support and can be disabled with a cmake define
-(see below).
+For Debian-like distros the below command installs the basic set:
+
+```bash
+sudo apt-get install git build-essential swig3.0 python-dev nodejs-dev cmake libjson-c-dev
+```
+
+To build the documentation you'll also need:
+* [Doxygen](http://www.stack.nl/~dimitri/doxygen/) 1.8.9.1+
+* [Graphviz](http://graphviz.org/) 2+ (For Doxygen graph generation)
+* [Sphinx](http://sphinx-doc.org/) 1.1.3+ (For Python docs)
+
+
+## Basic build steps
 
 ~~~~~~~~~~~~~{.sh}
 mkdir build
@@ -16,19 +36,166 @@ cmake ..
 make
 ~~~~~~~~~~~~~
 
-Our cmake configure has a number of options, `cmake -i` will ask you all sorts
-of interesting questions, you can disable swig modules, build documentation
-etc...
+If this goes wrong and you have all the dependencies installed, then please
+file an issue with the full output of `cmake ..` and `make` or however far you
+got.
 
-Few recommended options:
-Changing install path from /usr/local to /usr
--DCMAKE_INSTALL_PREFIX:PATH=/usr
+After that you can install built files (into default path) by running:
 
-Building debug build:
--DCMAKE_BUILD_TYPE=DEBUG
 
-Using clang instead of gcc:
- -DCMAKE_C_COMPILER=/usr/bin/clang -DCMAKE_CXX_COMPILER=/usr/bin/clang
+```bash
+sudo make install
+```
 
-Building with an older version of swig (swig 2.0+) requires the disabling of javascript:
- -DBUILDSWIGNODE=OFF
+See flags for adjusting install paths in the section below.
+
+Currently our install logic puts Python bindings into standard paths, which
+do not work on Debian due to their
+ [policy](http://www.debian.org/doc/packaging-manuals/python-policy/ch-python.html#s-paths).
+
+We are working on a permanent solution, in the meantime please use this command
+after `make install` to link installed modules where Debian's Python expects
+them:
+
+```bash
+sudo ln -s <your install prefix, e.g. /usr>/lib/python2.7/site-packages/* /usr/lib/python2.7/dist-packages
+```
+
+Same approach works for Python 3, you'll just need to adjust the version number
+in the path accordingly.
+
+## Configuration flags
+
+Our CMake configuration has a number of options, `cmake-gui` or `ccmake` (`cmake -i` is
+no longer with us :() can show you all the options. A few of the more common
+ones are listed below. Note that when the option starts with `CMAKE_` it's an
+option that is made available by CMake and will be similar in all CMake
+projects. You need to add them after `cmake` but before `..`
+
+A few recommended options:
+
+Changing install path from `/usr/local` to `/usr`:
+ `-DCMAKE_INSTALL_PREFIX:PATH=/usr`
+
+Building debug build - adds `-g` and disables optimisations - this will force a
+full rebuild:
+ `-DCMAKE_BUILD_TYPE=DEBUG`
+
+Using `clang` instead of `gcc`:
+ `-DCMAKE_C_COMPILER=/usr/bin/clang -DCMAKE_CXX_COMPILER=/usr/bin/clang++`
+
+Building with an older version of SWIG (< 3.0.2) requires the disabling of JavaScript:
+ `-DBUILDSWIGNODE=OFF`
+
+Disabling Python module building:
+ `-DBUILDSWIGPYTHON=OFF`
+
+Building doc, this will require [SPHINX](http://sphinx-doc.org) &
+[Doxygen](http://doxygen.org):
+ `-DBUILDDOC=ON`
+You will also require clone git submodules from your existing checkout:
+ `git submodule update --init --recursive`
+The from doxygen2jsdoc dir:
+ `npm install mkdirp commander lodash bluebird pegjs`
+
+Override build architecture (this is useful because on x86 ARM code is not
+compiled so use this flag to force the target arch)
+ `-DBUILDARCH=arm`
+
+You can also enable -Wall for gcc before running cmake by exporting your wanted
+CC flags to the CC env var
+  `export CC="gcc -Wall"`
+
+Sometimes it's nice to build a static libary, on Linux systems just set
+   `-DBUILD_SHARED_LIBS=OFF`
+
+## Dependencies continued
+
+You'll need at least SWIG version 3.0.2 and we recommend 3.0.5 to build the
+JavaScript & Python modules. If your version of SWIG is older than this then
+please see above for disabling `SWIGNODE`. Otherwise you will get a weird build
+failure when building the JavaScript module. The Python module builds with SWIG
+2.x but we don't test it.
+
+During the build, we'll assume you're building from git, note that if you
+compile with `git` installed your version of mraa will be versioned with `git
+desribe --tag` to make it easy for intentification. You can easily modify
+version.c in build/src. If you don't build from a git tree then you will simply
+have a version which matches the latest released version of mraa.
+
+## Using a Yocto/OE toolchain
+
+In order to compile with a Yocto/OE toolchain use the following toolchain file.
+This works well on the Edison 1.7.2 SDK. First source the environment file, then
+use our CMake toolchain file.
+
+~~~~~~~~~~~~~{.sh}
+source /opt/poky-edison/1.7.2/environment-setup-core2-32-poky-linux
+mkdir build
+cmake -DCMAKE_TOOLCHAIN_FILE=../cmake/Toolchains/oe-sdk_cross.cmake ..
+make
+~~~~~~~~~~~~~
+
+## Using Coverity
+
+This is the procedure to submit a build to Coverity. You'll need to install
+`coverity-submit` for your OS.
+
+~~~~~~~~~~~~~{.sh}
+mkdir covbuild/ && cd covbuild
+cmake -DBUILDDOC=OFF -DBUILDSWIG=OFF ..
+cov-build --dir cov-int make
+tar caf mraa.tar.bz2 cov-int
+~~~~~~~~~~~~~
+
+## Building Java bindings
+Have JAVA_HOME set to JDK install directory. Most distributions set this from `/etc/profile.d/`
+ and have a way of switching between alternatives. We support both OpenJDK and Oracle's JDK.
+ On Arch Linux with OpenJDK 8 you'll have to set this yourself like this:
+~~~~~~~~~~~~~{.sh}
+export JAVA_HOME=/usr/lib/jvm/default/
+~~~~~~~~~~~~~
+Then use the CMake configuration flag:
+ `-DBUILDSWIGJAVA=ON`
+To compile `Example.java`
+~~~~~~~~~~~~~{.sh}
+javac -cp $DIR_WHERE_YOU_INSTALLED_MRAA/mraa.jar:. Example.java
+~~~~~~~~~~~~~
+To run, make sure `libmraajava.so` is in `LD_LIBRARY_PATH`
+ ~~~~~~~~~~~~~{.sh}
+jave -cp $DIR_WHERE_YOU_INSTALLED_MRAA/mraa.jar:. Example
+~~~~~~~~~~~~~
+
+If you want to add or improve Java bindings for mraa, please follow the [Creating Java Bindings Guide](https://github.com/intel-iot-devkit/upm/blob/master/docs/creating_java_bindings.md).
+
+## Building an IPK/RPM package using `cpack`
+
+You can get `cpack` to generate an IPK or RPM package fairly easily if you have
+the correct packaging tools
+
+~~~~~~~~~~~~~{.sh}
+cmake -DIPK=ON -DCMAKE_INSTALL_PREFIX=/usr ..
+make package
+~~~~~~~~~~~~~
+
+To use RPM simply enable the RPM option. You'll need `rpmbuild` installed on your
+build machine.
+
+~~~~~~~~~~~~~{.sh}
+cmake -DRPM=ON -DCMAKE_INSTALL_PREFIX=/usr ..
+~~~~~~~~~~~~~
+
+## Building for the Android Things Peripheralmanager Client
+
+Requirements:
+* Android [Things Native Library](https://github.com/androidthings/native-libandroidthings)
+* Android NDK >= 14b
+
+The [Things Native Library](https://github.com/androidthings/native-libandroidthings) contains a CMake find_package module
+[FindAndroidThings.cmake](https://github.com/androidthings/native-libandroidthings/blob/master/FindAndroidThings.cmake). Make sure the directory containing this module is
+added to the CMAKE_MODULE_PATH.
+
+#### NDK r14b
+~~~~~~~~~~~~~{.sh}
+cmake -DBUILDSWIG=OFF -DBUILDARCH=PERIPHERALMAN -DANDROID_TOOLCHAIN_NAME=x86-i686 -DCMAKE_TOOLCHAIN_FILE=/path/to/android-ndk-r14b/build/cmake/android.toolchain.cmake -DCMAKE_MODULE_PATH=/path/to/native-libandroidthings ..
+~~~~~~~~~~~~~

docs/changelog.md

@@ -0,0 +1,348 @@
+Changelog                         {#changelog}
+=========
+
+This changelog is meant as a quick & rough guide to what has changed between
+versions. The API is now fairly stable but when new calls/features are added
+they are listed here. Anything pre 0.2.x is ignored.
+
+**1.7.0**
+  * Peripheral I/O support for Android Things
+  * Deprecation of node v0.10.x and 0.12.x
+  * Documetnatino improvements
+
+**1.6.1**
+  * mraa-deinit bug fix
+  * rpi3 fix
+  * ALTERA_SOCFPGA -> DE_NANO_SOC
+
+**1.6.0**
+  * de-10 nano board support
+  * Improved Intel Joule support & renamed from GT_TUCHUCK to Joule
+  * Improved RPI3 support
+  * Fixes for UP, 96boards & phyboard-wega
+  * Call mraa_deinit with a gcc destructor attribute
+
+**1.5.1**
+  * Small memleaks plugged
+  * imraa useless arp statements removed
+  * NPM 1.5.0 did not 100% match real 1.5.0 tag, this resolves this
+
+**1.5.0**
+  * imraa now uses argp, slight option changes, you need to use -a to flash a 101
+  * Joule i2c enumeration much improved, uses pci id
+  * Firmata add a spinlock to remove possible race condition
+  * Mock Uart functionality
+
+**1.4.0**
+  * Add support for Siemens SIMATIC IOT2000
+  * Cmake now enables much more error detection depending on compiler support
+  * Mraa Maven packages now enabled
+  * Galileo Gen2 AIO fix using pincmd
+  * Adding an already added firmata platform now returns MRAA_SUCCESS
+  * Cmake no longer tags builds without git as '-dirty' version.c for easier
+    packaging support
+
+**1.3.0**
+  * Fix GT GPIO bugs
+  * Mock SPI and travis now uses mock and tests it
+  * RPI zero support
+
+**1.2.3**
+  * Revert 1.2.1 binding.gyp changed that had side effect of enabling JSONPLAT in mraa.c
+  * improve travis.ci to load mraa.node as compiled from make npmpkg target
+
+**1.2.2**
+  * remove jsonplat from prehashed npm builds (see docs/npm.md for details)
+  * internal spelling fix
+
+**1.2.1**
+  * Fix npm pkg build - no other fix
+
+**1.2.0**
+  * JSON platform support
+  * mock I2c functionality
+  * Intel Joule PWM fix
+  * AIO firmata bug fix
+
+**1.1.2**
+  * Mock platform support
+  * mraa-i2c treats i2c buses by default as linux
+  * Intel Joule i2c fixes
+  * travis now uses 14.04 instead of 12.04
+
+**1.1.1**
+  * IIO 4.6 kernel matrix support
+  * Intel Joule radio led support
+  * mraa_init_io() examples
+  * MRAAPLATFORMFORCE fixes
+  * fix python documentation
+
+**1.1.0**
+  * build python2 & python3 bindings
+  * Intel Joule support
+  * mraa_init_io() generic funtion
+  * mraa-gpio fixes
+  * edison PWM 0% improvements
+  * iio location maping fix
+
+**1.0.0**
+  * Change API to enhance error checking in C. Changes include:
+    - mraa_aio_read
+    - mraa_i2c_read_byte
+    - mraa_i2c_read
+    - mraa_i2c_read_byte_data
+    - mraa_i2c_read_word_data
+    - mraa_spi_write_word
+    - mraa::Spi:write_word becomes mraa::Spi::writeWord
+  * Remove MRAA_ERROR_PLATFORM_ALREADY_INITIALISED which was deprecated for C89 compatibility
+  * Remove pwm config_* apis as unused
+  * Add mraa_remove_subplatform
+  * Support NPM for android
+  * Fix AIO always returning channel 0 with firmata support
+
+**0.10.1**
+  * Remove imraa from node package
+
+**0.10.0**
+  * Add Firmata support with -DFIRMATA=ON
+  * Add imraa with support for pinmuxing and arduino101 flashing
+  * Add better support for NVM installed node via NODE_ROOT_DIR.
+  * Mraa bindings now link to libmraa.so.x
+  * mraa_init() now returns MRAA_SUCCESS if platform is already initialize
+  * Mraa java bindings now support JNI 1.6+
+  * Added support for a02082 rpi2
+  * Mraa has a logo!
+
+**0.9.6**
+  * ftdi ft4222 now dynamically loaded
+  * FT4222 improved ISR code
+
+**0.9.5**
+  * Add support for the UP board (up-board.org)
+  * Support OpenJDK 7 as well as OpenJDK 8
+  * 96board better pin numbering
+  * node v4 improvements
+  * Support for PCA9555 i2c expander read/write on FT4222
+
+**0.9.4**
+  * Fix issue with edison ADC initilisation
+  * documentation update
+
+**0.9.3**
+  * Intel edison detection much improved
+  * ftdi ft4222 interrupt improvement
+  * small fixes to java lib
+
+**0.9.2**
+  * Fix bug with mraa_init & USBPLAT
+  * Add mraa_gpio_read_dir call
+  * Enable cherryhill/braswell platform
+  * Improved 96 board support
+
+**0.9.1**
+  * Minnowboard Turbot support
+  * Change to java runables for ISR support
+  * New platform version call
+  * Default i2c bus on edison miniboard is now i2c-1
+  * More compatibility with node.js versions > 0.10
+  * New C++ get i2c default bus call
+  * Various bug fixes & optimisations
+
+**0.9.0**
+  * Beta iio API in C & C++ (no SWIG support)
+  * Added 96Board support
+  * Added Brillo/Android support
+  * Java ISR fixes
+  * FT4222 gpio support
+
+**0.8.1**
+  * Nodejs 4.1.1 support
+  * Java examples fixes
+  * Nodejs SPI tweaks
+  * Misc fixes
+
+**0.8.0**
+  * Better java support
+  * Support for FT4222 subplatforms
+  * New types.hpp improves C++ & SWIG APIs
+  * Added support for minnowboard max compatible boards
+
+**0.7.5**
+  * 5th Generation NUC i2c support
+  * NPM 0.10.x ia32 fix
+
+**0.7.4**
+  * Minnowboard i2c fix
+  * Add NPM arm support
+  * Uart initialisation improved
+  * Better i2c bus detection on DE3815 & mmax
+
+**0.7.3**
+  * DE3815 i2c fix when using different kernels
+  * Fixed various memory leaks in SWIG wrappers
+  * gpio enums all prefixed with mraa_
+  * Fix SPI CS pin caps causing mux_total to be > 0
+  * Improved error checking/handling
+
+**0.7.2**
+  * Fix node.js npm builds with binding.gyp that didn't use --target-arch
+
+**0.7.1**
+  * Uart now uses binary arrays and has optional 'Str' functions in C++/SWIG
+  * Various Uart module bugfixes
+  * Node.js 0.12.4 support
+  * Node.js documentation support
+
+**0.7.0**
+  * Uart module now contains read/write interactions and configuration
+  * Python API contains more buffer checks
+  * Java support
+  * RPM cpack support
+
+**0.6.2**
+  * Node.js 0.12 support
+  * NPM support
+  * Formatting done with clang-format
+  * Various examples and documentation updates
+  * Supported added for Beaglebone Black + Banana Pi
+
+**0.6.1**
+  * 16bit spi iunctions added
+  * Node.js ISR now supported
+
+**0.6.0**
+  * add device path queries for uart
+  * add platform configuration querying
+  * gpio sample added
+  * improve i2c/spi write/read API for python & nodejs
+  * performance improvements on edison & galileo
+
+**0.5.4**
+  * pwm read_* fix introduced in 0.5.3
+  * improved npmpkg support
+
+**0.5.3**
+  * OE toolchain support added to CMake
+  * Various UART fixes
+  * SPI add CS exposure
+  * Remove functions from mraa.c into modules
+  * Rework of support for mmap
+  * Intel Edison MMAP support added. Read and Write
+  * I2C clean up, add cleaner functions
+  * MinnowBoard Max support added
+  * PWM period is written before duty
+  * Node GYP build supported added
+  * Add Get Platform Name function
+
+**0.5.2**
+  * pwm improvement & bugfix
+  * spi mraa_spi_bit_per_word fix
+  * new spi transfer function
+  * i2c object api uses uint8_t
+  * i2c readReg() calls added
+  * edison i2c bus now defaults to a sensible value
+  * edison uart enable support
+  * edison hardware CS exposed as IO10
+  * DE3815tykhe NUC support
+
+**0.5.1**
+  * Intel Edison - Mini breakout board support
+  * Change to use syslog throughout instead of printing to stderr.
+  * Fix misc issues brought up throuh coverity scans
+  * Clear up Analog call documentation
+
+**0.5.0**
+  * Intel Edison - Arduino board support.
+  * Boost Allowable i2c busses to 12
+  * Additional platform hooks added
+  * ADC is now 10bits by default on all platforms but can be changed
+
+**0.4.5**
+  * if only one spidev we default to it reguardless of number
+  * mraa_pwm_config_ms & mraa_pwm_config_percent functions added
+  * Uart C++ class added, adds python & node support
+  * galileo gen2 gpio modes supported
+
+**0.4.4**
+  * prefix SPI mode with MRAA_SPI_
+  * added C++ adc bitness calls
+
+**0.4.3**
+  * SPI Mode function now functional, API Change in SPI
+  * I2C read in swig worked on.
+  * Galileo Gen 2: PWM setting period sets all channel's period
+  * Galileo Gen 2: I2C setup now specific to Gen 2.
+  * General commits around freeing memory at the right times.
+
+**0.4.2**
+  * Barebone UART module added.
+  * Hook branch merged.
+  * I2C init hooks added.
+  * Intel Galileo Gen 2, I2C gpio pins now go hiz input when I2C initialised.
+
+**0.4.1**
+  * Rename python & nodejs modules to mraa
+  * common.hpp introduced for C++
+  * python & nodejs modules can now take binary strings for Spi & I2c
+  * improved Aio module and clear bitness
+  * Improved Galileo Gen 2 support
+
+**0.4.0**
+  * Rename to mraa
+  * get_platform_type function added.
+
+**0.3.1**
+  * Initial Intel Galileo Gen 2 support
+  * mraa_gpio_isr parameters added.
+  * Detection of different supported platforms added.
+
+**0.3.0**
+  * mraa_i2c_read now returns length of read
+
+**0.2.9**
+  * Add global mraa.h & mraa.hpp headers
+  * usage of "gpio.h" is not legal you need to use "mraa/gpio.h" unless adding
+    -L/usr/include/mraa
+
+**0.2.8**
+  * Added mraa_set_priority call
+  * Added mmap gpio call mraa_gpio_use_mmaped
+
+**0.2.7**
+  * C++ API now uses basic types and not unistd types as C
+  * Clearer and consistent use of unistd tpyes in C api
+
+**0.2.6**
+  * C++ examples added, using c++ headers/api.
+  * moved to open instead of fopen in all modules
+  * rename mraa_check functions and made them internal to mraa only.
+  * removed "export" functions from api
+  * Intel Galileo Gen 1 (rev d) fixes, incorrect definition of some items
+  * SPI, implementation completed.
+  * I2C internal function, completed.
+  * PWM fix bug in period set method.
+  * Swig upstream can be used for building.
+  * No longer builds docs on default cmake, needs flag
+  * GPIO/PWM ownership guard prevents closing on existing pins, still can be forced.
+
+**0.2.5**
+  * C++/Python/Node Enums/const names now do not contain MRAA_GPIO
+  * Enum type declaration for C++ changed
+  * Python/Node get_version() -> GetVersion()
+  * i2c read calls don't use const char* and i2c write calls do
+
+**0.2.4**
+  * All mraa_ contexts now are pointers to the actual struct which is not
+    delcared in the header. The only end user change is that instead of
+    returning a type mraa_gpio_context pointer mraa_gpio_init() now returns a
+    mraa_gpio_context (which is actually a pointer to struct _gpio internally).
+  * C++ API is available, use the .hpp headers and add stdc++  to the linker
+    flags.
+  * Initial SPI implementation is provided
+
+**0.2.3**
+  * mraa_aio_read_u16() -> mraa_aio_read()
+  * mraa_aio_read() now returns a uint16_t instead of an unsigned int
+
+**0.2.2**
+  * First version with API considered 'stable'

docs/contributing.md

@@ -1,17 +0,0 @@
-Contributing to libmraa                           {#contributing} 
-======================
-
-libmraa is an opensource project and we are actively looking for people to help
-with:
-
-- Writing platform supports for all types of embedded boards running linux
-- People to write cool samples
-- People to extend the functionality
-
-The recommended method to contribute is to fork on github, and then send pull
-requests to the main project. Questions can be also be asked and issues raised
-on github.
-
-If you'd rather not use github you are more than welcome to send git formatted
-patches to brendan.le.foll@intel.com.
-

docs/de_nano_soc.md

@@ -0,0 +1,153 @@
+Terasic DE10-Nano   {#de10-nano}
+=================
+
+The DE10-Nano Development Kit presents a robust hardware design platform built around the Intel
+System-on-Chip (SoC) FPGA, which combines the latest dual-core Cortex-A9 embedded cores with
+industry-leading programmable logic for ultimate design flexibility. Users can now leverage the
+power of tremendous re-configurability paired with a high-performance, low-power processor system.
+Altera’s SoC integrates an ARM-based hard processor system (HPS) consisting of processor,
+peripherals and memory interfaces tied seamlessly with the FPGA fabric using a high-bandwidth
+interconnect backbone. The DE10-Nano development board is equipped with high-speed DDR3 memory,
+analog to digital capabilities, Ethernet networking, and much more that promise many exciting
+applications.
+
+Board Support
+-------------
+
+* Terasic DE10-Nano
+* Terasic DE0-Nano-SoC
+
+Protocol Notes
+---------------
+
+* **GPIO** Fully supported through sysfs (both FPGA + HPC). Mmap not yet supported. Static map.
+* **PWM** Currently not supported.
+* **I2C** Fully supported with i2cdev. Default bus 2 is exposed on Arduino header, 3 buses total.
+* **SPI** Supported with spidev on Arduino header.
+* **UART** Working, default bus is on Arduino header. Console also accessible as `ttyS0` in raw mode.
+* **ADC** Currently not supported.
+
+No muxes available for multi-function pins yet (e.g. you won't be able to use D0 & D1 on Arduino
+header as GPIOs).
+
+Pin Mapping
+-----------
+
+**Arduino Header**
+
+| MRAA Number | Arduino Name | Board Pin | Function |
+|-------------|--------------|-----------|----------|
+| 0           | D0           | JP3-8     | UART RX  |
+| 1           | D1           | JP3-7     | UART TX  |
+| 2           | D2           | JP3-6     | GPIO     |
+| 3           | D3           | JP3-5     | GPIO     |
+| 4           | D4           | JP3-4     | GPIO     |
+| 5           | D5           | JP3-3     | GPIO     |
+| 6           | D6           | JP3-2     | GPIO     |
+| 7           | D7           | JP3-1     | GPIO     |
+| 8           | D8           | JP2-10    | GPIO     |
+| 9           | D9           | JP2-9     | GPIO     |
+| 10          | D10          | JP2-8     | SPI SS   |
+| 11          | D11          | JP2-7     | SPI MOSI |
+| 12          | D12          | JP2-6     | SPI MISO |
+| 13          | D13          | JP2-5     | SPI SCK  |
+| 14          | GND          | JP2-4     | -        |
+| 15          | AREF         | JP2-3     | -        |
+| 16          | SDA          | JP2-2     | I2C SDA  |
+| 17          | SCL          | JP2-1     | I2C SCL  |
+| 18          | AREF         | JP5-1     | -        |
+| 19          | IOREF        | JP5-2     | -        |
+| 20          | RESET        | JP5-3     | -        |
+| 21          | 3V3          | JP5-4     | -        |
+| 22          | 5V           | JP5-5     | -        |
+| 23          | GND          | JP5-6     | -        |
+| 24          | GND          | JP5-7     | -        |
+| 25          | VIN          | JP5-8     | -        |
+| 26          | A0           | JP6-1     | AIO      |
+| 27          | A1           | JP6-2     | AIO      |
+| 28          | A2           | JP6-3     | AIO      |
+| 29          | A3           | JP6-4     | AIO      |
+| 30          | A4           | JP6-5     | AIO      |
+| 31          | A5           | JP6-6     | AIO      |
+
+**GPIO0 (JP1) Side Header**
+
+| MRAA Number | Board Pin | Function |
+|-------------|-----------|----------|
+| 32          | JP1-1     | GPIO     |
+| ...         | ...       | GPIO     |
+| 41          | JP1-10    | GPIO     |
+| 42          | JP1-11    | 5V       |
+| 43          | JP1-12    | GND      |
+| 44          | JP1-13    | GPIO     |
+| ...         | ...       | GPIO     |
+| 59          | JP1-28    | GPIO     |
+| 60          | JP1-29    | 3V3      |
+| 61          | JP1-30    | GND      |
+| 62          | JP1-31    | GPIO     |
+| ...         | ...       | GPIO     |
+| 71          | JP1-40    | GPIO     |
+
+**GPIO1 (JP7) Side Header**
+
+| MRAA Number | Board Pin | Function |
+|-------------|-----------|----------|
+| 72          | JP7-1     | GPIO     |
+| ...         | ...       | GPIO     |
+| 81          | JP7-10    | GPIO     |
+| 82          | JP7-11    | 5V       |
+| 83          | JP7-12    | GND      |
+| 84          | JP7-13    | GPIO     |
+| ...         | ...       | GPIO     |
+| 99          | JP7-28    | GPIO     |
+| 100         | JP7-29    | 3V3      |
+| 101         | JP7-30    | GND      |
+| 102         | JP7-31    | GPIO     |
+| ...         | ...       | GPIO     |
+| 111         | JP7-40    | GPIO     |
+
+**Switches, Buttons, LEDs**
+
+These are already in use by kernel drivers with the default image, except for KEY0 and KEY1.
+To use them with MRAA remove them from the device tree.
+
+To enable the switches temporarily (until reboot):
+
+```sh
+echo ff204000.gpio >/sys/bus/platform/drivers/altera_gpio/unbind
+echo ff204000.gpio >/sys/bus/platform/drivers/altera_gpio/bind
+```
+
+And for LEDs:
+
+```sh
+echo ff203000.gpio >/sys/bus/platform/drivers/altera_gpio/unbind
+echo ff203000.gpio >/sys/bus/platform/drivers/altera_gpio/bind
+```
+
+| MRAA Number | Board Pin | Function |
+|-------------|-----------|----------|
+| 112         | SW0       | GPIO     |
+| 113         | SW1       | GPIO     |
+| 114         | SW2       | GPIO     |
+| 115         | SW3       | GPIO     |
+| 116         | LED0      | GPIO     |
+| 117         | LED1      | GPIO     |
+| 118         | LED2      | GPIO     |
+| 119         | LED3      | GPIO     |
+| 120         | LED4      | GPIO     |
+| 121         | LED5      | GPIO     |
+| 122         | LED6      | GPIO     |
+| 123         | LED7      | GPIO     |
+| 124         | HPS_LED   | GPIO     |
+| 125         | HPS_KEY   | GPIO     |
+| 126         | KEY0      | GPIO     |
+| 127         | KEY1      | GPIO     |
+
+**Built-in ADXL345**
+
+Exposed on I2C bus 0. To use you will have to unbind the device driver first:
+
+```sh
+echo 0-0053 > /sys/bus/i2c/drivers/adxl34x/unbind
+```

docs/debugging.md

@@ -0,0 +1,31 @@
+Debugging libmraa                         {#debugging}
+=================
+
+This page contains a few debugging tip. When filing an issue please go through
+this list as it's the first thing we'll ask you to do.
+
+### Finding your mraa version
+
+Getting the exact version of libmraa you're running is really important to us.
+The best way to get this is to call mraa_get_version() or mraa.getVersion(). If
+mraa returns x.x.x-dirty then your version was not built from a git tree or you
+built out of tree (see our building doc) - or you don't have git installed.
+
+### Finding error logs
+
+mraa logs pretty much everything that goes wrong to syslog. These days it'll go
+to the systemd journal so check with `sudo journalctl -f` whilst running your
+app or check all libmraa messages with `journalctl -t libmraa`.  Grab all the
+messages from the initialisation message right up to your last one. Using a
+pastebin is always a good idea, I like dpaste.com. If your system does not have
+systemd likely your log is in /var/log/messages or a similar location.
+
+### Common errors to check for
+
+* Not running as root
+* Incorrect IO pin numbers, mraa uses physical connector pin numbering see your
+  platform documentation for details
+* Your platform is unsupported
+* Using the wrong pin, check pin capabilities either using the API or your
+  platform documentation
+

docs/edison.md

@@ -1,16 +1,116 @@
 Intel Edison                            {#edison}
 =============
 
-Edison is a dual core Silvermont Atom clocked at 500MHz. The Edison
-also features 4GB of storage, 1GB ram and onboard wifi and bluetooth.
+Intel(R) Edison is a dual-core Silvermont Atom(TM) clocked at 500MHz. The
+Edison also features 4GB of storage, 1GB ram and on-board WiFi and Bluetooth.
 
-Currently the Arduino breakout board is supported by libmraa.
+Currently supported boards:
+- Intel Arduino board
+- Intel breakout board
 
+UART
+----
+On both the Arduino board and the breakout board, The available UART interface is on /dev/ttyMFD1
+
+Intel Arduino board
+-------------------
 The Edison used with the Arduino board has the following limitations
 in libmraa:
 
-- i2c is exposed on i2c-6, therfore you must use bus 6 and not bus 0
-- PWM avaible on default swizzler postions. (3,5,6,9)
+- Do not use the 'reset' button on the arduino shields, there is a hardware
+  bug and the platform will likely not come back up correctly
+- I2C is exposed on i2c-6, therefore you must use bus 6 and not bus 0
+- PWM available on default swizzler positions. (3,5,6,9)
 - SPI exposed is also used for the ADC. Try not to use your own CS.
-- ADC kernel module will return 12bit number but the ADC itself only has an
-  accuracy of 10bits. This ADC is only included on the arduino board.
+- Max SPI speed is 25Mhz/4 ~6.25Mhz
+- SPI PM can sometimes do weird things you can disable it with:
+  `echo on > /sys/devices/pci0000\:00/0000\:00\:07.1/power/control`
+- ADC kernel module will return 16bit number but the ADC itself only has an
+  accuracy of maximum 12bits and in MRAA it's limited to 10bits by default.
+  Use `mraa_aio_set_bit(12)` to switch to the maximum resolution mode.
+  This ADC is only included on the Arduino board.
+- AIO pins are treated as 0-5 in `mraa_aio_init()` but as 14-19 for everything
+  else. Therefore use `mraa_gpio_init(14)` to use A0 as a GPIO
+- Arduino pin 7 can sometimes negatively impact the WiFi capability, if using
+  WiFi avoid using this pin
+- Edison's i2c-1 can be used using for example the sparkfun i2c breakout ontop
+  of the Arduino breakout board, this is not supported officially so asking for
+  mraa_i2c_init(1) will result in getting i2c bus 6 (the default one). However
+  using raw mode (mraa_i2c_init_raw(1)) this bus is fully usable
+- If you want to use /dev/ttyMFD2 you have to use the raw uart mode passing a
+  std::string or char* argument of "/dev/ttyMFD2" to mraa:Uart() or
+  mraa_uart_init_raw. By default there is a getty running on that interface so
+  you will need to disable that first
+
+Because of the way IO is setup with the tristate on the Arduino breakout board
+IO will be flipped as it is setup. It's recommended to setup IO pins &
+direction before using them in a `setup()` method or similar. It's impossible on
+this platform to avoid some GPIOs flipping on setup.
+
+Intel(R) breakout board
+-----------------------
+
+- Both I2C buses are available 1 & 6
+- IO on the miniboard is 1.8V
+- Requesting GPIO 4 will break your FTDI UART console, so bear in mind when trying to use it
+
+Please see the following table on how the physical pins map to mraa pin numbers
+
+| MRAA Number | Physical Pin | Edison Pin    | Notes                   | Pinmode0 | Pinmode1   | Pinmode2 |
+|-------------|--------------|---------------|-------------------------|----------|------------|----------|
+| 0           | J17-1        | GP182         |                         | GPIO-182 | PWM2       |          |
+| 1           | J17-2        | NC            | Nothing from mraa       |          |            |          |
+| 2           | J17-3        | NC            | Nothing from mraa       |          |            |          |
+| 3           | J17-4        | VIN           | Nothing from mraa       |          |            |          |
+| 4           | J17-5        | GP135         |                         | GPIO-135 | UART       |          |
+| 5           | J17-6        | RCVR_MODE     | Nothing from mraa       |          |            |          |
+| 6           | J17-7        | GP27          |                         | GPIO-27  | I2C-6-SCL  |          |
+| 7           | J17-8        | GP20          |                         | GPIO-20  | I2C-1-SDA  |          |
+| 8           | J17-9        | GP28          |                         | GPIO-28  | I2C-6-SDA  |          |
+| 9           | J17-10       | GP111         |                         | GPIO-111 | SPI-5-CS1  |          |
+| 10          | J17-11       | GP109         |                         | GPIO-109 | SPI-5-SCK  |          |
+| 11          | J17-12       | GP115         |                         | GPIO-115 | SPI-5-MOSI |          |
+| 12          | J17-13       | OSC_CLK_OUT_0 | Nothing from mraa/check |          |            |          |
+| 13          | J17-14       | GP128         |                         | GPIO-128 | UART-1-CTS |          |
+| 14          | J18-1        | GP13          |                         | GPIO-13  | PWM1       |          |
+| 15          | J18-2        | GP165         |                         | GPIO-165 |            |          |
+| 16          | J18-3        | GPI_PWRBTN_N  | Nothing from mraa       |          |            |          |
+| 17          | J18-4        | MSIC_SLP_CLK2 | Nothing from mraa       |          |            |          |
+| 18          | J18-5        | V_VBAT_BKUP   | Nothing from mraa       |          |            |          |
+| 19          | J18-6        | GP19          |                         | GPIO-19  | I2C-1-SCL  |          |
+| 20          | J18-7        | GP12          | PWM0                    | GPIO-12  | PWM0       |          |
+| 21          | J18-8        | GP183         | PWM3                    | GPIO-183 | PWM3       |          |
+| 22          | J18-9        | NC            | Nothing from mraa       |          |            |          |
+| 23          | J18-10       | GP110         |                         | GPIO-110 | SPI-5-CS0  |          |
+| 24          | J18-11       | GP114         |                         | GPIO-114 | SPI-5-MISO |          |
+| 25          | J18-12       | GP129         |                         | GPIO-129 | UART-1-RTS |          |
+| 26          | J18-13       | GP130         |                         | GPIO-130 | UART-1-RX  |          |
+| 27          | J18-14       | FW_RCVR       | Nothing from mraa       |          |            |          |
+| 28          | J19-1        | NC            | Nothing from mraa       |          |            |          |
+| 29          | J19-2        | V_V1P80       | Nothing from mraa       |          |            |          |
+| 30          | J19-3        | GND           | Nothing from mraa       |          |            |          |
+| 31          | J19-4        | GP44          |                         | GPIO-44  |            |          |
+| 32          | J19-5        | GP46          |                         | GPIO-46  |            |          |
+| 33          | J19-6        | GP48          |                         | GPIO-48  |            |          |
+| 34          | J19-7        | RESET_OUT     | Nothing from mraa       |          |            |          |
+| 35          | J19-8        | GP131         |                         | GPIO-131 | UART-1-TX  |          |
+| 36          | J19-9        | GP14          |                         | GPIO-14  |            |          |
+| 37          | J19-10       | GP40          |                         | GPIO-40  | SSP2_CLK   |          |
+| 38          | J19-11       | GP43          |                         | GPIO-43  | SSP2_TXD   |          |
+| 39          | J19-12       | GP77          |                         | GPIO-77  | SD         |          |
+| 40          | J19-13       | GP82          |                         | GPIO-82  | SD         |          |
+| 41          | J19-14       | GP83          |                         | GPIO-83  | SD         |          |
+| 42          | J20-1        | V_VSYS        | Nothing from mraa       |          |            |          |
+| 43          | J20-2        | V_V3P30       | Nothing from mraa       |          |            |          |
+| 44          | J20-3        | GP134         |                         |          |            |          |
+| 45          | J20-4        | GP45          |                         | GPIO-45  |            |          |
+| 46          | J20-5        | GP47          |                         | GPIO-47  |            |          |
+| 47          | J20-6        | GP49          |                         | GPIO-49  |            |          |
+| 48          | J20-7        | GP15          |                         | GPIO-15  |            |          |
+| 49          | J20-8        | GP84          |                         | GPIO-84  | SD         |          |
+| 50          | J20-9        | GP42          |                         | GPIO-42  | SSP2_RXD   |          |
+| 51          | J20-10       | GP41          |                         | GPIO-41  | SSP2_FS    |          |
+| 52          | J20-11       | GP78          |                         | GPIO-78  | SD         |          |
+| 53          | J20-12       | GP79          |                         | GPIO-79  | SD         |          |
+| 54          | J20-13       | GP80          |                         | GPIO-80  | SD         |          |
+| 55          | J20-14       | GP81          |                         | GPIO-81  | SD         |          |

docs/firmata.md

@@ -0,0 +1,37 @@
+Using Firmata board with mraa      {#firmata}
+=============================
+
+Mraa can use a Firmata board as a subplatform. This means one can access the
+native IO as well as the IO on a firmata compatible board
+
+### Supported Firmata boards ###
+
+- Genuino/Arduino 101 running either CustomFirmata or StandardFirmata
+- Other Arduino boards will likely work but are as of yet unsuported
+
+### Using the subplatform API ###
+
+Using the subplatform API is relatively simple, simply add '512', the platform
+offset to any IO calls. I2c 0 becomes I2c 512+0 etc... The API works from UPM
+or mraa in any of the bindings as long as you compiled mraa with -DFIRMATA=ON.
+Currently -DFIRMATA is not compatible with USBPLAT. Multiple subplatforms are
+not yet supported
+
+### Sending custom SYSSEX messages ###
+
+You can use the firmata API to send custom SYSEX messages.
+
+### CurieImu Plugin ###
+
+Using Customisable firmata we're able to use the onboard IMU to get data. This
+uses the public SYSEX firmata API from mraa and there is a UPM module that
+exposes this capability in a simple way. To use it your board needs to use
+CustomFirmata with the CurieIMU plugin
+
+### Limitations ###
+
+Only one instance of mraa (one process linking to mraa) can communicate to an
+firmata subplatform. This is a limitation due to only having one application
+using the Uart at once. In order to get around this a daemon type methodology
+has to be used. Technically you can mirror the TTY port from firmata but this
+is likely going to cause issues

docs/ftdi_ft4222.md

@@ -0,0 +1,80 @@
+FTDI FT4222H                             {#ft4222}
+============
+
+The FT4222H is a High/Full Speed USB2.0-to-Quad SPI/I2C device controller. Mraa
+supports it as a USB subplatform using the libft4222 library from FTDI which
+can be found
+[here](http://www.ftdichip.com/Support/SoftwareExamples/libft4222-1.2.1.4.tgz).
+You need the latest version for the GPIO to work.
+
+The FT4222H has 4 configuration modes selected by {DCNF1, DCNF0}.  The chip
+configuration mode will determine the number of USB interfaces for data streams
+and for GPIOs control. Mraa supports chip modes CNFMODE0 and CNFMODE3. In
+CNFMODE0 the chip can provide either 4 GPIOs and SPI, or 2 GPIOs and I2C
+since SCL/SDA are shared with GPIO0/GPIO1. It is possible to change this
+selection dynamically by calling the corresponding mraa init functions.
+CNFMODE3 on the other hand will only provide SPI or I2C.
+
+By default, both modes start with I2C enabled and the driver will scan for
+known GPIO expanders on the I2C bus when the FT4222H is initialized.
+
+Supported GPIO expanders:
+* PCA9672
+* PCA9555
+* PCF8575
+
+Output from 'mraa-gpio list' would be as follows:
+~~~~~~~~~~~~~
+512 IGPIO0/SCL0: GPIO I2C
+513 IGPIO1/SDA0: GPIO I2C
+514   INT-GPIO2: GPIO
+515   INT-GPIO3: GPIO
+~~~~~~~~~~~~~
+
+When an I2C GPIO expander is present, the pins on the expander will appear after
+the 4 FT4222H GPIO pins (i.e. starting at physical pin #4, logical pin #516).
+~~~~~~~~~~~~~
+512 IGPIO0/SCL0: GPIO I2C
+513 IGPIO1/SDA0: GPIO I2C
+514   INT-GPIO2: GPIO
+515   INT-GPIO3: GPIO
+516   EXP-GPIO0: GPIO
+517   EXP-GPIO1: GPIO
+518   EXP-GPIO2: GPIO
+519   EXP-GPIO3: GPIO
+520   EXP-GPIO4: GPIO
+521   EXP-GPIO5: GPIO
+522   EXP-GPIO6: GPIO
+523   EXP-GPIO7: GPIO
+~~~~~~~~~~~~~
+
+If a PCA9545 I2C switch is detected an extra four I2C busses will appear,
+representing the four downstream busses. Output from 'mraa-i2c list'
+would be as follows:
+~~~~~~~~~~~~~
+Bus 512: id=00 type=ft4222  default
+Bus 513: id=01 type=ft4222
+Bus 514: id=02 type=ft4222
+Bus 515: id=03 type=ft4222
+Bus 516: id=04 type=ft4222
+~~~~~~~~~~~~~
+
+Please note that some mraa features might not be fully implemented yet and they
+are still under development (e.g. SPI replacement functions).
+
+We tested the module using FTDI's UMFT4222EV reference board. More details on
+this board can be found
+[here](http://www.ftdichip.com/Support/Documents/DataSheets/Modules/DS_UMFT4222EV.pdf).
+
+Interface notes
+---------------
+
+You will need to unload all ftdi kernel modules for libft4222 to work
+correctly. You will also have to compile mraa with FT4222 support which may not
+be enabled by default.
+
+The cmake options to build this driver are:
+~~~~~~~~~~~~~
+FTDI4222=ON
+USBPLAT=ON
+~~~~~~~~~~~~~

docs/galileorevd.md

@@ -1,11 +1,14 @@
 Galileo Gen 1 - Rev D                            {#galileorevd}
 =====================
 
-Galileo is a microcontroller board based on the Intel® Quark SoC X1000
+Galileo is a microcontroller board based on the Intel(R) Quark(TM) SoC X1000
 Application Processor, a 32-bit Intel Pentium-class system on a chip.
 
 The rev D board has the following limitations in libmraa:
 
+- gpio 13 will not switch the LED as it's a different Gpio, use raw gpio '3' to do this
 - gpio register access via /dev/uio is limited to pin2 and 3
-- gpio interupts will only work on GPIO_EDGE_BOTH
+- gpio interrupts will only work on GPIO_EDGE_BOTH
 - adc kernel module will return 12bit number. MRAA defaults shift this to 10bits
+- AIO pins are treated as 0-5 in mraa_aio_init() but as 14-19 for everything
+  else. Therefore use mraa_gpio_init(14) to use A0 as a Gpio

docs/galileorevh.md

@@ -1,14 +1,66 @@
 Galileo Gen 2 - Rev H                           {#galileorevh}
 =====================
 
-Galileo is a microcontroller board based on the Intel® Quark SoC X1000
+Galileo is a microcontroller board based on the Intel(R) Quark(TM) SoC X1000
 Application Processor, a 32-bit Intel Pentium-class system on a chip.
 
 The Gen 2 board has the following limitations in libmraa:
 
-- i2c is set at 400Khz speed cannot be changed without reloading kernel module
-- i2c bus is shared with multiple devices, scanning it usually fails
+- i2c is set at 400Khz speed cannot be changed without reloading kernel module,
+  the driver is intel_qrk_gip_i2c and the parameter is i2c_std_mode which must
+  be set to 1 in order to set the i2c bus speed to 100Khz
+- i2c bus is shared with multiple devices in kernel space, scanning it usually
+  fails
 - pwm period is set globally for all pwm channels, when changed this will halt
   all pwm channels
 - adc kernel module will return 12bit number but the ADC itself only has an
   accuracy of 10bits.
+- AIO pins are treated as 0-5 in mraa_aio_init() but as 14-19 for everything
+  else. Therefore use mraa_gpio_init(14) to use A0 as a Gpio
+- To explicitly use GPIO 10 for SPI and allow the kernel to handle the chip select, set
+  `intel_qrk_plat_galileo_gen2.gpio_cs=1` on the kernel line in the boot config on the
+  galileo, this can be found at `/media/mmcblk0p1/boot/grub/grub.conf`
+- if done correctly it should look similiar to this:
+
+<pre>
+  title Quark X1000 kernel-MassStorage iot-devkit on SD IMR-On IO-APIC/HPET NoEMU debug
+  root (hd0,0)
+  kernel /bzImage root=/dev/mmcblk0p2 <b>intel_qrk_plat_galileo_gen2.gpio_cs=1</b> rootwait console=ttyS1,115200n8 earlycon=uart8250,mmio32,0x8010f000,115200n8 reboot=efi,warm apic=debug rw LABEL=boot debugshell=5
+</pre>
+
+Uart 1 on gen2
+--------------
+
+Uart 1 is connected to the FTDI header and the linux console. It's also
+possible to use it from A2(Rx)/A3(Tx). However mraa does not support this
+directly so you need to enable the muxing manually. Here is an example of how
+this is done, this was tested using an FTDI 3.3V TTL cable:
+
+```
+$ systemctl stop serial-getty@ttyS1.service
+$ python
+>>> # Configure the Muxes for Uart1 on Aio2/3
+>>> import mraa as m
+>>> p77 = m.Gpio(77, False, True)
+>>> p76 = m.Gpio(76, False, True)
+>>> p16 = m.Gpio(16, False, True)
+>>> p17 = m.Gpio(17, False, True)
+>>> p77.write(1)
+>>> p76.write(1)
+>>> p16.dir(m.DIR_OUT)
+>>> p16.write(0)
+>>> p17.dir(m.DIR_OUT)
+>>> p17.write(1)
+
+>>> # For Rx to work correctly switch the level shifter
+>>> p34 = m.Gpio(34, False, True)
+>>> p34.dir(m.DIR_OUT)
+>>> p34.write(1)
+
+>>> # Use the uart
+>>> x = m.Uart(1)
+>>> x.setBaudRate(115200)
+>>> x.writeStr('hello')
+>>> x.read(5)
+bytearray(b'dsds\n')
+```

docs/grossetete.md

@@ -0,0 +1,5 @@
+{#grossetete}
+
+You probably meant to go here: @joule.
+
+Note: This page will be deleted in the future, don't link to it!

docs/iio.md

@@ -0,0 +1,44 @@
+iio             {#iio}
+===
+IIO is the kernel's framework for supporting sensors.
+## Using dummy_iio driver
+For platforms without IIO hardware the iio_dummy driver can be used. You can
+add the driver by either rebuilding the kernel with IIO component enabled or
+just building the IIO modules and load them.  You must add the following config
+fragment. Known to work for kernel 3.19 and later.
+<pre><code>
+CONFIG_IIO_DUMMY_EVGEN=m
+CONFIG_IIO_SIMPLE_DUMMY=m
+CONFIG_IIO_SIMPLE_DUMMY_EVENTS=y
+CONFIG_IIO_SIMPLE_DUMMY_BUFFER=y
+</code></pre>
+### Add driver to kernel
+Boot with new kernel, then load modules
+<pre><code>
+$ modprobe iio_dummy
+$ modprobe iio_dummy_evgen
+</code></pre>
+### Load kernel modules
+Depending our your kernel config, some of these modules may already be loaded.
+<pre><code>
+$ insmod drivers/iio/industrialio.ko
+$ insmod drivers/iio/kfifo_buf.ko
+$ insmod drivers/staging/iio/iio_dummy_evgen.ko
+$ insmod drivers/staging/iio/iio_dummy.ko
+</code></pre>
+## 'RAW' access
+
+Mraa supports raw access
+
+###Channels
+
+###Attributes
+
+###Events
+
+###Triggers
+
+Activate the trigger in /sys/class/iio
+$ echo 1 > trigger0/trigger_now
+
+

docs/imraa.md

@@ -0,0 +1,62 @@
+# Building mraa with imraa	{#buildingimraa}
+Imraa allows seamless communication between the Arduino101 and your mraa
+projects. Imraa will flash an arduino101 and allow automatic loading of the
+MRAA_GENERIC_FIRMATA subplatform to the first process that calls imraa_init
+(done through mraa_init automatically)
+
+## Build dependencies
+To build imraa, you'll need to build mraa with -DIMRAA=ON and all the normal
+dependencies for build mraa, see [Building mraa](./building.md).
+You'll also need the following:
+* [dfu-utils-cross](https://github.com/arduino/dfu-utils-cross) or dfu 0.8 (0.9
+  does not work well with the 101). Precompiled binaries can be found on
+  [here](https://github.com/01org/intel-arduino-tools)
+* [json-c](https://github.com/json-c/json-c): likely called libjson-c-dev or
+  json-c-devel
+* libudev: likely called libudev-dev or libudev-devel
+
+## Basic build steps
+This will build mraa with imraa for the local default path. To build mraa for
+the system add `-DCMAKE_INSTALL_PREFIX=/usr` to the cmake command before
+running it.
+
+```bash
+mkdir build
+cd build
+cmake -DIMRAA=ON -DFIRMATA=ON ..
+make
+```
+
+After you've built mraa you can install using `make install`.
+
+## Running Imraa
+Before being able to use mraa to program the Arduino101 you will need to run
+imraa to flash the sketch file onto the board. The sketch file that imraa will
+look for is located here: [Arduino101 Sketch](http://iotdk.intel.com/misc/ConfigurableFirmataCurieImu.ino.bin).
+Once downloaded the file needs to be renamed and moved to the where mraa was
+installed. This is dependant on whether you installed locally or for the
+system. The example below is for a locally installed copy. Note this sketch is
+using ConfigurableFirmata + the [CurieIMU plugin](https://github.com/intel-iot-devkit/FirmataCurieIMU).
+
+
+```bash
+$ mv ConfigurableFirmataCurieImu.ino.bin firmata101.ino.bin
+$ mv firmata101.ino.bin /usr/local/share/mraa
+```
+
+You will also need to move the imraa config so that imraa can find it.
+```bash
+$ mv mraa/imraa/imraa.conf /etc/
+```
+
+To flash the board run imraa and it will create the lockfile and flash the
+Arduino101. You may need root permissions or to add yourself to the uucp or
+modem group to access the device node (typically /dev/ttyACM0).
+```
+$ imraa
+```
+
+After this is successful you will be able to use mraa like normal, in the
+background mraa will handle talking to the arduino101 by creating
+/tmp/imraa.lock which imraa_init() will parse on startup.
+

docs/index.java.md

@@ -0,0 +1,72 @@
+libmraa - Low Level Skeleton Library for Communication on GNU/Linux platforms
+==============
+
+Libmraa is a C/C++ library with bindings to Java, Python and JavaScript to
+interface with the I/O on Galileo, Edison & other platforms, with a structured
+and sane API where port names/numbering matches the board that you are on. Use
+of libmraa does not tie you to specific hardware with board detection done at
+runtime you can create portable code that will work across the supported
+platforms.
+
+The intent is to make it easier for developers and sensor manufacturers to map
+their sensors & actuators on top of supported hardware and to allow control of
+low level communication protocol by high level languages & constructs.
+
+## API
+
+These interfaces allow you to interact with all libmraa functionality. The
+Java classes directly wrap the C/C++ API and provide a near 1:1 mapping of
+functionality.
+
+<center>
+| C API Modules          | Java API Classes              |
+|:----------------------:|:----------------------------:|
+| @ref gpio.h "gpio"     | @ref mraa::Gpio "Gpio class" |
+| @ref i2c.h "i2c"       | @ref mraa::I2c "I2c class"   |
+| @ref aio.h "aio"       | @ref mraa::Aio "Aio class"   |
+| @ref pwm.h "pwm"       | @ref mraa::Pwm "Pwm class"   |
+| @ref spi.h "spi"       | @ref mraa::Spi "Spi class"   |
+| @ref uart.h "uart"     | @ref mraa::Uart "Uart class" |
+| @ref common.h "common" | @ref mraa::mraa "mraa class" |
+</center>
+
+### Hello Mraa
+@snippet HelloEdison.java Interesting
+
+## Supported platforms
+
+Specific platform information for supported platforms is documented here:
+
+- @ref galileorevd
+- @ref galileorevh
+- @ref edison
+- @ref de3815
+- @ref minnowmax
+- @ref rasppi
+- @ref bananapi
+- @ref beaglebone
+- @ref phyboard-wega
+- @ref nuc5
+- @ref up
+- @ref joule
+- @ref ft4222
+
+## DEBUGGING
+
+Sometimes it just doesn't want to work, let us try and help you, you can file
+issues in github or join us in #mraa on freenode IRC, hang around for a little
+while because we're not necessarily on 24/7, but we'll get back to you! Have a
+glance at our @debugging page too
+
+## COMPILING
+
+More information on compiling is @ref building page.
+
+## CONTRIBUTING
+
+Please see the @ref contributing page, the @ref internals page may also be of
+use.
+
+## API Changelog
+
+Version @ref changelog here.

docs/index.md

@@ -1,9 +1,12 @@
-MRAA - Low Level Skeleton Library for Communication on Intel platforms
+libmraa - Low Level Skeleton Library for Communication on GNU/Linux platforms
 ==============
 
-Library in C/C++ to interface with Galileo & other Intel platforms, in a
-structured and sane API with port names/numbering that match boards & with
-bindings to javascript & python.
+Libmraa is a C/C++ library with bindings to Python, Javascript and Java to
+interface with the I/O on Galileo, Edison & other platforms, with a structured
+and sane API where port names/numbering matches the board that you are on. Use
+of libmraa does not tie you to specific hardware with board detection done at
+runtime you can create portable code that will work across the supported
+platforms.
 
 The intent is to make it easier for developers and sensor manufacturers to map
 their sensors & actuators on top of supported hardware and to allow control of
@@ -36,123 +39,34 @@ Specific platform information for supported platforms is documented here:
 
 - @ref galileorevd
 - @ref galileorevh
+- @ref edison
+- @ref de3815
+- @ref minnowmax
+- @ref rasppi
+- @ref bananapi
+- @ref beaglebone
+- @ref phyboard-wega
+- @ref nuc5
+- @ref up
+- @ref joule
+- @ref ft4222
 
-### ENV RECOMENDATIONS
+## DEBUGGING
 
-All of these are 'optional', however they are recommended. Only a C compiler,
-cmake, libm and pthreads are technically required to compile.
-
-- Swig 3.0.1+ built with node.js & python support (0.10.x)
-- doxygen
-- sphinx (requires doxygen)
-- pygments
+Sometimes it just doesn't want to work, let us try and help you, you can file
+issues in github or join us in #mraa on freenode IRC, hang around for a little
+while because we're not necessarily on 24/7, but we'll get back to you! Have a
+glance at our @debugging page too
 
 ## COMPILING
 
-More information on compiling is @ref building page
+More information on compiling is @ref building page.
 
 ## CONTRIBUTING
 
-Please see the @ref contributing page
+Please see the @ref contributing page, the @ref internals page may also be of
+use.
 
 ## API Changelog
 
-This changelog is meant as a quick & rough guide to what has changed between
-versions. The API is now fairly stable but when new calls/features are added
-they are listed here. Anything pre 0.2.x is ignored.
-
-**0.5.0**
-  * Intel Edison - Arduino board support.
-  * Boost Allowable i2c busses to 12
-  * Additional platform hooks added
-  * ADC is now 10bits by default on all platforms but can be changed
-
-**0.4.5**
-  * if only one spidev we default to it reguardless of number
-  * mraa_pwm_config_ms & mraa_pwm_config_percent functions added
-  * Uart C++ class added, adds python & node support
-  * galileo gen2 gpio modes supported
-
-**0.4.4**
-  * prefix SPI mode with MRAA_SPI_
-  * added C++ adc bitness calls
-
-**0.4.3**
-  * SPI Mode function now functional, API Change in SPI
-  * I2C read in swig worked on.
-  * Galileo Gen 2: PWM setting period sets all channel's period
-  * Galileo Gen 2: I2C setup now specific to Gen 2.
-  * General commits around freeing memory at the right times.
-
-**0.4.2**
-  * Barebone UART module added.
-  * Hook branch merged.
-  * I2C init hooks added.
-  * Intel Galileo Gen 2, I2C gpio pins now go hiz input when I2C initialised.
-
-**0.4.1**
-  * Rename python & nodejs modules to mraa
-  * common.hpp introduced for C++
-  * python & nodejs modules can now take binary strings for Spi & I2c
-  * improved Aio module and clear bitness
-  * Improved Galileo Gen 2 support
-
-**0.4.0**
-  * Rename to mraa
-  * get_platform_type function added.
-
-**0.3.1**
-  * Initial Intel Galileo Gen 2 support
-  * mraa_gpio_isr parameters added.
-  * Detection of different supported platforms added.
-
-**0.3.0**
-  * mraa_i2c_read now returns length of read
-
-**0.2.9**
-  * Add global mraa.h & mraa.hpp headers
-  * usage of "gpio.h" is not legal you need to use "mraa/gpio.h" unless adding
-    -L/usr/include/mraa
-
-**0.2.8**
-  * Added mraa_set_priority call
-  * Added mmap gpio call mraa_gpio_use_mmaped
-
-**0.2.7**
-  * C++ API now uses basic types and not unistd types as C
-  * Clearer and consistent use of unistd tpyes in C api
-
-**0.2.6**
-  * C++ examples added, using c++ headers/api.
-  * moved to open instead of fopen in all modules
-  * rename mraa_check functions and made them internal to mraa only.
-  * removed "export" functions from api
-  * Intel Galileo Gen 1 (rev d) fixes, incorrect definition of some items
-  * SPI, implementation completed.
-  * I2C internal function, completed.
-  * PWM fix bug in period set method.
-  * Swig upstream can be used for building.
-  * No longer builds docs on default cmake, needs flag
-  * GPIO/PWM ownership guard prevents closing on existing pins, still can be forced.
-
-**0.2.5**
-  * C++/Python/Node Enums/const names now do not contain MRAA_GPIO
-  * Enum type declaration for C++ changed
-  * Python/Node get_version() -> GetVersion()
-  * i2c read calls don't use const char* and i2c write calls do
-
-**0.2.4**
-  * All mraa_ contexts now are pointers to the actual struct which is not
-    delcared in the header. The only end user change is that instead of
-    returning a type mraa_gpio_context pointer mraa_gpio_init() now returns a
-    mraa_gpio_context (which is actually a pointer to struct _gpio internally).
-  * C++ API is available, use the .hpp headers and add stdc++  to the linker
-    flags.
-  * Initial SPI implementation is provided
-
-**0.2.3**
-  * mraa_aio_read_u16() -> mraa_aio_read()
-  * mraa_aio_read() now returns a uint16_t instead of an unsigned int
-
-**0.2.2**
-  * First version with API considered 'stable'
+Version @ref changelog here.

docs/intel_de3815.md

@@ -0,0 +1,38 @@
+Intel(R) NUC DE3815tykhe                            {#de3815}
+=============
+
+The DE3815 NUC Kit is a single core Atom(TM) clocked at 1.46GHz.
+http://www.intel.com/content/www/us/en/nuc/nuc-kit-de3815tykhe.html
+
+Interface notes
+---------------
+**GPIO** Not yet implemented.
+
+**PWM** Functionality for the PWM is provided by the `pwm_lpss` module `CONFIG_PWM_LPSS`
+
+**I2C** Depending on your system you may need to load `i2c-dev`
+
+Custom Solutions Header mapping
+-------------------------------
+Based on: http://downloadmirror.intel.com/23745/eng/DE3815TYBE_TechProdSpec06.pdf
+
+| MRAA Number | Physical Pin | Function     | Notes                |
+|-------------|--------------|--------------|----------------------|
+| 0           | 1            | 1.8V sby     |                      |
+| 1           | 2            | GND          |                      |
+| 2           | 3            | HDMI_CEC     |                      |
+| 3           | 4            | DMIC_CLK     |                      |
+| 4           | 5            | 3.3V sby     |                      |
+| 5           | 6            | DMIC_DATA    |                      |
+| 6           | 7            | Key (no pin) |                      |
+| 7           | 8            | SMB_ALERT#   |                      |
+| 8           | 9            | 5V sby (2A)  |                      |
+| 9           | 10           | SCI_SMI_GPIO |                      |
+| 10          | 11           | PWM[0]       | PWM Chip 0 Channel 0 |
+| 11          | 12           | PWM[1]       | PWM Chip 0 Channel 1 |
+| 12          | 13           | I2C0_CLK     | /dev/i2c-0 SCL       |
+| 13          | 14           | I2C0_DATA    | /dev/i2c-0 SDA       |
+| 14          | 15           | I2C1_CLK     | /dev/i2c-1 SCL       |
+| 15          | 16           | I2C1_DATA    | /dev/i2c-1-SDA       |
+| 16          | 17           | SMB_CLK      |                      |
+| 17          | 18           | SMB_DATA     |                      |

docs/intel_nuc5.md

@@ -0,0 +1,46 @@
+Intel NUC NUC5i5MYBE                             {#nuc5}
+====================
+
+Pinmuxing on the 5th generation Intel NUCs is done in the BIOS. This is only
+tested on bios 0024+ (MYBDWi5v.86A). By default the custom solution header is
+disabled, currently in Linux (as of 4.2). Both i2c buses are currently
+supported.
+
+The NUCs supported are the NUC5i5MYBE & NUC5i3MYBE which also come as the
+NUC5i5MYHE and NUC5i3MYHE motherboards. It's possible that others expose the IO
+in a very similar way so could be supported, get in touch if you have one!
+
+In the BIOS you are required to enable the following:
+Devices -> Onboard Devices - GPIO Lockdown
+Select I2c under GPIO for the 12/13 14/15 pins
+
+Interface notes
+---------------
+
+**I2C** Depending on your system you may need to load `i2c-dev`
+
+Custom Solutions Header mapping
+-------------------------------
+
+The mapping is the same as the DE3815tykhe.
+
+| MRAA Number | Physical Pin | Function     | Notes                |
+|-------------|--------------|--------------|----------------------|
+| 0           | 1            | 1.8V sby     |                      |
+| 1           | 2            | GND          |                      |
+| 2           | 3            | HDMI_CEC     |                      |
+| 3           | 4            | DMIC_CLK     |                      |
+| 4           | 5            | 3.3V sby     |                      |
+| 5           | 6            | DMIC_DATA    |                      |
+| 6           | 7            | Key (no pin) |                      |
+| 7           | 8            | SMB_ALERT#   |                      |
+| 8           | 9            | 5V sby (2A)  |                      |
+| 9           | 10           | SCI_SMI_GPIO |                      |
+| 10          | 11           | PWM[0]       |                      |
+| 11          | 12           | PWM[1]       |                      |
+| 12          | 13           | I2C0_CLK     | /dev/i2c-0 SCL       |
+| 13          | 14           | I2C0_DATA    | /dev/i2c-0 SDA       |
+| 14          | 15           | I2C1_CLK     | /dev/i2c-1 SCL       |
+| 15          | 16           | I2C1_DATA    | /dev/i2c-1-SDA       |
+| 16          | 17           | SMB_CLK      |                      |
+| 17          | 18           | SMB_DATA     |                      |

docs/internals.md

@@ -0,0 +1,180 @@
+libmraa Internals                       {#internals}
+=================
+
+For building see @ref building. This will describe the general internal build
+of libmraa and will be useful to developers who'd like to understand more of
+how libmraa works or who'd like to add additional platforms. The internals will
+deal with the C API as that is the low level API which libmraa is built around.
+Note that C++ is simply a header only wrapper of the C API.
+
+libmraa has the philosophy that the board mapping is what we typically use in
+the API with the execption of i2c/spi bus numbering as they are typically not
+labelled on boards and so we use the kernel numbering scheme. Whilst this can
+confuse some, it's typically not an issue as platforms rarely expose more than
+one of these for user use and so when this is the case, libmraa will always use
+the bus in the pinmapper. For example edison uses i2c #6 but since there is
+only one, libmraa will try to be helpful and everything is treated as 6 when
+doing a mraa_i2c_init(). The _raw functions will override the pinmapper and can
+be accessed without a valid board configuration. This can be helpful either in
+development of platform configurations for mraa or when modifying kernels
+etc... Internally the mechanism is used heavily.
+
+In libmraa, all code is split into 7 modules, src/{i2c, spi, gpio, uart, pwm,
+aio and common}. These should be fairly self explanatory in goals/purpose but a
+few work in different ways. Public APIs are stored in api/ and internal headers
+are in include/
+
+### Logging ###
+
+Logging is now done purely in syslog(). Note that on platforms running systemd
+journald will intercept syslog(3) calls and log to the journal instead. You can
+set the log mask by using mraa_set_log_level(). Doing a DEBUG build of libmraa
+will also cause the DEBUG macro to be defined which will cause the syslog mask
+to be unset.
+
+### Contexts ###
+
+libmraa uses contexts to store all information, this context cannot be accessed
+by the user and so it's layout can and may be changed without warning to users.
+If an init() function fails it will return NULL and further calls with this
+context will lead to undefined behaviour.
+
+### Pinmapper ###
+
+The mraa_board_t is defined in mraa/common.h. It's a mostly static structure
+initialised during mraa_init(). The pinmap file in
+src/{arch}/{manufacturer}_{boardname}_{revision}.c then fills this array. It's
+also where platform hooks can be defined, functions that will be run at various
+'hook' points in the code.
+
+The mraa_pininfo_t structure needs to be set for the board pincount (set in a
+macro in the platform configuration header. Every pin will have a
+mraa_pincapabilities_t which will define what it can do. The doxygen
+documentation explains how this works but it's essentially a bitfield which
+needs to be set for every capability the pin can have. Gpios can have multiple
+muxes which will be set at the gpio init before it can be toggled.
+
+### i2c ###
+
+I2c from userspace in GNU/Linux is handled by character devices handled by the
+kernel driver i2c-dev. For more details the i2c/dev-interface documentation
+file in the kernel is the place to go.
+
+In libmraa, we re-use part of a library - libi2c from RoadNarrows -
+i2c/smbus.c. This library simply makes it easier for us to handle the error
+conditions that can arrise when writing on i2c buses. Essentially the API is
+fairly simple consisting of writes & reads.
+
+Careful - on alot of platforms i2cdetect will often crash. To findi your i2c
+addresses please look at your sensor's datasheet! If using i2cdetect most
+platforms do not support SMBus quick write so use the '-r' flag.
+
+### spi ###
+
+Mraa deals exclusively with spidev, so when we say bus we really mean bus +
+chip select from spidev. Spi(0) could lead to spidev5.1 and Spi(1) to
+spidev5.2. Typically on a micro using a random gpio as a chip select works
+well, and on some platforms if one is careful with threads this can work well
+with mraa. However when a kernel module shares the same bus as spidev (but on a
+different CS) this behaviour is *very* dangerous. Platforms such as Galileo
+Gen2 & Edison + Arduino breakout board work this way. Mraa will not help you in
+using a non hardware chip select, do so at your own peril!
+
+### gpio ###
+
+GPIO is probably the most complicated and odd module in libmraa. It is based on
+the gpiolib kernel driver framework which uses sysfs. There is a lot of good
+documentation in gpio/sysfs.txt in the kernel docs.
+
+The main issue is that gpios on hobbyist boards typically come with a number of
+muxers or level shifters and are often mapped in crazy ways. libmraa's goal is
+to make the label on your board match the API :) We hope that pleases you.
+
+Because boards are very different we use alot of platform hooks (@ref hooks) to
+make the initialisation work on all platforms. The hope is that simple
+platforms with no level shifters or expanders will work with just the pinmap
+definition.
+
+GPIOs are typically interfaced via sysfs because that's easier for us but we
+can also work with fast gpio. This is typically preffered to do mmap gpio
+access. This is however trickier and typically relies on lots of platform
+hooks. By default we support hitting /dev/mem or another device at specific
+addresses to toggle gpios which is how mmap access works on some boards.
+
+Note that in Linux gpios are numbered from ARCH_NR_GPIOS down. This means that
+if ARCH_NR_GPIOS is changed, the gpio numbering will change. In 3.18+ the
+default changed from 256 to 512, sadly the value cannot be viewed from
+userspace so we rely on the kernel version to extrapolate the likely value.
+
+### uart ###
+
+libmraa does not support UART/serial as there are many good libraries that do
+this already. In the future we may wrap or use one. However the class exists to
+set the pinmapper correctly for uart to work on some platforms.
+
+### pwm ###
+
+Internally everything with PWM in mraa is in microseconds because that's what
+the linux kernel uses and is probably all the granularity we'll ever
+need/achieve with the kind of hardware we're targetting. Board configuration
+pwm max/min values are always set in microseconds.
+
+### aio ###
+
+AIO pins are numbered after GPIO pins. This means that on Arduino style boards
+pin 14 is A0. Typically mraa will only support an ADC if a platform ships with
+one and has a good kernel module for it. Extra i2c/spi ADCs can be supported
+via something like UPM but are unlikely to receive support in mraa at the moment.
+
+Note that giving mraa_aio_init(0) will literally query the pinmapper for
+board->gpio_count + 0 so you must place your aio pins after gpio_count. This is
+the default behaviour but can of course be overriden by advance function
+pointers. Whilst maybe not the sanest of defaults, most of the hobbyist boards
+we deal with follow a naming pattern similar to Arduino or have no ADC so for
+now we have considered this sensible.
+
+### Initialisation ###
+
+mraa_init() needs to be called in order to initialise the platform files or
+'pinmap'. Because calling this is tedious libmraa uses a C constructor to run
+mraa_init on library load. This means that it is not possible to stop this
+running and all function calls like mraa_set_log_level() will not work during
+mraa_init(). This feature is supported by most sane compilers and libcs but you
+can turn off CTORS in uclibc, though I've yet to find a configuration with
+someone doing that. mraa_init() can be called multiple times if you feel like
+being 'safe'.
+
+In the SWIG modules mraa_init() is called during the %init stage of the module
+loading. This is simply to avoid mraa_init() running 'too' early, though I've
+never seen an issue in running it in a CTOR.
+
+### SWIG ###
+
+At the time when libmraa was created (still the case?) the only - working -
+API/wrapper generation tool that supported nodejs was SWIG. For more general
+information on SWIG please see the SWIG documentation.
+
+The src/{javascript, python} & src/mraa.i folders contain all the files for the
+SWIG generation. The C++ headers in api/mraa/ are given as input sources to
+SWIG. SWIG modules do not link to libmraa (although maybe that would be a good
+idea...)
+
+Typemaps are used heavily to map uint8_t* pointers to bytearrays and
+node_buffers. These are native python & node.js types that represent uint8_t
+data the best and are very well supported in both languages. Argument
+conversions and memory allocations are performed so the performance of using
+these functions compared to the C/C++ equivalent will likely be a little lower,
+however it is much more natural than using carrays.i typemap library.
+
+### NPM ###
+
+mraa is published on NPM, there is a target to prebuild a mraa src tarball that
+can be built with node-gyp. The way this works is to use the mraa_LIB_SRCS
+array to generate a binding.gyp file from the skeleton binding.gyp.cmake in
+src/javascript. Because we don't expect most NPM users to have SWIG we
+precompile the src/mraajsJAVASCRIPT_wrap.cxx. The src/version.c is already
+known since this is a static tarball so we write that too. These files are
+placed not in a build/ directory but in the main mraa directory. You can then
+tar the directory up and send it to NPM. This is done automatically on every
+commit by our automated build system.
+

docs/joule.md

@@ -0,0 +1,142 @@
+Intel Joule {#joule}
+===========
+
+[http://www.intel.com/joule](http://www.intel.com/joule)
+
+The Intel Joule expansion board is supported by Mraa
+
+Revision Support
+----------------
+Intel Joule expansion board
+
+Interface notes
+---------------
+
+**SPI**
+
+Two SPI buses are available, with one chipselect each. Pins listed are MRAA
+numbered pins. Other chip selects are available if enabled in BIOS/EEPROM but
+cannot be enabled as BIOS options. You will need the spidev kernel module
+loaded, Ostro-XT and ref-os-iot does this by default.
+
+Bus 0 (32765)
+MOSI = 4
+MISO = 2
+CS = 6
+CLK = 10
+
+Bus 1 (32766)
+MOSI = 67
+MISO = 69
+CS0 = 59
+CS1 = 61
+CLK = 65
+
+(remove 40 from numbers to get pin header number for pins on low speed header
+2)
+
+**UART** Some pins are labelled as UARTs but are not configured in BIOS as UART
+so only available UART is on the FTDI header. Disable the getty on ttyS2 and
+use mraa's uart raw mode to initialise on ttyS2. The Jumper J8 can be used to
+switch between using the FTDI 6 pin header and the micro USB output.
+
+Pin Mapping
+-----------
+
+The Intel Joule expansion board has two breakouts, breakout #1 is 1-40 whilst breakout2 is 41-80. The
+LEDs are numbered from 100-103.
+
+ISH UART are named as: IURT.
+ISH I2C are named as:IIC.
+
+| MRAA Number | Physical Pin | Function |
+|-------------|--------------|----------|
+| 1           | GPIO         | GPIO     |
+| 2           | SPP1RX       | GPIO SPI |
+| 3           | PMICRST      | NONE     |
+| 4           | SPP1TX       | GPIO SPI |
+| 5           | 19.2mhz      | GPIO     |
+| 6           | SPP1FS0      | GPIO SPI |
+| 7           | UART0TX      | GPIO     |
+| 8           | SPP1FS2      | GPIO SPI |
+| 9           | PWRGD        | NONE     |
+| 10          | SPP1CLK      | GPIO SPI |
+| 11          | I2C0SDA      | I2C      |
+| 12          | I2S1SDI      | GPIO     |
+| 13          | I2C0SCL      | I2C      |
+| 14          | I2S1SDO      | GPIO     |
+| 15          | IIC0SDA      | I2C      |
+| 16          | I2S1WS       | GPIO     |
+| 17          | IIC0SCL      | I2C      |
+| 18          | I2S1CLK      | GPIO     |
+| 19          | IIC1SDA      | I2C      |
+| 20          | I2S1MCL      | GPIO     |
+| 21          | IIC1SCL	     | I2C      |
+| 22          | UART1TX	     | UART     |
+| 23          | I2S4SDO      | NONE     |
+| 24          | UART1RX      | UART     |
+| 25          | I2S4SDI	     | NONE     |
+| 26          | PWM0         | GPIO PWM |
+| 27          | I2S4BLK      | GPIO     |
+| 28          | PWM1         | GPIO PWM |
+| 29          | I2S4WS       | NONE     |
+| 30          | PWM2         | GPIO PWM |
+| 31          | I2S3SDO      | NONE     |
+| 32          | PWM3         | GPIO PWM |
+| 33          | I2S3SDI      | NONE     |
+| 34          | 1.8V         | NONE     |
+| 35          | I2S4BLK      | GPIO     |
+| 36          | GND          | NONE     |
+| 37          | GND          | NONE     |
+| 38          | GND          | NONE     |
+| 39          | GND          | NONE     |
+| 40          | 3.3V         | NONE     |
+| 41          | GND          | NONE     |
+| 42          | 5V           | NONE     |
+| 43          | GND          | NONE     |
+| 44          | 5V           | NONE     |
+| 45          | GND          | NONE     |
+| 46          | 3.3V         | NONE     |
+| 47          | GND          | NONE     |
+| 48          | 3.3V         | NONE     |
+| 49          | GND          | NONE     |
+| 50          | 1.8V         | NONE     |
+| 51          | GPIO         | GPIO     |
+| 52          | 1.8V         | NONE     |
+| 53          | PANEL        | GPIO     |
+| 54          | GND          | NONE     |
+| 55          | PANEL        | GPIO     |
+| 56          | CAMERA       | NONE     |
+| 57          | PANEL        | GPIO     |
+| 58          | CAMERA       | NONE     |
+| 59          | SPP0FS0      | GPIO SPI |
+| 60          | CAMERA       | NONE     |
+| 61          | SPP0FS1      | GPIO SPI |
+| 62          | SPI_DAT      | SPI      |
+| 63          | SPP0FS2      | GPIO SPI |
+| 64          | SPICLKB      | GPIO     |
+| 65          | SPI0CLK      | GPIO SPI |
+| 66          | SPICLKA      | GPIO     |
+| 67          | SPP0TX       | GPIO SPI |
+| 68          | UART0RX      | GPIO UART|
+| 69          | SPP0RX       | GPIO SPI |
+| 70          | UART0RT      | GPIO UART|
+| 71          | I2C1SDA      | I2C |
+| 72          | UART0CT      | GPIO UART|
+| 73          | I2C1SCL      | I2C |
+| 74          | IURT0TX      | GPIO UART|
+| 75          | I2C2SDA      | I2C |
+| 76          | IURT0RX      | GPIO UART|
+| 77          | I2C2SCL      | I2C |
+| 78          | IURT0RT      | GPIO UART|
+| 79          | RTC_CLK      | GPIO     |
+| 80          | IURT0CT      | GPIO UART|
+| 100         | LED100       | GPIO     |
+| 101         | LED101       | GPIO 	|
+| 102         | LED102       | GPIO 	|
+| 103         | LED103       | GPIO 	|
+| 104         | LEDWIFI      | GPIO     |
+| 105         | LEDBT        | GPIO     |
+
+To see a live pin mapping use the command:
+$ mraa-gpio list

docs/jsonplatform.md

@@ -0,0 +1,127 @@
+JSON platform {#jsonplat}
+=============
+
+JSON platform loading allows libmraa users who work with **simple** and unsupported
+boards to create JSON configuration files which libmraa understands, allowing
+libmraa to just 'work' with the unsupported platform. JSON platform **does not work**
+with boards which require advanced functions which overwrite default functionality or
+boards that require the mux functionality.
+
+Syntax
+------
+
+The JSON file that libmraa reads needs specific values to be set by default, they
+are required in every JSON file intended to be used to load the platform.
+The keywords are case sensitive so be aware when writing the JSON file.
+Each heading is a top level key in the JSON file, each key's type is Array
+
+### platform
+|Key          |Type   |Required   |Description                                    |
+|-------------|-------|-----------|-----------------------------------------------|
+|id           |int    |no         | An ID that can be assigned                    |
+|name         |string |yes        | The platform name                             |
+|pin_count    |int    |yes        | The total pin count                           |
+|gpio_count   |int    |no         | The subset of pincount which able to do GPIO  |
+|i2c_count    |int    |no         | The number of usable I2C ports                |
+|aio_count    |int    |no         | The number of usable AIO ports                |
+|spi_count    |int    |no         | The number of usable SPI ports                |
+|uart_count   |int    |no         | The total UART ports                          |
+|pwmDefPeriod |int    |no         | The default PWM period                        |
+|pwmMaxPeriod |int    |no         | The max PWM period                            |
+|pwmMinPeriod |int    |no         | The min PWM period                            |
+
+### layout
+
+**THIS INDEX'S THE PIN ARRAY**
+Each available pin specified using pin_count requires a label. There is no need to use an
+index identifier as the json objects are indexed as they are read, starting with the first
+json object being treated as index 0.
+
+The number of json objects in layout should be equal to the pin_count.
+
+|Key        |Type   |Required   |Description                                    |
+|-----------|-------|-----------|-----------------------------------------------|
+|label      |string |yes        | The label used to describe the pin            |
+|invalid    |boolean|no         | Sets the labeled pin as an invalid pin        |
+
+### GPIO
+
+**THIS INDEX'S THE PIN ARRAY**
+For the supported GPIO pins here is where we set the raw linux pin it needs to use, the
+index cannot exceed the total pin_count and the number of JSON ojects cannot exceed the
+gpio_count total. The index is also used to set the specified pin's capabilities. Each set
+of keys should be enclosed in a json object.
+
+|Key        |Type   |Required   |Description                          |
+|-----------|-------|-----------|-------------------------------------|
+|index      |int    |yes        | used to index the pin array         |
+|rawpin     |int    |yes        | used to reference the actual IO pin |
+
+### I2C
+
+**THIS INDEX'S THE I2C ARRAY**
+This is used to setup the I2C functionality. The total number of json objects and the index
+cannot exceed the i2c_count. Each set of keys should be enclosed in a json object.
+
+|Key        |Type   |Required   |Description                          |
+|-----------|-------|-----------|-------------------------------------|
+|index      |int    |yes        | Used to index the I2C array         |
+|rawpin     |int    |yes        | The sysfs pin                       |
+|sclpin     |int    |no         | The clock pin                       |
+|sdapin     |int    |no         | The data pin                        |
+|default    |boolean|no         | Sets the default I2C device used    |
+
+### AIO
+
+**THIS INDEX'S THE PIN ARRAY**
+This is used to setup which pins are able to perform AIO. Each set of keys should be
+enclosed in a json object.
+
+|Key        |Type   |Required   |Description                          |
+|-----------|-------|-----------|-------------------------------------|
+|index      |int    |yes        | Used to index the pin array         |
+|rawpin     |int    |yes        | The sysfs pin                       |
+
+### PWM
+
+**THIS INDEX'S THE PIN ARRAY**
+This is used to setup which IO pins can do PWM Each set of keys should be enclosed in a
+json object.
+
+|Key        |Type   |Required   |Description                    |
+|-----------|-------|-----------|-------------------------------|
+|index      |int    |yes        | Used to index the pin array   |
+|rawpin     |int    |yes        | The sysfs pin                 |
+|chipID     |int    |yes        | The parent ID                 |
+
+## SPI
+
+**THIS INDEX'S THE SPI ARRAY**
+This is used to setup the SPI functionality. The total number of json objects and the index
+cannot exceed the spi_count. Each set of keys should be enclosed in a json object.
+
+|Key        |Type   |Required   |Description                                 |
+|-----------|-------|-----------|--------------------------------------------|
+|index      |int    |yes        | The index into the SPI array               |
+|chipID     |int    |yes        | The parent ID                              |
+|clock      |int    |no         | The clock used for transmissions           |
+|miso       |int    |no         | Pin used for incoming data from the slave  |
+|mosi       |int    |no         | Pin used for outgoing data from the master |
+|chipselect |int    |no         | Pin used to select the slave device        |
+|default    |boolean|no         | Sets the default SPI device                |
+
+### UART
+
+**THIS INDEX'S THE UART ARRAY**
+This is used to setup the UART functionality. The total number of json objects and the index
+cannot exceed the uart_count. Each set of keys should be enclosed in a json object.
+
+|Key        |Type   |Required   |Description                              |
+|-----------|-------|-----------|-----------------------------------------|
+|index      |int    |yes        | Used to index the UART array            |
+|chipID     |int    |yes        | Parent ID                               |
+|rawpin     |int    |yes        | Sysfs pin                               |
+|rx         |int    |no         | Read pin                                |
+|tx         |int    |no         | Transmit pin                            |
+|path       |string |yes        | Used to talk to a connected UART device |
+|default    |boolean|no         | Sets the default UART device            |

docs/minnow_max.md

@@ -0,0 +1,62 @@
+Intel(R) MinnowBoard Max / MinnowBoard Turbot              {#minnowmax}
+=============================================
+MinnowBoard MAX is an open hardware embedded board designed with the Intel(R)
+Atom(TM) E38xx series SOC (formely Bay Trail). The MinnowBoard Turbot is a
+backward compatible revision with performance and hardware improvements.
+https://www.minnowboard.org/learn-more/minnowboard-max-compatible-with-upgrades
+
+For product overview and faq see https://www.minnowboard.org/faq
+
+For technical details see https://www.minnowboard.org/board-viewer or the
+legacy board https://www.minnowboard.org/minnowboard-max
+
+Supported Firmware
+------------------
+mraa has only been tested with 64 bit firmware version 0.73 or later.
+
+SPI
+---
+For SPI support you need to load the low_speed_spidev kernel module and that
+will create the /dev/spidev0.0 device node. Mraa only knows about this one SPI
+bus and no other.
+
+Interface notes
+---------------
+The low speed I/O connector supported as per table below.  This assumes default
+BIOS settings, as they are not dynamcially detected If any changes are mode
+(Device Manager -> System Setup -> South Cluster -> LPSS & CSS) them mraa calls
+will not behave as expected.
+
+Documentation shows i2c on bus #5, ACPI shows it on bus #6, but driver uses
+bus #7.
+
+| MRAA Number | Physical Pin  | Function   | Sysfs GPIO | Notes                |
+|-------------|---------------|------------|------------|----------------------|
+| 1           | 1             | GND        |            |                      |
+| 2           | 2             | GND        |            |                      |
+| 3           | 3             | 5v         |            |                      |
+| 4           | 4             | 3.3v       |            |                      |
+| 5           | 5             | SPI_CS     | 220        | SPI (via low_speed)  |
+| 6           | 6             | UART1_TXD  | 225        | UART1                |
+| 7           | 7             | SPI_MISO   | 221        | SPI (via low_speed)  |
+| 8           | 8             | UART1_RXD  | 224        | UART1                |
+| 9           | 9             | SPI_MOSI   | 222        | SPI (via low_speed)  |
+| 10          | 10            | UART1_CTS  | 227        | GPIO                 |
+| 11          | 11            | SPI_CLK    | 223        | SPI (via low_speed)  |
+| 12          | 12            | UART1_RTS  | 226        | GPIO                 |
+| 13          | 13            | I2C_SCL    | 243        | /dev/i2c-7           |
+| 14          | 14            | I2S_CLK    | 216        | GPIO                 |
+| 15          | 15            | I2C_SDA    | 242        | /dev/i2c-7           |
+| 16          | 16            | I2S_FRM    | 217        | GPIO                 |
+| 17          | 17            | UART2_TXD  | 229        | UART2                |
+| 18          | 18            | I2S_DO     | 219        | GPIO                 |
+| 19          | 19            | UART2_RXD  | 228        | UART2                |
+| 20          | 20            | I2S_DI     | 218        | GPIO                 |
+| 21          | 21            | GPIO_S5_0  |  82        | GPIO                 |
+| 22          | 22            | PWM0       | 248        | PWM Chip 0 Channel 0 |
+| 23          | 23            | GPIO_S5_1  |  83        | GPIO                 |
+| 24          | 24            | PWM1       | 249        | PWM Chip 1 Channel 0 |
+| 25          | 25            | S5_4       |  84        | GPIO                 |
+| 26          | 26            | IBL_8254   | 208        | GPIO / I2S MCLK (tb) |
+
+*(tb) New assignment on the MinnowBoard Turbot

docs/mock.md

@@ -0,0 +1,104 @@
+Mock platform   {#mock}
+=============
+
+Mocking capability allows libmraa user to work with the library without any real
+hardware available. Enabling this requires library recompilation with architecture
+override (see Building section below). When mock is enabled, library simulates
+actual HW operations at the backend so that for the application it looks
+like a usual board. Being implemented at the backend, the functionality is available
+in all language bindings libmraa supports.
+
+Board configuration
+-------------------
+
+This feature is yet in the experimental mode and not all functionality is available.
+Right now we simulate a single generic board with:
+* GPIO (without ISR)
+* ADC with 10 (std)/12 (max) bit resolution, which returns random values on read
+* Single I2C bus with one device at address 0x33 and 10 bytes of register space,
+which can be read or written in bytes or words (big-endian). Technically those
+registers are just an array of `uint8_t`, so you can treat them as 10 single-byte
+registers or 5 single-word ones or a mix thereof.
+* Single SPI bus with one Chip Select. All write functions are supported, received
+data items (words or bytes) are calculated from the sent ones using
+`sent_byte (or word) XOR constant` formula.
+See [SPI mock header](../include/mock/mock_board_spi.h#L38-L39) for constant values.
+* Single UART port. All functions are supported, but many are simple stubs. Write
+always succeeds, read returns 'Z' symbol as many times as `read()` requested.
+
+We plan to develop it further and all [contributions](../CONTRIBUTING.md) are more than welcome.
+
+See the table below for pin layout and features
+
+| MRAA Number | Pin Name |            Notes                      |
+|-------------|----------|---------------------------------------|
+| 0           | GPIO0    | GPIO pin, no muxing, no ISR           |
+| 1           | ADC0     | AIO pin, returns random value on read |
+| 2           | I2C0SDA  | SDA pin for I2C0 bus                  |
+| 3           | I2C0SCL  | SCL pin for I2C0 bus                  |
+| 4           | SPI0CS   | CS pin for SPI0 bus                   |
+| 5           | SPI0MOSI | MOSI pin for SPI0 bus                 |
+| 6           | SPI0MISO | MISO pin for SPI0 bus                 |
+| 7           | SPI0SCLK | SCLK pin for SPI0 bus                 |
+| 8           | UART0RX  | RX pin for UART0 port                 |
+| 9           | UART0TX  | TX pin for UART0 port                 |
+
+Building
+--------
+
+Generally all the building steps are the same as listed
+in the [main building guide](./building.md), you just need to set some specific
+CMake options.
+
+### Linux
+
+To build under Linux, follow standard instructions, just make sure to set
+the `-DBUILDARCH="MOCK"` CMake option.
+
+### Windows
+
+Mocking capability allows us to build and use libmraa under Windows. That helps
+if you e.g. don't want to leave your customary Windows-based Python IDE, but
+want to develop libmraa-based programs.
+
+Building Node.js bindings was not yet tested under Windows as MSYS2
+does not have a ready-made package. Java was not tested either.
+
+#### Prerequisites
+
+You'll need the following to build libmraa under Windows:
+
+* [MSYS2](http://mingw-w64.org/doku.php/download/msys2) basic installation
+* Several additional packages, install them by running
+
+  ```bash
+  pacman -S cmake base-devel gcc git
+  ```
+
+#### Compiling
+
+The procedure is conceptually the same as under Linux - you first need to run
+CMake with specific options to generate makefiles and then run make to build everything.
+
+* Run MSYS2 shell (not a MinGW one)
+* Clone the libmraa git repo (let's assume into `/home/test/mraa/mraa-src` dir)
+* Create a build directory outside of the clone one (let's say `/home/test/mraa/mraa-build`)
+* Run CMake, switching off unsupported options and enabling mock platform:
+
+  ```bash
+  cmake ../mraa-src/ -DBUILDARCH="MOCK" -DBUILDSWIGNODE=OFF -DENABLEEXAMPLES=OFF
+  ```
+
+* Make, install and test:
+
+  ```bash
+  make clean && make install && make test
+  ```
+
+  All tests should pass.
+
+**Note:** To have autocompletion in Python IDE, just point it to MSYS2's Python
+and make sure to specify any additional paths pointing to site-packages dir
+with mraa module if IDE requires that ("Interpreter Paths" in PyCharm).
+With the above settings the module will be installed into `/usr/local/lib/python2.7/site-packages`
+and the libmraa itself - into `/usr/local/bin`.

docs/npm.md

@@ -0,0 +1,53 @@
+mraa NPM pkg                        {#npmpkg}
+============
+
+What you are looking at is a tarball made after 'make npmpkg' has been run on
+our build system. It contains a few prebuilt files in order to build easily
+with node-gyp on most systems. Note that this is not the preffered way of
+building libmraa and if you'd like to contribute, please learn how the build
+system works and get your sources from git.
+
+Any patches for mraajsJAVASCRIPT_wrap.cxx or version.c will be ignored as these
+are automatically generated files. When you execute a build from node-gyp/npm
+you do not generate the mraajsJAVASCRIPT_wrap.cxx file but rather use one that
+we have generated for you.
+
+Recreating tarball
+------------------
+
+You can run the following commands to 'generate' this tarball from a checkout
+of mraa.  It's important to not leave a .git directory as npm will then
+consider the tarball contains a full git tree. You also you need a top level
+dir which matches the npm pkg name so we create one with a symlink and add the
+'h' flag to tar to follow symlinks.
+
+~~~~~~~~~~~~~{.sh}
+mkdir build
+cd build
+cmake -DBUILDSWIGNODE=ON -DJSONPLAT=OFF ..
+make npmpkg
+ln -s ../ mraa
+tar hczv --exclude='build*' --exclude='.gitignore' --exclude='.git' --exclude='build*/*' --exclude='.git/*' -f mraa.tar.gz mraa
+~~~~~~~~~~~~~
+
+You need to disable jsonplatform otherwise you will need to change the
+binding.gyp file to include those sources and make sure target platform has
+json-c headers & libs.
+
+Building with node-gyp
+----------------------
+
+You can build with node-gyp using the binding.gyp file, obviously this requires
+either the prebuilt tarball from npm or to do the above to generate it with the
+npmpkg target. Note the --target='' flag will not work since binding.gyp will
+do a check for the running node v8 version, you'll also need to run that
+version (or close to) in your $PATH.
+
+~~~~~~~~~~~{.sh}
+node-gyp configure --python=/usr/bin/python2
+node-gyp build --python=/usr/bin/python2 --verbose
+~~~~~~~~~~~
+
+Note that no cross compilation is available without modifying the --arch flag
+manually. If you want to cross compile, it's recommended to use cmake.
+

docs/phyboard-wega.md

@@ -0,0 +1,237 @@
+phyBOARD-Wega    {#phyboard-wega}
+=============
+
+The phyBOARD-Wega for phyCORE-AM335x is a low-cost, feature-rich software
+development platform supporting the Texas Instruments AM335x microcontroller.
+
+Moreover, due to the numerous standard interfaces the phyBOARD-Wega AM335x can
+serve as bedrock for your application. At the core of the phyBOARD-Wega is the
+PCL-051/phyCORE-AM335x System on Module (SOM) in a direct solder form factor,
+containing the processor, DRAM, NAND Flash, power regulation, supervision,
+transceivers, and other core functions required to support the AM335x
+processor. Surrounding the SOM is the PBA-CD-02/phyBOARD-Wega carrier board,
+adding power input, buttons, connectors, signal breakout, and Ethernet
+connectivity amongst other things.
+
+There are (for example) some expansion boards available for the phyBOARD-Wega:
+- Power Module (PEB-POW-01)
+- Evaluation Board (PEB-EVAL-01)
+- HDMI Adapter (PEB-AV-01)
+
+For further information and instruction please visit:
+www.phytec.de/produkt/system-on-modules/single-board-computer/phyboard-wega
+
+
+Interface notes
+---------------
+
+**SPI**
+Spi0 can be used over pins on X69 connector. There are no more spi-devices.
+Independent of the given index in mraa_phyboard_spi_init_pre() function,
+it will be always initialized spi0.
+
+**I2C**
+/* TODO */
+
+**UART**
+Uart0 can be used over pins on X69 connector or serial port on Evaluation Board.
+The other Uarts not have been tested yet. This is a small TODO for future.
+
+
+Pin Assignment of X69 Expansion Connector
+-----------------------------------------
+
+| Physical Pin | Signal Name         | Type | SL    | Description             |
+|--------------|---------------------|------|-------|-------------------------|
+| 1            | VCC3V3              | OUT  | 3.3 V | 3.3V power supply       |
+| 2            | VCC5V               | OUT  | 5.0 V | 5V power supply         |
+| 3            | VDIG1_1P8V          | OUT  | 1.8 V | 1.8V power supply       |
+|              |                     |      |       |      (max. 300mA)       |
+| 4            | GND                 | -    | -     | Ground                  |
+| 5            | X_SPIO_CS0          | OUT  | 3.3 V | SPI 0 chip select 0     |
+| 6            | X_SPIO_MOSI         | OUT  | 3.3 V | SPI 0 master output /   |
+|              |                     |      |       |       slave input       |
+| 7            | X_SPIO_MISO         | IN   | 3.3 V | SPI 0 master input /    |
+|              |                     |      |       |       slave output      |
+| 8            | X_SPIO_CLK          | OUT  | 3.3 V | SPI 0 clock output      |
+| 9            | GND                 | -    | -     | Ground                  |
+| 10           | X_UART0_RXD         | IN   | 3.3 V | UART 0 receive data     |
+|              |                     |      |       |      (std. debug iface) |
+| 11           | X_I2C0_SDA          | I/O  | 3.3 V | I2C0 Data               |
+| 12           | X_UART0_TXD         | OUT  | 3.3 V | UART 0 transmit data    |
+|              |                     |      |       |      (std. debug iface) |
+| 13           | X_I2C0_SCL          | I/O  | 3.3 V | I2C0 Clock              |
+| 14           | GND                 | -    | -     | Ground                  |
+| 15           | X_JTAG_TMS          | IN   | 3.3 V | JTAG Chain Test         |
+|              |                     |      |       |      Mode Select signal |
+| 16           | X_nJTAG_TRST        | IN   | 3.3 V | JTAG Chain Test Reset   |
+| 17           | X_JTAG_TDI          | IN   | 3.3 V | JTAG Chain Test         |
+|              |                     |      |       |      Data Input         |
+| 18           | X_JTAG_TDO          | OUT  | 3.3 V | JTAG Chain Test         |
+|              |                     |      |       |      Data Output        |
+| 19           | GND                 | -    | -     | Ground                  |
+| 20           | X_JTAG_TCK          | IN   | 3.3 V | JTAG Chain Test         |
+|              |                     |      |       |      Clock signal       |
+| 21           | X_USB_DP_EXP        | I/O  | 3.3 V | USB data plus           |
+|              |                     |      |       |      (for USB0 or USB1) |
+| 22           | X_USB_DM_EXP        | I/O  | 3.3 V | USB data minus          |
+|              |                     |      |       |      (for USB0 or USB1) |
+| 23           | nRESET_OUT          | OUT  | 3.3 V | Reset                   |
+| 24           | GND                 | -    | -     | Ground                  |
+| 25           | X_MMC2_CMD          | I/O  | 3.3 V | MMC command             |
+| 26           | X_MMC2_DATO         | I/O  | 3.3 V | MMC data 0              |
+| 27           | X_MMC2_CLK          | I/O  | 3.3 V | MMC clock               |
+| 28           | X_MMC2_DAT1         | I/O  | 3.3 V | MMC data 1              |
+| 29           | GND                 | -    | -     | Ground                  |
+| 30           | X_MMC2_DAT2         | I/O  | 3.3 V | MMC data 2              |
+| 31           | X_UART2_RX_GPIO3_9  | I/O  | 3.3 V | UART 2 receive data     |
+|              |                     |      |       | or GPIO3_9              |
+| 32           | X_MMC2_DAT3         | I/O  | 3.3 V | MMC data 3              |
+| 33           | X_UART2_TX_GPIO3_10 | I/O  | 3.3 V | UART 2 transmit data    |
+|              |                     |      |       | or GPIO3_10             |
+| 34           | GND                 | -    | -     | Ground                  |
+| 35           | X_UART3_RX_GPIO2_18 | I/O  | 3.3 V | UART 3 receive data     |
+|              |                     |      |       | or GPIO2_18             |
+| 36           | X_UART3_TX_GPIO2_19 | I/O  | 3.3 V | UART 3 transmit data    |
+|              |                     |      |       |        or GPIO2_19      |
+| 37           | X_INTR1_GPIO0_20    | I/O  | 3.3 V | Interrupt 1 or GPIO0_20 |
+| 38           | X_GPIO0_7           | I/O  | 3.3 V | GPIO0_7                 |
+| 39           | X_AM335_EXT_WAKEUP  | IN   | 3.3 V | External wakeup         |
+| 40           | X_INT_RTCn          | OUT  | 3.3 V | Interrupt from the RTC  |
+| 41           | GND                 | -    | -     | Ground                  |
+| 42           | X_GPIO3_7_nPMOD_PW  | I/O  | 3.3 V | GPIO3_7; Caution! Also  |
+|              | RFAIL               |      |       | connected to power fail |
+|              |                     |      |       | signal through R415.    |
+| 43           | nRESET_IN           | IN   | 3.3 V | Push-button reset       |
+| 44           | X_GPIO1_31          | I/O  | 3.3 V | GPIO1_31                |
+| 45           | X_AM335_NMIn        | IN   | 3.3 V | AM335x                  |
+|              |                     |      |       | non-maskable interrupt  |
+| 46           | GND                 | -    | -     | Ground                  |
+| 47           | X_AIN4              | IN   | 1.8 V | Analog input 4          |
+| 48           | X_AIN5              | IN   | 1.8 V | Analog input 5          |
+| 49           | X_AIN6              | IN   | 1.8 V | Analog input 6          |
+| 50           | X_AIN7              | IN   | 1.8 V | Analog input 7          |
+| 51           | GND                 | -    | -     | Ground                  |
+| 52           | X_GPIO_CKSYNC       | I/O  | 3.3 V | GPIO Clock              |
+|              |                     |      |       | Synchronization         |
+| 53           | X_USB_ID_EXP        | IN   | 1.8 V | USB port identification |
+|              |                     |      |       |      (for USB0 or USB1) |
+| 54           | USB_VBUS_EXP        | OUT  | 5.0 V | USB bus voltage         |
+|              |                     |      |       |      (for USB0 or USB1) |
+| 55           | X_USB1_CE           | OUT  | 3.3 V | USB 1 charger enable    |
+| 56           | GND                 | -    | -     | Ground                  |
+| 57           | VCC_BL              | OUT  | NS    | Backlight power supply  |
+| 58           | X_BP_POWER          | IN   | 5.0 V | Power On for Power      |
+|              |                     |      |       | Management IC for AM335x|
+| 59           | GND                 | -    | -     | Ground                  |
+| 60           | VCC5V_IN            | IN   | 5.0 V | 5 V input supply voltage|
+
+
+Pin Assignment of X70 A/V Connector
+-----------------------------------
+
+| Physical Pin | Signal Name         | Type | SL    | Description             |
+|--------------|---------------------|------|-------|-------------------------|
+| 1            | GND                 | -    | -     | Ground                  |
+| 2            | X_LCD_D21           | OUT  | 3.3 V | LCD D21                 |
+| 3            | X_LCD_D18           | OUT  | 3.3 V | LCD D18                 |
+| 4            | X_LCD_D16           | OUT  | 3.3 V | LCD D16                 |
+| 5            | X_LCD_D0            | OUT  | 3.3 V | LCD D0                  |
+| 6            | GND                 | -    | -     | Ground                  |
+| 7            | X_LCD_D1            | OUT  | 3.3 V | LCD D1                  |
+| 8            | X_LCD_D2            | OUT  | 3.3 V | LCD D2                  |
+| 9            | X_LCD_D3            | OUT  | 3.3 V | LCD D3                  |
+| 10           | X_LCD_D4            | OUT  | 3.3 V | LCD D4                  |
+| 11           | GND                 | -    | -     | Ground                  |
+| 12           | X_LCD_D22           | OUT  | 3.3 V | LCD D22                 |
+| 13           | X_LCD_D19           | OUT  | 3.3 V | LCD D19                 |
+| 14           | X_LCD_D5            | OUT  | 3.3 V | LCD D5                  |
+| 15           | X_LCD_D6            | OUT  | 3.3 V | LCD D6                  |
+| 16           | GND                 | -    | -     | Ground                  |
+| 17           | X_LCD_D7            | OUT  | 3.3 V | LCD D7                  |
+| 18           | X_LCD_D8            | OUT  | 3.3 V | LCD D8                  |
+| 19           | X_LCD_D9            | OUT  | 3.3 V | LCD D9                  |
+| 20           | X_LCD_D10           | OUT  | 3.3 V | LCD D10                 |
+| 21           | GND                 | -    | -     | Ground                  |
+| 22           | X_LCD_D23           | OUT  | 3.3 V | LCD D23                 |
+| 23           | X_LCD_D20           | OUT  | 3.3 V | LCD D20                 |
+| 24           | X_LCD_D17           | OUT  | 3.3 V | LCD D17                 |
+| 25           | X_LCD_D11           | OUT  | 3.3 V | LCD D11                 |
+| 26           | GND                 | -    | -     | Ground                  |
+| 27           | X_LCD_D12           | OUT  | 3.3 V | LCD D12                 |
+| 28           | X_LCD_D13           | OUT  | 3.3 V | LCD D13                 |
+| 29           | X_LCD_D14           | OUT  | 3.3 V | LCD D14                 |
+| 30           | X_LCD_D15           | OUT  | 3.3 V | LCD D15                 |
+| 31           | GND                 | -    | -     | Ground                  |
+| 32           | X_LCD_PCLK          | OUT  | 3.3 V | LCD Pixel Clock         |
+| 33           | X_LCD_BIAS_EN       | OUT  | 3.3 V | LCD BIAS                |
+| 34           | X_LCD_HSYNC         | OUT  | 3.3 V | LCD Horizontal          |
+|              |                     |      |       |     Synchronization     |
+| 35           | X_LCD_VSYNC         | OUT  | 3.3 V | LCD Vertical            |
+|              |                     |      |       |     Synchronisation     |
+| 36           | GND                 | -    | -     | Ground                  |
+| 37           | GND                 | -    | -     | Ground                  |
+| 38           | X_PWM1_OUT          | OUT  | 3.3 V | Pulse Width Modulation  |
+| 39           | VCC_BL              | OUT  | NS    | Backlight power supply  |
+| 40           | VCC5V               | OUT  | 5.0 V | 5 V power supply        |
+
+
+Pin Assignment of X71 A/V Connector
+-----------------------------------
+
+| Physical Pin | Signal Name         | Type | SL    | Description             |
+|--------------|---------------------|------|-------|-------------------------|
+| 1            | X_I2S_CLK           | I/O  | 3.3 V | I2S Clock               |
+| 2            | X_I2S_FRM           | I/O  | 3.3 V | I2S Frame               |
+| 3            | X_I2S_ADC           | I/O  | 3.3 V | I2S Analog-Digital      |
+|              |                     |      |       |  converter (microphone) |
+| 4            | X_I2S_DAC           | I/O  | 3.3 V | I2S Digital-Analog      |
+|              |                     |      |       |  converter (speaker)    |
+| 5            | X_AV_INT_GPIO1_30   | I/O  | 3.3 V | A/V interrupt; GPIO1_30 |
+| 6            | nUSB1_OC_GPIO3_19 or| I/O  | 3.3 V | GPIO3_19 or McASP0      |
+|          | X_MCASP0_AHCLKX_GPIO3_21|      |       | high frequency clock    |
+| 7            | GND                 | -    | -     | Ground                  |
+| 8            | nRESET_OUT          | OUT  | 3.3 V | Reset                   |
+| 9            | TS_X+               | IN   | 1.8 V | Touch X+                |
+| 10           | TS_X-               | IN   | 1.8 V | Touch X-                |
+| 11           | TS_Y+               | IN   | 1.8 V | Touch Y+                |
+| 12           | TS_Y-               | IN   | 1.8 V | Touch Y-                |
+| 13           | VCC3V3              | OUT  | 3.3 V | 3.3 V power supply      |
+| 14           | GND                 | -    | -     | Ground                  |
+| 15           | X_I2C0_SCL          | I/O  | 3.3 V | I2C Clock               |
+| 16           | X_I2C0_SDA          | I/O  | 3.3 V | I2C Data                |
+
+Jumper J77 connects either signal X_MCASP0_AHCLKX_GPIO3_21 or signal
+nUSB1_OC_GPIO3_19 to pin 6 of X71.
+The following table shows the available configurations:
+
+A/V Jumper configuration J77
+----------------------------
+
+| J77 | Description              |
+|-----|--------------------------|
+| 1+2 | X_MCASP0_AHCLKX_GPIO3_21 |
+| 2+3 | nUSB1_OC_GPIO3_19        |
+
+Caution: If J77 is set to 2+3 , J78 also has to be set to 2+3 !
+
+
+GPIO - Pin-mapping (with installed expansion board)
+---------------------------------------------------
+
+| Physical Pin | Pin-Name      | Pin-Map / Sysfs GPIO | Def. usage | Connector|
+|--------------|---------------|----------------------|------------|----------|
+| 31           | X_GPIO3_9     | 105                  | OUT  LED3  | X69      |
+| 33           | X_GPIO3_10    | 106                  | IN   S3    | X69      |
+| 35           | X_GPIO2_18    |  82 (busy)           | OUT  LED1  | X69      |
+| 36           | X_GPIO2_19    |  83                  | OUT  LED2  | X69      |
+| 37           | X_GPIO0_20    |  20 (busy)           | IN   S1    | X69      |
+| 38           | X_GPIO0_7     |   7                  | IN   S2    | X69      |
+| 42           | X_GPIO3_7     | 103                  | IN         | X69      |
+| 44           | X_GPIO1_31    |  63                  | IN         | X69      |
+|--------------|---------------|----------------------|------------|----------|
+| 5 (105)      | X_GPIO1_30    |  62                  | IN         | X71      |
+| 6 (106)      | X_GPIO3_19 or | 115                  | IN         | X71      |
+|              | X_GPIO3_21    | 117                  | IN         | X71      |
+
+Info: (busy) means, that it is used by kernel driver!

docs/platform-hooks.md

@@ -1,16 +1,25 @@
-Hooks can be defined per supported platform to allow for highly custom operations if needed.
-This feature of MRAA should only be used by developers defining the board definitions, NOT an end user.
+platform-hooks                             {#hooks}
+==============
+
+Hooks can be defined per supported platform to allow for highly custom
+operations if needed.  This feature of MRAA should only be used by developers
+defining the board definitions, NOT an end user.
 
 ##Types of Hooks
 
 ###REPLACE
-Defining a replace function will entirely replace the associate function. This should only be done if your new function can handle everything the mraa function would normally.
+Defining a replace function will entirely replace the associate function. This
+should only be done if your new function can handle everything the mraa
+function would normally.
 
 ###PRE
-Any functionality defined here will be performed when the main function is called.
+Any functionality defined here will be performed when the main function is
+called.
 
 ###POST
-Any functionality perfomed here is done just before the normal function returns. All post functions will have passed into them the return value that would normally be returned.
+Any functionality perfomed here is done just before the normal function
+returns. All post functions will have passed into them the return value that
+would normally be returned.
 
 ##Hooks
 ### GPIO

docs/raspberry_pi.md

@@ -0,0 +1,100 @@
+Raspberry Pi    {#rasppi}
+============
+
+The Raspberry Pi is based on the Broadcom BCM2835 system on a chip, which
+includes an ARM1176JZF-S 700 MHz processor, VideoCore IV GPU and was originally
+shipped with 256 megabytes of RAM, later upgraded (Model B & Model B+) to 512
+MB. The Raspberry Pi 2 is based on an armv7 CPU but shares a number of
+similarities with the original.
+
+Revision Support
+----------------
+Raspberry Pi A/B/A+/B+
+Raspberry Pi 2 B
+
+Interface notes
+---------------
+
+**PWM** Whilst the Raspberry Pi is meant to have 1 PWM channel this is currently not supported.
+
+Pin Mapping
+-----------
+
+This pin mapping refers to the first generation 'B' model Pi but gives an idea
+as to what the values are from mraa. Note that there is an emum to use wiringPi
+style numbers.
+
+| MRAA Number | Physical Pin | Function |
+|-------------|--------------|----------|
+| 1           | P1-01        | 3V3 VCC  |
+| 2           | P1-02        | 5V VCC   |
+| 3           | P1-03        | I2C SDA  |
+| 4           | P1-04        | 5V VCC   |
+| 5           | P1-05        | I2C SCL  |
+| 6           | P1-06        | GND      |
+| 7           | P1-07        | GPIO(4)  |
+| 8           | P1-08        | UART TX  |
+| 9           | P1-09        | GND      |
+| 10          | P1-10        | UART RX  |
+| 11          | P1-11        | GPIO(17) |
+| 12          | P1-12        | GPIO(18) |
+| 13          | P1-13        | GPIO(21) |
+| 14          | P1-14        | GND      |
+| 15          | P1-15        | GPIO(22) |
+| 16          | P1-16        | GPIO(23) |
+| 17          | P1-17        | 3V3 VCC  |
+| 18          | P1-18        | GPIO(24) |
+| 19          | P1-19        | SPI MOSI |
+| 20          | P1-20        | GND      |
+| 21          | P1-21        | SPI MISO |
+| 22          | P1-22        | GPIO(25) |
+| 23          | P1-23        | SPI SCL  |
+| 24          | P1-24        | SPI CS0  |
+| 25          | P1-25        | GND      |
+| 26          | P1-26        | SPI CS1  |
+
+
+The following pin mapping applies to the new Raspberry Pi model 2 and B+. Note that GPIO(21) is now GPIO(27)
+
+| MRAA Number | Physical Pin | Function |
+|-------------|--------------|----------|
+| 1           | P1-01        | 3V3 VCC  |
+| 2           | P1-02        | 5V VCC   |
+| 3           | P1-03        | I2C SDA  |
+| 4           | P1-04        | 5V VCC   |
+| 5           | P1-05        | I2C SCL  |
+| 6           | P1-06        | GND      |
+| 7           | P1-07        | GPIO(4)  |
+| 8           | P1-08        | UART TX  |
+| 9           | P1-09        | GND      |
+| 10          | P1-10        | UART RX  |
+| 11          | P1-11        | GPIO(17) |
+| 12          | P1-12        | GPIO(18) |
+| 13          | P1-13        | GPIO(27) |
+| 14          | P1-14        | GND      |
+| 15          | P1-15        | GPIO(22) |
+| 16          | P1-16        | GPIO(23) |
+| 17          | P1-17        | 3V3 VCC  |
+| 18          | P1-18        | GPIO(24) |
+| 19          | P1-19        | SPI MOSI |
+| 20          | P1-20        | GND      |
+| 21          | P1-21        | SPI MISO |
+| 22          | P1-22        | GPIO(25) |
+| 23          | P1-23        | SPI SCL  |
+| 24          | P1-24        | SPI CS0  |
+| 25          | P1-25        | GND      |
+| 26          | P1-26        | SPI CS1  |
+| 27          | P1-27        | I2C SDA1 |
+| 28          | P1-28        | I2C SCL1 |
+| 29          | P1-29        | GPIO(5)  |
+| 30          | P1-30        | GND      |
+| 31          | P1-31        | GPIO(6)  |
+| 32          | P1-32        | GPIO(12) |
+| 33          | P1-33        | GPIO(13) |
+| 34          | P1-34        | GND      |
+| 35          | P1-35        | SPI MISO1|
+| 36          | P1-36        | GPIO(16) |
+| 37          | P1-37        | GPIO(26) |
+| 38          | P1-38        | SPI MOSI1|
+| 39          | P1-39        | GND      |
+| 40          | P1-40        | SPI SCL1 |

docs/testing.md

@@ -0,0 +1,42 @@
+# Testing mraa
+
+Mraa has a test suite written in python which can be run by users to check
+their platform is working correctly. The aim is to have a full API coverage
+using python scripts using unittests. Currently the test suite is far from
+complete.
+
+## Supported platforms
+
+Intel Galileo v1 was used and is currently the only supported platform. Tests
+were conducted on Intel Galileo v2, but because of hardware differences, some
+failures may occur. Logic will be added to auto-select board to work on. To
+start with boards with an arduino type shield/layout should work
+
+## How to run these tests
+
+You need to compile from source with -DBUILDSWIGPYTHON=ON and then tests can be
+executed with:
+$ make test
+
+More detail can be seen by running:
+$ ctest -VV
+
+Note tests will not run on platforms which cannot initialise, checking the
+amount of 'skipped' tests can be useful
+
+## What's next?
+
+At this point tests were made to do a quick sanity check. In the future the
+followings will be implemented:
+ * Create a physical layer that will emulate sensors behavior and generate I/O
+   signals. This layer will be available to the community and will help replace
+   the need of specific sensors. The simplest solution will be chosen allowing
+   anyone to rapidly implement it.
+ * Implement stress tests over long periods of time. This feature alone is
+   possible only with the use of a physical layer since it will behave both as
+   signals generator and interpreter.
+ * Analyze a tests result collection solution (and after, interpretation). This
+   is useful since tests mean nothing without a history and possibility to
+   check on results.
+ * Any idea welcome!
+

docs/up.md

@@ -0,0 +1,87 @@
+UP Board   {#up}
+============
+
+UP Board is based on the Intel(R) Atom(TM) x5-Z8350 SoC (formerly Cherry Trail).
+It includes 1/2/4GB RAM, 16/32/64GB eMMC flash, 6 USB2.0 ports, 1 USB 3.0 OTG
+port, 1 Gigabit Ethernet, HDMI and DSI/eDP Graphics ports, RTC and a 40-pin I/O
+header. The form-factor for the board is based on the Raspberry Pi 2, and can be
+used with many of the add-on HAT boards designed for the Raspberry Pi.
+
+Interface notes
+---------------
+
+**PWM** PWM frequency range is from 293 Hz to 6.4 MHz.  8-bit resolution is
+supported for duty-cycle adjustments, but this reduces for frequencies > 97.6kHz
+
+**I2C** 2 I2C channels support standard-mode (100kHz) and fast-mode (400kHz).
+Bus frequency can be selected in BIOS settings.  Note that, unlike Raspberry Pi,
+the I2C controller issues Repeated-START commands for combined transactions
+(e.g. a write-then-read transaction) which may not be supported by some I2C
+slave devices.  For such devices, it is advisable to use separate write and
+read transactions to ensure that Repeated-STARTs are not issued.
+
+**SPI** Bus frequencies up to 25MHz are supported, in steps which are less
+granular at higher speeds.  E.g. Available speeds include:
+ 25MHz, 12.5MHz, 8.33MHz, 6.25MHz, 5MHz, 4.167MHz, 3.571MHz, 3.125MHz, etc.
+Please be aware that speeds in between those steps will be rounded UP to the
+next nearest available speed, and capped at 25MHz.
+2 chip-selects are available, one natively (SPI CS0) and one by GPIO (SPI CS1).
+
+**UART** 1 high-speed UART is available, supporting baud rates between 300 and
+3686400.  Hardware flow-control signals are available on pins 11/36 (RTS/CTS).
+
+**ADC** 1 8-bit single-channel ADC (TI ADC081C021) is available on pin 7.
+
+Please note that a kernel with UP board support is required to enable the I/O
+interfaces above.  Refer to https://up-community.org for more information.
+
+Pin Mapping
+-----------
+
+The GPIO numbering in the following pin mapping is based on the Raspberry Pi
+model 2 and B+ numbering scheme.
+
+Note that there is an enum to use wiringPi style numbers.
+
+| MRAA Number | Physical Pin | Function | Sysfs GPIO | Notes                |
+|-------------|--------------|----------|------------|----------------------|
+| 1           | P1-01        | 3V3 VCC  |            |                      |
+| 2           | P1-02        | 5V VCC   |            |                      |
+| 3           | P1-03        | I2C SDA1 |  2         | I2C1 (/dev/i2c-1)    |
+| 4           | P1-04        | 5V VCC   |            |                      |
+| 5           | P1-05        | I2C SCL1 |  3         | I2C1 (/dev/i2c-1)    |
+| 6           | P1-06        | GND      |            |                      |
+| 7           | P1-07        | GPIO(4)  |  4         | ADC0 (iio:device0)   |
+| 8           | P1-08        | UART TX1 | 14         | UART1 (/dev/ttyS1)   |
+| 9           | P1-09        | GND      |            |                      |
+| 10          | P1-10        | UART RX1 | 15         | UART1 (/dev/ttyS1)   |
+| 11          | P1-11        | GPIO(17) | 17         |                      |
+| 12          | P1-12        | I2S CLK  | 18         | I2S0 (PCM Audio)     |
+| 13          | P1-13        | GPIO(27) | 27         |                      |
+| 14          | P1-14        | GND      |            |                      |
+| 15          | P1-15        | GPIO(22) | 22         |                      |
+| 16          | P1-16        | GPIO(23) | 23         |                      |
+| 17          | P1-17        | 3V3 VCC  |            |                      |
+| 18          | P1-18        | GPIO(24) | 24         |                      |
+| 19          | P1-19        | SPI MOSI | 10         | SPI2 (/dev/spidev2.x)|
+| 20          | P1-20        | GND      |            |                      |
+| 21          | P1-21        | SPI MISO | 9          | SPI2 (/dev/spidev2.x)|
+| 22          | P1-22        | GPIO(25) | 25         |                      |
+| 23          | P1-23        | SPI SCL  | 11         | SPI2 (/dev/spidev2.x)|
+| 24          | P1-24        | SPI CS0  | 8          | SPI2 (/dev/spidev2.0)|
+| 25          | P1-25        | GND      |            |                      |
+| 26          | P1-26        | SPI CS1  | 7          | SPI2 (/dev/spidev2.1)|
+| 27          | P1-27        | I2C SDA0 | 0          | I2C0 (/dev/i2c-0)    |
+| 28          | P1-28        | I2C SCL0 | 1          | I2C0 (/dev/i2c-0)    |
+| 29          | P1-29        | GPIO(5)  | 5          |                      |
+| 30          | P1-30        | GND      |            |                      |
+| 31          | P1-31        | GPIO(6)  | 6          |                      |
+| 32          | P1-32        | PWM0     | 12         | PWM Chip 0 Channel 0 |
+| 33          | P1-33        | PWM1     | 13         | PWM Chip 1 Channel 0 |
+| 34          | P1-34        | GND      |            |                      |
+| 35          | P1-35        | I2S FRM  | 19         | I2S0 (PCM Audio)     |
+| 36          | P1-36        | GPIO(16) | 16         |                      |
+| 37          | P1-37        | GPIO(26) | 26         |                      |
+| 38          | P1-38        | I2S DIN  | 20         | I2S0 (PCM Audio)     |
+| 39          | P1-39        | GND      |            |                      |
+| 40          | P1-40        | I2S DOUT | 21         | I2S0 (PCM Audio)     |

examples/CMakeLists.txt

@@ -8,9 +8,18 @@ add_executable (gpio_read6 gpio_read6.c)
 add_executable (spi_mcp4261 spi_mcp4261.c)
 add_executable (mmap-io2 mmap-io2.c)
 add_executable (blink_onboard blink_onboard.c)
-add_executable (uart_setup uart_setup.c)
+add_executable (uart uart.c)
+add_executable (mraa-gpio mraa-gpio.c)
+add_executable (mraa-i2c mraa-i2c.c)
+add_executable (spi_max7219 spi_max7219.c)
+if (NOT ANDROID_TOOLCHAIN)
+  add_executable (iio_driver iio_driver.c)
+endif ()
 
 include_directories(${PROJECT_SOURCE_DIR}/api)
+# FIXME Hack to access mraa internal types used by mraa-i2c
+include_directories(${PROJECT_SOURCE_DIR}/include)
+include_directories(${PROJECT_SOURCE_DIR}/api/mraa)
 
 target_link_libraries (hellomraa mraa)
 target_link_libraries (i2c_HMC5883L mraa m)
@@ -22,8 +31,36 @@ target_link_libraries (gpio_read6 mraa)
 target_link_libraries (spi_mcp4261 mraa)
 target_link_libraries (mmap-io2 mraa)
 target_link_libraries (blink_onboard mraa)
-target_link_libraries (uart_setup mraa)
+target_link_libraries (uart mraa)
+target_link_libraries (mraa-gpio mraa)
+target_link_libraries (mraa-i2c mraa)
+target_link_libraries (spi_max7219 mraa)
+if (NOT ANDROID_TOOLCHAIN)
+  target_link_libraries (iio_driver mraa)
+endif ()
+if (ONEWIRE)
+  add_executable (uart_ow uart_ow.c)
+  target_link_libraries (uart_ow mraa)
+endif ()
 
-add_subdirectory (c++)
+if (FIRMATA)
+  add_executable (firmata_curie_imu firmata_curie_imu.c)
+  add_executable (i2c_firmata i2c_firmata.c)
+  target_link_libraries (firmata_curie_imu mraa)
+  target_link_libraries (i2c_firmata mraa)
+endif ()
 
-install (DIRECTORY ${PROJECT_SOURCE_DIR}/examples/ DESTINATION share/mraa/examples)
+if (NOT ANDROID_TOOLCHAIN)
+  add_subdirectory (c++)
+endif ()
+
+install (DIRECTORY ${PROJECT_SOURCE_DIR}/examples/ DESTINATION ${CMAKE_INSTALL_DATADIR}/mraa/examples)
+
+if (INSTALLGPIOTOOL AND NOT INSTALLTOOLS)
+   install (TARGETS mraa-gpio DESTINATION bin)
+endif()
+
+if (INSTALLTOOLS)
+   install (TARGETS mraa-gpio DESTINATION bin)
+   install (TARGETS mraa-i2c DESTINATION bin)
+endif()

examples/analogin_a0.c

@@ -26,19 +26,23 @@
 //! [Interesting]
 #include "mraa/aio.h"
 
-int main ()
+int
+main()
 {
     mraa_aio_context adc_a0;
     uint16_t adc_value = 0;
+    float adc_value_float = 0.0;
 
     adc_a0 = mraa_aio_init(0);
     if (adc_a0 == NULL) {
         return 1;
     }
 
-    for(;;) {
+    for (;;) {
         adc_value = mraa_aio_read(adc_a0);
+        adc_value_float = mraa_aio_read_float(adc_a0);
         fprintf(stdout, "ADC A0 read %X - %d\n", adc_value, adc_value);
+        fprintf(stdout, "ADC A0 read float - %.5f\n", adc_value_float);
     }
 
     mraa_aio_close(adc_a0);

examples/blink-io.c

@@ -45,7 +45,7 @@ sig_handler(int signo)
 }
 
 int
-main(int argc, char **argv)
+main(int argc, char** argv)
 {
     mraa_result_t r = MRAA_SUCCESS;
     iopin = DEFAULT_IOPIN;
@@ -57,14 +57,13 @@ main(int argc, char **argv)
     }
 
     mraa_init();
-    fprintf(stdout, "MRAA Version: %s\nStarting Blinking on IO%d\n",
-            mraa_get_version(), iopin);
+    fprintf(stdout, "MRAA Version: %s\nStarting Blinking on IO%d\n", mraa_get_version(), iopin);
 
     mraa_gpio_context gpio;
     gpio = mraa_gpio_init(iopin);
     if (gpio == NULL) {
         fprintf(stderr, "Are you sure that pin%d you requested is valid on your platform?", iopin);
-	exit(1);
+        exit(1);
     }
     printf("Initialised pin%d\n", iopin);
 

examples/blink_onboard.c

@@ -29,29 +29,54 @@
 #include "mraa/gpio.h"
 
 int
-main(int argc, char **argv)
+main(int argc, char** argv)
 {
     mraa_platform_t platform = mraa_get_platform_type();
-    mraa_gpio_context gpio;
-    char board_name[] = "Some weird devboard that isn't recognised...";
+    mraa_gpio_context gpio, gpio_in = NULL;
+    const char* board_name = mraa_get_platform_name();
     int ledstate = 0;
 
     switch (platform) {
         case MRAA_INTEL_GALILEO_GEN1:
-            strcpy(board_name, "Intel Galileo Gen1");
             gpio = mraa_gpio_init_raw(3);
             break;
-        case MRAA_INTEL_GALILEO_GEN2:
-            strcpy(board_name, "Intel Galileo Gen2");
+        case MRAA_INTEL_MINNOWBOARD_MAX:
+            // there is no onboard LED that we can flash on the minnowboard max
+            // but on the calamari lure pin 21 is an LED. If you don't have the
+            // lure put an LED on pin 21
+            gpio = mraa_gpio_init(21);
+            break;
+        case MRAA_INTEL_JOULE_EXPANSION:
+            gpio = mraa_gpio_init(101);
+            break;
         default:
             gpio = mraa_gpio_init(13);
     }
 
-    fprintf(stdout, "Welcome to libmraa\n Version: %s\n Running on %s\n",
-        mraa_get_version(), board_name);
+    fprintf(stdout, "Welcome to libmraa\n Version: %s\n Running on %s\n", mraa_get_version(), board_name);
+
+
+    if (gpio == NULL) {
+        fprintf(stdout, "Could not initilaize gpio\n");
+        return 1;
+    }
+
+    // on platforms with physical button use gpio_in
+    if (platform == MRAA_INTEL_MINNOWBOARD_MAX) {
+        gpio_in = mraa_gpio_init(14);
+        if (gpio_in != NULL) {
+            mraa_gpio_dir(gpio_in, MRAA_GPIO_IN);
+            // S1 on minnowboardmax's calamari lure maps to pin 14, SW1 != S1
+            fprintf(stdout, "Press and hold S1 to stop, Press SW1 to shutdown!\n");
+        }
+    }
 
     mraa_gpio_dir(gpio, MRAA_GPIO_OUT);
+
     for (;;) {
+        if (gpio_in != NULL && mraa_gpio_read(gpio_in) == 0) {
+            return 0;
+        }
         ledstate = !ledstate;
         mraa_gpio_write(gpio, !ledstate);
         sleep(1);

examples/c++/AioA0.cpp

@@ -25,9 +25,11 @@
 //! [Interesting]
 #include "mraa.hpp"
 
-int main ()
+int
+main()
 {
     uint16_t adc_value;
+    float adc_value_float;
     mraa::Aio* a0;
 
     a0 = new mraa::Aio(0);
@@ -35,9 +37,11 @@ int main ()
         return MRAA_ERROR_UNSPECIFIED;
     }
 
-    for(;;) {
+    for (;;) {
         adc_value = a0->read();
+        adc_value_float = a0->readFloat();
         fprintf(stdout, "ADC A0 read %X - %d\n", adc_value, adc_value);
+        fprintf(stdout, "ADC A0 read float - %.5f\n", adc_value_float);
     }
 
     return MRAA_SUCCESS;

examples/c++/Blink-IO.cpp

@@ -26,7 +26,6 @@
 #include <signal.h>
 #include <stdio.h>
 #include <stdlib.h>
-#include <stdlib.h>
 #include <unistd.h>
 
 #include "mraa.hpp"
@@ -43,7 +42,8 @@ sig_handler(int signo)
         running = -1;
     }
 }
-int main (int argc, char **argv)
+int
+main(int argc, char** argv)
 {
     if (argc < 2) {
         printf("Provide an int arg if you want to flash on something other than %d\n", DEFAULT_IOPIN);
@@ -54,13 +54,13 @@ int main (int argc, char **argv)
 
     signal(SIGINT, sig_handler);
 
-//! [Interesting]
+    //! [Interesting]
     mraa::Gpio* gpio = new mraa::Gpio(iopin);
     if (gpio == NULL) {
-        return MRAA_ERROR_UNSPECIFIED;
+        return mraa::ERROR_UNSPECIFIED;
     }
-    mraa_result_t response = gpio->dir(mraa::DIR_OUT);
-    if (response != MRAA_SUCCESS) {
+    mraa::Result response = gpio->dir(mraa::DIR_OUT);
+    if (response != mraa::SUCCESS) {
         mraa::printError(response);
         return 1;
     }
@@ -73,5 +73,5 @@ int main (int argc, char **argv)
     }
     delete gpio;
     return response;
-//! [Interesting]
+    //! [Interesting]
 }

examples/c++/CMakeLists.txt

@@ -1,8 +1,13 @@
+enable_language(CXX)
+
 add_executable (AioA0 AioA0.cpp)
 add_executable (blink-io-cpp Blink-IO.cpp)
 add_executable (Pwm3-cycle Pwm3-cycle.cpp)
 add_executable (I2c-compass I2c-compass.cpp)
 add_executable (Spi-pot Spi-pot.cpp)
+add_executable (Uart Uart-example.cpp)
+add_executable (Isr-pin6 Isr-pin6.cpp)
+add_executable (Iio-dummy Iio-dummy.cpp)
 
 include_directories(${PROJECT_SOURCE_DIR}/api)
 
@@ -11,3 +16,11 @@ target_link_libraries (blink-io-cpp mraa stdc++)
 target_link_libraries (Pwm3-cycle mraa stdc++)
 target_link_libraries (I2c-compass mraa stdc++ m)
 target_link_libraries (Spi-pot mraa stdc++)
+target_link_libraries (Uart mraa stdc++)
+target_link_libraries (Isr-pin6 mraa stdc++)
+target_link_libraries (Iio-dummy mraa stdc++)
+
+if (ONEWIRE)
+  add_executable (UartOW UartOW.cpp)
+  target_link_libraries (UartOW mraa stdc++)
+endif ()

examples/c++/I2c-compass.cpp

@@ -32,14 +32,14 @@
 #define MAX_BUFFER_LENGTH 6
 #define HMC5883L_I2C_ADDR 0x1E
 
-//configuration registers
+// configuration registers
 #define HMC5883L_CONF_REG_A 0x00
 #define HMC5883L_CONF_REG_B 0x01
 
-//mode register
+// mode register
 #define HMC5883L_MODE_REG 0x02
 
-//data register
+// data register
 #define HMC5883L_X_MSB_REG 0
 #define HMC5883L_X_LSB_REG 1
 #define HMC5883L_Z_MSB_REG 2
@@ -48,10 +48,10 @@
 #define HMC5883L_Y_LSB_REG 5
 #define DATA_REG_SIZE 6
 
-//status register
+// status register
 #define HMC5883L_STATUS_REG 0x09
 
-//ID registers
+// ID registers
 #define HMC5883L_ID_A_REG 0x0A
 #define HMC5883L_ID_B_REG 0x0B
 #define HMC5883L_ID_C_REG 0x0C
@@ -59,7 +59,7 @@
 #define HMC5883L_CONT_MODE 0x00
 #define HMC5883L_DATA_REG 0x03
 
-//scales
+// scales
 #define GA_0_88_REG 0x00 << 5
 #define GA_1_3_REG 0x01 << 5
 #define GA_1_9_REG 0x02 << 5
@@ -69,7 +69,7 @@
 #define GA_5_6_REG 0x06 << 5
 #define GA_8_1_REG 0x07 << 5
 
-//digital resolutions
+// digital resolutions
 #define SCALE_0_73_MG 0.73
 #define SCALE_0_92_MG 0.92
 #define SCALE_1_22_MG 1.22
@@ -91,13 +91,14 @@ sig_handler(int signo)
     }
 }
 
-int main ()
+int
+main()
 {
     float direction = 0;
     int16_t x = 0, y = 0, z = 0;
-    char rx_tx_buf[MAX_BUFFER_LENGTH];
+    uint8_t rx_tx_buf[MAX_BUFFER_LENGTH];
 
-//! [Interesting]
+    //! [Interesting]
     mraa::I2c* i2c;
     i2c = new mraa::I2c(0);
 
@@ -105,7 +106,7 @@ int main ()
     rx_tx_buf[0] = HMC5883L_CONF_REG_B;
     rx_tx_buf[1] = GA_1_3_REG;
     i2c->write(rx_tx_buf, 2);
-//! [Interesting]
+    //! [Interesting]
 
     i2c->address(HMC5883L_I2C_ADDR);
     rx_tx_buf[0] = HMC5883L_MODE_REG;
@@ -116,24 +117,25 @@ int main ()
 
     while (running == 0) {
         i2c->address(HMC5883L_I2C_ADDR);
-        i2c->write(HMC5883L_DATA_REG);
+        i2c->writeByte(HMC5883L_DATA_REG);
 
         i2c->address(HMC5883L_I2C_ADDR);
         i2c->read(rx_tx_buf, DATA_REG_SIZE);
 
-        x = (rx_tx_buf[HMC5883L_X_MSB_REG] << 8 ) | rx_tx_buf[HMC5883L_X_LSB_REG] ;
-        z = (rx_tx_buf[HMC5883L_Z_MSB_REG] << 8 ) | rx_tx_buf[HMC5883L_Z_LSB_REG] ;
-        y = (rx_tx_buf[HMC5883L_Y_MSB_REG] << 8 ) | rx_tx_buf[HMC5883L_Y_LSB_REG] ;
+        x = (rx_tx_buf[HMC5883L_X_MSB_REG] << 8) | rx_tx_buf[HMC5883L_X_LSB_REG];
+        z = (rx_tx_buf[HMC5883L_Z_MSB_REG] << 8) | rx_tx_buf[HMC5883L_Z_LSB_REG];
+        y = (rx_tx_buf[HMC5883L_Y_MSB_REG] << 8) | rx_tx_buf[HMC5883L_Y_LSB_REG];
 
-        //scale and calculate direction
+        // scale and calculate direction
         direction = atan2(y * SCALE_0_92_MG, x * SCALE_0_92_MG);
 
-        //check if the signs are reversed
+        // check if the signs are reversed
         if (direction < 0)
             direction += 2 * M_PI;
 
-        printf("Compass scaled data x : %f, y : %f, z : %f\n", x * SCALE_0_92_MG, y * SCALE_0_92_MG, z * SCALE_0_92_MG) ;
-        printf("Heading : %f\n", direction * 180/M_PI);
+        printf("Compass scaled data x : %f, y : %f, z : %f\n", x * SCALE_0_92_MG, y * SCALE_0_92_MG,
+               z * SCALE_0_92_MG);
+        printf("Heading : %f\n", direction * 180 / M_PI);
         sleep(1);
     }
     delete i2c;

examples/c++/Iio-dummy.cpp

@@ -0,0 +1,157 @@
+/*
+ * Author: Henry Bruce
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <unistd.h>
+#include <iostream>
+#include <math.h>
+#include <float.h>
+#include "mraa/iio.hpp"
+
+#define EXPECT_FAILURE 0
+#define EXPECT_SUCCESS 1
+
+#define IIO_TRY(func) \
+{ \
+    bool success = true;    \
+    try { \
+        iio_device->func;  \
+    } catch (std::exception& e) { \
+        success = false; \
+    } \
+    log_result(#func, "", true, success); \
+}
+
+// Macro to run IIO method on attribute and log output
+#define IIO_RUN(func, attr, value, expect) \
+{ \
+    std::string attr_name = attr; \
+    bool success = true;    \
+    try { \
+        iio_device->func(attr_name, value);  \
+    } catch (std::exception& e) { \
+        success = false; \
+    } \
+    log_result(#func, attr_name, expect, success); \
+}
+
+// Macro to run IIO method on attribute and check for expected result and log output
+#define IIO_TEST(func, attr, value, expect) \
+{ \
+    std::string attr_name = attr; \
+    bool success = false;    \
+    try { \
+        success = fabs(iio_device->func(attr_name) - value) < FLT_EPSILON; \
+    } catch (std::exception& e) { \
+        success = false; \
+    } \
+    log_result(#func, attr_name, expect, success); \
+}
+
+mraa::Iio* iio_device;
+int eventCount = 0;
+
+// Log result of test. Note a "fail" (i.e. success is false) will be displayed as a pass if a fail was expected
+void log_result(std::string test_name, std::string attr_name, bool expect_success, bool success)
+{
+    std::string result;
+    if (expect_success)
+       result = success ? "PASS" : "FAIL";
+    else
+       result = success ? "FAIL" : "PASS";
+    if (attr_name.empty())
+        fprintf(stdout, "%s: %s\n", test_name.c_str(), result.c_str());
+    else
+        fprintf(stdout, "%s(%s): %s\n", test_name.c_str(), attr_name.c_str(), result.c_str());
+}
+
+// Generate iio_dummy driver event by writing a string to a specific sysfs node
+bool generate_event()
+{
+    FILE *fp = fopen("/sys/bus/iio/devices/iio_evgen/poke_ev0", "w");
+    if (fp == NULL)
+        return false;
+    fprintf(fp, "1\n");
+    fclose(fp);
+    return true;
+}
+
+
+// IIO event handler that checks for event from dummy_iio_evgen driver
+class IioTestHandler : public mraa::IioHandler
+{
+protected:
+    void onIioEvent(const mraa::IioEventData& eventData) {
+        if (eventData.channelType == IIO_VOLTAGE && eventData.direction == IIO_EV_DIR_RISING && eventData.type == IIO_EV_TYPE_THRESH)
+            eventCount++;
+    }
+};
+
+int
+main()
+{
+    IioTestHandler testHandler;
+    std::string deviceName;
+    try {
+        mraa::Iio* iio_device0 = new mraa::Iio(0);
+        std::cout << "IIO device 0 found by id." << std::endl;
+        deviceName = iio_device0->getDeviceName();
+        delete iio_device0;
+    } catch (std::exception& e) {
+        std::cerr << "IIO device 0 not found." << std::endl;
+        return EXIT_FAILURE;
+    }
+
+    try {
+        mraa::Iio* iio_device1 = new mraa::Iio(1);
+        delete iio_device1;
+    } catch (std::exception& e) {
+        std::cerr << "IIO device 1 not found. This is expected behavior." << std::endl;
+    }
+
+    try {
+        iio_device = new mraa::Iio(deviceName);
+        std::cout << "IIO device 0 found by name." << std::endl;
+    } catch (std::exception& e) {
+        std::cerr << "IIO device 0 not found." << std::endl;
+        return EXIT_FAILURE;
+    }
+
+
+    std::cout << "Using IIO device0. Name is " << iio_device->getDeviceName() << std::endl;
+    IIO_RUN(writeFloat, "in_accel_x_raw", 100, EXPECT_FAILURE);
+    IIO_RUN(writeFloat, "in_voltage0_scale", 100, EXPECT_FAILURE);
+    IIO_RUN(writeInt, "out_voltage0_raw", 100, EXPECT_SUCCESS);
+    IIO_TEST(readInt, "in_accel_x_raw", 34, EXPECT_SUCCESS);
+    IIO_TEST(readFloat, "in_voltage0_scale", 0.001333, EXPECT_SUCCESS);
+    IIO_RUN(writeInt, "events/in_voltage0_thresh_rising_en", 1, EXPECT_SUCCESS);
+    IIO_TRY(registerEventHandler(&testHandler));
+    eventCount = 0;
+    generate_event();
+    usleep(500000);
+    log_result("eventReceived", "", (eventCount == 1), true);
+
+    delete iio_device;
+    return EXIT_SUCCESS;
+}
+

examples/c++/Isr-pin6.cpp

@@ -0,0 +1,57 @@
+/*
+ * Author: Brendan Le Foll
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <unistd.h>
+
+#include "mraa.hpp"
+
+static volatile int counter = 0;
+static volatile int oldcounter = 0;
+
+void
+interrupt(void* args)
+{
+    ++counter;
+}
+
+int
+main()
+{
+    mraa::Gpio* x = new mraa::Gpio(6);
+
+    x->dir(mraa::DIR_IN);
+
+    x->isr(mraa::EDGE_BOTH, &interrupt, NULL);
+
+    for (;;) {
+        if (counter != oldcounter) {
+            fprintf(stdout, "timeout counter == %d\n", counter);
+            oldcounter = counter;
+        }
+        // got to relieve our poor CPU!
+        sleep(1);
+    }
+
+    return EXIT_SUCCESS;
+}

examples/c++/Pwm3-cycle.cpp

@@ -38,10 +38,11 @@ sig_handler(int signo)
     }
 }
 
-int main ()
+int
+main()
 {
     signal(SIGINT, sig_handler);
-//! [Interesting]
+    //! [Interesting]
     mraa::Pwm* pwm;
 
     pwm = new mraa::Pwm(3);
@@ -49,6 +50,7 @@ int main ()
         return MRAA_ERROR_UNSPECIFIED;
     }
     fprintf(stdout, "Cycling PWM on IO3 (pwm3) \n");
+    pwm->enable(true);
 
     float value = 0.0f;
     while (running == 0) {
@@ -60,7 +62,7 @@ int main ()
         }
     }
     delete pwm;
-//! [Interesting]
+    //! [Interesting]
 
     return MRAA_SUCCESS;
 }

examples/c++/Spi-pot.cpp

@@ -39,37 +39,42 @@ sig_handler(int signo)
     }
 }
 
-int main ()
+int
+main()
 {
     signal(SIGINT, sig_handler);
 
-//! [Interesting]
+    //! [Interesting]
     mraa::Spi* spi;
 
     spi = new mraa::Spi(0);
 
-    char data[] = {0x00, 100};
-    char *recv;
+    uint8_t data[] = { 0x00, 100 };
+    uint8_t rxBuf[2];
+    uint8_t* recv;
     while (running == 0) {
         int i;
         for (i = 90; i < 130; i++) {
             data[1] = i;
             recv = spi->write(data, 2);
-            printf("Writing -%i",i);
-            printf("RECIVED-%i-%i\n",recv[0],recv[1]);
+            printf("Writing -%i", i);
+            if (recv) {
+                printf("RECIVED-%i-%i\n", recv[0], recv[1]);
+                free(recv);
+            }
             usleep(100000);
         }
         for (i = 130; i > 90; i--) {
             data[1] = i;
-            recv = spi->write(data, 2);
-            printf("Writing -%i",i);
-            printf("RECIVED-%i-%i\n",recv[0],recv[1]);
+            if (spi->transfer(data, rxBuf, 2) == mraa::SUCCESS) {
+                printf("Writing -%i", i);
+                printf("RECIVED-%i-%i\n", rxBuf[0], rxBuf[1]);
+            }
             usleep(100000);
         }
-
     }
     delete spi;
-//! [Interesting]
+    //! [Interesting]
 
-    return MRAA_SUCCESS;
+    return mraa::SUCCESS;
 }

examples/c++/Uart-example.cpp

@@ -0,0 +1,70 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <unistd.h>
+#include <iostream>
+#include <exception>
+
+#include "mraa.hpp"
+
+int
+main()
+{
+    //! [Interesting]
+    // If you have a valid platform configuration use numbers to represent uart
+    // device. If not use raw mode where std::string is taken as a constructor
+    // parameter
+    mraa::Uart* dev;
+    try {
+        dev = new mraa::Uart(0);
+    } catch (std::exception& e) {
+        std::cout << e.what() << ", likely invalid platform config" << std::endl;
+    }
+
+    try {
+        dev = new mraa::Uart("/dev/ttyACM0");
+    } catch (std::exception& e) {
+        std::cout << "Error while setting up raw UART, do you have a uart?" << std::endl;
+        std::terminate();
+    }
+
+    if (dev->setBaudRate(115200) != mraa::SUCCESS) {
+        std::cout << "Error setting parity on UART" << std::endl;
+    }
+
+    if (dev->setMode(8, mraa::UART_PARITY_NONE, 1) != mraa::SUCCESS) {
+        std::cout << "Error setting parity on UART" << std::endl;
+    }
+
+    if (dev->setFlowcontrol(false, false) != mraa::SUCCESS) {
+        std::cout << "Error setting flow control UART" << std::endl;
+    }
+
+    dev->writeStr("Hello monkeys");
+    //! [Interesting]
+
+    delete dev;
+
+    return mraa::SUCCESS;
+}

examples/c++/UartOW.cpp

@@ -0,0 +1,82 @@
+/*
+ * Author: Jon Trulson <jtrulson@ics.com>
+ * Copyright (c) 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "stdio.h"
+#include "iostream"
+//! [Interesting]
+#include "uart_ow.hpp"
+
+using namespace std;
+
+int
+main(int argc, char** argv)
+{
+    mraa::UartOW* uart = new mraa::UartOW(0);
+
+    // Reset the ow bus and see if anything is present
+    mraa::Result rv;
+
+    if ((rv = uart->reset()) == mraa::SUCCESS) {
+        cout << "Reset succeeded, device(s) detected!" << endl;
+    } else {
+        cout << "Reset failed, returned " << int(rv) << ". No devices on bus?" << endl;
+        return 1;
+    }
+
+    cout << "Looking for devices..." << endl;
+    ;
+
+    uint8_t count = 0;
+    // start the search from scratch
+    string id = uart->search(true);
+
+    if (id.empty()) {
+        cout << "No devices detected." << endl;
+        return 1;
+    }
+
+    while (!id.empty()) {
+        // hack so we don't need to cast each element of the romcode
+        // for printf purposes
+        uint8_t* ptr = (uint8_t*) id.data();
+
+        // The first byte (0) is the device type (family) code.
+        // The last byte (7) is the rom code CRC value.  The
+        // intervening bytes are the unique 48 bit device ID.
+
+        printf("Device %02d Type 0x%02x ID %02x%02x%02x%02x%02x%02x CRC 0x%02x\n", count, ptr[0],
+               ptr[6], ptr[5], ptr[4], ptr[3], ptr[2], ptr[1], ptr[7]);
+        count++;
+
+        // continue the search with start argument set to false
+        id = uart->search(false);
+    }
+
+    cout << "Exiting..." << endl;
+
+    delete uart;
+
+    return 0;
+}
+//! [Interesting]

examples/c++/initio.cpp

@@ -0,0 +1,68 @@
+/*
+ * Author: Houman Brinjcargorabi <houman.brinjcargorabi@intel.com>
+ * Copyright (c) 2016 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "mraa.hpp"
+
+int main()
+{
+    // GPIO-PIN
+    mraa::Gpio* gpio = mraa::initIo<mraa::Gpio>("gpio-1");
+    // GPIO-RAW-RAWPIN
+    mmraa::Gpio* gpioraw = mraa::initIo<mraa::Gpio>initIo("gpio-raw-131");
+    // AIO-PIN
+    mraa::Aio aio = mraa::initIo<mraa::Aio>("aio-0");
+    // PWM-PIN
+    mraa::Pwm pwm = mraa::initIo<mraa::Pwm>("pwm-6");
+    // PWM-RAW-CHIPID-PIN
+    mraa::Pwm pwmraw = mraa::initIo<mraa::Pwm>("pwm-raw-0,1");
+    // UART-INDEX: the index is the one represented internally in the uart_dev array
+    mraa::Uart uart = mraa::initIo<mraa::Uart>("uart-1");
+    // UART-RAW-PATH
+    mraa::Uart uartraw = mraa::initIo<mraa::Uart>("uart-raw-/dev/ttyS0");
+    // SPI-INDEX: same as UART
+    mraa::Spi spi = mraa::initIo<mraa::Spi>("spi-0");
+    // SPI-RAW-BUS-CS: USED to open and use /dev/spidev<BUS>.<CS>
+    mraa::Spi spiraw = mraa::initIo<mraa::Spi>("spi-raw-0-1");
+    // I2C-INDEX: same as UART
+    mraa::I2c i2c = mraa::initIo<mraa::I2c>("i2c-0");
+    // I2C-RAW-BUS
+    mraa::I2c i2craw = mraa::initIo<mraa::I2c>("i2c-raw-0");
+
+    // FREE STUFF
+    delete gpio;
+    delete gpioraw;
+    delete aio;
+    delete pwm;
+    delete pwmraw;
+    delete uart;
+    delete uartraw;
+    delete spi;
+    delete spiraw;
+    delete i2c;
+    delete i2craw;
+}

examples/cycle-pwm3.c

@@ -27,10 +27,10 @@
 #include "mraa.h"
 
 int
-main ()
+main()
 {
     mraa_init();
-//! [Interesting]
+    //! [Interesting]
     mraa_pwm_context pwm;
     pwm = mraa_pwm_init(3);
     if (pwm == NULL) {
@@ -49,7 +49,8 @@ main ()
             value = 0.0f;
         }
         float output = mraa_pwm_read(pwm);
+        printf("PWM value is %f\n", output);
     }
-//! [Interesting]
+    //! [Interesting]
     return 0;
 }

examples/firmata_curie_imu.c

@@ -0,0 +1,92 @@
+/*
+ * Author: Brendan Le Foll
+ * Copyright (c) 2016 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <unistd.h>
+
+#include "mraa.h"
+#include "mraa/firmata.h"
+
+#define FIRMATA_START_SYSEX 0xF0
+#define FIRMATA_END_SYSEX 0xF7
+#define FIRMATA_CURIE_IMU 0x11
+#define FIRMATA_CURIE_IMU_READ_ACCEL 0x00
+
+void
+interrupt(uint8_t* buf, int length)
+{
+    printf("reg read returned: %d, with buffer size %d\n", ((buf[6] & 0x7f) | ((buf[7] & 0x7f) << 7)), length);
+}
+
+int
+main()
+{
+    mraa_init();
+    //! [Interesting]
+
+   /**
+    * This example reads from the FirmataCurieIMU plugin
+    */
+
+    mraa_add_subplatform(MRAA_GENERIC_FIRMATA, "/dev/ttyACM0");
+    mraa_firmata_context firm = mraa_firmata_init(FIRMATA_CURIE_IMU);
+    if (firm == NULL) {
+        return EXIT_FAILURE;
+    }
+
+    mraa_firmata_response(firm, interrupt);
+
+    char* buffer = calloc(4, 0);
+    if (buffer == NULL) {
+        free(firm);
+        return EXIT_FAILURE;
+    }
+    buffer[0] = FIRMATA_START_SYSEX;
+    buffer[1] = FIRMATA_CURIE_IMU;
+    buffer[2] = FIRMATA_CURIE_IMU_READ_ACCEL;
+    buffer[3] = FIRMATA_END_SYSEX;
+
+    mraa_firmata_write_sysex(firm, buffer, 4);
+
+    sleep(1);
+
+    // stop the isr and set it again
+    mraa_firmata_response_stop(firm);
+    mraa_firmata_response(firm, interrupt);
+    mraa_firmata_write_sysex(firm, buffer, 4);
+
+    sleep(1);
+
+    // close everything and try again
+    mraa_firmata_close(firm);
+    firm = mraa_firmata_init(FIRMATA_CURIE_IMU);
+    mraa_firmata_response(firm, interrupt);
+    mraa_firmata_write_sysex(firm, buffer, 4);
+
+    sleep(10);
+
+    mraa_firmata_close(firm);
+    //! [Interesting]
+
+    return EXIT_SUCCESS;
+}

examples/gpio_read6.c

@@ -28,13 +28,12 @@
 #include "mraa.h"
 
 int
-main(int argc, char **argv)
+main(int argc, char** argv)
 {
     mraa_init();
-    fprintf(stdout, "MRAA Version: %s\nStarting Read on IO6\n",
-            mraa_get_version());
+    fprintf(stdout, "MRAA Version: %s\nStarting Read on IO6\n", mraa_get_version());
 
-//! [Interesting]
+    //! [Interesting]
     mraa_gpio_context gpio;
 
     gpio = mraa_gpio_init(6);
@@ -47,7 +46,7 @@ main(int argc, char **argv)
     }
 
     mraa_gpio_close(gpio);
-//! [Interesting]
+    //! [Interesting]
 
     return 0;
 }

examples/helloedison.c

@@ -0,0 +1,69 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <syslog.h>
+#include <string.h>
+#include <stdbool.h>
+//! [Interesting]
+#include "mraa.h"
+
+int
+main(int argc, char** argv)
+{
+    mraa_result_t ret = MRAA_SUCCESS;
+    mraa_platform_t platform_type = mraa_get_platform_type();
+
+    if (platform_type != MRAA_INTEL_EDISON_FAB_C) {
+        fprintf(stderr, "Error: This program can only run on an edison\n");
+        ret = MRAA_ERROR_INVALID_PLATFORM;
+        goto end;
+    }
+
+    // MRAA_INTEL_EDISON_GP182 == 0 so this will initialise pin0 on arduino
+    // which is hardware gpio 130 and not 182
+    mraa_gpio_context gpio182 = mraa_gpio_init(MRAA_INTEL_EDISON_GP182);
+    if (gpio182 == NULL) {
+        fprintf(stderr, "Error: Failed to open gpio182\n");
+        ret = MRAA_ERROR_INVALID_PLATFORM;
+        goto end;
+    }
+    mraa_gpio_dir(gpio182, MRAA_GPIO_OUT);
+
+    // we set the owner to false here, this makes sure that we do not close the
+    // gpio from sysfs in mraa_gpio_close meaning it will stay as an output and
+    // we will not always transition from 0->1 as gpio182 as output has the
+    // default position of '0'. Note that the value could change as a result of
+    // a mraa_gpio_dir however meaning we always go from 0->1 or 1->0
+    mraa_gpio_owner(gpio182, false);
+    int val = mraa_gpio_read(gpio182);
+    printf("GPIO%d (mraa pin %d) was: %d, will set to %d\n", 182, mraa_gpio_get_pin(gpio182), val, !val);
+    mraa_gpio_write(gpio182, !val);
+    mraa_gpio_close(gpio182);
+
+end:
+    mraa_deinit();
+    return ret;
+}
+//! [Interesting]

examples/hellomraa.c

@@ -24,20 +24,18 @@
 
 #include <stdio.h>
 #include <syslog.h>
+#include <string.h>
 //! [Interesting]
 #include "mraa.h"
 
 int
-main(int argc, char **argv)
+main(int argc, char** argv)
 {
-    mraa_result_t ret;
-
-    ret = mraa_set_log_level(LOG_DEBUG);
-
-    fprintf(stdout, "hello mraa\n Version: %s\n", mraa_get_version());
+    const char* board_name = mraa_get_platform_name();
+    fprintf(stdout, "hello mraa\n Version: %s\n Running on %s\n", mraa_get_version(), board_name);
 
     mraa_deinit();
 
-    return ret;
+    return MRAA_SUCCESS;
 }
 //! [Interesting]

examples/i2c_HMC5883L.c

@@ -28,14 +28,14 @@
 #define MAX_BUFFER_LENGTH 6
 #define HMC5883L_I2C_ADDR 0x1E
 
-//configuration registers
+// configuration registers
 #define HMC5883L_CONF_REG_A 0x00
 #define HMC5883L_CONF_REG_B 0x01
 
-//mode register
+// mode register
 #define HMC5883L_MODE_REG 0x02
 
-//data register
+// data register
 #define HMC5883L_X_MSB_REG 0
 #define HMC5883L_X_LSB_REG 1
 #define HMC5883L_Z_MSB_REG 2
@@ -44,10 +44,10 @@
 #define HMC5883L_Y_LSB_REG 5
 #define DATA_REG_SIZE 6
 
-//status register
+// status register
 #define HMC5883L_STATUS_REG 0x09
 
-//ID registers
+// ID registers
 #define HMC5883L_ID_A_REG 0x0A
 #define HMC5883L_ID_B_REG 0x0B
 #define HMC5883L_ID_C_REG 0x0C
@@ -55,7 +55,7 @@
 #define HMC5883L_CONT_MODE 0x00
 #define HMC5883L_DATA_REG 0x03
 
-//scales
+// scales
 #define GA_0_88_REG 0x00 << 5
 #define GA_1_3_REG 0x01 << 5
 #define GA_1_9_REG 0x02 << 5
@@ -65,7 +65,7 @@
 #define GA_5_6_REG 0x06 << 5
 #define GA_8_1_REG 0x07 << 5
 
-//digital resolutions
+// digital resolutions
 #define SCALE_0_73_MG 0.73
 #define SCALE_0_92_MG 0.92
 #define SCALE_1_22_MG 1.22
@@ -76,14 +76,14 @@
 #define SCALE_4_35_MG 4.35
 
 int
-main(int argc, char **argv)
+main(int argc, char** argv)
 {
     mraa_init();
     float direction = 0;
     int16_t x = 0, y = 0, z = 0;
-    char rx_tx_buf[MAX_BUFFER_LENGTH];
+    uint8_t rx_tx_buf[MAX_BUFFER_LENGTH];
 
-//! [Interesting]
+    //! [Interesting]
     mraa_i2c_context i2c;
     i2c = mraa_i2c_init(0);
 
@@ -91,32 +91,46 @@ main(int argc, char **argv)
     rx_tx_buf[0] = HMC5883L_CONF_REG_B;
     rx_tx_buf[1] = GA_1_3_REG;
     mraa_i2c_write(i2c, rx_tx_buf, 2);
-//! [Interesting]
+    //! [Interesting]
 
     mraa_i2c_address(i2c, HMC5883L_I2C_ADDR);
     rx_tx_buf[0] = HMC5883L_MODE_REG;
     rx_tx_buf[1] = HMC5883L_CONT_MODE;
     mraa_i2c_write(i2c, rx_tx_buf, 2);
 
-    for(;;) {
+    for (;;) {
+#if 0
+        int i = 0;
+        //alternative, equivalent method which helps to understand exactly what
+        //the below does
+        mraa_i2c_address(i2c, HMC5883L_I2C_ADDR);
+        for (i = 0; i < DATA_REG_SIZE; i++) {
+            mraa_i2c_read_byte_data(i2c, HMC5883L_DATA_REG+i);
+        }
+#endif
+        // first 'select' the register we want to read from
         mraa_i2c_address(i2c, HMC5883L_I2C_ADDR);
         mraa_i2c_write_byte(i2c, HMC5883L_DATA_REG);
 
+        // then we read from that register incrementing with every read the
+        // chosen register
         mraa_i2c_address(i2c, HMC5883L_I2C_ADDR);
+        // this call behaves very similarly to the Wire receive() call
         mraa_i2c_read(i2c, rx_tx_buf, DATA_REG_SIZE);
 
-        x = (rx_tx_buf[HMC5883L_X_MSB_REG] << 8 ) | rx_tx_buf[HMC5883L_X_LSB_REG] ;
-        z = (rx_tx_buf[HMC5883L_Z_MSB_REG] << 8 ) | rx_tx_buf[HMC5883L_Z_LSB_REG] ;
-        y = (rx_tx_buf[HMC5883L_Y_MSB_REG] << 8 ) | rx_tx_buf[HMC5883L_Y_LSB_REG] ;
+        x = (rx_tx_buf[HMC5883L_X_MSB_REG] << 8) | rx_tx_buf[HMC5883L_X_LSB_REG];
+        z = (rx_tx_buf[HMC5883L_Z_MSB_REG] << 8) | rx_tx_buf[HMC5883L_Z_LSB_REG];
+        y = (rx_tx_buf[HMC5883L_Y_MSB_REG] << 8) | rx_tx_buf[HMC5883L_Y_LSB_REG];
 
-        //scale and calculate direction
+        // scale and calculate direction
         direction = atan2(y * SCALE_0_92_MG, x * SCALE_0_92_MG);
 
-        //check if the signs are reversed
+        // check if the signs are reversed
         if (direction < 0)
             direction += 2 * M_PI;
 
-        printf("Compass scaled data x : %f, y : %f, z : %f\n", x * SCALE_0_92_MG, y * SCALE_0_92_MG, z * SCALE_0_92_MG) ;
-        printf("Heading : %f\n", direction * 180/M_PI) ;
+        printf("Compass scaled data x : %f, y : %f, z : %f\n", x * SCALE_0_92_MG, y * SCALE_0_92_MG,
+               z * SCALE_0_92_MG);
+        printf("Heading : %f\n", direction * 180 / M_PI);
     }
 }

examples/i2c_firmata.c

@@ -0,0 +1,64 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2016 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "mraa.h"
+
+int
+main(int argc, char** argv)
+{
+    mraa_init();
+    mraa_add_subplatform(MRAA_GENERIC_FIRMATA, "/dev/ttyACM0");
+
+    mraa_i2c_context i2c;
+    i2c = mraa_i2c_init(0 + 512);
+#if 0
+    mraa_i2c_address(i2c, 0x62);
+
+#if 1
+    uint8_t rx_tx_buf[2];
+    rx_tx_buf[0] = 0x0;
+    rx_tx_buf[1] = 0x0;
+    mraa_i2c_write(i2c, rx_tx_buf, 2);
+#endif
+    //mraa_i2c_write_byte_data(i2c, 0x0, 0x0);
+    mraa_i2c_write_byte_data(i2c, 0x0, 0x1);
+
+    mraa_i2c_write_byte_data(i2c, 0xFF, 0x08);
+    mraa_i2c_write_byte_data(i2c, 0x00, 0x04);
+    mraa_i2c_write_byte_data(i2c, 0xA0, 0x02);
+#else
+    mraa_i2c_address(i2c, 0x77);
+    int res = mraa_i2c_read_byte_data(i2c, 0xd0);
+    printf("res is 0x%x\n", res);
+
+    uint8_t data[2];
+    mraa_i2c_write_byte(i2c, 0x77);
+    mraa_i2c_read(i2c, data, 1);
+
+    res = mraa_i2c_read_word_data(i2c, 0xAA); // BMP085_CAL_AC1
+    printf("res is %d\n", res);
+#endif
+    sleep(10);
+
+}

examples/iio_driver.c

@@ -0,0 +1,145 @@
+/*
+ * Author: Brendan Le Foll
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <unistd.h>
+#include "mraa/iio.h"
+
+static void
+printword(uint16_t input, mraa_iio_channel* chan)
+{
+    int16_t res;
+
+    if (!chan->lendian) {
+        input = be16toh(input);
+    } else {
+        input = le16toh(input);
+    }
+
+    input >>= chan->shift;
+    input &= chan->mask;
+    if (chan->signedd) {
+        res = (int16_t)(input << (16 - chan->bits_used)) >> (16 - chan->bits_used);
+    } else {
+        res = input;
+    }
+    printf("  value = %05f\n", (float) res);
+}
+
+mraa_iio_context iio_device0;
+mraa_iio_context iio_device6;
+
+void
+interrupt(char* data)
+{
+    mraa_iio_channel* channels = mraa_iio_get_channels(iio_device0);
+    int i = 0;
+
+    for (; i < mraa_iio_get_channel_count(iio_device0); i++) {
+        if (channels[i].enabled) {
+            printf("channel %d - bytes %d\n", channels[i].index, channels[i].bytes);
+            switch (channels[i].bytes) {
+                case 2:
+                    printword(*(uint16_t*) (data + channels[i].location), &channels[i]);
+            }
+        }
+    }
+}
+
+void
+event_interrupt(struct iio_event_data* data)
+{
+    int chan_type;
+    int modifier;
+    int type;
+    int direction;
+    int channel;
+    int channel2;
+    int different;
+    mraa_iio_event_extract_event(data, &chan_type, &modifier, &type, &direction, &channel, &channel2, &different);
+
+    printf("event time %lld id %lld extracted chan_type %d modifier %d type %d direction %d "
+           "channel %d channel2 %d different %d\n",
+           data->timestamp, data->id, chan_type, modifier, type, direction, channel, channel2, different);
+}
+
+int
+main()
+{
+    //! [Interesting]
+    iio_device0 = mraa_iio_init(0);
+    if (iio_device0 == NULL) {
+        return EXIT_FAILURE;
+    }
+
+    float iio_float;
+    int iio_int;
+    mraa_result_t ret;
+
+    ret = mraa_iio_write_float(iio_device0, "in_accel_scale", 0.019163);
+    if (ret == MRAA_SUCCESS) {
+        fprintf(stdout, "IIO write success\n");
+    }
+
+    ret = mraa_iio_read_float(iio_device0, "in_accel_scale", &iio_float);
+    if (ret == MRAA_SUCCESS) {
+        fprintf(stdout, "IIO read %f\n", iio_float);
+    }
+
+    ret = mraa_iio_write_int(iio_device0, "scan_elements/in_accel_x_en", 1);
+    if (ret == MRAA_SUCCESS) {
+        fprintf(stdout, "IIO write success\n");
+    }
+
+    ret = mraa_iio_read_int(iio_device0, "scan_elements/in_accel_x_en", &iio_int);
+    if (ret == MRAA_SUCCESS) {
+        fprintf(stdout, "IIO read %d\n", iio_int);
+    }
+
+    if (mraa_iio_trigger_buffer(iio_device0, interrupt, NULL) == MRAA_SUCCESS) {
+        sleep(100);
+        return EXIT_SUCCESS;
+    }
+
+    /*
+    struct iio_event_data event;
+    iio_device6 = mraa_iio_init(6);
+    if (iio_device6 == NULL) {
+        return EXIT_FAILURE;
+    }
+    mraa_iio_write_int(iio_device6, "events/in_proximity2_thresh_either_en", 1);
+
+
+    // Blocking until event fired
+    if (mraa_iio_event_poll(iio_device6, &event) == MRAA_SUCCESS) {
+        event_interrupt(&event); //just to show data
+    }
+
+    if (mraa_iio_event_setup_callback(iio_device6, event_interrupt, NULL) == MRAA_SUCCESS) {
+        sleep(100);
+        return EXIT_SUCCESS;
+    }*/
+
+    //! [Interesting]
+    return EXIT_FAILURE;
+}