ich777/linux_media
1
0
Fork 0
mirror of https://github.com/tbsdtv/linux_media.git synced 2025-07-22 12:21:00 +02:00
Code Issues Packages Projects Releases Wiki Activity

media: dvb-frontends/mxl58x: Fixes.

Browse Source
This commit is contained in:
CrazyCat
2025-03-16 23:46:40 +02:00
parent 4adf72a0f9
commit 197f7e3315
2 changed files with 15 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files

26
drivers/media/dvb-frontends/mxl58x.c
View File

@@ -1187,64 +1187,64 @@ static int config_ts(struct mxl *state, MXL_HYDRA_DEMOD_ID_E demodId, MXL_HYDRA_
u32 ncoCountMin = 0;
u32 clkType = 0;
MXL_REG_FIELD_T xpt_sync_polarity[MXL_HYDRA_DEMOD_MAX] = {
static const MXL_REG_FIELD_T xpt_sync_polarity[MXL_HYDRA_DEMOD_MAX] = {
{XPT_SYNC_POLARITY0}, {XPT_SYNC_POLARITY1},
{XPT_SYNC_POLARITY2}, {XPT_SYNC_POLARITY3},
{XPT_SYNC_POLARITY4}, {XPT_SYNC_POLARITY5},
{XPT_SYNC_POLARITY6}, {XPT_SYNC_POLARITY7} };
MXL_REG_FIELD_T xpt_clock_polarity[MXL_HYDRA_DEMOD_MAX] = {
static const MXL_REG_FIELD_T xpt_clock_polarity[MXL_HYDRA_DEMOD_MAX] = {
{XPT_CLOCK_POLARITY0}, {XPT_CLOCK_POLARITY1},
{XPT_CLOCK_POLARITY2}, {XPT_CLOCK_POLARITY3},
{XPT_CLOCK_POLARITY4}, {XPT_CLOCK_POLARITY5},
{XPT_CLOCK_POLARITY6}, {XPT_CLOCK_POLARITY7} };
MXL_REG_FIELD_T xpt_valid_polarity[MXL_HYDRA_DEMOD_MAX] = {
static const MXL_REG_FIELD_T xpt_valid_polarity[MXL_HYDRA_DEMOD_MAX] = {
{XPT_VALID_POLARITY0}, {XPT_VALID_POLARITY1},
{XPT_VALID_POLARITY2}, {XPT_VALID_POLARITY3},
{XPT_VALID_POLARITY4}, {XPT_VALID_POLARITY5},
{XPT_VALID_POLARITY6}, {XPT_VALID_POLARITY7} };
MXL_REG_FIELD_T xpt_ts_clock_phase[MXL_HYDRA_DEMOD_MAX] = {
static const MXL_REG_FIELD_T xpt_ts_clock_phase[MXL_HYDRA_DEMOD_MAX] = {
{XPT_TS_CLK_PHASE0}, {XPT_TS_CLK_PHASE1},
{XPT_TS_CLK_PHASE2}, {XPT_TS_CLK_PHASE3},
{XPT_TS_CLK_PHASE4}, {XPT_TS_CLK_PHASE5},
{XPT_TS_CLK_PHASE6}, {XPT_TS_CLK_PHASE7} };
MXL_REG_FIELD_T xpt_lsb_first[MXL_HYDRA_DEMOD_MAX] = {
static const MXL_REG_FIELD_T xpt_lsb_first[MXL_HYDRA_DEMOD_MAX] = {
{XPT_LSB_FIRST0}, {XPT_LSB_FIRST1}, {XPT_LSB_FIRST2}, {XPT_LSB_FIRST3},
{XPT_LSB_FIRST4}, {XPT_LSB_FIRST5}, {XPT_LSB_FIRST6}, {XPT_LSB_FIRST7} };
MXL_REG_FIELD_T xpt_sync_byte[MXL_HYDRA_DEMOD_MAX] = {
static const MXL_REG_FIELD_T xpt_sync_byte[MXL_HYDRA_DEMOD_MAX] = {
{XPT_SYNC_FULL_BYTE0}, {XPT_SYNC_FULL_BYTE1},
{XPT_SYNC_FULL_BYTE2}, {XPT_SYNC_FULL_BYTE3},
{XPT_SYNC_FULL_BYTE4}, {XPT_SYNC_FULL_BYTE5},
{XPT_SYNC_FULL_BYTE6}, {XPT_SYNC_FULL_BYTE7} };
MXL_REG_FIELD_T xpt_enable_output[MXL_HYDRA_DEMOD_MAX] = {
static const MXL_REG_FIELD_T xpt_enable_output[MXL_HYDRA_DEMOD_MAX] = {
{XPT_ENABLE_OUTPUT0}, {XPT_ENABLE_OUTPUT1},
{XPT_ENABLE_OUTPUT2}, {XPT_ENABLE_OUTPUT3},
{XPT_ENABLE_OUTPUT4}, {XPT_ENABLE_OUTPUT5},
{XPT_ENABLE_OUTPUT6}, {XPT_ENABLE_OUTPUT7} };
MXL_REG_FIELD_T xpt_enable_dvb_input[MXL_HYDRA_DEMOD_MAX] = {
static const MXL_REG_FIELD_T xpt_enable_dvb_input[MXL_HYDRA_DEMOD_MAX] = {
{XPT_ENABLE_INPUT0}, {XPT_ENABLE_INPUT1},
{XPT_ENABLE_INPUT2}, {XPT_ENABLE_INPUT3},
{XPT_ENABLE_INPUT4}, {XPT_ENABLE_INPUT5},
{XPT_ENABLE_INPUT6}, {XPT_ENABLE_INPUT7} };
MXL_REG_FIELD_T xpt_err_replace_sync[MXL_HYDRA_DEMOD_MAX] = {
static const MXL_REG_FIELD_T xpt_err_replace_sync[MXL_HYDRA_DEMOD_MAX] = {
{XPT_ERROR_REPLACE_SYNC0}, {XPT_ERROR_REPLACE_SYNC1},
{XPT_ERROR_REPLACE_SYNC2}, {XPT_ERROR_REPLACE_SYNC3},
{XPT_ERROR_REPLACE_SYNC4}, {XPT_ERROR_REPLACE_SYNC5},
{XPT_ERROR_REPLACE_SYNC6}, {XPT_ERROR_REPLACE_SYNC7} };
MXL_REG_FIELD_T xpt_err_replace_valid[MXL_HYDRA_DEMOD_MAX] = {
static const MXL_REG_FIELD_T xpt_err_replace_valid[MXL_HYDRA_DEMOD_MAX] = {
{XPT_ERROR_REPLACE_VALID0}, {XPT_ERROR_REPLACE_VALID1},
{XPT_ERROR_REPLACE_VALID2}, {XPT_ERROR_REPLACE_VALID3},
{XPT_ERROR_REPLACE_VALID4}, {XPT_ERROR_REPLACE_VALID5},
{XPT_ERROR_REPLACE_VALID6}, {XPT_ERROR_REPLACE_VALID7} };
MXL_REG_FIELD_T xpt_continuous_clock[MXL_HYDRA_DEMOD_MAX] = {
static const MXL_REG_FIELD_T xpt_continuous_clock[MXL_HYDRA_DEMOD_MAX] = {
{XPT_TS_CLK_OUT_EN0}, {XPT_TS_CLK_OUT_EN1},
{XPT_TS_CLK_OUT_EN2}, {XPT_TS_CLK_OUT_EN3},
{XPT_TS_CLK_OUT_EN4}, {XPT_TS_CLK_OUT_EN5},
{XPT_TS_CLK_OUT_EN6}, {XPT_TS_CLK_OUT_EN7} };
MXL_REG_FIELD_T mxl561_xpt_ts_sync[MXL_HYDRA_DEMOD_ID_6] = {
static const MXL_REG_FIELD_T mxl561_xpt_ts_sync[MXL_HYDRA_DEMOD_ID_6] = {
{PAD_MUX_DIGIO_25_PINMUX_SEL}, {PAD_MUX_DIGIO_20_PINMUX_SEL},
{PAD_MUX_DIGIO_17_PINMUX_SEL}, {PAD_MUX_DIGIO_11_PINMUX_SEL},
{PAD_MUX_DIGIO_08_PINMUX_SEL}, {PAD_MUX_DIGIO_03_PINMUX_SEL} };
MXL_REG_FIELD_T mxl561_xpt_ts_valid[MXL_HYDRA_DEMOD_ID_6] = {
static const MXL_REG_FIELD_T mxl561_xpt_ts_valid[MXL_HYDRA_DEMOD_ID_6] = {
{PAD_MUX_DIGIO_26_PINMUX_SEL}, {PAD_MUX_DIGIO_19_PINMUX_SEL},
{PAD_MUX_DIGIO_18_PINMUX_SEL}, {PAD_MUX_DIGIO_10_PINMUX_SEL},
{PAD_MUX_DIGIO_09_PINMUX_SEL}, {PAD_MUX_DIGIO_02_PINMUX_SEL} };

4
drivers/media/dvb-frontends/mxl58x_defs.h
View File

@@ -176,7 +176,7 @@ typedef struct
typedef struct
{
MBIN_FILE_HEADER_T header;
u8 data[1];
u8 data[];
} MBIN_FILE_T;
typedef struct
@@ -190,7 +190,7 @@ typedef struct
typedef struct
{
MBIN_SEGMENT_HEADER_T header;
u8 data[1];
u8 data[];
} MBIN_SEGMENT_T;