python: doc: add python doc to python3

Make sure that right python is used for the right bindings docs

Signed-off-by: Thomas Ingleby <thomas.ingleby@intel.com>

.clang-format

@@ -0,0 +1,50 @@
+AccessModifierOffset: -2
+AlignEscapedNewlinesLeft: true
+AlignTrailingComments: true
+AllowAllParametersOfDeclarationOnNextLine: false
+AllowShortFunctionsOnASingleLine: false
+AllowShortIfStatementsOnASingleLine: false
+AllowShortLoopsOnASingleLine: false
+AlwaysBreakBeforeMultilineStrings: false
+AlwaysBreakTemplateDeclarations: false
+AlwaysBreakAfterDefinitionReturnType: true
+BinPackParameters: false
+BreakBeforeBinaryOperators: false
+BreakBeforeBraces: Linux
+BreakBeforeTernaryOperators: false
+BreakConstructorInitializersBeforeComma: false
+ColumnLimit: 100
+CommentPragmas: ''
+ConstructorInitializerAllOnOneLineOrOnePerLine: false
+ConstructorInitializerIndentWidth: 0
+ContinuationIndentWidth: 0
+Cpp11BracedListStyle: false
+DerivePointerBinding: false
+IndentCaseLabels: true
+IndentFunctionDeclarationAfterType: false
+IndentWidth: 4
+Language: Cpp
+MaxEmptyLinesToKeep: 2
+NamespaceIndentation: None
+ObjCSpaceAfterProperty: true
+ObjCSpaceBeforeProtocolList: true
+PenaltyBreakBeforeFirstCallParameter: 100
+PenaltyBreakComment: 100
+PenaltyBreakFirstLessLess: 0
+PenaltyBreakString: 100
+PenaltyExcessCharacter: 1
+PenaltyReturnTypeOnItsOwnLine: 20
+PointerBindsToType: true
+PointerAlignment: Left
+SpaceBeforeAssignmentOperators: true
+SpaceBeforeParens: ControlStatements
+SpaceInEmptyParentheses: false
+SpacesBeforeTrailingComments: 1
+SpacesInAngles: false
+SpacesInCStyleCastParentheses: false
+SpaceAfterCStyleCast: true
+SpacesInContainerLiterals: false
+SpacesInParentheses: false
+Standard: Cpp11
+TabWidth: 4
+UseTab: Never

.gitignore

@@ -10,4 +10,13 @@ build/
 
 # Temp files
 *.swp
+*.swo
 *~
+
+# npmpub files
+src/mraajsJAVASCRIPT_wrap.cxx
+src/version.c
+package.json
+binding.gyp
+READMEFIRST
+npm-debug.log

.gitmodules

@@ -0,0 +1,4 @@
+[submodule "doxygen2jsdoc"]
+	path = doxygen2jsdoc
+	url = https://github.com/arfoll/doxygen2jsdoc.git
+	branch = master

.travis.yml

@@ -0,0 +1,55 @@
+language: cpp
+sudo: required
+dist: trusty
+env:
+  - NODE010=true
+  - NODE012=true
+  - NODE4=true
+  - NODE5=true
+  - JSONPLAT=true NODE010=true
+  - JSONPLAT=true NODE012=true
+  - JSONPLAT=true NODE4=true
+  - JSONPLAT=true NODE5=true
+  # node010 npm builds don't work in clang and anyone using npm should want to
+  # use something newer
+  - NPM=true NODE4=true
+  - NPM=true NODE5=true
+compiler:
+  - clang
+  - gcc
+before_install:
+  # Via https://github.com/travis-ci/travis-ci/issues/5326
+  - export PATH="$(echo $PATH | tr ':' "\n" | sed '/\/opt\/python/d' | tr "\n" ":" | sed "s|::|:|g")"
+install:
+  - if [ "${NODE4}" ]; then export CC=gcc-4.8 CXX=g++-4.8; fi
+before_script:
+  # Turn off JAVA SWIG for clang++, use 4.8 for all g++ builds
+  - if [ "$CC" == "gcc" ]; then export BUILDJAVA=ON; export CC=gcc-4.8; export CXX=g++-4.8; else export BUILDJAVA=OFF; fi
+  - if [ "${JSONPLAT}" ]; then export JSONPLAT=ON; else export JSONPLAT=OFF; fi
+  - if [ "${NODE010}" ]; then nvm install 0.10; fi
+  - if [ "${NODE012}" ]; then nvm install 0.12; fi
+  - if [ "${NODE4}" ]; then nvm install 4.1; fi
+  - if [ "${NODE5}" ]; then nvm install 5; fi
+  - npm install node-gyp && export NODE_GYP="/home/travis/build/intel-iot-devkit/mraa/node_modules/node-gyp/bin/node-gyp.js"
+  # Handle 0.10 NODE_ROOT_DIR differently than other versions
+  - wget http://prdownloads.sourceforge.net/swig/swig-3.0.10.tar.gz && tar xf swig-3.0.10.tar.gz && cd swig-3.0.10 && ./configure --prefix=/home/travis/ && make && make install && cd ..
+script:
+  - echo "CC=$CC BUILDJAVA=$BUILDJAVA JSONPLAT=$JSONPLAT NODE010=$NODE010 NODE012=$NODE012 NODE4=$NODE4 NODE5=$NODE5 NODE_ROOT_DIR=$NODE_ROOT_DIR"
+  - if [ -z ${NPM} ]; then mkdir build && cd build && cmake -DBUILDSWIGJAVA="$BUILDJAVA" -DJSONPLAT=$JSONPLAT -DNODE_ROOT_DIR:PATH="${NVM_BIN}/.." -DCMAKE_INSTALL_PREFIX:PATH=../install -DSWIG_EXECUTABLE=/home/travis/bin/swig -DSWIG_DIR:PATH=/home/travis/share/swig/3.0.10/ .. && make install && make test; else mkdir build && cd build && cmake -DBUILDSWIGJAVA="$BUILDJAVA" -DJSONPLAT=$JSONPLAT -DNODE_ROOT_DIR:PATH="${NVM_BIN}/.." -DCMAKE_INSTALL_PREFIX:PATH=../install -DSWIG_EXECUTABLE=/home/travis/bin/swig -DSWIG_DIR:PATH=/home/travis/share/swig/3.0.10/ .. && make npmpkg && cd .. && ${NODE_GYP} configure && ${NODE_GYP} build; fi
+  # simple test to see if we can load our node module
+  - if [ ${NPM} ]; then cd build/Release/obj.target/ && node -e  "var m = require('./mraa.node'); m.getVersion()";fi
+addons:
+  apt:
+    sources:
+      - ubuntu-toolchain-r-test
+      - kalakris-cmake
+    packages:
+      - g++-4.8
+      - cmake
+      - python
+      - python-dev
+      - python3
+      - python3-dev
+      - git
+      - libjson0
+      - libjson0-dev

Android.mk

@@ -0,0 +1,62 @@
+# Copyright (C) 2015 Intel Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+LOCAL_PATH := $(call my-dir)
+
+include $(CLEAR_VARS)
+
+LOCAL_MODULE := libmraa
+LOCAL_CFLAGS += -Wno-unused-parameter -DX86PLAT=1
+LOCAL_SHARED_LIBRARIES := libcutils libutils libdl libc
+LOCAL_SRC_FILES := \
+    src/mraa.c \
+    src/gpio/gpio.c \
+    src/i2c/i2c.c \
+    src/pwm/pwm.c \
+    src/spi/spi.c \
+    src/aio/aio.c \
+    src/uart/uart.c \
+    src/x86/x86.c \
+    src/iio/iio.c \
+    src/x86/intel_galileo_rev_d.c \
+    src/x86/intel_galileo_rev_g.c \
+    src/x86/intel_edison_fab_c.c  \
+    src/x86/intel_de3815.c \
+    src/x86/intel_nuc5.c \
+    src/x86/intel_sofia_3gr.c \
+    src/x86/intel_minnow_byt_compatible.c \
+    src/x86/intel_cherryhills.c \
+    src/x86/up.c \
+    src/x86/intel_gt_tuchuck.c
+
+# glob.c pulled in from NetBSD project (BSD 3-clause License)
+LOCAL_SRC_FILES += \
+    src/glob/glob.c
+
+LOCAL_C_INCLUDES := \
+    $(LOCAL_PATH)/include \
+    $(LOCAL_PATH)/include/linux \
+    $(LOCAL_PATH)/include/x86 \
+    $(LOCAL_PATH)/api \
+    $(LOCAL_PATH)/api/mraa \
+    $(LOCAL_PATH)/src/glob
+
+LOCAL_EXPORT_C_INCLUDE_DIRS := \
+    $(LOCAL_PATH)/api \
+    $(LOCAL_PATH)/api/mraa
+
+LOCAL_MODULE_TAGS := optional
+
+include $(BUILD_SHARED_LIBRARY)
+

CMakeLists.txt

@@ -1,10 +1,27 @@
 cmake_minimum_required (VERSION 2.8)
-project (maa)
+project (mraa C)
 
-FIND_PACKAGE (Threads)
+FIND_PACKAGE (Threads REQUIRED)
 
-set (CMAKE_CXX_FLAGS_DEBUG "${CMAKE_CXX_FLAGS_DEBUG} -Wall")
-set (CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -Wall")
+set (CMAKE_CXX_FLAGS_DEBUG "${CMAKE_CXX_FLAGS_DEBUG} -Wall -fno-omit-frame-pointer ")
+set (CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -Wall ")
+
+# Set CMAKE_INSTALL_LIBDIR if not defined
+include(GNUInstallDirs)
+
+# Older cmake might not pick CMAKE_INSTALL_LIBDIR right
+if (CMAKE_INSTALL_LIBDIR)
+  set (LIB_INSTALL_DIR "${CMAKE_INSTALL_LIBDIR}" CACHE PATH "Installation path for libraries")
+else ()
+  set (LIB_INSTALL_DIR "lib" CACHE PATH "Installation path for libraries")
+endif ()
+
+# By default, build shared object libraries on linux
+if (UNIX AND NOT APPLE)
+  if (NOT DEFINED BUILD_SHARED_LIBS)
+    set(BUILD_SHARED_LIBS ON)
+  endif()
+endif()
 
 # Appends the cmake/modules path to MAKE_MODULE_PATH variable.
 set (CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}/cmake/modules ${CMAKE_MODULE_PATH})
@@ -12,48 +29,178 @@ set (CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}/cmake/modules ${CMAKE_MODULE_
 # Make a version file containing the current version from git.
 include (GetGitRevisionDescription)
 git_describe (VERSION "--tags")
-if ("x_${VERSION}" STREQUAL "x_GIT-NOTFOUND")
-  message (WARNING " - Install git to compile a production libmaa!")
-  set (VERSION "v0.2.3-dirty")
+if ("x_${VERSION}" STREQUAL "x_GIT-NOTFOUND" OR "x_${VERSION}" STREQUAL "x_HEAD-HASH-NOTFOUND" OR "x_${VERSION}" STREQUAL "x_-128-NOTFOUND")
+  message (WARNING " - Install git to compile a production libmraa!")
+  set (VERSION "v1.2.3-dirty")
 endif ()
 
-message (INFO " - MAA Version ${VERSION}")
+message (STATUS "INFO - libmraa Version ${VERSION}")
+message (STATUS "INFO - cmake Version ${CMAKE_MAJOR_VERSION}.${CMAKE_MINOR_VERSION}.${CMAKE_PATCH_VERSION}")
 
 #parse the version information into pieces.
 string (REGEX REPLACE "^v([0-9]+)\\..*" "\\1" VERSION_MAJOR "${VERSION}")
 string (REGEX REPLACE "^v[0-9]+\\.([0-9]+).*" "\\1" VERSION_MINOR "${VERSION}")
 string (REGEX REPLACE "^v[0-9]+\\.[0-9]+\\.([0-9]+).*" "\\1" VERSION_PATCH "${VERSION}")
-string (REGEX REPLACE "^v[0-9]+\\.[0-9]+\\.[0-9]+(.*)" "\\1" VERSION_SHA1 "${VERSION}")
+string (REGEX REPLACE "^v[0-9]+\\.[0-9]+\\.[0-9]+\\-([0-9]+).*" "\\1" VERSION_COMMIT "${VERSION}")
+string (REGEX REPLACE "^v[0-9]+\\.[0-9]+\\.[0-9]+-[0-9]+\\-(.*)" "\\1" VERSION_SHA1 "${VERSION}")
 set (VERSION_SHORT "${VERSION_MAJOR}.${VERSION_MINOR}.${VERSION_PATCH}")
 
+if ("${VERSION_COMMIT}" MATCHES "^v.*")
+  set (VERSION_COMMIT "")
+endif()
+
 configure_file (${CMAKE_CURRENT_SOURCE_DIR}/cmake/modules/version.c.in
                 ${CMAKE_CURRENT_BINARY_DIR}/src/version.c)
 
 # this is the library version, independant of git revision
-set (maa_VERSION_MAJOR ${VERSION_MAJOR})
-set (maa_VERSION_MINOR ${VERSION_MINOR})
-set (maa_VERSION_PATCH ${VERSION_PATCH})
-set (maa_VERSION_STRING ${maa_VERSION_MAJOR}.${maa_VERSION_MINOR}.${maa_VERSION_PATCH})
+set (mraa_VERSION_MAJOR ${VERSION_MAJOR})
+set (mraa_VERSION_MINOR ${VERSION_MINOR})
+set (mraa_VERSION_PATCH ${VERSION_PATCH})
+set (mraa_VERSION_STRING ${mraa_VERSION_MAJOR}.${mraa_VERSION_MINOR}.${mraa_VERSION_PATCH})
 
 set (CMAKE_SWIG_FLAGS "")
 
-option (test "Build all tests." OFF)
+find_path (SYSTEM_USR_DIR "stdlib.h")
+include_directories (${SYSTEM_USR_DIR})
 
-if (test)
+option (BUILDDOC "Build all doc." OFF)
+option (BUILDSWIG "Build swig modules." ON)
+option (BUILDSWIGPYTHON "Build swig python modules." ON)
+option (BUILDSWIGNODE "Build swig node modules." ON)
+option (BUILDSWIGJAVA "Build Java API." OFF)
+option (USBPLAT "Detection USB platform." OFF)
+option (FIRMATA "Add Firmata support to mraa." OFF)
+option (ONEWIRE "Add Onewire support to mraa." ON)
+option (JSONPLAT "Add Platform loading via a json file." ON)
+option (IMRAA "Add Imraa support to mraa." OFF)
+option (FTDI4222 "Build with FTDI FT4222 subplatform support." OFF)
+option (IPK "Generate IPK using CPack" OFF)
+option (RPM "Generate RPM using CPack" OFF)
+option (ENABLEEXAMPLES "Disable building of examples" ON)
+option (INSTALLGPIOTOOL "Install gpio tool" OFF)
+option (INSTALLTOOLS "Install all tools" OFF)
+option (BUILDTESTS "Override the addition of tests" ON)
+
+set (BUILDARCH "" CACHE STRING "Override architecture to build for")
+
+set (MRAAPLATFORMFORCE "ALL" CACHE STRING "Override platform to build for")
+
+if (NOT BUILDSWIG)
+  set (BUILDSWIGPYTHON OFF)
+  set (BUILDSWIGNODE OFF)
+  set (BUILDSWIGJAVA OFF)
+endif()
+
+if (NOT BUILDARCH)
+  include (TargetArch)
+  target_architecture (DETECTED_ARCH)
+  message (STATUS "INFO - Target arch is ${DETECTED_ARCH}")
+else ()
+  set (DETECTED_ARCH ${BUILDARCH})
+  message (STATUS "INFO - Override arch is ${DETECTED_ARCH}")
+endif()
+
+if (DETECTED_ARCH STREQUAL "i586" OR DETECTED_ARCH STREQUAL "x86_64"
+    OR DETECTED_ARCH STREQUAL "i386")
+  set (X86PLAT ON)
+elseif (DETECTED_ARCH MATCHES "arm.*")
+  set (ARMPLAT ON)
+elseif (DETECTED_ARCH STREQUAL "MOCK")
+  set (MOCKPLAT ON)
+else ()
+  message (FATAL_ERROR "Only x86, arm and mock platforms currently supported")
+endif()
+
+if (BUILDSWIGPYTHON OR BUILDTESTS)
+  include (cmake/modules/OpenCVDetectPython.cmake)
+endif ()
+
+if (BUILDDOC)
+  # add a target to generate API documentation with Doxygen
+  find_package (Doxygen)
+  if (DOXYGEN_FOUND)
+    configure_file (${CMAKE_CURRENT_SOURCE_DIR}/Doxyfile.in ${CMAKE_CURRENT_BINARY_DIR}/Doxyfile @ONLY)
+    if (BUILDSWIGJAVA)
+      configure_file (${CMAKE_CURRENT_SOURCE_DIR}/Doxyfile.java.in ${CMAKE_CURRENT_BINARY_DIR}/src/java/Doxyfile @ONLY)
+    endif ()
+    add_custom_target (doc
+      ${DOXYGEN_EXECUTABLE} ${CMAKE_CURRENT_BINARY_DIR}/Doxyfile
+      WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
+      COMMENT "Generating API documentation with Doxygen" VERBATIM
+    )
+  endif (DOXYGEN_FOUND)
+endif ()
+
+if (IPK)
+  # Get target package arch from Yocto ADT sysroot if set or host OS, mapping to Ubuntu name if necessary
+  if (DEFINED ENV{OECORE_TARGET_SYSROOT})
+    GET_FILENAME_COMPONENT (DETECTED_SYSROOT $ENV{OECORE_TARGET_SYSROOT} NAME)
+    string (REGEX REPLACE "-poky-linux" "" TARGET_ARCH "${DETECTED_SYSROOT}")
+  else ()
+    # debian uses amd64 to denote x86_64
+    if (DETECTED_ARCH STREQUAL "x86_64")
+      set (TARGET_ARCH "amd64")
+    else ()
+      set (TARGET_ARCH ${DETECTED_ARCH})
+    endif ()
+  endif ()
+  message (STATUS "INFO - Package arch is ${TARGET_ARCH}")
+
+  set(CPACK_GENERATOR "DEB")
+  set(OPKG_ARCH ${TARGET_ARCH})
+  set(CPACK_BINARY_DIR ${CMAKE_BINARY_DIR})
+  set(CPACK_DEBIAN_PACKAGE_MAINTAINER "Intel IoT-Devkit") #required
+  set(mraa_PACKAGE_ON_TAG ".")
+  if ("${VERSION_COMMIT}" STREQUAL "")
+    set(mraa_PACKAGE_ON_TAG "")
+  endif()
+  set(CPACK_PACKAGE_VERSION
+      "${mraa_VERSION_MAJOR}.${mraa_VERSION_MINOR}.${mraa_VERSION_PATCH}${mraa_PACKAGE_ON_TAG}${VERSION_COMMIT}")
+  set(CPACK_PACKAGE_NAME "mraa")
+  set(CPACK_DEBIAN_PACKAGE_SECTION "libs")
+  set(CPACK_DEBIAN_PACKAGE_ARCHITECTURE ${TARGET_ARCH})
+  set(CPACK_SYSTEM_NAME ${TARGET_ARCH})
+  set(CPACK_DEBIAN_PACKAGE_PROVIDES "mraa-dev, mraa-dbg, mraa-doc")
+  set(CPACK_DEBIAN_PACKAGE_REPLACES "${CPACK_DEBIAN_PACKAGE_PROVIDES}, libmraa, libmraa-dev, libmraa-doc")
+  set(CPACK_DEBIAN_PACKAGE_CONFLICTS ${CPACK_DEBIAN_PACKAGE_PROVIDES})
+  set(WDIR "${CPACK_TOPLEVEL_DIRECTORY}/${CPACK_PACKAGE_FILE_NAME}")
+  include (CPack)
+endif()
+
+if (RPM)
+  message (STATUS "INFO - Enabled RPM packaging for ${DETECTED_ARCH}")
+  set(CMAKE_INSTALL_PREFIX "/usr")
+  set(CPACK_PACKAGE_VERSION ${VERSION})
+  set(CPACK_GENERATOR "RPM")
+  set(CPACK_PACKAGE_NAME "libmraa${mraa_VERSION_MAJOR}")
+  set(CPACK_PACKAGE_RELEASE 1)
+  set(CPACK_PACKAGE_VERSION
+      "${mraa_VERSION_MAJOR}.${mraa_VERSION_MINOR}.${mraa_VERSION_PATCH}${mraa_PACKAGE_ON_TAG}${VERSION_COMMIT}")
+  set(CPACK_PACKAGE_CONTACT "Intel IoT-Devkit")
+  set(CPACK_PACKAGE_VENDOR "Intel IoT-Devkit")
+  set(CPACK_RPM_PACKAGE_PROVIDES "${CPACK_PACKAGE_NAME}-devel")
+  # Get distro tag (e.g. 'fc20') by parsing output of rpm --showrc
+  EXECUTE_PROCESS(
+    COMMAND rpm --showrc
+    COMMAND grep -w dist
+    COMMAND sed -e "s/\\t./ /"
+    COMMAND awk "{printf \"%s\", \$NF}"
+    OUTPUT_VARIABLE DIST_TAG
+  )
+  set(CPACK_PACKAGE_FILE_NAME "${CPACK_PACKAGE_NAME}-${CPACK_PACKAGE_VERSION}-${CPACK_PACKAGE_RELEASE}.${DIST_TAG}.${DETECTED_ARCH}")
+  include(CPack)
+endif()
+
+add_subdirectory (src)
+if (ENABLEEXAMPLES)
+  add_subdirectory (examples)
+endif ()
+
+if (IMRAA)
+  add_subdirectory (imraa)
+endif ()
+
+if (BUILDTESTS AND PYTHON_DEFAULT_EXECUTABLE)
   enable_testing ()
   add_subdirectory (tests)
 endif ()
-
-# add a target to generate API documentation with Doxygen
-find_package (Doxygen)
-if (DOXYGEN_FOUND)
-  configure_file (${CMAKE_CURRENT_SOURCE_DIR}/Doxyfile.in ${CMAKE_CURRENT_BINARY_DIR}/Doxyfile @ONLY)
-  add_custom_target (doc
-    ${DOXYGEN_EXECUTABLE} ${CMAKE_CURRENT_BINARY_DIR}/Doxyfile
-    WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
-    COMMENT "Generating API documentation with Doxygen" VERBATIM
-  )
-endif (DOXYGEN_FOUND)
-
-add_subdirectory (src)
-add_subdirectory (examples)

CONTRIBUTING.md

@@ -0,0 +1,90 @@
+Contributing to libmraa                           {#contributing}
+======================
+
+libmraa is an opensource project and we are actively looking for people to help
+with:
+
+- Writing platform supports for all types of boards running linux
+- People to extend the functionality, API with useful functions
+- Anything we haven't thought about :) Ideas always welcome!
+
+The recommended method to contribute is to fork on github, and then send pull
+requests to the main project. You can open issues if you find any bugs/have
+questions.
+
+If you'd rather not use github you are more than welcome to send git formatted
+patches to our mailing list mraa@lists.01.org which you can register for access
+on: https://lists.01.org/mailman/listinfo/mraa
+
+Basic rules
+-----------
+- Your code must build
+- Commits must have a sign-off line by at least yourself
+- Commits must be named <file/module>: Some decent description
+- Try not to break master. In any commit.
+- Try to split commits up logically, you will be asked to rebase them if they
+  are not.
+- Try to stick to the established coding style regardless of your personal
+  feeling for it! Use clang-format (3.6+ required)
+
+Coding Style
+------------
+
+Coding style for all code is defined by clang-format, have a look at it. Avoid
+styling fixes as they make history difficult to read. Javascript & Java can
+also be parsed through the clang-format, it complains but seems to do an ok
+job. Few exceptions to coding styles:
+- All python code is indented by 2 spaces
+- CmakeLists files are 2 space indented and a space is required before all
+  brackets so endif () and if () and command (). Also use lowercase for
+  everything but variables. Cmake is case insensitive but this isn't the wild
+  wild west ;-)
+
+Use common sense and don't be afraid to challenge something if it doesn't make sense!
+
+Code signing
+------------
+
+The sign-off is a simple line at the end of the explanation for the
+patch, which certifies that you wrote it or otherwise have the right to pass it
+on as an open-source patch.  The rules are pretty simple: if you can certify
+the below:
+
+        Developer's Certificate of Origin 1.1
+
+        By making a contribution to this project, I certify that:
+
+        (a) The contribution was created in whole or in part by me and I
+            have the right to submit it under the open source license
+            indicated in the file; or
+
+        (b) The contribution is based upon previous work that, to the best
+            of my knowledge, is covered under an appropriate open source
+            license and I have the right under that license to submit that
+            work with modifications, whether created in whole or in part
+            by me, under the same open source license (unless I am
+            permitted to submit under a different license), as indicated
+            in the file; or
+
+        (c) The contribution was provided directly to me by some other
+            person who certified (a), (b) or (c) and I have not modified
+            it.
+
+        (d) I understand and agree that this project and the contribution
+            are public and that a record of the contribution (including all
+            personal information I submit with it, including my sign-off) is
+            maintained indefinitely and may be redistributed consistent with
+            this project or the open source license(s) involved.
+
+then you just add a line saying
+
+	Signed-off-by: Random J Developer <random@developer.example.org>
+
+Using your real name (sorry, no pseudonyms or anonymous contributions.)
+
+Where to find us
+----------------
+
+Hop onto the freenode network on IRC and join #mraa. Please be patient as we're
+not always online.
+

COPYING

@@ -1,4 +1,5 @@
-Copyright © 2014 Intel Corporation
+The MIT License (MIT)
+Copyright © 2014-2016 Intel Corporation
 
 Permission is hereby granted, free of charge, to any person obtaining
 a copy of this software and associated documentation files (the

Doxyfile.in

@@ -32,19 +32,19 @@ DOXYFILE_ENCODING      = UTF-8
 # title of most generated pages and in a few other places.
 # The default value is: My Project.
 
-PROJECT_NAME           = maa
+PROJECT_NAME           = mraa
 
 # The PROJECT_NUMBER tag can be used to enter a project or revision number. This
 # could be handy for archiving the generated documentation or if some version
 # control system is used.
 
-PROJECT_NUMBER         = @maa_VERSION_STRING@
+PROJECT_NUMBER         = @mraa_VERSION_STRING@
 
 # Using the PROJECT_BRIEF tag one can provide an optional one line description
 # for a project that appears at the top of each page and should give viewer a
 # quick idea about the purpose of the project. Keep the description short.
 
-PROJECT_BRIEF          = "Low Level Skeleton Library for Communication on Intel platforms"
+PROJECT_BRIEF          = "Low Level Skeleton Library for Communication on GNU/Linux platforms"
 
 # With the PROJECT_LOGO tag one can specify an logo or icon that is included in
 # the documentation. The maximum height of the logo should not exceed 55 pixels
@@ -99,7 +99,7 @@ BRIEF_MEMBER_DESC      = YES
 # brief descriptions will be completely suppressed.
 # The default value is: YES.
 
-REPEAT_BRIEF           = YES
+REPEAT_BRIEF           = NO
 
 # This tag implements a quasi-intelligent brief description abbreviator that is
 # used to form the text in various listings. Each string in this list, if found
@@ -510,7 +510,7 @@ HIDE_SCOPE_NAMES       = YES
 # the files that are included by a file in the documentation of that file.
 # The default value is: YES.
 
-SHOW_INCLUDE_FILES     = YES
+SHOW_INCLUDE_FILES     = NO
 
 # If the SHOW_GROUPED_MEMB_INC tag is set to YES then Doxygen will add for each
 # grouped member an include statement to the documentation, telling the reader
@@ -536,7 +536,7 @@ INLINE_INFO            = YES
 # name. If set to NO the members will appear in declaration order.
 # The default value is: YES.
 
-SORT_MEMBER_DOCS       = YES
+SORT_MEMBER_DOCS       = NO
 
 # If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the brief
 # descriptions of file, namespace and class members alphabetically by member
@@ -671,7 +671,7 @@ FILE_VERSION_FILTER    =
 # DoxygenLayout.xml, doxygen will parse it automatically even if the LAYOUT_FILE
 # tag is left empty.
 
-LAYOUT_FILE            = 
+LAYOUT_FILE            = @CMAKE_CURRENT_SOURCE_DIR@/DoxygenLayout.xml
 
 # The CITE_BIB_FILES tag can be used to specify one or more bib files containing
 # the reference definitions. This must be a list of .bib files. The .bib
@@ -753,7 +753,10 @@ WARN_LOGFILE           =
 # spaces.
 # Note: If this tag is empty the current directory is searched.
 
-INPUT                  = @CMAKE_CURRENT_SOURCE_DIR@/api/ @CMAKE_CURRENT_SOURCE_DIR@/README.md
+INPUT                  = @CMAKE_CURRENT_SOURCE_DIR@/api/ \
+                         @CMAKE_CURRENT_SOURCE_DIR@/api/mraa/ \
+                         @CMAKE_CURRENT_SOURCE_DIR@/docs/ \
+                         @CMAKE_CURRENT_SOURCE_DIR@/CONTRIBUTING.md
 
 # This tag can be used to specify the character encoding of the source files
 # that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses
@@ -862,14 +865,16 @@ EXCLUDE_SYMBOLS        =
 # that contain example code fragments that are included (see the \include
 # command).
 
-EXAMPLE_PATH           = 
+EXAMPLE_PATH           = @CMAKE_CURRENT_SOURCE_DIR@/examples/ \
+                         @CMAKE_CURRENT_SOURCE_DIR@/examples/c++/ \
+                         @CMAKE_CURRENT_SOURCE_DIR@/docs/
 
 # If the value of the EXAMPLE_PATH tag contains directories, you can use the
 # EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and
 # *.h) to filter out the source-files in the directories. If left blank all
 # files are included.
 
-EXAMPLE_PATTERNS       = *
+EXAMPLE_PATTERNS       = *.cpp *.c
 
 # If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be
 # searched for input files to be used with the \include or \dontinclude commands
@@ -930,7 +935,7 @@ FILTER_SOURCE_PATTERNS =
 # (index.html). This can be useful if you have a project on for instance GitHub
 # and want to reuse the introduction page also for the doxygen output.
 
-USE_MDFILE_AS_MAINPAGE = @CMAKE_CURRENT_SOURCE_DIR@/README.md
+USE_MDFILE_AS_MAINPAGE = @CMAKE_CURRENT_SOURCE_DIR@/docs/index.md
 
 #---------------------------------------------------------------------------
 # Configuration options related to source browsing
@@ -1840,18 +1845,6 @@ GENERATE_XML           = YES
 
 XML_OUTPUT             = xml
 
-# The XML_SCHEMA tag can be used to specify a XML schema, which can be used by a
-# validating XML parser to check the syntax of the XML files.
-# This tag requires that the tag GENERATE_XML is set to YES.
-
-XML_SCHEMA             = 
-
-# The XML_DTD tag can be used to specify a XML DTD, which can be used by a
-# validating XML parser to check the syntax of the XML files.
-# This tag requires that the tag GENERATE_XML is set to YES.
-
-XML_DTD                = 
-
 # If the XML_PROGRAMLISTING tag is set to YES doxygen will dump the program
 # listings (including syntax highlighting and cross-referencing information) to
 # the XML output. Note that enabling this will significantly increase the size
@@ -2205,7 +2198,7 @@ INCLUDE_GRAPH          = YES
 # The default value is: YES.
 # This tag requires that the tag HAVE_DOT is set to YES.
 
-INCLUDED_BY_GRAPH      = YES
+INCLUDED_BY_GRAPH      = NO
 
 # If the CALL_GRAPH tag is set to YES then doxygen will generate a call
 # dependency graph for every global function or class method.

DoxygenLayout.xml

@@ -0,0 +1,194 @@
+<doxygenlayout version="1.0">
+  <!-- Generated by doxygen 1.8.7 -->
+  <!-- Navigation index tabs for HTML output -->
+  <navindex>
+    <tab type="mainpage" visible="yes" title=""/>
+    <tab type="pages" visible="yes" title="" intro=""/>
+    <tab type="modules" visible="yes" title="" intro=""/>
+    <tab type="namespaces" visible="yes" title="">
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+    <tab type="classmembers" visible="yes" title="" intro=""/>
+    </tab>
+    <tab type="files" visible="yes" title="">
+    <tab type="filelist" visible="yes" title="" intro=""/>
+    <tab type="globals" visible="yes" title="" intro=""/>
+    </tab>
+    <tab type="examples" visible="yes" title="" intro=""/>  
+  </navindex>
+
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+    <briefdescription visible="no"/>
+    <includes visible="$SHOW_INCLUDE_FILES"/>
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+    <detaileddescription title=""/>
+    <memberdecl>
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+      <publictypes title=""/>
+      <services title=""/>
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+      <friends title=""/>
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+      <membergroups visible="yes"/>
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+      <typedefs title=""/>
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+      <functions title=""/>
+      <related title=""/>
+      <variables title=""/>
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+      <functions title=""/>
+      <variables title=""/>
+      <membergroups visible="yes"/>
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+    <detaileddescription title=""/>
+    <memberdef>
+      <inlineclasses title=""/>
+      <typedefs title=""/>
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+      <variables title=""/>
+    </memberdef>
+    <authorsection visible="yes"/>
+  </namespace>
+
+  <!-- Layout definition for a file page -->
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+    <briefdescription visible="no"/>
+    <detaileddescription title="API Description"/>
+    <sourcelink visible="yes"/>
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+      <namespaces visible="yes" title=""/>
+      <functions title=""/>
+      <constantgroups visible="yes" title=""/>
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+      <typedefs title=""/>
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+      <membergroups visible="yes"/>
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+    <includegraph visible="$INCLUDE_GRAPH"/>
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+    <includedbygraph visible="$INCLUDED_BY_GRAPH"/>
+    <authorsection/>
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+
+  <!-- Layout definition for a group page -->
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+      <pagedocs/>
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+
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+  </directory>
+</doxygenlayout>

README.md

@@ -1,56 +1,116 @@
-MAA - Low Level Skeleton Library for Communication on Intel platforms
+<p align="center">
+  <img src="http://iotdk.intel.com/misc/logos/mraa.png" height="150px" width="auto" algt="Mraa Logo"/>
+</p>
+libmraa - Low Level Skeleton Library for Communication on GNU/Linux platforms
 ==============
 
-Library in C/C++ to interface with Galileo & other Intel platforms over:
-
-- I2C
-- SPI
-- GPIO
-- PWM
-- AIO
-
-In a structured and sane API with port nanmes/numbering that match boards &
-with bindings to javascript & python.
+Libmraa is a C/C++ library with bindings to Java, Python and JavaScript to
+interface with the IO on Galileo, Edison & other platforms, with a structured
+and sane API where port names/numbering matches the board that you are on. Use
+of libmraa does not tie you to specific hardware with board detection done at
+runtime you can create portable code that will work across the supported
+platforms.
 
 The intent is to make it easier for developers and sensor manufacturers to map
 their sensors & actuators on top of supported hardware and to allow control of
 low level communication protocol by high level languages & constructs.
 
-### ENV RECOMENDATIONS
+[![Build Status](https://travis-ci.org/intel-iot-devkit/mraa.svg?branch=master)](https://travis-ci.org/intel-iot-devkit/mraa)
 
-1. node.js 0.10.26
-2. python 3.3.x or 2.7.x
-3. swig-v8 3.0.1
-4. doxygen 1.8.7
+Supported Boards
+================
 
-To install swig-v8 the swig-v8-git package from AUR is helpful
+X86
+---
+* [Galileo Gen 1 - Rev D](../master/docs/galileorevd.md)
+* [Galileo Gen 2 - Rev H](../master/docs/galileorevh.md)
+* [Edison](../master/docs/edison.md)
+* [Intel DE3815](../master/docs/intel_de3815.md)
+* [Minnowboard Max](../master/docs/minnow_max.md)
+* [NUC 5th generation](../master/docs/intel_nuc5.md)
+* [UP](../master/docs/up.md)
+* [Intel Grosse Tete](../master/docs/grossetete.md)
 
-## COMPILING
+ARM
+---
+* [Raspberry Pi](../master/docs/raspberry_pi.md)
+* [Bannana Pi](../master/docs/banana_pi.md)
+* [Beaglebone Black](../master/docs/beaglebone.md)
 
-NOTE: The **only** supported cmake build configuration is to have the build/ dir
-inside of the repo/tarball.
+USB
+---
+* [FT4222](../master/docs/ftdi_ft4222.md)
 
-*if swig-v8 is not in your default path you can try run cmake with
-"-DCMAKE_PREFIX_PATH="/path/to/swig-v8"*
+Mock
+----
+* [Generic simulated board](../master/docs/mock.md)
 
-mkdir build/
-cmake ..
-make
+Installing on your board
+========
 
-Install is currently unsuported. Javascript and python modules will be in
-build/src/{javascript, python}
+See the section below on compiling or use our repository to install on a glibc
+based yocto poky image that supports opkg. Adding this repository is as simple
+as and you'll have the latest stable tagged build of mraa installed!
 
-## DEVELOPMENT
+``` bash
+echo "src mraa-upm http://iotdk.intel.com/repos/3.0/intelgalactic/opkg/i586" > /etc/opkg/mraa-upm.conf
+opkg update
+opkg install mraa
+```
 
-Please fork the code on github and then send pull requests. Please avoid merges
-in your forks. I will also accept patches sent in git style with signoffs to
-brendan.le.foll@intel.com
+If you would like to get the latest & greatest builds from master HEAD you can
+use our -dev repository
 
-## USING
+```bash
+echo "src mraa-upm http://iotdk.intel.com/repos/3.0/intelgalactic-dev/opkg/i586" > /etc/opkg/mraa-upm.conf
+opkg update
+opkg install mraa
+```
 
-see examples/
+You can also install just the node.js mraa module by using npm. You will need a
+C++ compiler and the node development headers, however it's not required to
+have SWIG installed.
 
-*for node.js make sure that maajs.node is in the current dir and set export
-NODE_PATH=.*
+```bash
+npm install mraa
+```
 
-Python html documentation can be generated with **make pydoc**
+Compiling
+=========
+
+See documentation on [building](../master/docs/building.md)
+
+Examples
+========
+
+See the [examples](../../tree/master/examples) available for various languages
+
+Debugging
+=========
+
+Sometimes it just doesn't want to work, let us try and help you, you can file
+issues in github or join us in #mraa on freenode IRC, hang around for a little
+while because we're not necessarily on 24/7, but we'll get back to you! Have a
+glance at our [debugging](../master/docs/debugging.md) page too.
+
+API Documentation
+=================
+
+<a href="http://c.mraa.io"><img src="http://iotdk.intel.com/misc/logos/c++.png"/></a>
+<a href="http://java.mraa.io"><img src="http://iotdk.intel.com/misc/logos/java.png"/></a>
+<a href="http://py.mraa.io"><img src="http://iotdk.intel.com/misc/logos/python.png"/></a>
+<a href="http://js.mraa.io"><img src="http://iotdk.intel.com/misc/logos/node.png"/></a>
+
+Contact Us
+==========
+
+To ask questions either file issues in github or send emails on our [mailing
+list](https://lists.01.org/mailman/listinfo/mraa). You might also catch us on
+the mraa channel on freenode IRC.
+
+See the [Contribution](CONTRIBUTING.md) documentation for more details.
+
+Changelog
+=========
+
+Version changelog [here](docs/changelog.md).

api/aio.h

@@ -1,83 +0,0 @@
-/*
- * Author: Nandkishor Sonar
- * Copyright (c) 2014 Intel Corporation.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#pragma once
-/** @file
- *
- * This file defines the aio (analog in) interface for libmaa
- *
- */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stdio.h>
-#include <unistd.h>
-#include <stdint.h>
-
-#include "maa.h"
-#include "gpio.h"
-
-#define ADC_RAW_RESOLUTION_BITS         (12)
-#define ADC_SUPPORTED_RESOLUTION_BITS   (10)
-
-typedef struct {
-    unsigned int channel;
-    int adc_in_fp;
-} maa_aio_context;
-
-/** Initialise an Analog input device, connected to the specified pin
- *
- * @param aio_channel channel number to read ADC inputs
- *
- * @returns pointer to maa_aio_context structure after initialisation of Analog
- * input pin successfully, else returns null.
- */
-maa_aio_context* maa_aio_init(unsigned int aio_channel);
-
-/** Read the input voltage, represented as an unsigned short in the range [0x0,
- * 0xFFFF]
- *
- * @param dev -  pointer to maa_aio_context structure  initialised by
- * maa_aio_init()
- *
- * @returns 16-bit unsigned integer representing the current input voltage,
- * normalised to a 16-bit value
- */
-uint16_t maa_aio_read(maa_aio_context* dev);
-
-/** Close the analog input context
- * - Will free the memory for the context.
- *
- * @param dev -  pointer to maa_aio_context structure  initialised by
- * maa_aio_init()
- *
- * @return maa_result_t - result type.
- */
-maa_result_t maa_aio_close(maa_aio_context* dev);
-
-#ifdef __cplusplus
-}
-#endif

api/gpio.h

@@ -1,190 +0,0 @@
-/*
- * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
- * Copyright (c) 2014 Intel Corporation.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#pragma once
-
-/** @file
- *
- * This file defines the gpio interface for libmaa
- *
- */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifdef SWIGPYTHON
-#include <Python.h>
-#endif
-
-#include <stdio.h>
-#include <pthread.h>
-
-#include "maa.h"
-/**
- * A strucutre representing a gpio pin.
- */
-
-typedef struct {
-    /*@{*/
-    int pin; /**< the pin number, as known to the os. */
-    int value_fp; /**< the file pointer to the value of the gpio */
-#ifdef SWIGPYTHON
-    PyObject *isr; /**< the interupt service request */
-#else
-    void (* isr)(); /**< the interupt service request */
-#endif
-    pthread_t thread_id; /**< the isr handler thread id */
-    int isr_value_fp; /**< the isr file pointer on the value */
-    /*@}*/
-} maa_gpio_context;
-
-/**
- * GPIO Output modes
- */
-typedef enum {
-    MAA_GPIO_STRONG     = 0, /**< Default. Strong high and low */
-    MAA_GPIO_PULLUP     = 1, /**< Resistive High */
-    MAA_GPIO_PULLDOWN   = 2, /**< Resistive Low */
-    MAA_GPIO_HIZ        = 3  /**< High Z State */
-} gpio_mode_t;
-
-/**
- * GPIO Direction options.
- */
-typedef enum {
-    MAA_GPIO_OUT    = 0, /**< Output. A Mode can also be set */
-    MAA_GPIO_IN     = 1  /**< Input. */
-} gpio_dir_t;
-
-typedef enum {
-    MAA_GPIO_EDGE_NONE    = 0, /**< No interrupt on GPIO */
-    MAA_GPIO_EDGE_BOTH    = 1, /**< Interupt on rising & falling */
-    MAA_GPIO_EDGE_RISING  = 2, /**< Interupt on rising only */
-    MAA_GPIO_EDGE_FALLING = 3  /**< Interupt on falling only */
-} gpio_edge_t;
-
-/** Initialise gpio_context, based on board number
- *
- *  @param pin pin number read from the board, i.e IO3 is 3.
- *
- *  @returns maa_gpio_context based on the IO pin
- */
-maa_gpio_context* maa_gpio_init(int pin);
-
-/** Initialise gpio context without any mapping to a pin.
- * - For more expert users
- *
- * @param gpiopin gpio pin as listed in SYSFS
- *
- * @return gpio context
- */
-maa_gpio_context* maa_gpio_init_raw(int gpiopin);
-
-/** Set the edge mode on the gpio
- *
- * @param dev The GPIO context
- * @param mode The edge mode to set the gpio into
- *
- * @return maa result type.
- */
-maa_result_t maa_gpio_edge_mode(maa_gpio_context *dev, gpio_edge_t mode);
-
-/** Set an interupt on pin
- *
- * @param dev The GPIO context
- * @param mode The edge mode to set the gpio into
- * @param fptr Function pointer to function to be called when interupt is
- * triggered
- *
- * @return maa result type.
- */
-maa_result_t
-maa_gpio_isr(maa_gpio_context *dev, gpio_edge_t edge, void (*fptr)(void));
-
-/** Stop the current interupt watcher on this GPIO, and set the GPIO edge mode
- * to MAA_GPIO_EDGE_NONE.
- *
- * @param dev The GPIO context.
- *
- * @return maa result type.
- */
-maa_result_t
-maa_gpio_isr_exit(maa_gpio_context *dev);
-
-/** Set GPIO Output Mode,
- *
- * @param dev The GPIO context
- * @param mode The GPIO Output Mode.
- *
- * @return maa result type.
- */
-maa_result_t maa_gpio_mode(maa_gpio_context *dev, gpio_mode_t mode);
-
-/** Set GPIO direction
- *
- * @param dev The GPIO context.
- * @param dir The direction of the GPIO.
- *
- * @return maa result type.
- */
-maa_result_t maa_gpio_dir(maa_gpio_context *dev, gpio_dir_t dir);
-
-/** Close the GPIO context
- * - Will free the memory for the context and unexport the GPIO
- *
- * @param dev the GPIO context
- *
- * @return maa result type.
- */
-maa_result_t maa_gpio_close(maa_gpio_context *dev);
-
-/** Unexport the GPIO context (maa_gpio_close() will call this function)
- *
- * @param dev The GPIO context.
- *
- * @return maa result type.
- */
-maa_result_t maa_gpio_unexport(maa_gpio_context *dev);
-
-/** Read the GPIO value.
- *
- * @param dev The GPIO context.
- *
- * @return the integer value of the GPIO
- */
-int maa_gpio_read(maa_gpio_context *dev);
-
-/** Write to the GPIO Value.
- *
- * @param dev The GPIO context.
- * @param value Integer value to write.
- *
- * @return maa result type
- */
-maa_result_t maa_gpio_write(maa_gpio_context *dev, int value);
-
-#ifdef __cplusplus
-}
-#endif

api/i2c.h

@@ -1,136 +0,0 @@
-/*
- * Author: Brendan Le Foll <brendan.le.foll@intel.com>
- * Copyright (c) 2014 Intel Corporation.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#pragma once
-
-/** @file
- *
- * This file defines the i2c interface for libmaa
- *
- */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stdlib.h>
-#include <stdio.h>
-#include <fcntl.h>
-
-#include "maa.h"
-#include "gpio.h"
-
-/**
- * A structure representing an i2c device /dev/i2c-*
- */
-typedef struct {
-    /*@{*/
-    int hz; /**< frequency of communication */
-    int fh; /**< the file handle to the /dev/i2c-* device */
-    int addr; /**< the address of the i2c slave */
-    /*@}*/
-} maa_i2c_context;
-
-/** Initialise i2c context, using board defintions
- *
- * @param bus i2c bus to use
- * @return maa_i2c_context i2c context ready for other calls.
- */
-maa_i2c_context* maa_i2c_init(int bus);
-
-/** Initialise i2c context, passing in spi bus to use.
- *
- * @param bus The i2c bus to use i.e. /dev/i2c-2 would be "2"
- * @return maa_i2c_context i2c context ready for other calls.
- */
-maa_i2c_context* maa_i2c_init_raw(unsigned int bus);
-
-/** Sets the frequency of the i2c context
- *
- *  @param dev the i2c context
- *  @param hz The bus frequency in hertz
- *
- *  @return maa_result_t the maa result.
- */
-maa_result_t maa_i2c_frequency(maa_i2c_context* dev, int hz);
-
-/** Read from an i2c context
- *
- *  @param dev the i2c context
- *  @param data pointer to the byte array to read data in to
- *  @param length max number of bytes to read
- *
- *  @return maa_result_t the maa result.
- */
-maa_result_t maa_i2c_read(maa_i2c_context* dev, char *data, int length);
-
-/** Read a single byte from the i2c context
- *
- *  @param dev the i2c context
- *
- *  @return byte the result of the read or -1 if failed.
- */
-int maa_i2c_read_byte(maa_i2c_context* dev);
-
-/** Write to an i2c context
- *
- *  @param dev the i2c context
- *  @param data pointer to the byte array to be written
- *  @param length the number of bytes to transmit
- *
- *  @return maa_result_t the maa result.
- */
-maa_result_t maa_i2c_write(maa_i2c_context* dev, const char *data, int length);
-
-/** Write a single byte to an i2c context
- *
- *  @param dev the i2c context
- *  @data the byte to write
- *
- *  @return maa_result_t the maa result.
- */
-maa_result_t maa_i2c_write_byte(maa_i2c_context* dev, int data);
-
-/** Sets the i2c context address.
- *
- *  @param dev the i2c context
- *  @param address The address to set for the slave (ignoring the least
- *  signifcant bit). If set to 0, the slave will only respond to the
- *  general call address.
- *
- *  @return maa_result_t the maa result.
- */
-maa_result_t maa_i2c_address(maa_i2c_context* dev, int address);
-
-/** De-inits an maa_i2c_context device
- *
- *  @param dev the i2c context
- *
- *  @return maa_result_t the maa result.
- */
-maa_result_t maa_i2c_stop(maa_i2c_context* dev);
-
-#ifdef __cplusplus
-}
-#endif

api/maa.h

@@ -1,234 +0,0 @@
-/*
- * Author: Brendan Le Foll <brendan.le.foll@intel.com>
- * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
- * Copyright © 2014 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation the
- * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- */
-
-#pragma once
-
-/** @file
- *
- * This file defines the basic shared values for libmaa
- *
- */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * MAA return codes
- */
-typedef enum {
-    MAA_SUCCESS                              =  0, /**< Expected response */
-    MAA_ERROR_FEATURE_NOT_IMPLEMENTED        =  1, /**< Feature TODO */
-    MAA_ERROR_FEATURE_NOT_SUPPORTED          =  2, /**< Feature not supported by HW */
-    MAA_ERROR_INVALID_VERBOSITY_LEVEL        =  3, /**< Verbosity level wrong */
-    MAA_ERROR_INVALID_PARAMETER              =  4, /**< Parameter invalid */
-    MAA_ERROR_INVALID_HANDLE                 =  5, /**< Handle invalid */
-    MAA_ERROR_NO_RESOURCES                   =  6, /**< No resource of that type avail */
-    MAA_ERROR_INVALID_RESOURCE               =  7, /**< Resource invalid */
-    MAA_ERROR_INVALID_QUEUE_TYPE             =  8, /**< Queue type incorrect */
-    MAA_ERROR_NO_DATA_AVAILABLE              =  9, /**< No data available */
-    MAA_ERROR_INVALID_PLATFORM               = 10, /**< Platform not recognised */
-    MAA_ERROR_PLATFORM_NOT_INITIALISED       = 11, /**< Board information not initialised */
-    MAA_ERROR_PLATFORM_ALREADY_INITIALISED   = 12, /**< Board is already initialised */
-
-    MAA_ERROR_UNSPECIFIED                    = 99 /**< Unknown Error */
-} maa_result_t;
-
-/**
- * MAA boolean type
- * 1 For TRUE
- */
-typedef unsigned int maa_boolean_t;
-
-/**
- * Enum representing different possible modes for a pin.
- */
-typedef enum {
-    MAA_PIN_VALID       = 0, /**< Pin Valid */
-    MAA_PIN_GPIO        = 1, /**< General Purpose IO */
-    MAA_PIN_PWM         = 2, /**< Pulse Width Modulation */
-    MAA_PIN_FAST_GPIO   = 3, /**< Faster GPIO */
-    MAA_PIN_SPI         = 4, /**< SPI */
-    MAA_PIN_I2C         = 5, /**< I2C */
-    MAA_PIN_AIO         = 6  /**< Analog in */
-} maa_pinmodes_t;
-
-/**
- * A bitfield representing the capabilities of a pin.
- */
-typedef struct {
-    /*@{*/
-    maa_boolean_t valid:1;     /**< Is the pin valid at all */
-    maa_boolean_t gpio:1;      /**< Is the pin gpio capable */
-    maa_boolean_t pwm:1;       /**< Is the pin pwm capable */
-    maa_boolean_t fast_gpio:1; /**< Is the pin fast gpio capable */
-    maa_boolean_t spi:1;       /**< Is the pin spi capable */
-    maa_boolean_t i2c:1;       /**< Is the pin i2c capable */
-    maa_boolean_t aio:1;       /**< Is the pin analog input capable */
-    /*@}*/
-} maa_pincapabilities_t;
-
-/**
- * A Structure representing a multiplexer and the required value
- */
-typedef struct {
-    /*@{*/
-    unsigned int pin;   /**< Raw GPIO pin id */
-    unsigned int value; /**< Raw GPIO value */
-} maa_mux_t;
-
-/**
- * A Strucutre representing a singular I/O pin. i.e GPIO/PWM
- */
-typedef struct {
-    /*@{*/
-    unsigned int pinmap;
-    unsigned int parent_id;
-    unsigned int mux_total;
-    maa_mux_t mux[6];
-    /*@}*/
-} maa_pin_t;
-
-/**
- * A Structure representing a physical Pin.
- */
-typedef struct {
-    /*@{*/
-    char name[8];                      /**< Pin's real world name */
-    maa_pincapabilities_t capabilites; /**< Pin Capabiliites */
-    maa_pin_t gpio; /**< GPIO structure */
-    maa_pin_t pwm;  /**< PWM structure */
-    maa_pin_t aio;  /**< Anaglog Pin */
-    maa_pin_t fast_gpio; /**< Fast GPIO */
-    maa_pin_t i2c;  /**< i2c bus/pin */
-    maa_pin_t spi;  /**< spi bus/pin */
-    /*@}*/
-} maa_pininfo_t;
-
-/**
- * A Structure representing the physical properties of a i2c bus.
- */
-typedef struct {
-    /*@{*/
-    unsigned int bus_id; /**< ID as exposed in the system */
-    unsigned int scl; /**< i2c SCL */
-    unsigned int sda; /**< i2c SDA */
-    /*@}*/
-} maa_i2c_bus_t;
-
-/**
- * A Structure representing the physical properties of a spi bus.
- */
-typedef struct {
-    /*@{*/
-    double bus_id; /**< The Bus ID as exposed to the system. */
-    maa_boolean_t three_wire; /**< Is the bus only a three wire system */
-    unsigned int sclk; /**< Serial Clock */
-    unsigned int mosi; /**< Master Out, Slave In. */
-    unsigned int miso; /**< Master In, Slave Out. */
-    unsigned int cs; /**< Chip Select, used when the board is a spi slave */
-    /*@}*/
-} maa_spi_bus_t;
-
-/**
- * A Structure representing a platform/board.
- */
-typedef struct {
-    /*@{*/
-    unsigned int phy_pin_count; /**< The Total IO pins on board */
-    unsigned int gpio_count; /**< GPIO Count */
-    unsigned int aio_count;  /**< Analog side Count */
-    unsigned int i2c_bus_count; /**< Usable i2c Count */
-    maa_i2c_bus_t  i2c_bus[6]; /**< Array of i2c */
-    unsigned int def_i2c_bus; /**< Position in array of default i2c bus */
-    unsigned int spi_bus_count; /**< Usable spi Count */
-    maa_spi_bus_t spi_bus[6];       /**< Array of spi */
-    unsigned int def_spi_bus; /**< Position in array of defult spi bus */
-    maa_pininfo_t* pins;     /**< Pointer to pin array */
-    /*@}*/
-} maa_board_t;
-
-/** Initialise MAA
- *
- * Detects running platform and attempts to use included pinmap
- * @return maa_result_t maa result
- */
-maa_result_t maa_init();
-
-/** Check GPIO
- *
- * Will check input is valid for gpio and will also setup required multiplexers.
- * @param pin the pin as read from the board surface. i.e IO3 would be 3/
- * @return the pin as found in the pinmap
- */
-unsigned int maa_check_gpio(int pin);
-
-/** Check AIO
- *
- * Will check input is valid for aio and will also setup required multiplexers.
- * @param pin the pin as read from the board surface. i.e A3 would be 3/
- * @return the pin as found in the pinmap
- */
-unsigned int maa_check_aio(int pin);
-
-/** Check i2c interface, sets up multiplexer on device.
- *
- * @return unsigned int if using /dev/i2c-2 returned would be 2
- */
-unsigned int maa_check_i2c();
-
-/** Check PWM
- *
- * Will check input is valid for pwm and will also setup required multiplexers.
- * IF the pin also does gpio (strong chance), DO NOTHING, REV D is strange.
- * @param pin the pin as read from the board surface.
- * @return the pwm pin_info_t of that IO pin
- */
-maa_pin_t* maa_check_pwm(int pin);
-
-/** Get the version string of maa autogenerated from git tag
- *
- * The version returned may not be what is expected however it is a reliable
- * number associated with the git tag closest to that version at build time
- * @return version string from version.h
- */
-const char* maa_get_version();
-
-/** Print a textual representation of the maa_result_t
- *
- * @param result the result to print,
- */
-void maa_result_print(maa_result_t result);
-
-/** Checks if a pin is able to use the passed in mode.
- *
- * @param pin Physical Pin to be checked.
- * @param mode the mode to be tested.
- * @return boolean if the mode is supported, 0=false.
- */
-maa_boolean_t maa_pin_mode_test(int pin, maa_pinmodes_t mode);
-
-#ifdef __cplusplus
-}
-#endif

api/mraa.h

@@ -0,0 +1,40 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright © 2014 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mraa/pwm.h"
+#include "mraa/aio.h"
+#include "mraa/gpio.h"
+#include "mraa/spi.h"
+#include "mraa/i2c.h"
+#include "mraa/uart.h"
+#include "mraa/uart_ow.h"
+
+#ifdef __cplusplus
+}
+#endif

api/mraa.hpp

@@ -22,9 +22,12 @@
  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
-var m = require("./maajs")
-console.log("maa version: " + m.get_version());
+#pragma once
 
-var x = new m.Gpio(8)
-x.dir(m.MAA_GPIO_OUT)
-x.write(1)
+#include "mraa/common.hpp"
+#include "mraa/pwm.hpp"
+#include "mraa/aio.hpp"
+#include "mraa/gpio.hpp"
+#include "mraa/i2c.hpp"
+#include "mraa/spi.hpp"
+#include "mraa/uart.hpp"

api/mraa/aio.h

@@ -0,0 +1,107 @@
+/*
+ * Author: Nandkishor Sonar
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+/**
+ * @file
+ * @brief Analog input/output
+ *
+ * AIO is the anlog input & output interface to libmraa. It is used to read or
+ * set the voltage applied to an AIO pin.
+ *
+ * @snippet analogin_a0.c Interesting
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdio.h>
+#include <unistd.h>
+#include <stdint.h>
+
+#include "common.h"
+#include "gpio.h"
+
+/**
+ * Opaque pointer definition to the internal struct _aio. This context refers
+ * to one single AIO pin on the board.
+ */
+typedef struct _aio* mraa_aio_context;
+
+/**
+ * Initialise an Analog input device, connected to the specified pin
+ *
+ * @param pin Channel number to read ADC inputs
+ * @returns aio context or NULL
+ */
+mraa_aio_context mraa_aio_init(unsigned int pin);
+
+/**
+ * Read the input voltage. By default mraa will shift the raw value up or down
+ * to a 10 bit value.
+ *
+ * @param dev The AIO context
+ * @returns The current input voltage or -1 for error
+ */
+int mraa_aio_read(mraa_aio_context dev);
+
+/**
+ * Read the input voltage and return it as a normalized float (0.0f-1.0f).
+ *
+ * @param dev The AIO context
+ * @returns The current input voltage as a normalized float (0.0f-1.0f), error
+ * will be signaled by -1.0f
+ */
+float mraa_aio_read_float(mraa_aio_context dev);
+
+/**
+ * Close the analog input context, this will free the memory for the context
+ *
+ * @param dev The AIO context
+ * @return Result of operation
+ */
+mraa_result_t mraa_aio_close(mraa_aio_context dev);
+
+/**
+ * Set the bit value which mraa will shift the raw reading
+ * from the ADC to. I.e. 10bits
+ * @param dev the analog input context
+ * @param bits the bits the return from read should be i.e 10
+ *
+ * @return mraa result type
+ */
+mraa_result_t mraa_aio_set_bit(mraa_aio_context dev, int bits);
+
+/**
+ * Gets the bit value mraa is shifting the analog read to.
+ * @param dev the analog input context
+ *
+ * @return bit value mraa is set return from the read function
+ */
+int mraa_aio_get_bit(mraa_aio_context dev);
+
+#ifdef __cplusplus
+}
+#endif

api/mraa/aio.hpp

@@ -0,0 +1,133 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <stdexcept>
+#include "aio.h"
+#include "types.hpp"
+
+namespace mraa
+{
+
+/**
+ * @brief API to Analog IO
+ *
+ * This file defines the aio interface for libmraa
+ *
+ * @snippet AioA0.cpp Interesting
+ */
+class Aio
+{
+  public:
+    /**
+     * Aio Constructor, takes a pin number which will map directly to the
+     * board number
+     *
+     * @param pin channel number to read ADC inputs
+     */
+    Aio(int pin)
+    {
+        m_aio = mraa_aio_init(pin);
+        if (m_aio == NULL) {
+            throw std::invalid_argument("Invalid AIO pin specified - do you have an ADC?");
+        }
+    }
+    /**
+     * Aio Constructor, takes a pointer to the AIO context and initialises
+     * the AIO class
+     *
+     * @param void * to an AIO context
+     */
+    Aio(void* aio_context)
+    {
+        m_aio = (mraa_aio_context) aio_context;
+        if (m_aio == NULL) {
+            throw std::invalid_argument("Invalid AIO context");
+        }
+    }
+    /**
+     * Aio destructor
+     */
+    ~Aio()
+    {
+        mraa_aio_close(m_aio);
+    }
+    /**
+     * Read a value from the AIO pin. By default mraa will shift
+     * the raw value up or down to a 10 bit value.
+     *
+     * @throws std::invalid_argument in case of error
+     * @returns The current input voltage. By default, a 10bit value
+     */
+    unsigned int
+    read()
+    {
+        int x = mraa_aio_read(m_aio);
+	if (x == -1) {
+            throw std::invalid_argument("Unknown error in Aio::read()");
+        }
+        return (unsigned int) x;
+    }
+    /**
+     * Read a value from the AIO pin and return it as a normalized float.
+     *
+     * @throws std::invalid_argument in case of error
+     * @returns The current input voltage as a normalized float (0.0f-1.0f)
+     */
+    float
+    readFloat()
+    {
+        float x = mraa_aio_read_float(m_aio);
+	if (x == -1.0f) {
+            throw std::invalid_argument("Unknown error in Aio::readFloat()");
+        }
+        return x;
+    }
+    /**
+     * Set the bit value which mraa will shift the raw reading
+     * from the ADC to. I.e. 10bits
+     * @param bits the bits the return from read should be i.e 10
+     * @return mraa::Result type
+     */
+    Result
+    setBit(int bits)
+    {
+        return (Result) mraa_aio_set_bit(m_aio, bits);
+    }
+    /**
+     * Gets the bit value mraa is shifting the analog read to.
+     *
+     * @return bit value mraa is set return from the read function
+     */
+    int
+    getBit()
+    {
+        return mraa_aio_get_bit(m_aio);
+    }
+
+  private:
+    mraa_aio_context m_aio;
+};
+}

api/mraa/common.h

@@ -0,0 +1,322 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright © 2014 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include "types.h"
+
+#define MRAA_PLATFORM_NAME_MAX_SIZE 64
+#define MRAA_PIN_NAME_SIZE 12
+
+#define MRAA_SUB_PLATFORM_BIT_SHIFT 9
+#define MRAA_SUB_PLATFORM_MASK (1<<MRAA_SUB_PLATFORM_BIT_SHIFT)
+
+#define MRAA_MAIN_PLATFORM_OFFSET 0
+#define MRAA_SUB_PLATFORM_OFFSET 1
+
+/** Executes function func and returns its result in case of error
+ */
+#define MRAA_RETURN_FOR_ERROR(func) do { \
+                                      mraa_result_t res; \
+                                      res = func; \
+                                      if (res != MRAA_SUCCESS) \
+                                      return res;} while(0)
+
+
+/** @file
+ *
+ * This file defines the basic shared values for libmraa
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * MRAA boolean type
+ * 1 For TRUE
+ */
+typedef unsigned int mraa_boolean_t;
+
+/**
+ * Initialise MRAA
+ *
+ * Detects running platform and attempts to use included pinmap, this is run on
+ * module/library init/load but is handy to rerun to check board initialised
+ * correctly. MRAA_SUCCESS inidicates correct initialisation.
+ *
+ * @return Result of operation
+ */
+#if (defined SWIGPYTHON) || (defined SWIG)
+mraa_result_t mraa_init();
+#else
+// this sets a compiler attribute (supported by GCC & clang) to have mraa_init()
+// be called as a constructor make sure your libc supports this!  uclibc needs
+// to be compiled with UCLIBC_CTOR_DTOR
+mraa_result_t mraa_init() __attribute__((constructor));
+#endif
+
+/**
+ * De-Initilise MRAA
+ *
+ * This is not a strict requirement but useful to test memory leaks and for
+ * people who like super clean code. If dynamically loading & unloading
+ * libmraa you need to call this before unloading the library.
+ */
+void mraa_deinit();
+
+/**
+ * Checks if a pin is able to use the passed in mode.
+ *
+ * @param pin Physical Pin to be checked.
+ * @param mode the mode to be tested.
+ * @return boolean if the mode is supported, 0=false.
+ */
+mraa_boolean_t mraa_pin_mode_test(int pin, mraa_pinmodes_t mode);
+
+/**
+ * Check the board's  bit size when reading the value
+ *
+ * @return raw bits being read from kernel module. zero if no ADC
+ */
+unsigned int mraa_adc_raw_bits();
+
+/**
+ * Check the specified board's bit size when reading the value
+ *
+ * @param specified platform offset; 0 for main platform, 1 foor sub platform
+ * @return raw bits being read from kernel module. zero if no ADC
+ */
+unsigned int mraa_get_platform_adc_raw_bits(uint8_t platform_offset);
+
+/**
+ * Return value that the raw value should be shifted to. Zero if no ADC
+ *
+ * @return return actual bit size the adc value should be understood as.
+ */
+unsigned int mraa_adc_supported_bits();
+
+/**
+ * Return value that the raw value should be shifted to. Zero if no ADC
+ *
+ * @param specified platform offset; 0 for main platform, 1 foor sub platform
+ * @return return actual bit size the adc value should be understood as.
+ */
+unsigned int mraa_get_platform_adc_supported_bits(int platform_offset);
+
+/**
+ * Sets the log level to use from 0-7 where 7 is very verbose. These are the
+ * syslog log levels, see syslog(3) for more information on the levels.
+ *
+ * @return Result of operation
+ */
+mraa_result_t mraa_set_log_level(int level);
+
+/**
+ * Return the Platform's Name, If no platform detected return NULL
+ *
+ * @return platform name
+ */
+const char* mraa_get_platform_name();
+
+/**
+ * Return the platform's versioning info, the information given depends per
+ * platform and can be NULL. platform_offset has to be given. Do not modify
+ * this pointer
+ *
+ * @param specified platform offset; 0 for main platform, 1 for sub platform
+ * @return platform's versioning string
+ */
+const char* mraa_get_platform_version(int platform_offset);
+
+/**
+ * This function attempts to set the mraa process to a given priority and the
+ * scheduler to SCHED_RR. Highest * priority is typically 99 and minimum is 0.
+ * This function * will set to MAX if * priority is > MAX. Function will return
+ * -1 on failure.
+ *
+ * @param priority Value from typically 0 to 99
+ * @return The priority value set
+ */
+int mraa_set_priority(const int priority);
+
+/** Get the version string of mraa autogenerated from git tag
+ *
+ * The version returned may not be what is expected however it is a reliable
+ * number associated with the git tag closest to that version at build time
+ *
+ * @return version string from version.h
+ */
+const char* mraa_get_version();
+
+/**
+ * Print a textual representation of the mraa_result_t
+ *
+ * @param result the result to print
+ */
+void mraa_result_print(mraa_result_t result);
+
+/**
+ * Get platform type, board must be initialised.
+ *
+ * @return mraa_platform_t Platform type enum
+ */
+mraa_platform_t mraa_get_platform_type();
+
+/**
+ * Get combined platform type, board must be initialised.
+ * The combined type is represented as
+ * (sub_platform_type << 8) | main_platform_type
+ *
+ * @return int combined platform type
+ */
+int mraa_get_platform_combined_type();
+
+/**
+ * Get platform pincount, board must be initialised.
+ *
+ * @return uint of physical pin count on the in-use platform
+ */
+unsigned int mraa_get_pin_count();
+
+/**
+ * Get platform usable I2C bus count, board must be initialised.
+ *
+ * @return number f usable I2C bus count on the current platform. Function will
+ * return -1 on failure
+ */
+int mraa_get_i2c_bus_count();
+
+/**
+ * Get I2C adapter number in sysfs.
+ *
+ * @param i2c_bus the logical I2C bus number
+ * @return I2C adapter number in sysfs. Function will return -1 on failure
+ */
+int mraa_get_i2c_bus_id(int i2c_bus);
+
+/**
+ * Get specified platform pincount, board must be initialised.
+ *
+ * @param specified platform offset; 0 for main platform, 1 foor sub platform
+ * @return uint of physical pin count on the in-use platform
+ */
+unsigned int mraa_get_platform_pin_count(uint8_t platform_offset);
+
+/**
+* Get name of pin, board must be initialised.
+*
+* @param pin number
+* @return char* of pin name
+*/
+char* mraa_get_pin_name(int pin);
+
+/**
+ * Get default i2c bus, board must be initialised.
+ *
+ * @return int default i2c bus index
+ */
+int mraa_get_default_i2c_bus(uint8_t platform_offset);
+
+/**
+ * Detect presence of sub platform.
+ *
+ * @return mraa_boolean_t 1 if sub platform is present and initialized, 0 otherwise
+ */
+mraa_boolean_t mraa_has_sub_platform();
+
+
+/**
+ * Check if pin or bus id includes sub platform mask.
+ *
+ * @param int pin or bus number
+ *
+ * @return mraa_boolean_t 1 if pin or bus is for sub platform, 0 otherwise
+ */
+mraa_boolean_t mraa_is_sub_platform_id(int pin_or_bus_id);
+
+/**
+ * Convert pin or bus index to corresponding sub platform id.
+ *
+ * @param int pin or bus index
+ *
+ * @return int sub platform pin or bus number
+ */
+int mraa_get_sub_platform_id(int pin_or_bus_index);
+
+/**
+ * Convert pin or bus sub platform id to index.
+ *
+ * @param int sub platform pin or bus id
+ *
+ * @return int pin or bus index
+ */
+int mraa_get_sub_platform_index(int pin_or_bus_id);
+
+/**
+ * Add mraa subplatform
+ *
+ * @param subplatform type
+ * @param uart device subplatform is on
+ *
+ * @return mraa_result_t indicating success
+ */
+mraa_result_t mraa_add_subplatform(mraa_platform_t subplatformtype, const char* uart_dev);
+
+/**
+ * Remove a mraa subplatform
+ *
+ * @param subplatform type
+ *
+ * @return mraa_result indicating success
+ */
+mraa_result_t mraa_remove_subplatform(mraa_platform_t subplatformtype);
+
+/**
+ * Create IO using a description in the format:
+ * [io]-[pin]
+ * [io]-[raw]-[pin]
+ * [io]-[raw]-[id]-[pin]
+ * [io]-[raw]-[path]
+ *
+ * @param IO description
+ *
+ * @return void* to IO context or NULL
+ */
+void* mraa_init_io(const char* desc);
+
+/**
+ * Instantiate an unknown board using a json file
+ *
+ * @param Path to the json file, relative to the folder the program
+ * was initially run in or a direct path
+ *
+ * @return mraa_result indicating success
+ */
+mraa_result_t mraa_init_json_platform(const char* path);
+
+#ifdef __cplusplus
+}
+#endif

api/mraa/common.hpp

@@ -0,0 +1,344 @@
+/*
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include "common.h"
+#include "types.hpp"
+#include <string>
+
+/**
+ * @namespace mraa namespace
+ */
+namespace mraa
+{
+
+/**
+ * @file
+ * @brief API to common functions of MRAA
+ *
+ * This file defines the interface for libmraa common functions
+ */
+
+/**
+ * Initialise MRAA
+ *
+ * Detects running platform and attempts to use included pinmap, this is run on
+ * module/library init/load but is handy to rerun to check board initialised
+ * correctly. mraa::SUCCESS inidicates correct initialisation.
+ *
+ * @return Result of operation
+ */
+inline Result
+init()
+{
+    return (Result) mraa_init();
+}
+
+/**
+ * Get libmraa version.
+ *
+ * @return libmraa version (e.g. v0.4.0-20-gb408207)
+ */
+inline std::string
+getVersion()
+{
+    std::string ret = mraa_get_version();
+    return ret;
+}
+
+/**
+ * This function attempts to set the mraa process to a given priority and the
+ * scheduler to SCHED_RR. Highest * priority is typically 99 and minimum is 0.
+ * This function * will set to MAX if * priority is > MAX. Function will return
+ * -1 on failure.
+ *
+ * @param priority Value from typically 0 to 99
+ * @return The priority value set
+ */
+inline int
+setPriority(const int priority)
+{
+    return mraa_set_priority(priority);
+}
+
+/**
+ * Get platform type, board must be initialised.
+ *
+ * @return mraa::platform Platform type enum
+ */
+inline Platform
+getPlatformType()
+{
+    return (Platform) mraa_get_platform_type();
+}
+
+/**
+ * Print a textual representation of the mraa::Result
+ *
+ * @param Result the Result to print
+ */
+inline void
+printError(Result result)
+{
+    mraa_result_print((mraa_result_t) result);
+}
+
+/**
+ * Checks if a pin is able to use the passed in mode.
+ *
+ * @param pin Physical Pin to be checked.
+ * @param mode the mode to be tested.
+ * @return boolean if the mode is supported, 0=false.
+ */
+inline bool
+pinModeTest(int pin, Pinmodes mode)
+{
+    return (bool) mraa_pin_mode_test(pin, (mraa_pinmodes_t) mode);
+}
+
+/**
+ * Check the board's bit size when reading the value
+ *
+ * @return raw bits being read from kernel module. Zero if no ADC
+ */
+inline unsigned int
+adcRawBits()
+{
+    return mraa_adc_raw_bits();
+}
+
+/**
+ * Return value that the raw value should be shifted to. Zero if no ADC
+ *
+ * @return return actual bit size the adc value should be understood as.
+ */
+inline unsigned int
+adcSupportedBits()
+{
+    return mraa_adc_supported_bits();
+}
+
+/**
+ * Return Platform Name. Returns NULL if no platform inited.
+ *
+ * @return platform name
+ */
+inline std::string
+getPlatformName()
+{
+    std::string ret_val(mraa_get_platform_name());
+    return ret_val;
+}
+
+/**
+ * Return platform versioning info. Returns NULL if no info present.
+ *
+ * @param optional subplatform identifier
+ * @return platform versioning info
+ */
+inline std::string
+getPlatformVersion(int platform_offset=MRAA_MAIN_PLATFORM_OFFSET)
+{
+    std::string ret_val(mraa_get_platform_version(platform_offset));
+    return ret_val;
+}
+
+/**
+ * Return count of physical pins on the running platform
+ *
+ * @return uint of physical pins.
+ */
+inline unsigned int
+getPinCount()
+{
+    return mraa_get_pin_count();
+}
+
+/**
+ * Get platform usable I2C bus count, board must be initialised.
+ *
+ * @return number f usable I2C bus count on the current platform. Function will
+ * return -1 on failure
+ */
+inline int
+getI2cBusCount()
+{
+    return mraa_get_i2c_bus_count();
+}
+
+/**
+ * Get I2C adapter number in sysfs.
+ *
+ * @param i2c_bus the logical I2C bus number
+ * @return I2C adapter number in sysfs. Function will return -1 on failure
+ */
+inline int
+getI2cBusId(int i2c_bus)
+{
+    return mraa_get_i2c_bus_id(i2c_bus);
+}
+
+/**
+* Get name of pin, board must be initialised.
+*
+* @param pin number
+*
+* @return char* of pin name
+*/
+inline std::string
+getPinName(int pin)
+{
+    std::string ret_val(mraa_get_pin_name(pin));
+    return ret_val;
+}
+
+/**
+ * Sets the log level to use from 0-7 where 7 is very verbose. These are the
+ * syslog log levels, see syslog(3) for more information on the levels.
+ *
+ * @param level
+ * @return Result of operation
+ */
+inline Result
+setLogLevel(int level)
+{
+    return (Result) mraa_set_log_level(level);
+}
+
+/**
+ * Detect presence of sub platform.
+ *
+ * @return bool true if sub platform is present and initialized, false otherwise
+ */
+inline bool
+hasSubPlatform()
+{
+    return static_cast<bool>(mraa_has_sub_platform());
+}
+
+/**
+ * Check if pin or bus id includes sub platform mask.
+ *
+ * @param int pin or bus number
+ *
+ * @return mraa_boolean_t 1 if pin or bus is for sub platform, 0 otherwise
+ */
+inline bool
+isSubPlatformId(int pin_or_bus_id)
+{
+    return static_cast<bool>(mraa_is_sub_platform_id(pin_or_bus_id));
+}
+
+/**
+ * Convert pin or bus index to corresponding sub platform id.
+ *
+ * @param int pin or bus index
+ *
+ * @return int sub platform pin or bus number
+ */
+inline int
+getSubPlatformId(int pin_or_bus_index)
+{
+    return mraa_get_sub_platform_id(pin_or_bus_index);
+}
+
+/**
+ * Convert pin or bus sub platform id to index.
+ *
+ * @param int sub platform pin or bus id
+ *
+ * @return int pin or bus index
+ */
+inline int
+getSubPlatformIndex(int pin_or_bus_id)
+{
+    return mraa_get_sub_platform_index(pin_or_bus_id);
+}
+
+/**
+ * Get default i2c bus, board must be initialised.
+ *
+ * @param optional subplatform identifier
+ * @return default i2c bus for paltform
+ */
+inline int
+getDefaultI2cBus(int platform_offset=MRAA_MAIN_PLATFORM_OFFSET)
+{
+    return mraa_get_default_i2c_bus(platform_offset);
+}
+
+/**
+ * Add mraa subplatform
+ *
+ * @param subplatformtype the type of subplatform to add
+ * (e.g. MRAA_GENERIC_FIRMATA)
+ * @param uart_dev subplatform device string (e.g. "/dev/ttyACM0")
+ * @return Result of operation
+ */
+inline Result
+addSubplatform(Platform subplatformtype, std::string uart_dev)
+{
+    return (Result) mraa_add_subplatform((mraa_platform_t) subplatformtype, uart_dev.c_str());
+}
+
+inline Result
+removeSubplatform(Platform subplatformtype)
+{
+    return (Result) mraa_remove_subplatform((mraa_platform_t) subplatformtype);
+}
+
+/**
+ * Create IO using a description in the format:
+ * [io]-[pin]
+ * [io]-[raw]-[pin]
+ * [io]-[raw]-[id]-[pin]
+ * [io]-[raw]-[path]
+ *
+ * @param IO description
+ *
+ * @return class T initialised using pointer to IO or NULL
+ */
+template <class T>
+inline T*
+initIo(std::string desc)
+{
+    return new T(mraa_init_io(desc.c_str()));
+}
+
+/**
+ * Instantiate an unknown board using a json file
+ *
+ * @param Path to the json file, relative to the folder the program
+ * was initially run in or a direct path
+ *
+ * @return Result indicating success
+ */
+inline Result
+initJsonPlatform(std::string path)
+{
+    return (Result) mraa_init_json_platform(path.c_str());
+}
+
+}

api/mraa/firmata.h

@@ -0,0 +1,101 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2016 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+/**
+ * @file
+ * @brief Firmata IO
+ *
+ * Firmata IO lets you SYSEX messages construct and ask for a callback on a
+ * SYSEX messages. This is meant to provide a way to call custom firmata APIs
+ * especially using the Custom firmata API
+ *
+ * @snippet firmata_curie_imu.c Interesting
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "common.h"
+
+/**
+ * Opaque pointer definition to the internal struct _firmata. This context
+ * refers to one firmata 'extension' letting you write/return SYSEX messages
+ * directly
+ */
+typedef struct _firmata* mraa_firmata_context;
+
+/**
+ * Initialise firmata context on a feature. This feature is what will be
+ * listened on if you request a response callback
+ *
+ * @param firmata feature
+ * @return firmata context or NULL
+ */
+mraa_firmata_context mraa_firmata_init(int feature);
+
+/**
+ * Sends a custom SYSEX message to the firmata board.
+ *
+ * @param dev The Firmata context
+ * @param msg The SYSEX message
+ * @param length The length of the sysex message
+ */
+mraa_result_t mraa_firmata_write_sysex(mraa_firmata_context dev, char* msg, int length);
+
+/**
+ * Set a callback on 'feature'. This function is not thread safe and threads
+ * calling it need to make sure they are the only thread calling this.
+ *
+ * @param dev The Firmata context
+ * @param fptr Function pointer to function to be called when interrupt is
+ * triggered, the returned buffer and length are the arguments.
+ * @return Result of operation
+ */
+mraa_result_t mraa_firmata_response(mraa_firmata_context dev, void (*fptr)(uint8_t*, int));
+
+/**
+ * Stop getting events on feature. This is more efficient than mraa_firmata_close
+ * as it can be re-enabled without adding a feature
+ *
+ * @param dev The Firmata context
+ * @return Result of operation
+ */
+mraa_result_t mraa_firmata_response_stop(mraa_firmata_context dev);
+
+/**
+ * Free all firmata handle resources, this will leave an element in an array
+ * internally that will be skipped, avoid closing many firmata contexts often
+ * as there is a cost to doing this
+ *
+ * @param dev The Firmata context
+ * @return Result of operation
+ */
+mraa_result_t mraa_firmata_close(mraa_firmata_context dev);
+
+#ifdef __cplusplus
+}
+#endif

api/mraa/gpio.h

@@ -0,0 +1,225 @@
+/*
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+/**
+ * @file
+ * @brief General Purpose IO
+ *
+ * Gpio is the General Purpose IO interface to libmraa. Its features depend on
+ * the board type used, it can use gpiolibs (exported via a kernel module
+ * through sysfs), or memory mapped IO via a /dev/uio device or /dev/mem
+ * depending again on the board configuration.
+ *
+ * @snippet gpio_read6.c Interesting
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdio.h>
+#include <pthread.h>
+#include "common.h"
+
+#if defined(SWIGJAVA) || defined(JAVACALLBACK)
+#include <jni.h>
+extern "C" {
+    void mraa_java_isr_callback(void *args);
+}
+#endif
+
+/**
+ * Opaque pointer definition to the internal struct _gpio
+ */
+typedef struct _gpio* mraa_gpio_context;
+
+/**
+ * Gpio Output modes
+ */
+typedef enum {
+    MRAA_GPIO_STRONG = 0,   /**< Default. Strong high and low */
+    MRAA_GPIO_PULLUP = 1,   /**< Resistive High */
+    MRAA_GPIO_PULLDOWN = 2, /**< Resistive Low */
+    MRAA_GPIO_HIZ = 3       /**< High Z State */
+} mraa_gpio_mode_t;
+
+/**
+ * Gpio Direction options
+ */
+typedef enum {
+    MRAA_GPIO_OUT = 0,      /**< Output. A Mode can also be set */
+    MRAA_GPIO_IN = 1,       /**< Input */
+    MRAA_GPIO_OUT_HIGH = 2, /**< Output. Init High */
+    MRAA_GPIO_OUT_LOW = 3   /**< Output. Init Low */
+} mraa_gpio_dir_t;
+
+/**
+ * Gpio Edge types for interrupts
+ */
+typedef enum {
+    MRAA_GPIO_EDGE_NONE = 0,   /**< No interrupt on Gpio */
+    MRAA_GPIO_EDGE_BOTH = 1,   /**< Interrupt on rising & falling */
+    MRAA_GPIO_EDGE_RISING = 2, /**< Interrupt on rising only */
+    MRAA_GPIO_EDGE_FALLING = 3 /**< Interrupt on falling only */
+} mraa_gpio_edge_t;
+
+/**
+ * Initialise gpio_context, based on board number
+ *
+ *  @param pin Pin number read from the board, i.e IO3 is 3
+ *  @returns gpio context or NULL
+ */
+mraa_gpio_context mraa_gpio_init(int pin);
+
+/**
+ * Initialise gpio context without any mapping to a pin
+ *
+ * @param gpiopin gpio pin as listed in SYSFS
+ * @return gpio context or NULL
+ */
+mraa_gpio_context mraa_gpio_init_raw(int gpiopin);
+
+/**
+ * Set the edge mode on the gpio
+ *
+ * @param dev The Gpio context
+ * @param mode The edge mode to set the gpio into
+ * @return Result of operation
+ */
+mraa_result_t mraa_gpio_edge_mode(mraa_gpio_context dev, mraa_gpio_edge_t mode);
+
+/**
+ * Set an interrupt on pin
+ *
+ * @param dev The Gpio context
+ * @param edge The edge mode to set the gpio into
+ * @param fptr Function pointer to function to be called when interrupt is
+ * triggered
+ * @param args Arguments passed to the interrupt handler (fptr)
+ * @return Result of operation
+ */
+mraa_result_t mraa_gpio_isr(mraa_gpio_context dev, mraa_gpio_edge_t edge, void (*fptr)(void*), void* args);
+
+/**
+ * Stop the current interrupt watcher on this Gpio, and set the Gpio edge mode
+ * to MRAA_GPIO_EDGE_NONE
+ *
+ * @param dev The Gpio context
+ * @return Result of operation
+ */
+mraa_result_t mraa_gpio_isr_exit(mraa_gpio_context dev);
+
+/**
+ * Set Gpio Output Mode,
+ *
+ * @param dev The Gpio context
+ * @param mode The Gpio Output Mode
+ * @return Result of operation
+ */
+mraa_result_t mraa_gpio_mode(mraa_gpio_context dev, mraa_gpio_mode_t mode);
+
+/**
+ * Set Gpio direction
+ *
+ * @param dev The Gpio context
+ * @param dir The direction of the Gpio
+ * @return Result of operation
+ */
+mraa_result_t mraa_gpio_dir(mraa_gpio_context dev, mraa_gpio_dir_t dir);
+
+/**
+ * Read Gpio direction
+ *
+ * @param dev The Gpio context
+ * @param dir The address where to store the Gpio direction
+ * @return Result of operation
+ */
+mraa_result_t mraa_gpio_read_dir(mraa_gpio_context dev, mraa_gpio_dir_t *dir);
+
+/**
+ * Close the Gpio context
+ * - Will free the memory for the context and unexport the Gpio
+ *
+ * @param dev The Gpio context
+ * @return Result of operation
+ */
+mraa_result_t mraa_gpio_close(mraa_gpio_context dev);
+
+/**
+ * Read the Gpio value. This can be 0 or 1. A resonse of -1 means that there
+ * was a fatal error.
+ *
+ * @param dev The Gpio context
+ * @return Result of operation
+ */
+int mraa_gpio_read(mraa_gpio_context dev);
+
+/**
+ * Write to the Gpio Value.
+ *
+ * @param dev The Gpio context
+ * @param value Integer value to write
+ * @return Result of operation
+ */
+mraa_result_t mraa_gpio_write(mraa_gpio_context dev, int value);
+
+/**
+ * Change ownership of the context.
+ *
+ * @param dev The Gpio context
+ * @param owner Does this context own the pin
+ * @return Result of operation
+ */
+mraa_result_t mraa_gpio_owner(mraa_gpio_context dev, mraa_boolean_t owner);
+
+/**
+ * Enable using memory mapped io instead of sysfs
+ *
+ * @param dev The Gpio context
+ * @param mmap Use mmap instead of sysfs
+ * @return Result of operation
+ */
+mraa_result_t mraa_gpio_use_mmaped(mraa_gpio_context dev, mraa_boolean_t mmap);
+
+/**
+ * Get a pin number of the gpio, invalid will return -1
+ *
+ * @param dev The Gpio context
+ * @return Pin number
+ */
+int mraa_gpio_get_pin(mraa_gpio_context dev);
+
+/**
+ * Get a gpio number as used within sysfs, invalid will return -1
+ *
+ * @param dev The Gpio context
+ * @return gpio number
+ */
+int mraa_gpio_get_pin_raw(mraa_gpio_context dev);
+
+#ifdef __cplusplus
+}
+#endif

api/mraa/gpio.hpp

@@ -0,0 +1,325 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include "gpio.h"
+#include "types.hpp"
+#include <stdexcept>
+
+#if defined(SWIGJAVASCRIPT)
+#if NODE_MODULE_VERSION >= 0x000D
+#include <uv.h>
+#endif
+#endif
+
+namespace mraa
+{
+
+// These enums must match the enums in gpio.h
+
+/**
+ * Gpio Output modes
+ */
+typedef enum {
+    MODE_STRONG = 0,   /**< Default. Strong High and Low */
+    MODE_PULLUP = 1,   /**< Resistive High */
+    MODE_PULLDOWN = 2, /**< Resistive Low */
+    MODE_HIZ = 3       /**< High Z State */
+} Mode;
+
+/**
+ * Gpio Direction options
+ */
+typedef enum {
+    DIR_OUT = 0,      /**< Output. A Mode can also be set */
+    DIR_IN = 1,       /**< Input */
+    DIR_OUT_HIGH = 2, /**< Output. Init High */
+    DIR_OUT_LOW = 3   /**< Output. Init Low */
+} Dir;
+
+/**
+ * Gpio Edge types for interrupts
+ */
+typedef enum {
+    EDGE_NONE = 0,   /**< No interrupt on Gpio */
+    EDGE_BOTH = 1,   /**< Interrupt on rising & falling */
+    EDGE_RISING = 2, /**< Interrupt on rising only */
+    EDGE_FALLING = 3 /**< Interrupt on falling only */
+} Edge;
+
+/**
+ * @brief API to General Purpose IO
+ *
+ * This file defines the gpio interface for libmraa
+ *
+ * @snippet Blink-IO.cpp Interesting
+ */
+class Gpio
+{
+  public:
+    /**
+     * Instantiates a Gpio object
+     *
+     * @param pin pin number to use
+     * @param owner (optional) Set pin owner, default behaviour is to 'own'
+     * the pin if we exported it. This means we will close it on destruct.
+     * Otherwise it will get left open. This is only valid in sysfs use
+     * cases
+     * @param raw (optional) Raw pins will use gpiolibs pin numbering from
+     * the kernel module. Note that you will not get any muxers set up for
+     * you so this may not always work as expected.
+     */
+    Gpio(int pin, bool owner = true, bool raw = false)
+    {
+        if (raw) {
+            m_gpio = mraa_gpio_init_raw(pin);
+        } else {
+            m_gpio = mraa_gpio_init(pin);
+        }
+
+        if (m_gpio == NULL) {
+            throw std::invalid_argument("Invalid GPIO pin specified");
+        }
+
+        if (!owner) {
+            mraa_gpio_owner(m_gpio, 0);
+        }
+    }
+    /**
+     * Gpio Constructor, takes a pointer to the GPIO context and initialises
+     * the GPIO class
+     *
+     * @param void * to GPIO context
+     */
+    Gpio(void* gpio_context)
+    {
+        m_gpio = (mraa_gpio_context) gpio_context;
+        if (m_gpio == NULL) {
+            throw std::invalid_argument("Invalid GPIO context");
+        }
+    }
+    /**
+     * Gpio object destructor, this will only unexport the gpio if we where
+     * the owner
+     */
+    ~Gpio()
+    {
+        mraa_gpio_close(m_gpio);
+    }
+    /**
+     * Set the edge mode for ISR
+     *
+     * @param mode The edge mode to set
+     * @return Result of operation
+     */
+    Result
+    edge(Edge mode)
+    {
+        return (Result) mraa_gpio_edge_mode(m_gpio, (mraa_gpio_edge_t) mode);
+    }
+#if defined(SWIGPYTHON)
+    Result
+    isr(Edge mode, PyObject* pyfunc, PyObject* args)
+    {
+        return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, (void (*) (void*)) pyfunc, (void*) args);
+    }
+#elif defined(SWIGJAVASCRIPT)
+    static void
+    v8isr(uv_work_t* req, int status)
+    {
+#if NODE_MODULE_VERSION >= 0x000D
+        v8::HandleScope scope(v8::Isolate::GetCurrent());
+#endif
+        mraa::Gpio* This = (mraa::Gpio*) req->data;
+        int argc = 1;
+        v8::Local<v8::Value> argv[] = { SWIGV8_INTEGER_NEW(-1) };
+#if NODE_MODULE_VERSION >= 0x000D
+        v8::Local<v8::Function> f = v8::Local<v8::Function>::New(v8::Isolate::GetCurrent(), This->m_v8isr);
+        f->Call(SWIGV8_CURRENT_CONTEXT()->Global(), argc, argv);
+#else
+        This->m_v8isr->Call(SWIGV8_CURRENT_CONTEXT()->Global(), argc, argv);
+#endif
+        delete req;
+    }
+
+    static void
+    nop(uv_work_t* req)
+    {
+        // Do nothing.
+    }
+
+    static void
+    uvwork(void* ctx)
+    {
+        uv_work_t* req = new uv_work_t;
+        req->data = ctx;
+        uv_queue_work(uv_default_loop(), req, nop, v8isr);
+    }
+
+    Result
+    isr(Edge mode, v8::Handle<v8::Function> func)
+    {
+#if NODE_MODULE_VERSION >= 0x000D
+        m_v8isr.Reset(v8::Isolate::GetCurrent(), func);
+#else
+        m_v8isr = v8::Persistent<v8::Function>::New(func);
+#endif
+        return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, &uvwork, this);
+    }
+#elif defined(SWIGJAVA) || defined(JAVACALLBACK)
+    Result
+    isr(Edge mode, jobject runnable)
+    {
+        return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, mraa_java_isr_callback, runnable);
+    }
+#endif
+    /**
+     * Sets a callback to be called when pin value changes
+     *
+     * @param mode The edge mode to set
+     * @param fptr Function pointer to function to be called when interrupt is
+     * triggered
+     * @param args Arguments passed to the interrupt handler (fptr)
+     * @return Result of operation
+     */
+    Result
+    isr(Edge mode, void (*fptr)(void*), void* args)
+    {
+        return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, fptr, args);
+    }
+
+    /**
+     * Exits callback - this call will not kill the isr thread immediately
+     * but only when it is out of it's critical section
+     *
+     * @return Result of operation
+     */
+    Result
+    isrExit()
+    {
+#if defined(SWIGJAVASCRIPT)
+#if NODE_MODULE_VERSION >= 0x000D
+        m_v8isr.Reset();
+#else
+        m_v8isr.Dispose();
+        m_v8isr.Clear();
+#endif
+#endif
+        return (Result) mraa_gpio_isr_exit(m_gpio);
+    }
+    /**
+     * Change Gpio mode
+     *
+     * @param mode The mode to change the gpio into
+     * @return Result of operation
+     */
+    Result
+    mode(Mode mode)
+    {
+        return (Result )mraa_gpio_mode(m_gpio, (mraa_gpio_mode_t) mode);
+    }
+    /**
+     * Change Gpio direction
+     *
+     * @param dir The direction to change the gpio into
+     * @return Result of operation
+     */
+    Result
+    dir(Dir dir)
+    {
+        return (Result )mraa_gpio_dir(m_gpio, (mraa_gpio_dir_t) dir);
+    }
+
+    /**
+     * Read Gpio direction
+     *
+     * @throw std::runtime_error in case of failure
+     * @return Result of operation
+     */
+    Dir
+    readDir()
+    {
+        mraa_gpio_dir_t dir;
+        if (mraa_gpio_read_dir(m_gpio, &dir) != MRAA_SUCCESS) {
+            throw std::runtime_error("Failed to read direction");
+        }
+        return (Dir) dir;
+    }
+
+    /**
+     * Read value from Gpio
+     *
+     * @return Gpio value
+     */
+    int
+    read()
+    {
+        return mraa_gpio_read(m_gpio);
+    }
+    /**
+     * Write value to Gpio
+     *
+     * @param value Value to write to Gpio
+     * @return Result of operation
+     */
+    Result
+    write(int value)
+    {
+        return (Result) mraa_gpio_write(m_gpio, value);
+    }
+    /**
+     * Enable use of mmap i/o if available.
+     *
+     * @param enable true to use mmap
+     * @return Result of operation
+     */
+    Result
+    useMmap(bool enable)
+    {
+        return (Result) mraa_gpio_use_mmaped(m_gpio, (mraa_boolean_t) enable);
+    }
+    /**
+     * Get pin number of Gpio. If raw param is True will return the
+     * number as used within sysfs. Invalid will return -1.
+     *
+     * @param raw (optional) get the raw gpio number.
+     * @return Pin number
+     */
+    int
+    getPin(bool raw = false)
+    {
+        if (raw) {
+            return mraa_gpio_get_pin_raw(m_gpio);
+        }
+        return mraa_gpio_get_pin(m_gpio);
+    }
+
+  private:
+    mraa_gpio_context m_gpio;
+#if defined(SWIGJAVASCRIPT)
+    v8::Persistent<v8::Function> m_v8isr;
+#endif
+};
+}

api/mraa/i2c.h

@@ -0,0 +1,186 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+/**
+ * @file
+ * @brief Inter-Integrated Circuit
+ *
+ * An i2c context represents a master on an i2c bus and that context can
+ * communicate to multiple i2c slaves by configuring the address.
+ * @htmlinclude i2c.txt
+ *
+ * @snippet i2c_HMC5883L.c Interesting
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <fcntl.h>
+#include <stdint.h>
+
+#include "common.h"
+#include "gpio.h"
+
+/**
+ * Opaque pointer definition to the internal struct _i2c
+ */
+typedef struct _i2c* mraa_i2c_context;
+
+/**
+ * Initialise i2c context, using board defintions
+ *
+ * @param bus i2c bus to use
+ * @return i2c context or NULL
+ */
+mraa_i2c_context mraa_i2c_init(int bus);
+
+/**
+ * Initialise i2c context, passing in the i2c bus to use.
+ *
+ * @param bus The i2c bus to use i.e. /dev/i2c-2 would be "2"
+ * @return i2c context or NULL
+ */
+mraa_i2c_context mraa_i2c_init_raw(unsigned int bus);
+
+/**
+ * Sets the frequency of the i2c context. Most platforms do not support this.
+ *
+ * @param dev The i2c context
+ * @param mode The bus mode
+ * @return Result of operation
+ */
+mraa_result_t mraa_i2c_frequency(mraa_i2c_context dev, mraa_i2c_mode_t mode);
+
+/**
+ * Simple bulk read from an i2c context
+ *
+ * @param dev The i2c context
+ * @param data pointer to the byte array to read data in to
+ * @param length max number of bytes to read
+ * @return length of the read in bytes or -1
+ */
+int mraa_i2c_read(mraa_i2c_context dev, uint8_t* data, int length);
+
+/**
+ * Simple read for a single byte from the i2c context
+ *
+ * @param dev The i2c context
+ * @return The result of the read or -1 if failed
+ */
+int mraa_i2c_read_byte(mraa_i2c_context dev);
+
+/**
+ * Read a single byte from i2c context, from designated register
+ *
+ * @param dev The i2c context
+ * @param command The register
+ * @return The result of the read or -1 if failed
+ */
+int mraa_i2c_read_byte_data(mraa_i2c_context dev, const uint8_t command);
+
+/**
+ * Read a single word from i2c context, from designated register
+ *
+ * @param dev The i2c context
+ * @param command The register
+ * @return The result of the read or -1 if failed
+ */
+int mraa_i2c_read_word_data(mraa_i2c_context dev, const uint8_t command);
+
+/**
+ * Bulk read from i2c context, starting from designated register
+ *
+ * @param dev The i2c context
+ * @param command The register
+ * @param data pointer to the byte array to read data in to
+ * @param length max number of bytes to read
+ * @return The length in bytes passed to the function or -1
+ */
+int mraa_i2c_read_bytes_data(mraa_i2c_context dev, uint8_t command, uint8_t* data, int length);
+
+/**
+ * Write length bytes to the bus, the first byte in the array is the
+ * command/register to write
+ *
+ * @param dev The i2c context
+ * @param data pointer to the byte array to be written
+ * @param length the number of bytes to transmit
+ * @return Result of operation
+ */
+mraa_result_t mraa_i2c_write(mraa_i2c_context dev, const uint8_t* data, int length);
+
+/**
+ * Write a single byte to an i2c context
+ *
+ * @param dev The i2c context
+ * @param data The byte to write
+ * @return Result of operation
+ */
+mraa_result_t mraa_i2c_write_byte(mraa_i2c_context dev, const uint8_t data);
+
+/**
+ * Write a single byte to an i2c context
+ *
+ * @param dev The i2c context
+ * @param data The byte to write
+ * @param command The register
+ * @return Result of operation
+ */
+mraa_result_t mraa_i2c_write_byte_data(mraa_i2c_context dev, const uint8_t data, const uint8_t command);
+
+/**
+ * Write a single word to an i2c context
+ *
+ * @param dev The i2c context
+ * @param data The word to write
+ * @param command The register
+ * @return Result of operation
+ */
+mraa_result_t mraa_i2c_write_word_data(mraa_i2c_context dev, const uint16_t data, const uint8_t command);
+
+/**
+ * Sets the i2c slave address.
+ *
+ * @param dev The i2c context
+ * @param address The address to set for the slave (7-bit address)
+ * @return Result of operation
+ */
+mraa_result_t mraa_i2c_address(mraa_i2c_context dev, uint8_t address);
+
+/**
+ * De-inits an mraa_i2c_context device
+ *
+ * @param dev The i2c context
+ * @return Result of operation
+ */
+mraa_result_t mraa_i2c_stop(mraa_i2c_context dev);
+
+#ifdef __cplusplus
+}
+#endif

api/mraa/i2c.hpp

@@ -0,0 +1,250 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include "i2c.h"
+#include "types.hpp"
+#include <stdexcept>
+
+namespace mraa
+{
+
+/**
+ * @brief API to Inter-Integrated Circuit
+ *
+ * An I2c object represents an i2c master and can talk multiple i2c slaves by
+ * selecting the correct address
+ * @htmlinclude i2c.txt
+ *
+ * @snippet I2c-compass.cpp Interesting
+ */
+class I2c
+{
+  public:
+    /**
+     * Instantiates an i2c bus. Multiple instances of the same bus can
+     * exist and the bus is not guarranteed to be on the correct address
+     * before read/write.
+     *
+     * @param bus The i2c bus to use
+     * @param raw Whether to disable pinmapper for your board
+     */
+    I2c(int bus, bool raw = false)
+    {
+        if (raw) {
+            m_i2c = mraa_i2c_init_raw(bus);
+        } else {
+            m_i2c = mraa_i2c_init(bus);
+        }
+        if (m_i2c == NULL) {
+            throw std::invalid_argument("Invalid i2c bus");
+        }
+    }
+    /**
+     * I2C constructor, takes a pointer to a I2C context and initialises the I2C class
+     *
+     * @param void * to an I2C context
+     */
+    I2c(void* i2c_context)
+    {
+        m_i2c = (mraa_i2c_context) i2c_context;
+        if (m_i2c == NULL) {
+            throw std::invalid_argument("Invalid I2C context");
+        }
+    }
+
+    /**
+     * Closes the I2c Bus used. This does not guarrantee the bus will not
+     * be usable by anyone else or communicates this disconnect to any
+     * slaves.
+     */
+    ~I2c()
+    {
+        mraa_i2c_stop(m_i2c);
+    }
+
+    /**
+     * Sets the i2c Frequency for communication. Your board may not support
+     * the set frequency. Anyone can change this at any time and this will
+     * affect every slave on the bus
+     *
+     * @param mode Frequency to set the bus to
+     * @return Result of operation
+     */
+    Result
+    frequency(I2cMode mode)
+    {
+        return (Result) mraa_i2c_frequency(m_i2c, (mraa_i2c_mode_t) mode);
+    }
+
+    /**
+     * Set the slave to talk to, typically called before every read/write
+     * operation
+     *
+     * @param address Communicate to the i2c slave on this address
+     * @return Result of operation
+     */
+    Result
+    address(uint8_t address)
+    {
+        return (Result) mraa_i2c_address(m_i2c, address);
+    }
+
+    /**
+     * Read exactly one byte from the bus
+     *
+     * @throws std::invalid_argument in case of error
+     * @return char read from the bus
+     */
+    uint8_t
+    readByte()
+    {
+        int x = mraa_i2c_read_byte(m_i2c);
+        if (x == -1) {
+            throw std::invalid_argument("Unknown error in I2c::readByte()");
+        }
+        return (uint8_t) x;
+    }
+
+    /**
+     * Read length bytes from the bus into *data pointer
+     *
+     * @param data Data to read into
+     * @param length Size of read in bytes to make
+     * @return length of read, should match length
+     */
+    int
+    read(uint8_t* data, int length)
+    {
+        return mraa_i2c_read(m_i2c, data, length);
+    }
+
+    /**
+     * Read byte from an i2c register
+     *
+     * @param reg Register to read from
+     *
+     * @throws std::invalid_argument in case of error
+     * @return char read from register
+     */
+    uint8_t
+    readReg(uint8_t reg)
+    {
+        int x = mraa_i2c_read_byte_data(m_i2c, reg);
+        if (x == -1) {
+            throw std::invalid_argument("Unknown error in I2c::readReg()");
+        }
+        return (uint8_t) x;
+    }
+
+    /**
+     * Read word from an i2c register
+     *
+     * @param reg Register to read from
+     *
+     * @throws std::invalid_argument in case of error
+     * @return char read from register
+     */
+    uint16_t
+    readWordReg(uint8_t reg)
+    {
+        int x = mraa_i2c_read_word_data(m_i2c, reg);
+	if (x == -1) {
+            throw std::invalid_argument("Unknown error in I2c::readReg()");
+        }
+        return (uint16_t) x;
+    }
+
+    /**
+     * Read length bytes from the bus into *data pointer starting from
+     * an i2c register
+     *
+     * @param reg Register to read from
+     * @param data pointer to the byte array to read data in to
+     * @param length max number of bytes to read
+     * @return length passed to the function or -1
+     */
+    int
+    readBytesReg(uint8_t reg, uint8_t* data, int length)
+    {
+        return mraa_i2c_read_bytes_data(m_i2c, reg, data, length);
+    }
+
+    /**
+     * Write a byte on the bus
+     *
+     * @param data The byte to send on the bus
+     * @return Result of operation
+     */
+    Result
+    writeByte(uint8_t data)
+    {
+        return (Result) mraa_i2c_write_byte(m_i2c, data);
+    }
+
+    /**
+     * Write length bytes to the bus, the first byte in the array is the
+     * command/register to write
+     *
+     * @param data Buffer to send on the bus, first byte is i2c command
+     * @param length Size of buffer to send
+     * @return Result of operation
+     */
+    Result
+    write(const uint8_t* data, int length)
+    {
+        return (Result) mraa_i2c_write(m_i2c, data, length);
+    }
+
+    /**
+     * Write a byte to an i2c register
+     *
+     * @param reg Register to write to
+     * @param data Value to write to register
+     * @return Result of operation
+     */
+    Result
+    writeReg(uint8_t reg, uint8_t data)
+    {
+        return (Result) mraa_i2c_write_byte_data(m_i2c, data, reg);
+    }
+
+    /**
+     * Write a word to an i2c register
+     *
+     * @param reg Register to write to
+     * @param data Value to write to register
+     * @return Result of operation
+     */
+    Result
+    writeWordReg(uint8_t reg, uint16_t data)
+    {
+        return (Result) mraa_i2c_write_word_data(m_i2c, data, reg);
+    }
+
+  private:
+    mraa_i2c_context m_i2c;
+};
+}

api/mraa/iio.h

@@ -0,0 +1,139 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include "common.h"
+#include "iio_kernel_headers.h"
+
+typedef struct {
+    int index;
+    int enabled;
+    char* type;
+    mraa_boolean_t lendian;
+    int signedd;
+    unsigned int offset;
+    uint64_t mask;
+    unsigned int bits_used;
+    unsigned int bytes;
+    unsigned int shift;
+    unsigned int location;
+} mraa_iio_channel;
+
+typedef struct {
+    char* name;
+    int enabled;
+} mraa_iio_event;
+
+/**
+ * @file
+ * @brief iio
+ *
+ * An iio context represents an IIO device
+ *
+ * @snippet iio_driver.c Interesting
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <fcntl.h>
+#include <stdint.h>
+
+#include "common.h"
+
+/**
+ * Opaque pointer definition to the internal struct _iio
+ */
+typedef struct _iio* mraa_iio_context;
+
+/**
+ * Initialise iio context
+ *
+ * @param bus iio device to use
+ * @return i2c context or NULL
+ */
+mraa_iio_context mraa_iio_init(int device);
+
+mraa_result_t mraa_iio_trigger_buffer(mraa_iio_context dev, void (*fptr)(char* data), void* args);
+
+const char* mraa_iio_get_device_name(mraa_iio_context dev);
+
+int mraa_iio_get_device_num_by_name(const char* name);
+
+int mraa_iio_read_size(mraa_iio_context dev);
+
+mraa_iio_channel* mraa_iio_get_channels(mraa_iio_context dev);
+
+int mraa_iio_get_channel_count(mraa_iio_context dev);
+
+mraa_result_t mraa_iio_read_float(mraa_iio_context dev, const char* filename, float* data);
+
+mraa_result_t mraa_iio_read_int(mraa_iio_context dev, const char* filename, int* data);
+
+mraa_result_t mraa_iio_read_string(mraa_iio_context dev, const char* filename, char* data, int max_len);
+
+mraa_result_t mraa_iio_write_float(mraa_iio_context dev, const char* attr_chan, const float data);
+
+mraa_result_t mraa_iio_write_int(mraa_iio_context dev, const char* attr_chan, const int data);
+
+mraa_result_t mraa_iio_write_string(mraa_iio_context dev, const char* attr_chan, const char* data);
+
+mraa_result_t mraa_iio_get_channel_data(mraa_iio_context dev);
+
+mraa_result_t mraa_iio_get_event_data(mraa_iio_context dev);
+
+mraa_result_t mraa_iio_event_poll(mraa_iio_context dev, struct iio_event_data* data);
+
+mraa_result_t
+mraa_iio_event_setup_callback(mraa_iio_context dev, void (*fptr)(struct iio_event_data* data, void* args), void* args);
+
+mraa_result_t mraa_iio_event_extract_event(struct iio_event_data* event,
+                                           int* chan_type,
+                                           int* modifier,
+                                           int* type,
+                                           int* direction,
+                                           int* channel,
+                                           int* channel2,
+                                           int* different);
+
+mraa_result_t mraa_iio_get_mount_matrix(mraa_iio_context dev, const char *sysfs_name, float mm[9]);
+
+mraa_result_t mraa_iio_create_trigger(mraa_iio_context dev, const char* trigger);
+
+mraa_result_t mraa_iio_update_channels(mraa_iio_context dev);
+/**
+ * De-inits an mraa_iio_context device
+ *
+ * @param dev The iio context
+ * @return Result of operation
+ */
+mraa_result_t mraa_iio_close(mraa_iio_context dev);
+
+#ifdef __cplusplus
+}
+#endif

api/mraa/iio.hpp

@@ -0,0 +1,245 @@
+/*
+ * Author: Henry Bruce <henry.bruce@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <stdexcept>
+ #include <sstream>
+#include "iio.h"
+#include "types.hpp"
+
+namespace mraa
+{
+
+struct IioEventData
+{
+    int channelType;
+    int modifier;
+    int type;
+    int direction;
+    int channel;
+    int channel2;
+    int diff;
+};
+
+class IioHandler
+{
+public:
+  virtual void onIioEvent(const IioEventData& eventData) = 0;
+};
+
+
+/**
+ * @brief API to Industrial IO
+ *
+ * This file defines the C++ iio interface for libmraa
+ *
+ * @snippet iio_dummy_test.cpp Interesting
+ */
+class Iio
+{
+  public:
+    /**
+     * Iio Constructor, takes a device number which will map directly to sysfs
+     * e.g. device 0 maps to /sys/bus/iio/devices/iio:device0
+     *
+     * @param device IIO device number
+     *
+     * @throws std::invalid_argument if initialization fails
+     */
+    Iio(int device)
+    {
+        m_iio = mraa_iio_init(device);
+        if (m_iio == NULL) {
+            std::ostringstream oss;
+            oss << "IIO device " << device << " is not valid";
+            throw std::invalid_argument(oss.str());
+        }
+    }
+
+    /**
+     * Iio Constructor
+     *
+     * @param deviceName IIO device name
+     *
+     * @throws std::invalid_argument if initialization fails
+     */
+    Iio(const std::string& deviceName)
+    {
+        std::ostringstream oss;
+        int id = mraa_iio_get_device_num_by_name(deviceName.c_str());
+        if (id == -1) {
+            oss << "IIO device name " << deviceName << " not found";
+            throw std::invalid_argument(oss.str());
+        }
+        m_iio = mraa_iio_init(id);
+        if (m_iio == NULL) {
+            oss << "IIO device " << deviceName << " is not valid";
+            throw std::invalid_argument(oss.str());
+        }
+    }
+
+    /**
+     * Iio destructor
+     */
+    ~Iio()
+    {
+        mraa_iio_close(m_iio);
+    }
+
+
+    /**
+     * Get device name
+     *
+     * @returns The device name
+     */
+    std::string
+    getDeviceName() const
+    {
+        return mraa_iio_get_device_name(m_iio);
+    }
+
+    /**
+     * Read an int value from specified attribute.
+     *
+     * @param attributeName attribute mame
+     *
+     * @returns The int value
+     *
+     * @throws std::invalid_argument if read fails
+     */
+    int
+    readInt(const std::string& attributeName) const
+    {
+        int value;
+        mraa_result_t res = mraa_iio_read_int(m_iio, attributeName.c_str(), &value);
+        if (res != MRAA_SUCCESS) {
+            std::ostringstream oss;
+            oss << "IIO readInt for attibute " << attributeName << " failed";
+            throw std::runtime_error(oss.str());
+        }
+        return value;
+    }
+
+    /**
+     * Read a float value from specified attribute.
+     *
+     * @param attributeName attribute mame
+     *
+     * @returns The float value
+     *
+     * @throws std::invalid_argument if read fails
+     */
+    float
+    readFloat(const std::string& attributeName) const
+    {
+        float value;
+        mraa_result_t res = mraa_iio_read_float(m_iio, attributeName.c_str(), &value);
+        if (res != MRAA_SUCCESS) {
+            std::ostringstream oss;
+            oss << "IIO readFloat for attibute " << attributeName << " failed";
+            throw std::runtime_error(oss.str());
+        }
+        return value;
+    }
+
+    /**
+     * Write an int value to specified attribute.
+     *
+     * @param attributeName attribute mame
+     * @param value int value
+     *
+     * @throws std::invalid_argument if write fails
+     */
+    void
+    writeInt(const std::string& attributeName, int value) const
+    {
+        mraa_result_t res = mraa_iio_write_int(m_iio, attributeName.c_str(), value);
+        if (res != MRAA_SUCCESS) {
+            std::ostringstream oss;
+            oss << "IIO writeInt for attibute " << attributeName << " failed";
+            throw std::runtime_error(oss.str());
+        }
+
+    }
+
+    /**
+     * Write a float value to specified attribute.
+     *
+     * @param attributeName attribute mame
+     * @param value float value
+     *
+     * @throws std::invalid_argument if write fails
+     */
+    void
+    writeFloat(const std::string& attributeName, float value) const
+    {
+        mraa_result_t res = mraa_iio_write_float(m_iio, attributeName.c_str(), value);
+        if (res != MRAA_SUCCESS) {
+            std::ostringstream oss;
+            oss << "IIO writeFloat for attibute " << attributeName << " failed";
+            throw std::runtime_error(oss.str());
+        }
+
+    }
+
+    /**
+     * Register event handler.
+     *
+     * @param handler handler class that implements IioHandler
+     *
+     * @throws std::invalid_argument on failure
+     */
+    void
+    registerEventHandler(IioHandler* handler) const
+    {
+        mraa_result_t res = mraa_iio_event_setup_callback(m_iio, private_event_handler, handler);
+        if (res != MRAA_SUCCESS) {
+            throw std::runtime_error("registerEventHandler failed");
+        }
+    }
+
+  private:
+    static void private_event_handler(iio_event_data* data, void *args)
+    {
+        if (args != NULL) {
+            IioHandler* handler = (IioHandler*)args;
+            IioEventData eventData;
+            int chan_type, modifier, type, direction, channel, channel2, different;
+            mraa_iio_event_extract_event(data, &chan_type, &modifier, &type, &direction, &channel, &channel2, &different);
+            eventData.channelType = chan_type;
+            eventData.modifier = modifier;
+            eventData.type = type;
+            eventData.direction = direction;
+            eventData.channel = channel;
+            eventData.channel2 = channel2;
+            eventData.diff = different;
+            handler->onIioEvent(eventData);
+        }
+    }
+
+    mraa_iio_context m_iio;
+};
+
+}

api/mraa/iio_kernel_headers.h

@@ -0,0 +1,141 @@
+/*
+ * Author: Lay, Kuan Loon <kuan.loon.lay@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+//For kernel 4.1+,
+//#include <linux/iio/types.h>
+//#include <linux/iio/events.h>
+
+//linux/iio/types.h
+enum iio_chan_type {
+        IIO_VOLTAGE,
+        IIO_CURRENT,
+        IIO_POWER,
+        IIO_ACCEL,
+        IIO_ANGL_VEL,
+        IIO_MAGN,
+        IIO_LIGHT,
+        IIO_INTENSITY,
+        IIO_PROXIMITY,
+        IIO_TEMP,
+        IIO_INCLI,
+        IIO_ROT,
+        IIO_ANGL,
+        IIO_TIMESTAMP,
+        IIO_CAPACITANCE,
+        IIO_ALTVOLTAGE,
+        IIO_CCT,
+        IIO_PRESSURE,
+        IIO_HUMIDITYRELATIVE,
+        IIO_ACTIVITY,
+        IIO_STEPS,
+        IIO_ENERGY,
+        IIO_DISTANCE,
+        IIO_VELOCITY,
+};
+
+enum iio_modifier {
+        IIO_NO_MOD,
+        IIO_MOD_X,
+        IIO_MOD_Y,
+        IIO_MOD_Z,
+        IIO_MOD_X_AND_Y,
+        IIO_MOD_X_AND_Z,
+        IIO_MOD_Y_AND_Z,
+        IIO_MOD_X_AND_Y_AND_Z,
+        IIO_MOD_X_OR_Y,
+        IIO_MOD_X_OR_Z,
+        IIO_MOD_Y_OR_Z,
+        IIO_MOD_X_OR_Y_OR_Z,
+        IIO_MOD_LIGHT_BOTH,
+        IIO_MOD_LIGHT_IR,
+        IIO_MOD_ROOT_SUM_SQUARED_X_Y,
+        IIO_MOD_SUM_SQUARED_X_Y_Z,
+        IIO_MOD_LIGHT_CLEAR,
+        IIO_MOD_LIGHT_RED,
+        IIO_MOD_LIGHT_GREEN,
+        IIO_MOD_LIGHT_BLUE,
+        IIO_MOD_QUATERNION,
+        IIO_MOD_TEMP_AMBIENT,
+        IIO_MOD_TEMP_OBJECT,
+        IIO_MOD_NORTH_MAGN,
+        IIO_MOD_NORTH_TRUE,
+        IIO_MOD_NORTH_MAGN_TILT_COMP,
+        IIO_MOD_NORTH_TRUE_TILT_COMP,
+        IIO_MOD_RUNNING,
+        IIO_MOD_JOGGING,
+        IIO_MOD_WALKING,
+        IIO_MOD_STILL,
+        IIO_MOD_ROOT_SUM_SQUARED_X_Y_Z,
+};
+
+enum iio_event_type {
+        IIO_EV_TYPE_THRESH,
+        IIO_EV_TYPE_MAG,
+        IIO_EV_TYPE_ROC,
+        IIO_EV_TYPE_THRESH_ADAPTIVE,
+        IIO_EV_TYPE_MAG_ADAPTIVE,
+        IIO_EV_TYPE_CHANGE,
+};
+
+enum iio_event_direction {
+        IIO_EV_DIR_EITHER,
+        IIO_EV_DIR_RISING,
+        IIO_EV_DIR_FALLING,
+        IIO_EV_DIR_NONE,
+};
+
+//linux/iio/events.h
+#if defined(MSYS)
+#define __USE_LINUX_IOCTL_DEFS
+#include <sys/ioctl.h>
+#else
+#include <linux/ioctl.h>
+#endif
+
+/**
+ * struct iio_event_data - The actual event being pushed to userspace
+ * @id:		event identifier
+ * @timestamp:	best estimate of time of event occurrence (often from
+ *		the interrupt handler)
+ */
+struct iio_event_data {
+	unsigned long long int	id;
+	long long int	timestamp;
+};
+
+#define IIO_GET_EVENT_FD_IOCTL _IOR('i', 0x90, int)
+
+#define IIO_EVENT_CODE_EXTRACT_TYPE(mask) ((mask >> 56) & 0xFF)
+
+#define IIO_EVENT_CODE_EXTRACT_DIR(mask) ((mask >> 48) & 0x7F)
+
+#define IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(mask) ((mask >> 32) & 0xFF)
+
+/* Event code number extraction depends on which type of event we have.
+ * Perhaps review this function in the future*/
+#define IIO_EVENT_CODE_EXTRACT_CHAN(mask) ((short int)(mask & 0xFFFF))
+#define IIO_EVENT_CODE_EXTRACT_CHAN2(mask) ((short int)(((mask) >> 16) & 0xFFFF))
+
+#define IIO_EVENT_CODE_EXTRACT_MODIFIER(mask) ((mask >> 40) & 0xFF)
+#define IIO_EVENT_CODE_EXTRACT_DIFF(mask) (((mask) >> 55) & 0x1)

api/mraa/pwm.h

@@ -0,0 +1,187 @@
+/*
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+/**
+ * @file
+ * @brief Pulse Width Modulation module
+ *
+ * PWM is the Pulse Width Modulation interface to libmraa. It allows the
+ * generation of a signal on a pin. Some boards may have higher or lower levels
+ * of resolution so make sure you check the board & pin you are using before
+ * hand.
+ *
+ * @snippet cycle-pwm3.c Interesting
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdio.h>
+#include <fcntl.h>
+
+#include "common.h"
+
+typedef struct _pwm* mraa_pwm_context;
+
+/**
+ * Initialise pwm_context, uses board mapping
+ *
+ * @param pin The PWM PIN
+ * @return pwm context or NULL
+ */
+mraa_pwm_context mraa_pwm_init(int pin);
+
+/**
+ * Initialise pwm_context, raw mode
+ *
+ * @param chipid The chip inwhich the PWM is under in SYSFS
+ * @param pin The PWM PIN.
+ * @return pwm context or NULL
+ */
+mraa_pwm_context mraa_pwm_init_raw(int chipid, int pin);
+
+/**
+ * Set the output duty-cycle percentage, as a float
+ *
+ * @param dev The Pwm context to use
+ * @param percentage A floating-point value representing percentage of output.
+ *    The value should lie between 0.0f (representing on 0%) and 1.0f
+ *    Values above or below this range will be set at either 0.0f or 1.0f
+ * @return Result of operation
+ */
+mraa_result_t mraa_pwm_write(mraa_pwm_context dev, float percentage);
+
+/**
+ * Read the output duty-cycle percentage, as a float
+ *
+ * @param dev The Pwm context to use
+ * @return percentage A floating-point value representing percentage of output.
+ *    The value should lie between 0.0f (representing on 0%) and 1.0f
+ *    Values above or below this range will be set at either 0.0f or 1.0f
+ */
+float mraa_pwm_read(mraa_pwm_context dev);
+
+/**
+ * Set the PWM period as seconds represented in a float
+ *
+ * @param dev The Pwm context to use
+ * @param seconds Period represented as a float in seconds
+ * @return Result of operation
+ */
+mraa_result_t mraa_pwm_period(mraa_pwm_context dev, float seconds);
+
+/**
+ * Set period, milliseconds.
+ *
+ * @param dev The Pwm context to use
+ * @param ms Milliseconds for period
+ * @return Result of operation
+ */
+mraa_result_t mraa_pwm_period_ms(mraa_pwm_context dev, int ms);
+
+/**
+ * Set period, microseconds
+ *
+ * @param dev The Pwm context to use
+ * @param us Microseconds as period
+ * @return Result of operation
+ */
+mraa_result_t mraa_pwm_period_us(mraa_pwm_context dev, int us);
+
+/**
+ * Set pulsewidth, As represnted by seconds in a (float)
+ *
+ * @param dev The Pwm context to use
+ * @param seconds The duration of a pulse
+ * @return Result of operation
+ */
+mraa_result_t mraa_pwm_pulsewidth(mraa_pwm_context dev, float seconds);
+
+/**
+ * Set pulsewidth, milliseconds
+ *
+ * @param dev The Pwm context to use
+ * @param ms Milliseconds for pulsewidth
+ * @return Result of operation
+ */
+mraa_result_t mraa_pwm_pulsewidth_ms(mraa_pwm_context dev, int ms);
+
+/**
+ * Set pulsewidth, microseconds
+ *
+ * @param dev The Pwm context to use
+ * @param us Microseconds for pulsewidth
+ * @return Result of operation
+ */
+mraa_result_t mraa_pwm_pulsewidth_us(mraa_pwm_context dev, int us);
+
+/**
+ * Set the enable status of the PWM pin. None zero will assume on with output being driven.
+ *   and 0 will disable the output.
+ *
+ * @param dev The pwm context to use
+ * @param enable Toggle status of pin
+ * @return Result of operation.
+ */
+mraa_result_t mraa_pwm_enable(mraa_pwm_context dev, int enable);
+
+/**
+ * Change ownership of context
+ *
+ * @param dev the context
+ * @param owner Ownership boolean
+ * @return Result of operation
+ */
+mraa_result_t mraa_pwm_owner(mraa_pwm_context dev, mraa_boolean_t owner);
+
+/**
+ * Close and unexport the PWM pin
+ *
+ * @param dev The pwm context to use
+ * @return Result of operation
+ */
+mraa_result_t mraa_pwm_close(mraa_pwm_context dev);
+
+/**
+ * Get the maximum pwm period in us
+ *
+ * @param dev The pwm context to use
+ * @return max pwm in us
+ */
+int mraa_pwm_get_max_period(mraa_pwm_context dev);
+
+/**
+ * Get the minimum pwm period in us
+ *
+ * @param dev The pwm context to use
+ * @return min pwm in us
+ */
+int mraa_pwm_get_min_period(mraa_pwm_context dev);
+
+#ifdef __cplusplus
+}
+#endif

api/mraa/pwm.hpp

@@ -0,0 +1,219 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include "pwm.h"
+#include "types.hpp"
+#include <stdexcept>
+
+namespace mraa
+{
+
+/**
+ * @brief API to Pulse Width Modulation
+ *
+ * This file defines the PWM interface for libmraa
+ *
+ * @snippet Pwm3-cycle.cpp Interesting
+ */
+class Pwm
+{
+  public:
+    /**
+     * instanciates a PWM object on a pin
+     *
+     * @param pin the pin number used on your board
+     * @param owner if you are the owner of the pin the destructor will
+     * unexport the pin from sysfs, default behaviour is you are the owner
+     * if the pinmapper exported it
+     * @param chipid the pwmchip to use, use only in raw mode
+     */
+    Pwm(int pin, bool owner = true, int chipid = -1)
+    {
+        if (chipid == -1) {
+            m_pwm = mraa_pwm_init(pin);
+        } else {
+            m_pwm = mraa_pwm_init_raw(chipid, pin);
+        }
+
+        if (m_pwm == NULL) {
+            throw std::invalid_argument("Error initialising PWM on pin");
+        }
+
+        if (!owner) {
+            mraa_pwm_owner(m_pwm, 0);
+        }
+    }
+
+    /**
+     * Pwm constructor, takes a pointer to the PWM context and
+     * initialises the class
+     *
+     * @param void * to a PWM context
+     */
+    Pwm(void* pwm_context)
+    {
+        m_pwm = (mraa_pwm_context) pwm_context;
+        if (m_pwm == NULL) {
+            throw std::invalid_argument("Invalid PWM context");
+        }
+    }
+    /**
+     * Pwm destructor
+     */
+    ~Pwm()
+    {
+        mraa_pwm_close(m_pwm);
+    }
+    /**
+     * Set the output duty-cycle percentage, as a float
+     *
+     * @param percentage A floating-point value representing percentage of
+     * output. The value should lie between 0.0f (representing 0%) and
+     * 1.0f Values above or below this range will be set at either 0.0f or
+     * 1.0f
+     * @return Result of operation
+     */
+    Result
+    write(float percentage)
+    {
+        return (Result) mraa_pwm_write(m_pwm, percentage);
+    }
+    /**
+     * Read the output duty-cycle percentage, as a float
+     *
+     * @return A floating-point value representing percentage of
+     * output. The value should lie between 0.0f (representing 0%) and
+     * 1.0f Values above or below this range will be set at either 0.0f or
+     * 1.0f
+     */
+    float
+    read()
+    {
+        return mraa_pwm_read(m_pwm);
+    }
+    /**
+     * Set the PWM period as seconds represented in a float
+     *
+     * @param period Period represented as a float in seconds
+     * @return Result of operation
+     */
+    Result
+    period(float period)
+    {
+        return (Result) mraa_pwm_period(m_pwm, period);
+    }
+    /**
+     * Set period, milliseconds
+     *
+     * @param ms milliseconds for period
+     * @return Result of operation
+     */
+    Result
+    period_ms(int ms)
+    {
+        return (Result) mraa_pwm_period_ms(m_pwm, ms);
+    }
+    /**
+     * Set period, microseconds
+     *
+     * @param us microseconds as period
+     * @return Result of operation
+     */
+    Result
+    period_us(int us)
+    {
+        return (Result) mraa_pwm_period_us(m_pwm, us);
+    }
+    /**
+     * Set pulsewidth, as represented by seconds in a float
+     *
+     * @param seconds The duration of a pulse
+     * @return Result of operation
+     */
+    Result
+    pulsewidth(float seconds)
+    {
+        return (Result) mraa_pwm_pulsewidth(m_pwm, seconds);
+    }
+    /**
+     * Set pulsewidth, milliseconds
+     *
+     * @param ms milliseconds for pulsewidth
+     * @return Result of operation
+     */
+    Result
+    pulsewidth_ms(int ms)
+    {
+        return (Result) mraa_pwm_pulsewidth_ms(m_pwm, ms);
+    }
+    /**
+     * The pulsewidth, microseconds
+     *
+     * @param us microseconds for pulsewidth
+     * @return Result of operation
+     */
+    Result
+    pulsewidth_us(int us)
+    {
+        return (Result) mraa_pwm_pulsewidth_us(m_pwm, us);
+    }
+    /**
+     * Set the enable status of the PWM pin. None zero will assume on with
+     * output being driven and 0 will disable the output
+     *
+     * @param enable enable status of pin
+     * @return Result of operation
+     */
+    Result
+    enable(bool enable)
+    {
+        return (Result) mraa_pwm_enable(m_pwm, enable);
+    }
+    /**
+     * Get the maximum PWM period in us
+     *
+     * @return max PWM period in us
+     */
+    int
+    max_period()
+    {
+        return mraa_pwm_get_max_period(m_pwm);
+    }
+    /**
+     * Get the minimum PWM period in us
+     *
+     * @return min PWM period in us
+     */
+    int
+    min_period()
+    {
+        return mraa_pwm_get_min_period(m_pwm);
+    }
+
+  private:
+    mraa_pwm_context m_pwm;
+};
+}

api/mraa/spi.h

@@ -0,0 +1,196 @@
+/*
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+/**
+ * @file
+ * @brief Serial Peripheral Interface
+ *
+ * This file defines the spi interface for libmraa. A Spi object in libmraa
+ * represents a spidev device. Linux spidev devices are created per spi bus and
+ * every chip select available on that bus has another spidev 'file'. A lot
+ * more information on spidev devices is available
+ * [here](https://www.kernel.org/doc/Documentation/spi/spidev).
+ *
+ * @snippet spi_mcp4261.c Interesting
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdio.h>
+#include <fcntl.h>
+#include <stdint.h>
+
+#include "common.h"
+
+/**
+ * MRAA SPI Modes
+ */
+typedef enum {
+    MRAA_SPI_MODE0 = 0, /**< CPOL = 0, CPHA = 0, Clock idle low, data is clocked in on rising edge,
+                           output data (change) on falling edge */
+    MRAA_SPI_MODE1 = 1, /**< CPOL = 0, CPHA = 1, Clock idle low, data is clocked in on falling edge,
+                           output data (change) on rising edge */
+    MRAA_SPI_MODE2 = 2, /**< CPOL = 1, CPHA = 0, Clock idle low, data is clocked in on falling edge,
+                           output data (change) on rising edge */
+    MRAA_SPI_MODE3 = 3, /**< CPOL = 1, CPHA = 1, Clock idle low, data is clocked in on rising, edge
+                           output data (change) on falling edge */
+} mraa_spi_mode_t;
+
+/**
+ * Opaque pointer definition to the internal struct _spi
+ */
+typedef struct _spi* mraa_spi_context;
+
+/**
+ * Initialise SPI_context, uses board mapping. Sets the muxes
+ *
+ * @param bus Bus to use, as listed in platform definition, normally 0
+ * @return Spi context or NULL
+ */
+mraa_spi_context mraa_spi_init(int bus);
+
+/**
+ * Initialise SPI_context without any board configuration, selects a bus and a mux.
+ *
+ * @param bus Bus to use as listed by spidev
+ * @param cs Chip select to use as listed in spidev
+ * @return Spi context or NULL
+ */
+mraa_spi_context mraa_spi_init_raw(unsigned int bus, unsigned int cs);
+
+/**
+ * Set the SPI device mode. see spidev 0-3.
+ *
+ * @param dev The Spi context
+ * @param mode The SPI mode, See Linux spidev
+ * @return Result of operation
+ */
+mraa_result_t mraa_spi_mode(mraa_spi_context dev, mraa_spi_mode_t mode);
+
+/**
+ * Set the SPI device operating clock frequency.
+ *
+ * @param dev the Spi context
+ * @param hz the frequency in hz
+ * @return Result of operation
+ */
+mraa_result_t mraa_spi_frequency(mraa_spi_context dev, int hz);
+
+/**
+ * Write Single Byte to the SPI device.
+ *
+ * @param dev The Spi context
+ * @param data Data to send
+ * @return Data received on the miso line or -1 in case of error
+ */
+int mraa_spi_write(mraa_spi_context dev, uint8_t data);
+
+/**
+ * Write Two Bytes to the SPI device.
+ *
+ * @param dev The Spi context
+ * @param data Data to send
+ * @return Data received on the miso line
+ */
+int mraa_spi_write_word(mraa_spi_context dev, uint16_t data);
+
+/**
+ * Write Buffer of bytes to the SPI device. The pointer return has to be
+ * free'd by the caller. It will return a NULL pointer in cases of error.
+ *
+ * @param dev The Spi context
+ * @param data to send
+ * @param length elements within buffer, Max 4096
+ * @return Data received on the miso line, same length as passed in
+ */
+uint8_t* mraa_spi_write_buf(mraa_spi_context dev, uint8_t* data, int length);
+
+/**
+ * Write Buffer of uint16 to the SPI device. The pointer return has to be
+ * free'd by the caller. It will return a NULL pointer in cases of error.
+ *
+ * @param dev The Spi context
+ * @param data to send
+ * @param length elements (in bytes) within buffer, Max 4096
+ * @return Data received on the miso line, same length as passed in
+ */
+uint16_t* mraa_spi_write_buf_word(mraa_spi_context dev, uint16_t* data, int length);
+
+/**
+ * Transfer Buffer of bytes to the SPI device. Both send and recv buffers
+ * are passed in
+ *
+ * @param dev The Spi context
+ * @param data to send
+ * @param rxbuf buffer to recv data back, may be NULL
+ * @param length elements within buffer, Max 4096
+ * @return Result of operation
+ */
+mraa_result_t mraa_spi_transfer_buf(mraa_spi_context dev, uint8_t* data, uint8_t* rxbuf, int length);
+
+/**
+ * Transfer Buffer of uint16 to the SPI device. Both send and recv buffers
+ * are passed in
+ *
+ * @param dev The Spi context
+ * @param data to send
+ * @param rxbuf buffer to recv data back, may be NULL
+ * @param length elements (in bytes) within buffer, Max 4096
+ * @return Result of operation
+ */
+mraa_result_t mraa_spi_transfer_buf_word(mraa_spi_context dev, uint16_t* data, uint16_t* rxbuf, int length);
+
+/**
+ * Change the SPI lsb mode
+ *
+ * @param dev The Spi context
+ * @param lsb Use least significant bit transmission. 0 for msbi
+ * @return Result of operation
+ */
+mraa_result_t mraa_spi_lsbmode(mraa_spi_context dev, mraa_boolean_t lsb);
+
+/**
+ * Set bits per mode on transaction, defaults at 8
+ *
+ * @param dev The Spi context
+ * @param bits bits per word
+ * @return Result of operation
+ */
+mraa_result_t mraa_spi_bit_per_word(mraa_spi_context dev, unsigned int bits);
+
+/**
+ * De-inits an mraa_spi_context device
+ *
+ * @param dev The Spi context
+ * @return Result of operation
+ */
+mraa_result_t mraa_spi_stop(mraa_spi_context dev);
+
+#ifdef __cplusplus
+}
+#endif

api/mraa/spi.hpp

@@ -0,0 +1,243 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include "spi.h"
+#include "types.hpp"
+#include <stdexcept>
+
+namespace mraa
+{
+
+/**
+ * MRAA SPI Modes
+ */
+typedef enum {
+    SPI_MODE0 = 0, /**< CPOL = 0, CPHA = 0, Clock idle low, data is clocked in on rising edge,
+                      output data (change) on falling edge */
+    SPI_MODE1 = 1, /**< CPOL = 0, CPHA = 1, Clock idle low, data is clocked in on falling edge,
+                      output data (change) on rising edge */
+    SPI_MODE2 = 2, /**< CPOL = 1, CPHA = 0, Clock idle low, data is clocked in on falling edge,
+                      output data (change) on rising edge */
+    SPI_MODE3 = 3, /**< CPOL = 1, CPHA = 1, Clock idle low, data is clocked in on rising, edge
+                      output data (change) on falling edge */
+} Spi_Mode;
+
+
+/**
+* @brief API to Serial Peripheral Interface
+*
+* This file defines the SPI interface for libmraa
+*
+* @snippet Spi-pot.cpp Interesting
+*/
+class Spi
+{
+  public:
+    /**
+     * Initialise SPI object using the board mapping to set muxes
+     *
+     * @param bus to use, as listed in the platform definition, normally 0
+     */
+    Spi(int bus)
+    {
+        m_spi = mraa_spi_init(bus);
+
+        if (m_spi == NULL) {
+            throw std::invalid_argument("Error initialising SPI bus");
+        }
+    }
+
+    Spi(int bus, int cs)
+    {
+        m_spi = mraa_spi_init_raw(bus, cs);
+
+        if (m_spi == NULL) {
+            throw std::invalid_argument("Error initialising SPI bus");
+        }
+    }
+
+    /**
+     * Spi Constructor, takes a pointer to a SPI context and initialises
+     * the SPI class
+     *
+     * @param void * to SPI context
+     */
+    Spi(void* spi_context)
+    {
+        m_spi = (mraa_spi_context) spi_context;
+        if (m_spi == NULL) {
+            throw std::invalid_argument("Invalid SPI context");
+        }
+    }
+
+    /**
+     * Closes spi bus
+     */
+    ~Spi()
+    {
+        mraa_spi_stop(m_spi);
+    }
+
+    /**
+     * Set the SPI device mode. see spidev0-3
+     *
+     * @param mode the mode. See Linux spidev doc
+     * @return Result of operation
+     */
+    Result
+    mode(Spi_Mode mode)
+    {
+        return (Result) mraa_spi_mode(m_spi, (mraa_spi_mode_t) mode);
+    }
+
+    /**
+     * Set the SPI device operating clock frequency
+     *
+     * @param hz the frequency to set in hz
+     * @return Result of operation
+     */
+    Result
+    frequency(int hz)
+    {
+        return (Result) mraa_spi_frequency(m_spi, hz);
+    }
+
+    /**
+     * Write single byte to the SPI device
+     *
+     * @param data the byte to send
+     * @return data received on the miso line or -1 in case of error
+     */
+    int
+    writeByte(uint8_t data)
+    {
+        return mraa_spi_write(m_spi, (uint8_t) data);
+    }
+
+    /**
+     * Write single byte to the SPI device
+     *
+     * @param data the byte to send
+     * @return data received on the miso line or -1 in case of error
+     */
+    int
+    writeWord(uint16_t data)
+    {
+        return mraa_spi_write_word(m_spi, (uint16_t) data);
+    }
+
+    /**
+     * Write buffer of bytes to SPI device The pointer return has to be
+     * free'd by the caller. It will return a NULL pointer in cases of
+     * error
+     *
+     * @param txBuf buffer to send
+     * @param length size of buffer to send
+     * @return uint8_t* data received on the miso line. Same length as passed in
+     */
+    uint8_t*
+    write(uint8_t* txBuf, int length)
+    {
+        return mraa_spi_write_buf(m_spi, txBuf, length);
+    }
+
+#ifndef SWIG
+    /**
+     * Write buffer of bytes to SPI device The pointer return has to be
+     * free'd by the caller. It will return a NULL pointer in cases of
+     * error
+     *
+     * @param txBuf buffer to send
+     * @param length size of buffer (in bytes) to send
+     * @return uint8_t* data received on the miso line. Same length as passed in
+     */
+    uint16_t*
+    writeWord(uint16_t* txBuf, int length)
+    {
+        return mraa_spi_write_buf_word(m_spi, txBuf, length);
+    }
+#endif
+
+#ifndef SWIG
+    /**
+     * Transfer data to and from SPI device Receive pointer may be null if
+     * return data is not needed.
+     *
+     * @param txBuf buffer to send
+     * @param rxBuf buffer to optionally receive data from spi device
+     * @param length size of buffer to send
+     * @return Result of operation
+     */
+    Result
+    transfer(uint8_t* txBuf, uint8_t* rxBuf, int length)
+    {
+        return (Result) mraa_spi_transfer_buf(m_spi, txBuf, rxBuf, length);
+    }
+
+    /**
+     * Transfer data to and from SPI device Receive pointer may be null if
+     * return data is not needed.
+     *
+     * @param txBuf buffer to send
+     * @param rxBuf buffer to optionally receive data from spi device
+     * @param length size of buffer to send
+     * @return Result of operation
+     */
+    Result
+    transfer_word(uint16_t* txBuf, uint16_t* rxBuf, int length)
+    {
+        return (Result) mraa_spi_transfer_buf_word(m_spi, txBuf, rxBuf, length);
+    }
+#endif
+
+    /**
+     * Change the SPI lsb mode
+     *
+     * @param lsb Use least significant bit transmission - 0 for msbi
+     * @return Result of operation
+     */
+    Result
+    lsbmode(bool lsb)
+    {
+        return (Result) mraa_spi_lsbmode(m_spi, (mraa_boolean_t) lsb);
+    }
+
+    /**
+     * Set bits per mode on transaction, default is 8
+     *
+     * @param bits bits per word
+     * @return Result of operation
+     */
+    Result
+    bitPerWord(unsigned int bits)
+    {
+        return (Result) mraa_spi_bit_per_word(m_spi, bits);
+    }
+
+  private:
+    mraa_spi_context m_spi;
+};
+}

api/mraa/types.h

@@ -0,0 +1,252 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright © 2014 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#pragma once
+
+/** @file
+ *
+ * This file defines the basic shared types for libmraa
+ * this file is different to common.h in that swig takes this as an input
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * MRAA supported platform types
+ */
+typedef enum {
+    MRAA_INTEL_GALILEO_GEN1 = 0,    /**< The Generation 1 Galileo platform (RevD) */
+    MRAA_INTEL_GALILEO_GEN2 = 1,    /**< The Generation 2 Galileo platform (RevG/H) */
+    MRAA_INTEL_EDISON_FAB_C = 2,    /**< The Intel Edison (FAB C) */
+    MRAA_INTEL_DE3815 = 3,          /**< The Intel DE3815 Baytrail NUC */
+    MRAA_INTEL_MINNOWBOARD_MAX = 4, /**< The Intel Minnow Board Max */
+    MRAA_RASPBERRY_PI = 5,          /**< The different Raspberry PI Models -like  A,B,A+,B+ */
+    MRAA_BEAGLEBONE = 6,            /**< The different BeagleBone Black Modes B/C */
+    MRAA_BANANA = 7,                /**< Allwinner A20 based Banana Pi and Banana Pro */
+    MRAA_INTEL_NUC5 = 8,            /**< The Intel 5th generations Broadwell NUCs */
+    MRAA_96BOARDS = 9,            /**< Linaro 96boards */
+    MRAA_INTEL_SOFIA_3GR = 10,      /**< The Intel SoFIA 3GR */
+    MRAA_INTEL_CHERRYHILLS = 11,     /**< The Intel Braswell Cherryhills */
+    MRAA_UP = 12,                    /**< The UP Board */
+    MRAA_INTEL_GT_TUCHUCK = 13,      /**< The Intel GT Tuchuck Board */
+
+    // USB platform extenders start at 256
+    MRAA_FTDI_FT4222 = 256,         /**< FTDI FT4222 USB to i2c bridge */
+
+    // contains bit 9 so is subplatform
+    MRAA_GENERIC_FIRMATA = 1280,    /**< Firmata uart platform/bridge */
+
+    MRAA_MOCK_PLATFORM = 96,        /**< Mock platform, which requires no real hardware */
+    MRAA_JSON_PLATFORM = 97,        /**< User initialised platform from json*/
+    MRAA_NULL_PLATFORM = 98,        /**< Platform with no capabilities that hosts a sub platform  */
+    MRAA_UNKNOWN_PLATFORM =
+    99 /**< An unknown platform type, typically will load INTEL_GALILEO_GEN1 */
+} mraa_platform_t;
+
+/**
+ * Intel edison miniboard numbering enum
+ */
+typedef enum {
+    MRAA_INTEL_EDISON_MINIBOARD_J17_1 = 0,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_5 = 4,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_7 = 6,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_8 = 7,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_9 = 8,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_10 = 9,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_11 = 10,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_12 = 11,
+    MRAA_INTEL_EDISON_MINIBOARD_J17_14 = 13,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_1 = 14,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_2 = 15,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_6 = 19,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_7 = 20,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_8 = 21,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_10 = 23,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_11 = 24,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_12 = 25,
+    MRAA_INTEL_EDISON_MINIBOARD_J18_13 = 26,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_4 = 31,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_5 = 32,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_6 = 33,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_8 = 35,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_9 = 36,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_10 = 37,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_11 = 38,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_12 = 39,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_13 = 40,
+    MRAA_INTEL_EDISON_MINIBOARD_J19_14 = 41,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_3 = 44,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_4 = 45,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_5 = 46,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_6 = 47,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_7 = 48,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_8 = 49,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_9 = 50,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_10 = 51,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_11 = 52,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_12 = 53,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_13 = 54,
+    MRAA_INTEL_EDISON_MINIBOARD_J20_14 = 55
+} mraa_intel_edison_miniboard_t;
+
+/**
+ * Intel Edison raw GPIO numbering enum
+ */
+typedef enum {
+    MRAA_INTEL_EDISON_GP182 = 0,
+    MRAA_INTEL_EDISON_GP135 = 4,
+    MRAA_INTEL_EDISON_GP27 = 6,
+    MRAA_INTEL_EDISON_GP20 = 7,
+    MRAA_INTEL_EDISON_GP28 = 8,
+    MRAA_INTEL_EDISON_GP111 = 0,
+    MRAA_INTEL_EDISON_GP109 = 10,
+    MRAA_INTEL_EDISON_GP115 = 11,
+    MRAA_INTEL_EDISON_GP128 = 13,
+    MRAA_INTEL_EDISON_GP13 = 14,
+    MRAA_INTEL_EDISON_GP165 = 15,
+    MRAA_INTEL_EDISON_GP19 = 19,
+    MRAA_INTEL_EDISON_GP12 = 20,
+    MRAA_INTEL_EDISON_GP183 = 21,
+    MRAA_INTEL_EDISON_GP110 = 23,
+    MRAA_INTEL_EDISON_GP114 = 24,
+    MRAA_INTEL_EDISON_GP129 = 25,
+    MRAA_INTEL_EDISON_GP130 = 26,
+    MRAA_INTEL_EDISON_GP44 = 31,
+    MRAA_INTEL_EDISON_GP46 = 32,
+    MRAA_INTEL_EDISON_GP48 = 33,
+    MRAA_INTEL_EDISON_GP131 = 35,
+    MRAA_INTEL_EDISON_GP14 = 36,
+    MRAA_INTEL_EDISON_GP40 = 37,
+    MRAA_INTEL_EDISON_GP43 = 38,
+    MRAA_INTEL_EDISON_GP77 = 39,
+    MRAA_INTEL_EDISON_GP82 = 40,
+    MRAA_INTEL_EDISON_GP83 = 41,
+    MRAA_INTEL_EDISON_GP134 = 44,
+    MRAA_INTEL_EDISON_GP45 = 45,
+    MRAA_INTEL_EDISON_GP47 = 46,
+    MRAA_INTEL_EDISON_GP49 = 47,
+    MRAA_INTEL_EDISON_GP15 = 48,
+    MRAA_INTEL_EDISON_GP84 = 49,
+    MRAA_INTEL_EDISON_GP42 = 50,
+    MRAA_INTEL_EDISON_GP41 = 51,
+    MRAA_INTEL_EDISON_GP78 = 52,
+    MRAA_INTEL_EDISON_GP79 = 53,
+    MRAA_INTEL_EDISON_GP80 = 54,
+    MRAA_INTEL_EDISON_GP81 = 55
+} mraa_intel_edison_t;
+
+/**
+* Raspberry PI Wiring compatible numbering enum
+*/
+typedef enum {
+    MRAA_RASPBERRY_WIRING_PIN8 = 3,
+    MRAA_RASPBERRY_WIRING_PIN9 = 5,
+    MRAA_RASPBERRY_WIRING_PIN7 = 7,
+    MRAA_RASPBERRY_WIRING_PIN15 = 8,
+    MRAA_RASPBERRY_WIRING_PIN16 = 10,
+    MRAA_RASPBERRY_WIRING_PIN0 = 11,
+    MRAA_RASPBERRY_WIRING_PIN1 = 12,
+    MRAA_RASPBERRY_WIRING_PIN2 = 13,
+    MRAA_RASPBERRY_WIRING_PIN3 = 15,
+    MRAA_RASPBERRY_WIRING_PIN4 = 16,
+    MRAA_RASPBERRY_WIRING_PIN5 = 18,
+    MRAA_RASPBERRY_WIRING_PIN12 = 19,
+    MRAA_RASPBERRY_WIRING_PIN13 = 21,
+    MRAA_RASPBERRY_WIRING_PIN6 = 22,
+    MRAA_RASPBERRY_WIRING_PIN14 = 23,
+    MRAA_RASPBERRY_WIRING_PIN10 = 24,
+    MRAA_RASPBERRY_WIRING_PIN11 = 26,
+    MRAA_RASPBERRY_WIRING_PIN17 = 29, // RPi B V2
+    MRAA_RASPBERRY_WIRING_PIN21 = 29,
+    MRAA_RASPBERRY_WIRING_PIN18 = 30, // RPi B V2
+    MRAA_RASPBERRY_WIRING_PIN19 = 31, // RPI B V2
+    MRAA_RASPBERRY_WIRING_PIN22 = 31,
+    MRAA_RASPBERRY_WIRING_PIN20 = 32, // RPi B V2
+    MRAA_RASPBERRY_WIRING_PIN26 = 32,
+    MRAA_RASPBERRY_WIRING_PIN23 = 33,
+    MRAA_RASPBERRY_WIRING_PIN24 = 35,
+    MRAA_RASPBERRY_WIRING_PIN27 = 36,
+    MRAA_RASPBERRY_WIRING_PIN25 = 37,
+    MRAA_RASPBERRY_WIRING_PIN28 = 38,
+    MRAA_RASPBERRY_WIRING_PIN29 = 40
+} mraa_raspberry_wiring_t;
+
+/**
+ * MRAA return codes
+ */
+typedef enum {
+    MRAA_SUCCESS = 0,                             /**< Expected response */
+    MRAA_ERROR_FEATURE_NOT_IMPLEMENTED = 1,       /**< Feature TODO */
+    MRAA_ERROR_FEATURE_NOT_SUPPORTED = 2,         /**< Feature not supported by HW */
+    MRAA_ERROR_INVALID_VERBOSITY_LEVEL = 3,       /**< Verbosity level wrong */
+    MRAA_ERROR_INVALID_PARAMETER = 4,             /**< Parameter invalid */
+    MRAA_ERROR_INVALID_HANDLE = 5,                /**< Handle invalid */
+    MRAA_ERROR_NO_RESOURCES = 6,                  /**< No resource of that type avail */
+    MRAA_ERROR_INVALID_RESOURCE = 7,              /**< Resource invalid */
+    MRAA_ERROR_INVALID_QUEUE_TYPE = 8,            /**< Queue type incorrect */
+    MRAA_ERROR_NO_DATA_AVAILABLE = 9,             /**< No data available */
+    MRAA_ERROR_INVALID_PLATFORM = 10,             /**< Platform not recognised */
+    MRAA_ERROR_PLATFORM_NOT_INITIALISED = 11,     /**< Board information not initialised */
+    MRAA_ERROR_UART_OW_SHORTED = 12,              /**< UART OW Short Circuit Detected*/
+    MRAA_ERROR_UART_OW_NO_DEVICES = 13,           /**< UART OW No devices detected */
+    MRAA_ERROR_UART_OW_DATA_ERROR = 14,           /**< UART OW Data/Bus error detected */
+
+    MRAA_ERROR_UNSPECIFIED = 99 /**< Unknown Error */
+} mraa_result_t;
+
+/**
+ * Enum representing different possible modes for a pin.
+ */
+typedef enum {
+    MRAA_PIN_VALID = 0,     /**< Pin Valid */
+    MRAA_PIN_GPIO = 1,      /**< General Purpose IO */
+    MRAA_PIN_PWM = 2,       /**< Pulse Width Modulation */
+    MRAA_PIN_FAST_GPIO = 3, /**< Faster GPIO */
+    MRAA_PIN_SPI = 4,       /**< SPI */
+    MRAA_PIN_I2C = 5,       /**< I2C */
+    MRAA_PIN_AIO = 6,       /**< Analog in */
+    MRAA_PIN_UART = 7       /**< UART */
+} mraa_pinmodes_t;
+
+/**
+ * Enum reprensenting different i2c speeds/modes
+ */
+typedef enum {
+    MRAA_I2C_STD = 0,  /**< up to 100Khz */
+    MRAA_I2C_FAST = 1, /**< up to 400Khz */
+    MRAA_I2C_HIGH = 2  /**< up to 3.4Mhz */
+} mraa_i2c_mode_t;
+
+typedef enum {
+	MRAA_UART_PARITY_NONE = 0,
+	MRAA_UART_PARITY_EVEN = 1,
+	MRAA_UART_PARITY_ODD = 2,
+	MRAA_UART_PARITY_MARK = 3,
+	MRAA_UART_PARITY_SPACE = 4
+} mraa_uart_parity_t;
+
+#ifdef __cplusplus
+}
+#endif

api/mraa/types.hpp

@@ -0,0 +1,247 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright © 2014 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#pragma once
+
+/** @file
+ *
+ * This file defines the basic shared types for libmraa
+ * this file is different to common.h in that swig takes this as an input
+ */
+
+namespace mraa
+{
+
+//These enums must match the enums in types.h
+
+/**
+ * MRAA supported platform types
+ */
+typedef enum {
+    INTEL_GALILEO_GEN1 = 0,    /**< The Generation 1 Galileo platform (RevD) */
+    INTEL_GALILEO_GEN2 = 1,    /**< The Generation 2 Galileo platform (RevG/H) */
+    INTEL_EDISON_FAB_C = 2,    /**< The Intel Edison (FAB C) */
+    INTEL_DE3815 = 3,          /**< The Intel DE3815 Baytrail NUC */
+    INTEL_MINNOWBOARD_MAX = 4, /**< The Intel Minnow Board Max */
+    RASPBERRY_PI = 5,          /**< The different Raspberry PI Models -like  A,B,A+,B+ */
+    BEAGLEBONE = 6,            /**< The different BeagleBone Black Modes B/C */
+    BANANA = 7,                /**< Allwinner A20 based Banana Pi and Banana Pro */
+    INTEL_NUC5 = 8,            /**< The Intel 5th generations Broadwell NUCs */
+    A96BOARDS = 9,             /**< Linaro 96boards, A prefix for 'ARM' since not allowed numerical */
+    INTEL_SOFIA_3GR = 10,      /**< The Intel SoFIA 3GR */
+    INTEL_CHERRYHILLS = 11,    /**< The Intel Braswell Cherryhills */
+    INTEL_UP = 12,             /**< The UP Board */
+    INTEL_GT_TUCHUCK = 13,     /**< The Intel GT Board */
+
+    FTDI_FT4222 = 256,         /**< FTDI FT4222 USB to i2c bridge */
+
+    GENERIC_FIRMATA = 1280,    /**< Firmata uart platform/bridge */
+
+    NULL_PLATFORM = 98,
+    UNKNOWN_PLATFORM =
+    99 /**< An unknown platform type, typically will load INTEL_GALILEO_GEN1 */
+} Platform;
+
+/**
+ * Intel edison miniboard numbering enum
+ */
+typedef enum {
+    INTEL_EDISON_MINIBOARD_J17_1 = 0,
+    INTEL_EDISON_MINIBOARD_J17_5 = 4,
+    INTEL_EDISON_MINIBOARD_J17_7 = 6,
+    INTEL_EDISON_MINIBOARD_J17_8 = 7,
+    INTEL_EDISON_MINIBOARD_J17_9 = 8,
+    INTEL_EDISON_MINIBOARD_J17_10 = 9,
+    INTEL_EDISON_MINIBOARD_J17_11 = 10,
+    INTEL_EDISON_MINIBOARD_J17_12 = 11,
+    INTEL_EDISON_MINIBOARD_J17_14 = 13,
+    INTEL_EDISON_MINIBOARD_J18_1 = 14,
+    INTEL_EDISON_MINIBOARD_J18_2 = 15,
+    INTEL_EDISON_MINIBOARD_J18_6 = 19,
+    INTEL_EDISON_MINIBOARD_J18_7 = 20,
+    INTEL_EDISON_MINIBOARD_J18_8 = 21,
+    INTEL_EDISON_MINIBOARD_J18_10 = 23,
+    INTEL_EDISON_MINIBOARD_J18_11 = 24,
+    INTEL_EDISON_MINIBOARD_J18_12 = 25,
+    INTEL_EDISON_MINIBOARD_J18_13 = 26,
+    INTEL_EDISON_MINIBOARD_J19_4 = 31,
+    INTEL_EDISON_MINIBOARD_J19_5 = 32,
+    INTEL_EDISON_MINIBOARD_J19_6 = 33,
+    INTEL_EDISON_MINIBOARD_J19_8 = 35,
+    INTEL_EDISON_MINIBOARD_J19_9 = 36,
+    INTEL_EDISON_MINIBOARD_J19_10 = 37,
+    INTEL_EDISON_MINIBOARD_J19_11 = 38,
+    INTEL_EDISON_MINIBOARD_J19_12 = 39,
+    INTEL_EDISON_MINIBOARD_J19_13 = 40,
+    INTEL_EDISON_MINIBOARD_J19_14 = 41,
+    INTEL_EDISON_MINIBOARD_J20_3 = 44,
+    INTEL_EDISON_MINIBOARD_J20_4 = 45,
+    INTEL_EDISON_MINIBOARD_J20_5 = 46,
+    INTEL_EDISON_MINIBOARD_J20_6 = 47,
+    INTEL_EDISON_MINIBOARD_J20_7 = 48,
+    INTEL_EDISON_MINIBOARD_J20_8 = 49,
+    INTEL_EDISON_MINIBOARD_J20_9 = 50,
+    INTEL_EDISON_MINIBOARD_J20_10 = 51,
+    INTEL_EDISON_MINIBOARD_J20_11 = 52,
+    INTEL_EDISON_MINIBOARD_J20_12 = 53,
+    INTEL_EDISON_MINIBOARD_J20_13 = 54,
+    INTEL_EDISON_MINIBOARD_J20_14 = 55
+} IntelEdisonMiniboard;
+
+/**
+ * Intel Edison raw GPIO numbering enum
+ */
+typedef enum {
+    INTEL_EDISON_GP182 = 0,
+    INTEL_EDISON_GP135 = 4,
+    INTEL_EDISON_GP27 = 6,
+    INTEL_EDISON_GP20 = 7,
+    INTEL_EDISON_GP28 = 8,
+    INTEL_EDISON_GP111 = 0,
+    INTEL_EDISON_GP109 = 10,
+    INTEL_EDISON_GP115 = 11,
+    INTEL_EDISON_GP128 = 13,
+    INTEL_EDISON_GP13 = 14,
+    INTEL_EDISON_GP165 = 15,
+    INTEL_EDISON_GP19 = 19,
+    INTEL_EDISON_GP12 = 20,
+    INTEL_EDISON_GP183 = 21,
+    INTEL_EDISON_GP110 = 23,
+    INTEL_EDISON_GP114 = 24,
+    INTEL_EDISON_GP129 = 25,
+    INTEL_EDISON_GP130 = 26,
+    INTEL_EDISON_GP44 = 31,
+    INTEL_EDISON_GP46 = 32,
+    INTEL_EDISON_GP48 = 33,
+    INTEL_EDISON_GP131 = 35,
+    INTEL_EDISON_GP14 = 36,
+    INTEL_EDISON_GP40 = 37,
+    INTEL_EDISON_GP43 = 38,
+    INTEL_EDISON_GP77 = 39,
+    INTEL_EDISON_GP82 = 40,
+    INTEL_EDISON_GP83 = 41,
+    INTEL_EDISON_GP134 = 44,
+    INTEL_EDISON_GP45 = 45,
+    INTEL_EDISON_GP47 = 46,
+    INTEL_EDISON_GP49 = 47,
+    INTEL_EDISON_GP15 = 48,
+    INTEL_EDISON_GP84 = 49,
+    INTEL_EDISON_GP42 = 50,
+    INTEL_EDISON_GP41 = 51,
+    INTEL_EDISON_GP78 = 52,
+    INTEL_EDISON_GP79 = 53,
+    INTEL_EDISON_GP80 = 54,
+    INTEL_EDISON_GP81 = 55
+} IntelEdison;
+
+/**
+* Raspberry PI Wiring compatible numbering enum
+*/
+typedef enum {
+    RASPBERRY_WIRING_PIN8 = 3,
+    RASPBERRY_WIRING_PIN9 = 5,
+    RASPBERRY_WIRING_PIN7 = 7,
+    RASPBERRY_WIRING_PIN15 = 8,
+    RASPBERRY_WIRING_PIN16 = 10,
+    RASPBERRY_WIRING_PIN0 = 11,
+    RASPBERRY_WIRING_PIN1 = 12,
+    RASPBERRY_WIRING_PIN2 = 13,
+    RASPBERRY_WIRING_PIN3 = 15,
+    RASPBERRY_WIRING_PIN4 = 16,
+    RASPBERRY_WIRING_PIN5 = 18,
+    RASPBERRY_WIRING_PIN12 = 19,
+    RASPBERRY_WIRING_PIN13 = 21,
+    RASPBERRY_WIRING_PIN6 = 22,
+    RASPBERRY_WIRING_PIN14 = 23,
+    RASPBERRY_WIRING_PIN10 = 24,
+    RASPBERRY_WIRING_PIN11 = 26,
+    RASPBERRY_WIRING_PIN17 = 29, // RPi B V2
+    RASPBERRY_WIRING_PIN21 = 29,
+    RASPBERRY_WIRING_PIN18 = 30, // RPi B V2
+    RASPBERRY_WIRING_PIN19 = 31, // RPI B V2
+    RASPBERRY_WIRING_PIN22 = 31,
+    RASPBERRY_WIRING_PIN20 = 32, // RPi B V2
+    RASPBERRY_WIRING_PIN26 = 32,
+    RASPBERRY_WIRING_PIN23 = 33,
+    RASPBERRY_WIRING_PIN24 = 35,
+    RASPBERRY_WIRING_PIN27 = 36,
+    RASPBERRY_WIRING_PIN25 = 37,
+    RASPBERRY_WIRING_PIN28 = 38,
+    RASPBERRY_WIRING_PIN29 = 40
+} RaspberryWiring;
+
+/**
+ * MRAA return codes
+ */
+typedef enum {
+    SUCCESS = 0,                             /**< Expected response */
+    ERROR_FEATURE_NOT_IMPLEMENTED = 1,       /**< Feature TODO */
+    ERROR_FEATURE_NOT_SUPPORTED = 2,         /**< Feature not supported by HW */
+    ERROR_INVALID_VERBOSITY_LEVEL = 3,       /**< Verbosity level wrong */
+    ERROR_INVALID_PARAMETER = 4,             /**< Parameter invalid */
+    ERROR_INVALID_HANDLE = 5,                /**< Handle invalid */
+    ERROR_NO_RESOURCES = 6,                  /**< No resource of that type avail */
+    ERROR_INVALID_RESOURCE = 7,              /**< Resource invalid */
+    ERROR_INVALID_QUEUE_TYPE = 8,            /**< Queue type incorrect */
+    ERROR_NO_DATA_AVAILABLE = 9,             /**< No data available */
+    ERROR_INVALID_PLATFORM = 10,             /**< Platform not recognised */
+    ERROR_PLATFORM_NOT_INITIALISED = 11,     /**< Board information not initialised */
+    ERROR_UART_OW_SHORTED = 12,              /**< UART OW Short Circuit Detected*/
+    ERROR_UART_OW_NO_DEVICES = 13,           /**< UART OW No devices detected */
+    ERROR_UART_OW_DATA_ERROR = 14,           /**< UART OW Data/Bus error detected */
+
+    ERROR_UNSPECIFIED = 99 /**< Unknown Error */
+} Result;
+
+/**
+ * Enum representing different possible modes for a pin.
+ */
+typedef enum {
+    PIN_VALID = 0,     /**< Pin Valid */
+    PIN_GPIO = 1,      /**< General Purpose IO */
+    PIN_PWM = 2,       /**< Pulse Width Modulation */
+    PIN_FAST_GPIO = 3, /**< Faster GPIO */
+    PIN_SPI = 4,       /**< SPI */
+    PIN_I2C = 5,       /**< I2C */
+    PIN_AIO = 6,       /**< Analog in */
+    PIN_UART = 7       /**< UART */
+} Pinmodes;
+
+/**
+ * Enum reprensenting different i2c speeds/modes
+ */
+typedef enum {
+    I2C_STD = 0,  /**< up to 100Khz */
+    I2C_FAST = 1, /**< up to 400Khz */
+    I2C_HIGH = 2  /**< up to 3.4Mhz */
+} I2cMode;
+
+typedef enum {
+    UART_PARITY_NONE = 0,
+    UART_PARITY_EVEN = 1,
+    UART_PARITY_ODD = 2,
+    UART_PARITY_MARK = 3,
+    UART_PARITY_SPACE = 4
+} UartParity;
+
+}

api/mraa/uart.h

@@ -0,0 +1,178 @@
+/*
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Contributions: Jon Trulson <jtrulson@ics.com>
+ *                Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014 - 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+/**
+ * @file
+ * @brief UART module
+ *
+ * UART is the Universal asynchronous receiver/transmitter interface to
+ * libmraa. It allows the exposure of UART pins on supported boards.
+ * With functionality to expand at a later date.
+ *
+ * @snippet uart.c Interesting
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdio.h>
+
+#include "common.h"
+
+typedef struct _uart* mraa_uart_context;
+
+/**
+ * Initialise uart_context, uses board mapping
+ *
+ * @param uart the index of the uart set to use
+ * @return uart context or NULL
+ */
+mraa_uart_context mraa_uart_init(int uart);
+
+/**
+ * Initialise a raw uart_context. No board setup.
+ *
+ * @param path for example "/dev/ttyS0"
+ * @return uart context or NULL
+ */
+mraa_uart_context mraa_uart_init_raw(const char* path);
+
+/**
+ * Flush the outbound data.
+ * Blocks until complete.
+ *
+ * @param dev The UART context
+ * @return Result of operation
+ */
+mraa_result_t mraa_uart_flush(mraa_uart_context dev);
+
+/**
+ * Set the baudrate.
+ * Takes an int and will attempt to decide what baudrate  is
+ * to be used on the UART hardware.
+ *
+ * @param dev The UART context
+ * @param baud unsigned int of baudrate i.e. 9600
+ * @return Result of operation
+ */
+mraa_result_t mraa_uart_set_baudrate(mraa_uart_context dev, unsigned int baud);
+
+/**
+ * Set the transfer mode
+ * For example setting the mode to 8N1 would be
+ * "mraa_uart_set_mode(dev, 8,MRAA_UART_PARITY_NONE , 1)"
+ *
+ * @param dev The UART context
+ * @param bytesize data bits
+ * @param parity Parity bit setting
+ * @param stopbits stop bits
+ * @return Result of operation
+ */
+mraa_result_t mraa_uart_set_mode(mraa_uart_context dev, int bytesize, mraa_uart_parity_t parity, int stopbits);
+
+/**
+ * Set the flowcontrol
+ *
+ * @param dev The UART context
+ * @param xonxoff XON/XOFF Software flow control.
+ * @param rtscts RTS/CTS out of band hardware flow control
+ * @return Result of operation
+ */
+mraa_result_t mraa_uart_set_flowcontrol(mraa_uart_context dev, mraa_boolean_t xonxoff, mraa_boolean_t rtscts);
+
+/**
+ * Set the timeout for read and write operations
+ * <= 0 will disable that timeout
+ *
+ * @param dev The UART context
+ * @param read read timeout
+ * @param write write timeout
+ * @param interchar inbetween char timeout
+ * @return Result of operation
+ */
+mraa_result_t mraa_uart_set_timeout(mraa_uart_context dev, int read, int write, int interchar);
+
+/**
+ * Set the blocking state for write operations
+ *
+ * @param dev The UART context
+ * @param nonblock new nonblocking state
+ * @return Result of operation
+ */
+mraa_result_t mraa_uart_set_non_blocking(mraa_uart_context dev, mraa_boolean_t nonblock);
+
+/**
+ * Get Char pointer with tty device path within Linux
+ * For example. Could point to "/dev/ttyS0"
+ *
+ * @param dev uart context
+ * @return char pointer of device path
+ */
+const char* mraa_uart_get_dev_path(mraa_uart_context dev);
+
+/**
+ * Destroy a mraa_uart_context
+ *
+ * @param dev uart context
+ * @return mraa_result_t
+ */
+mraa_result_t mraa_uart_stop(mraa_uart_context dev);
+
+/**
+ * Read bytes from the device into a buffer
+ *
+ * @param dev uart context
+ * @param buf buffer pointer
+ * @param length maximum size of buffer
+ * @return the number of bytes read, or -1 if an error occurred
+ */
+int mraa_uart_read(mraa_uart_context dev, char* buf, size_t length);
+
+/**
+ * Write bytes in buffer to a device
+ *
+ * @param dev uart context
+ * @param buf buffer pointer
+ * @param length maximum size of buffer
+ * @return the number of bytes written, or -1 if an error occurred
+ */
+int mraa_uart_write(mraa_uart_context dev, const char* buf, size_t length);
+
+/**
+ * Check to see if data is available on the device for reading
+ *
+ * @param dev uart context
+ * @param millis number of milliseconds to wait, or 0 to return immediately
+ * @return 1 if there is data available to read, 0 otherwise
+ */
+mraa_boolean_t mraa_uart_data_available(mraa_uart_context dev, unsigned int millis);
+
+#ifdef __cplusplus
+}
+#endif

api/mraa/uart.hpp

@@ -0,0 +1,274 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Contributions: Jon Trulson <jtrulson@ics.com>
+ * Contributions: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 - 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include "uart.h"
+#include "types.hpp"
+#include <stdlib.h>
+#include <stdexcept>
+#include <cstring>
+
+namespace mraa
+{
+
+/**
+ * @brief API to UART (enabling only)
+ *
+ * This file defines the UART interface for libmraa
+ *
+ * @snippet Uart-example.cpp Interesting
+ */
+class Uart
+{
+  public:
+    /**
+     * Uart Constructor, takes a pin number which will map directly to the
+     * linux uart number, this 'enables' the uart, nothing more
+     *
+     * @param uart the index of the uart set to use
+     */
+    Uart(int uart)
+    {
+        m_uart = mraa_uart_init(uart);
+
+        if (m_uart == NULL) {
+            throw std::invalid_argument("Error initialising UART");
+        }
+    }
+
+    /**
+     * Uart Constructor, takes a string to the path of the serial
+     * interface that is needed.
+     *
+     * @param uart the index of the uart set to use
+     */
+    Uart(std::string path)
+    {
+        m_uart = mraa_uart_init_raw(path.c_str());
+
+        if (m_uart == NULL) {
+            throw std::invalid_argument("Error initialising UART");
+        }
+    }
+
+    /**
+     * Uart Constructor, takes a pointer to the UART context and initialises
+     * the UART class
+     *
+     * @param void * to a UART context
+     */
+    Uart(void* uart_context)
+    {
+        m_uart = (mraa_uart_context) uart_context;
+
+        if (m_uart == NULL) {
+            throw std::invalid_argument("Invalid UART context");
+        }
+    }
+    /**
+     * Uart destructor
+     */
+    ~Uart()
+    {
+        mraa_uart_stop(m_uart);
+    }
+
+    /**
+     * Get string with tty device path within Linux
+     * For example. Could point to "/dev/ttyS0"
+     *
+     * @return char pointer of device path
+     */
+    std::string
+    getDevicePath()
+    {
+        std::string ret_val(mraa_uart_get_dev_path(m_uart));
+        return ret_val;
+    }
+
+    /**
+     * Read bytes from the device into char* buffer
+     *
+     * @param data buffer pointer
+     * @param length maximum size of buffer
+     * @return numbers of bytes read
+     */
+    int
+    read(char* data, int length)
+    {
+        return mraa_uart_read(m_uart, data, (size_t) length);
+    }
+
+    /**
+     * Write bytes in String object to a device
+     *
+     * @param data buffer pointer
+     * @param length maximum size of buffer
+     * @return the number of bytes written, or -1 if an error occurred
+     */
+    int
+    write(const char* data, int length)
+    {
+        return mraa_uart_write(m_uart, data, (size_t) length);
+    }
+
+    /**
+     * Read bytes from the device into a String object
+     *
+     * @param length to read
+     * @throws std::bad_alloc If there is no space left for read.
+     * @return string of data
+     */
+    std::string
+    readStr(int length)
+    {
+        char* data = (char*) malloc(sizeof(char) * length);
+        if (data == NULL) {
+            throw std::bad_alloc();
+        }
+
+        int v = mraa_uart_read(m_uart, data, (size_t) length);
+        std::string ret(data, v);
+        free(data);
+        return ret;
+    }
+
+    /**
+     * Write bytes in String object to a device
+     *
+     * @param string to write
+     * @return the number of bytes written, or -1 if an error occurred
+     */
+    int
+    writeStr(std::string data)
+    {
+        // this is data.length() not +1 because we want to avoid the '\0' char
+        return mraa_uart_write(m_uart, data.c_str(), (data.length()));
+    }
+
+    /**
+     * Check to see if data is available on the device for reading
+     *
+     * @param millis number of milliseconds to wait, or 0 to return immediately
+     * @return true if there is data available to read, false otherwise
+     */
+    bool
+    dataAvailable(unsigned int millis = 0)
+    {
+        if (mraa_uart_data_available(m_uart, millis))
+            return true;
+        else
+            return false;
+    }
+
+    /**
+     * Flush the outbound data.
+     * Blocks until complete.
+     *
+     * @return Result of operation
+     */
+    Result
+    flush()
+    {
+        return (Result) mraa_uart_flush(m_uart);
+    }
+
+    /**
+     * Set the baudrate.
+     * Takes an int and will attempt to decide what baudrate  is
+     * to be used on the UART hardware.
+     *
+     * @param baud unsigned int of baudrate i.e. 9600
+     * @return Result of operation
+     */
+    Result
+    setBaudRate(unsigned int baud)
+    {
+        return (Result) mraa_uart_set_baudrate(m_uart, baud);
+    }
+
+    /**
+     * Set the transfer mode
+     * For example setting the mode to 8N1 would be
+     * "dev.setMode(8,UART_PARITY_NONE , 1)"
+     *
+     * @param bytesize data bits
+     * @param parity Parity bit setting
+     * @param stopbits stop bits
+     * @return Result of operation
+     */
+    Result
+    setMode(int bytesize, UartParity parity, int stopbits)
+    {
+        return (Result) mraa_uart_set_mode(m_uart, bytesize, (mraa_uart_parity_t) parity, stopbits);
+    }
+
+    /**
+     * Set the flowcontrol
+     *
+     * @param xonxoff XON/XOFF Software flow control.
+     * @param rtscts RTS/CTS out of band hardware flow control
+     * @return Result of operation
+     */
+    Result
+    setFlowcontrol(bool xonxoff, bool rtscts)
+    {
+        return (Result) mraa_uart_set_flowcontrol(m_uart, xonxoff, rtscts);
+    }
+
+    /**
+     * Set the timeout for read and write operations
+     * <= 0 will disable that timeout
+     *
+     * @param read read timeout
+     * @param write write timeout
+     * @param interchar inbetween char timeout
+     * @return Result of operation
+     */
+    Result
+    setTimeout(int read, int write, int interchar)
+    {
+        return (Result) mraa_uart_set_timeout(m_uart, read, write, interchar);
+    }
+
+    /**
+     * Set the blocking state for write operations
+     *
+     * @param dev The UART context
+     * @param nonblock new nonblocking state
+     * @return Result of operation
+     */
+    Result
+    SetNonBlocking(bool nonblock)
+    {
+        return (Result) mraa_uart_set_non_blocking(m_uart, nonblock);
+    }
+
+  private:
+    mraa_uart_context m_uart;
+};
+}

api/mraa/uart_ow.h

@@ -0,0 +1,197 @@
+/*
+ * Author: Jon Trulson <jtrulson@ics.com>
+ * Copyright (c) 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+/**
+ * @file
+ * @brief UART OW module
+ *
+ * This module allows one to use MRAA's UART support in order to
+ * interact with Dallas 1-wire compliant devices on a 1-wire bus.  It
+ * makes use of the UART for timing purposes.  The principle of
+ * operation is described here:
+ * https://www.maximintegrated.com/en/app-notes/index.mvp/id/214
+ *
+ * It is important the you use a UART with CMOS/TTL level voltages
+ * (3.3v/5v) RX and TX lines.  DO NOT use standard RS232 level
+ * voltages, or you are going to have a bad day.
+ *
+ * In addition, a diode should be placed across the RX and
+ * TX lines like so:
+ *
+ * -|
+ * U|
+ * A| TX---|<--+
+ * R|          |
+ * T| RX-------o--------o 1-wire data bus
+ * -|
+ *
+ * The diode on TX is a 1N4148 (cheap and common), with the cathode
+ * connected to TX, and the anode connected to RX and the rest of the
+ * 1-wire data line.
+ *
+ * @snippet uart_ow.c Interesting
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdio.h>
+
+#include "common.h"
+#include "uart.h"
+
+/* for now, we simply use the normal MRAA UART context */
+typedef struct _mraa_uart_ow {
+    mraa_uart_context uart;
+    /* search state */
+    unsigned char ROM_NO[8]; /* 8 byte (64b) rom code */
+    int LastDiscrepancy;
+    int LastFamilyDiscrepancy;
+    mraa_boolean_t LastDeviceFlag;
+} *mraa_uart_ow_context;
+
+/* 8 bytes (64 bits) for a device rom code */
+static const int MRAA_UART_OW_ROMCODE_SIZE = 8;
+
+/**
+ * UART One Wire ROM related Command bytes
+ */
+typedef enum {
+    MRAA_UART_OW_CMD_READ_ROM = 0x33,         /**< read rom, when only one device on bus */
+    MRAA_UART_OW_CMD_MATCH_ROM = 0x55,        /**< match a specific rom code */
+    MRAA_UART_OW_CMD_SKIP_ROM = 0xcc,         /**< skip match/search rom */
+    MRAA_UART_OW_CMD_SEARCH_ROM_ALARM = 0xec, /**< search all roms in alarm state */
+    MRAA_UART_OW_CMD_SEARCH_ROM = 0xf0        /**< search all rom codes */
+} mraa_uart_ow_rom_cmd_t;
+
+/**
+ * Initialise uart_ow_context, uses UART board mapping
+ *
+ * @param uart the index of the uart set to use
+ * @return uart_ow context or NULL
+ */
+mraa_uart_ow_context mraa_uart_ow_init(int uart);
+
+/**
+ * Initialise a raw uart_ow_context. No board setup.
+ *
+ * @param path for example "/dev/ttyS0"
+ * @return uart_ow context or NULL
+ */
+mraa_uart_ow_context mraa_uart_ow_init_raw(const char* path);
+
+/**
+ * Get char pointer with tty device path within Linux
+ * For example. Could point to "/dev/ttyS0"
+ *
+ * @param dev uart_ow context
+ * @return char pointer of device path
+ */
+const char* mraa_uart_ow_get_dev_path(mraa_uart_ow_context dev);
+
+/**
+ * Destroy a mraa_uart_ow_context
+ *
+ * @param dev uart_ow context
+ * @return mraa_result_t
+ */
+mraa_result_t mraa_uart_ow_stop(mraa_uart_ow_context dev);
+
+/**
+ * Read a byte from the 1-wire bus
+ *
+ * @param dev uart_ow context
+ * @return the byte read or -1 for error
+ */
+int mraa_uart_ow_read_byte(mraa_uart_ow_context dev);
+
+/**
+ * Write a byte to a 1-wire bus
+ *
+ * @param dev uart_ow context
+ * @param byte the byte to write to the bus
+ * @return the byte read back during the time slot or -1 for error
+ */
+int mraa_uart_ow_write_byte(mraa_uart_ow_context dev, uint8_t byte);
+
+/**
+ * Write a bit to a 1-wire bus and read a bit corresponding to the
+ * time slot back.  This is possible due to the way we wired the TX
+ * and RX together with a diode, forming a loopback.
+ *
+ * @param dev uart_ow context
+ * @param bit the bit to write to the bus
+ * @return the bit read back during the time slot or -1 for error
+ */
+int mraa_uart_ow_bit(mraa_uart_ow_context dev, uint8_t bit);
+
+/**
+ * Send a reset pulse to the 1-wire bus and test for device presence
+ *
+ * @param dev uart_ow context
+ * @return one of the mraa_result_t values
+ */
+mraa_result_t mraa_uart_ow_reset(mraa_uart_ow_context dev);
+
+/**
+ * Begin a rom code search of the 1-wire bus.  This function
+ * implements the 1-wire search algorithm.  See the uart_ow.c example
+ * for an idea on how to use this function to identify all devices
+ * present on the bus.
+ *
+ * @param dev uart_ow context
+ * @param start true to start a new search from scratch, false to
+ * continue an existing search
+ * @param id the 8-byte rom code id of the current matched device when
+ * a device is found
+ * @return one of the mraa_result_t values
+ */
+mraa_result_t mraa_uart_ow_rom_search(mraa_uart_ow_context dev, mraa_boolean_t start, uint8_t* id);
+
+/**
+ * Send a command byte to a device on the 1-wire bus
+ *
+ * @param dev uart_ow context
+ * @param command the command byte to send
+ * @param id the rom code id of the device to receive the command,
+ * NULL for all devices on the bus
+ * @return one of the mraa_result_t values
+ */
+mraa_result_t mraa_uart_ow_command(mraa_uart_ow_context dev, uint8_t command, uint8_t* id);
+
+/**
+ * Perform a Dallas 1-wire compliant CRC8 computation on a buffer
+ *
+ * @param buffer the buffer containing the data
+ * @param length the length of the buffer
+ * @return the computed CRC
+ */
+uint8_t mraa_uart_ow_crc8(uint8_t* buffer, uint16_t length);
+
+#ifdef __cplusplus
+}
+#endif

api/mraa/uart_ow.hpp

@@ -0,0 +1,277 @@
+/*
+ * Author: Jon Trulson <jtrulson@ics.com>
+ * Copyright (c) 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include "uart_ow.h"
+#include "types.hpp"
+#include <stdexcept>
+#include <cstring>
+
+namespace mraa
+{
+
+/**
+ * @brief API for UART One Wire
+ *
+ * This file defines the UartOW (UART to Dallas 1-wire) interface for libmraa
+ *
+ * @snippet UartOW.cpp Interesting
+ */
+class UartOW
+{
+  public:
+    /**
+     * UartOW Constructor, takes a pin number which will map directly to the
+     * linux uart number, this 'enables' the uart, nothing more
+     *
+     * @throws std::invalid_argument in case of error
+     * @param uart the index of the uart to use
+     */
+    UartOW(int uart)
+    {
+        m_uart = mraa_uart_ow_init(uart);
+
+        if (m_uart == NULL) {
+            throw std::invalid_argument("Error initialising UART_OW");
+        }
+    }
+
+    /**
+     * UartOW Constructor, takes a string to the path of the serial
+     * interface that is needed.
+     *
+     * @throws std::invalid_argument in case of error
+     * @param path the file path for the UART to use
+     */
+    UartOW(std::string path)
+    {
+        m_uart = mraa_uart_ow_init_raw(path.c_str());
+
+        if (m_uart == NULL) {
+            throw std::invalid_argument("Error initialising UART");
+        }
+    }
+
+    /**
+     * Uart destructor
+     */
+    ~UartOW()
+    {
+        mraa_uart_ow_stop(m_uart);
+    }
+
+    /**
+     * Get string with tty device path within Linux
+     * For example. Could point to "/dev/ttyS0"
+     *
+     * @return char pointer of device path
+     */
+    std::string
+    getDevicePath()
+    {
+        std::string ret_val(mraa_uart_ow_get_dev_path(m_uart));
+        return ret_val;
+    }
+
+    /**
+     * Read a byte from the 1-wire bus
+     *
+     * @throws std::invalid_argument in case of error
+     * @return the byte read
+     */
+    uint8_t
+    readByte()
+    {
+        int res = mraa_uart_ow_read_byte(m_uart);
+        if (res == -1) {
+            throw std::invalid_argument("Unknown UART_OW error");
+        }
+        return (uint8_t) res;
+    }
+
+    /**
+     * Write a byte to a 1-wire bus
+     *
+     * @param byte the byte to write to the bus
+     *
+     * @throws std::invalid_argument in case of error
+     * @return the byte read back during the time slot
+     */
+    uint8_t
+    writeByte(uint8_t byte)
+    {
+        int res = mraa_uart_ow_write_byte(m_uart, byte);
+        if (res == -1) {
+            throw std::invalid_argument("Unknown UART_OW error");
+        }
+        return (uint8_t) res;
+    }
+
+    /**
+     * Write a bit to a 1-wire bus and read a bit corresponding to the
+     * time slot back.  This is possible due to the way we wired the TX
+     * and RX together with a diode, forming a loopback.
+     *
+     * @param bit the bit to write to the bus
+     * @throws std::invalid_argument in case of error
+     * @return the bit read back during the time slot
+     */
+    bool
+    writeBit(bool bit)
+    {
+        int res = mraa_uart_ow_bit(m_uart, (bit) ? 1 : 0);
+        if (res == -1) {
+            throw std::invalid_argument("Unknown UART_OW error");
+        }
+        return ((res) ? true : false);
+    }
+
+    /**
+     * Send a reset pulse to the 1-wire bus and test for device presence
+     *
+     * @return one of the mraa::Result values
+     */
+    mraa::Result
+    reset()
+    {
+        return (mraa::Result) mraa_uart_ow_reset(m_uart);
+    }
+
+    /**
+     * Begin a rom code search of the 1-wire bus.  This function
+     * implements the 1-wire search algorithm.  See the uart_ow.c example
+     * for an idea on how to use this function to identify all devices
+     * present on the bus.
+     *
+     * @param start true to start a search from scratch, false to
+     * continue a previously started search
+     * @param id the 8-byte rom code id of the current matched device when a
+     * device is found
+     * @return one of the mraa::Result values
+     */
+    mraa::Result
+    search(bool start, uint8_t* id)
+    {
+        return (mraa::Result) mraa_uart_ow_rom_search(m_uart, (start) ? 1 : 0, id);
+    }
+
+    /**
+     * Begin a rom code search of the 1-wire bus.  This function
+     * implements the 1-wire search algorithm.  See the UartOW.cpp
+     * example for an idea on how to use this function to identify all
+     * devices present on the bus.
+     *
+     * @param start true to start a search from scratch, false to
+     * continue a previously started search
+     * @return an empty string if no [more] devices are found, or a
+     * string containing the 8-byte romcode of a detected device.
+     */
+    std::string
+    search(bool start)
+    {
+        uint8_t id[MRAA_UART_OW_ROMCODE_SIZE];
+        mraa_result_t rv;
+
+        rv = mraa_uart_ow_rom_search(m_uart, (start) ? 1 : 0, id);
+
+        if (rv == MRAA_SUCCESS) {
+            // we found one
+            std::string idStr((char*) id, MRAA_UART_OW_ROMCODE_SIZE);
+            return idStr;
+        } else {
+            // failure, or end of search
+            return "";
+        }
+    }
+
+    /**
+     * Send a command byte to a device on the 1-wire bus
+     *
+     * @param command the command byte to send
+     * @param id the rom code id of the device to receive the command,
+     * NULL for all devices on the bus
+     * @return one of the mraa::Result values
+     */
+    mraa::Result
+    command(uint8_t command, uint8_t* id)
+    {
+        return (mraa::Result) mraa_uart_ow_command(m_uart, command, id);
+    }
+
+    /**
+     * Send a command byte to a device on the 1-wire bus, supplying
+     * the id as a std::string
+     *
+     * @param command the command byte to send
+     * @param id std::string representing the code id of the device to
+     * receive the command, or an empty string for all devices on the
+     * bus.  This string should be 8 bytes in size.
+     * @return one of the mraa::Result values
+     */
+    mraa::Result
+    command(uint8_t command, std::string id)
+    {
+        if (id.empty() == 0)
+            return (mraa::Result) mraa_uart_ow_command(m_uart, command, NULL);
+        else {
+            if (id.size() != 8) {
+                // Only 8 byte romcodes are legal.
+                throw std::invalid_argument(std::string(__FUNCTION__) +
+                                            ": id must be 8 bytes only");
+            }
+            return (mraa::Result) mraa_uart_ow_command(m_uart, command, (uint8_t*) id.c_str());
+        }
+    }
+
+    /**
+     * Perform a Dallas 1-wire compliant CRC8 computation on a buffer
+     *
+     * @param buffer the buffer containing the data
+     * @param length the length of the buffer
+     * @return the computed CRC
+     */
+    uint8_t
+    crc8(uint8_t* buffer, uint16_t length)
+    {
+        return mraa_uart_ow_crc8(buffer, length);
+    }
+
+    /**
+     * Perform a Dallas 1-wire compliant CRC8 computation on a
+     * std::string based buffer
+     *
+     * @param buffer std::string buffer containing the data
+     * @return the computed CRC
+     */
+    uint8_t
+    crc8(std::string buffer)
+    {
+        return mraa_uart_ow_crc8((uint8_t*) buffer.c_str(), buffer.size());
+    }
+
+  private:
+    mraa_uart_ow_context m_uart;
+};
+}

api/pwm.h

@@ -1,172 +0,0 @@
-/*
- * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
- * Copyright (c) 2014 Intel Corporation.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#pragma once
-
-/** @file
- *
- * This file defines the pwm interface for libmaa
- *
- */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stdio.h>
-#include <fcntl.h>
-
-#include "maa.h"
-
-/**
- * A strucutre representing a PWM pin
- */
-typedef struct {
-    /*@{*/
-    int pin; /**< the pin number, as known to the os. */
-    int chipid; /**< the chip id, which the pwm resides */
-    FILE *duty_fp; /**< File pointer to duty file */
-    /*@}*/
-} maa_pwm_context;
-
-/** Initialise pwm_context, uses board mapping.
- *
- * @param pin The PWM PIN.
- *
- * @return maa_pwm_context The returned initialised pwm context
- */
-maa_pwm_context* maa_pwm_init(int pin);
-
-/** Initialise pwm_context, raw mode.
- *
- * @param chipid The chip inwhich the PWM is under in SYSFS
- * @param pin The PWM PIN.
- *
- * @return maa_pwm_context The returned initialised pwm context
- */
-maa_pwm_context* maa_pwm_init_raw(int chipid, int pin);
-
-/** Set the ouput duty-cycle percentage, as a float
- *
- * @param pwm The PWM context to use.
- * @param percentage A floating-point value representing percentage of output.
- *    The value should lie between 0.0f (representing on 0%) and 1.0f
- *    Values above or below this range will be set at either 0.0f or 1.0f.
- *
- * @return maa_result_t the maa result.
- */
-maa_result_t maa_pwm_write(maa_pwm_context* pwm, float percentage);
-
-/** Read the ouput duty-cycle percentage, as a float
- *
- * @param pwm The PWM context to use.
- * @return percentage A floating-point value representing percentage of output.
- *    The value should lie between 0.0f (representing on 0%) and 1.0f
- *    Values above or below this range will be set at either 0.0f or 1.0f.
- */
-float maa_pwm_read(maa_pwm_context* pwm);
-
-/** Set the PWM period as seconds represented in a float
- *
- * @param pwm The PWM context to use.
- * @param seconds Peroid represented as a float in seconds.
- *
- * @return maa_result_t the maa result.
- */
-maa_result_t maa_pwm_period(maa_pwm_context* pwm, float seconds);
-
-/** Set period, milli-oseconds.
- *
- * @param pwm The PWM context to use.
- * @param ms milli-seconds for period.
- *
- * @return maa_result_t the maa result.
- */
-maa_result_t maa_pwm_period_ms(maa_pwm_context* pwm, int ms);
-
-/** Set period, microseconds
- *
- * @param pwm The PWM context to use.
- * @param ns microseconds as period.
- *
- * @return maa_result_t the maa result.
- */
-maa_result_t maa_pwm_period_us(maa_pwm_context* pwm, int us);
-
-/** Set pulsewidth, As represnted by seconds in a (float).
- *
- * @param pwm The PWM context to use.
- * @param seconds The duration of a pulse
- *
- * @return maa_result_t the maa result.
- */
-maa_result_t maa_pwm_pulsewidth(maa_pwm_context* pwm, float seconds);
-
-/** Set pulsewidth, milliseconds
- *
- * @param pwm The PWM context to use.
- * @param ms milliseconds for pulsewidth.
- *
- * @return maa_result_t the maa result.
- */
-maa_result_t maa_pwm_pulsewidth_ms(maa_pwm_context* pwm, int ms);
-
-/** Set pulsewidth, microseconds.
- *
- * @param pwm The PWM context to use.
- * @param us microseconds for pulsewidth.
- *
- * @return maa_result_t the maa result.
- */
-maa_result_t maa_pwm_pulsewidth_us(maa_pwm_context* pwm, int us);
-
-/** Set the enable status of the PWM pin. None zero will assume on with output being driven.
- *   and 0 will disable the output.
- *
- * @param pwm The PWM context to use.
- * @param enable enable status of pin
- *
- * @return maa_result_t the maa result.
- */
-maa_result_t maa_pwm_enable(maa_pwm_context* pwm, int enable);
-
-/** Unexport the PWM context (maa_pwm_close() will call this function)
- *
- * @param dev The PWM context/
- *
- * @return maa result type.
- */
-maa_result_t maa_pwm_unexport(maa_pwm_context* pwm);
-
-/** Close and unexport the PWM pin.
- * 
- * @param pwm The PWM context to use.
- *
- * @return maa_result_t the maa result.
- */
-maa_result_t maa_pwm_close(maa_pwm_context* pwm);
-
-#ifdef __cplusplus
-}
-#endif

api/spi.h

@@ -1,94 +0,0 @@
-/*
- * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
- * Copyright (c) 2014 Intel Corporation.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#pragma once
-
-/** @file
- *
- * This file defines the spi interface for libmaa
- *
- */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stdio.h>
-#include <fcntl.h>
-
-#include "maa.h"
-
-/**
- * A strucutre representing the SPI device
- */
-typedef struct {
-    /*@{*/
-    int spifd; /**< File descriptor to SPI Device */
-    /*@}*/
-} maa_spi_context;
-
-/** Initialise SPI_context, uses board mapping. Sets the muxes
- *
- * @return maa_spi_context The returned initialised SPI context
- */
-maa_spi_context* maa_spi_init();
-
-/** Set the SPI device mode. see spidev
- *
- * @param spi the spi device context
- * @param mode the mode. See Linux spidev
- *
- * @return maa_spi_context The returned initialised SPI context
- */
-maa_result_t maa_spi_mode(maa_spi_context* spi,unsigned short mode);
-
-/** Set the SPI device operating clock frequency.
- *
- * @param spi the spid device clock frequency
- * @param hz the frequency in hz
- *
- * @return maa_spi_context The returned initialised SPI context
- */
-maa_result_t maa_spi_frequency(maa_spi_context* spi, int hz);
-
-/** Write to the SPI device.
- *
- * @param spi the spid device clock frequency
- * @param data to send
- *
- * @return data recevied on the miso line.
- */
-unsigned int maa_spi_write(maa_spi_context* spi, unsigned int data);
-
-/** De-inits an maa_spi_context device
- *
- *  @param dev the spi context
- *
- *  @return maa_result_t the maa result.
- */
-maa_result_t maa_spi_stop(maa_spi_context* spi);
-
-#ifdef __cplusplus
-}
-#endif

cmake/Toolchains/oe-sdk_cross.cmake

@@ -0,0 +1,25 @@
+# this toolchain file comes from gnuradio project
+
+set( CMAKE_SYSTEM_NAME Linux )
+#set( CMAKE_C_COMPILER  $ENV{CC} )
+#set( CMAKE_CXX_COMPILER  $ENV{CXX} )
+string(REGEX MATCH "sysroots/([a-zA-Z0-9]+)" CMAKE_SYSTEM_PROCESSOR $ENV{SDKTARGETSYSROOT})
+string(REGEX REPLACE "sysroots/" "" CMAKE_SYSTEM_PROCESSOR ${CMAKE_SYSTEM_PROCESSOR})
+set( CMAKE_CXX_FLAGS $ENV{CXXFLAGS}  CACHE STRING "" FORCE )
+set( CMAKE_C_FLAGS $ENV{CFLAGS} CACHE STRING "" FORCE ) #same flags for C sources
+set( CMAKE_LDFLAGS_FLAGS ${CMAKE_CXX_FLAGS} CACHE STRING "" FORCE ) #same flags for C sources
+set( CMAKE_LIBRARY_PATH ${OECORE_TARGET_SYSROOT}/usr/lib )
+set( CMAKE_FIND_ROOT_PATH $ENV{OECORE_TARGET_SYSROOT} $ENV{OECORE_NATIVE_SYSROOT} )
+set( CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER )
+set( CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY )
+set( CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY )
+set( CMAKE_INSTALL_PREFIX $ENV{OECORE_TARGET_SYSROOT}/usr CACHE STRING "" FORCE)
+set( ORC_INCLUDE_DIRS $ENV{OECORE_TARGET_SYSROOT}/usr/include/orc-0.4 )
+set( ORC_LIBRARY_DIRS $ENV{OECORE_TARGET_SYSROOT}/usr/lib )
+
+# for java
+set( JAVA_AWT_INCLUDE_PATH $ENV{JAVA_HOME}/include CACHE PATH "" FORCE)
+set( JAVA_AWT_LIBRARY $ENV{JAVA_HOME}/jre/lib/amd64/libjawt.so CACHE FILEPATH "" FORCE)
+set( JAVA_INCLUDE_PATH $ENV{JAVA_HOME}/include CACHE PATH "" FORCE)
+set( JAVA_INCLUDE_PATH2 $ENV{JAVA_HOME}/include/linux CACHE PATH "" FORCE)
+set( JAVA_JVM_LIBRARY $ENV{JAVA_HOME}/jre/lib/amd64/libjvm.so CACHE FILEPATH "" FORCE)

cmake/modules/COPYING-CMAKE-SCRIPTS

@@ -0,0 +1,22 @@
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+1. Redistributions of source code must retain the copyright
+   notice, this list of conditions and the following disclaimer.
+2. Redistributions in binary form must reproduce the copyright
+   notice, this list of conditions and the following disclaimer in the
+   documentation and/or other materials provided with the distribution.
+3. The name of the author may not be used to endorse or promote products
+   derived from this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

cmake/modules/CPackDeb.cmake

@@ -0,0 +1,222 @@
+# - The builtin (binary) CPack Deb generator (Unix only)
+# CPackDeb may be used to create Deb package using CPack.
+# CPackDeb is a CPack generator thus it uses the CPACK_XXX variables
+# used by CPack : http://www.cmake.org/Wiki/CMake:CPackConfiguration
+#
+# However CPackRPM has specific features which are controlled by
+# the specifics CPACK_RPM_XXX variables.You'll find a detailed usage on 
+# the wiki: 
+#  http://www.cmake.org/Wiki/CMake:CPackPackageGenerators#DEB_.28UNIX_only.29
+# However as a handy reminder here comes the list of specific variables:
+#
+#  CPACK_DEBIAN_PACKAGE_NAME
+#     Mandatory : YES
+#     Default   : CPACK_PACKAGE_NAME (lower case)
+#     The debian package summary
+# CPACK_DEBIAN_PACKAGE_VERSION
+#     Mandatory : YES
+#     Default   : CPACK_PACKAGE_VERSION
+#     The debian package version
+# CPACK_DEBIAN_PACKAGE_ARCHITECTURE)
+#     Mandatory : YES
+#     Default   : Output of dpkg --print-architecture or i386
+#     The debian package architecture
+# CPACK_DEBIAN_PACKAGE_DEPENDS
+#     Mandatory : NO
+#     Default   : -
+#     May be used to set deb dependencies. 
+# CPACK_DEBIAN_PACKAGE_MAINTAINER
+#     Mandatory : YES
+#     Default   : CPACK_PACKAGE_CONTACT
+#     The debian package maintainer
+# CPACK_DEBIAN_PACKAGE_DESCRIPTION
+#     Mandatory : YES
+#     Default   : CPACK_PACKAGE_DESCRIPTION_SUMMARY
+#     The debian package description
+# CPACK_DEBIAN_PACKAGE_SECTION
+#     Mandatory : YES
+#     Default   : 'devel'
+#     The debian package section
+# CPACK_DEBIAN_PACKAGE_PRIORITY
+#     Mandatory : YES
+#     Default   : 'optional'
+#     The debian package priority
+
+#=============================================================================
+# Copyright 2007-2009 Kitware, Inc.
+# Copyright 2007-2009 Mathieu Malaterre <mathieu.malaterre@gmail.com>
+#
+# Distributed under the OSI-approved BSD License (the "License");
+# see accompanying file Copyright.txt for details.
+#
+# This software is distributed WITHOUT ANY WARRANTY; without even the
+# implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+# See the License for more information.
+#=============================================================================
+# (To distributed this file outside of CMake, substitute the full
+#  License text for the above reference.)
+
+# CPack script for creating Debian package
+# Author: Mathieu Malaterre
+#
+# http://wiki.debian.org/HowToPackageForDebian
+
+IF(CMAKE_BINARY_DIR)
+  MESSAGE(FATAL_ERROR "CPackDeb.cmake may only be used by CPack internally.")
+ENDIF(CMAKE_BINARY_DIR)
+
+IF(NOT UNIX)
+  MESSAGE(FATAL_ERROR "CPackDeb.cmake may only be used under UNIX.")
+ENDIF(NOT UNIX)
+
+# Let's define the control file found in debian package:
+
+# Binary package:
+# http://www.debian.org/doc/debian-policy/ch-controlfields.html#s-binarycontrolfiles
+
+# DEBIAN/control
+# debian policy enforce lower case for package name
+# Package: (mandatory)
+IF(NOT CPACK_DEBIAN_PACKAGE_NAME)
+  STRING(TOLOWER "${CPACK_PACKAGE_NAME}" CPACK_DEBIAN_PACKAGE_NAME)
+ENDIF(NOT CPACK_DEBIAN_PACKAGE_NAME)
+
+# Version: (mandatory)
+IF(NOT CPACK_DEBIAN_PACKAGE_VERSION)
+  IF(NOT CPACK_PACKAGE_VERSION)
+    MESSAGE(FATAL_ERROR "Debian package requires a package version")
+  ENDIF(NOT CPACK_PACKAGE_VERSION)
+  SET(CPACK_DEBIAN_PACKAGE_VERSION ${CPACK_PACKAGE_VERSION})
+ENDIF(NOT CPACK_DEBIAN_PACKAGE_VERSION)
+
+# Architecture: (mandatory)
+IF(NOT CPACK_DEBIAN_PACKAGE_ARCHITECTURE)
+  # There is no such thing as i686 architecture on debian, you should use i386 instead
+  # $ dpkg --print-architecture
+  FIND_PROGRAM(DPKG_CMD dpkg)
+  IF(NOT DPKG_CMD)
+    MESSAGE(STATUS "Can not find dpkg in your path, default to i386.")
+    SET(CPACK_DEBIAN_PACKAGE_ARCHITECTURE i386)
+  ENDIF(NOT DPKG_CMD)
+  EXECUTE_PROCESS(COMMAND "${DPKG_CMD}" --print-architecture
+    OUTPUT_VARIABLE CPACK_DEBIAN_PACKAGE_ARCHITECTURE
+    OUTPUT_STRIP_TRAILING_WHITESPACE
+    )
+ENDIF(NOT CPACK_DEBIAN_PACKAGE_ARCHITECTURE)
+
+# have a look at GET_PROPERTY(result GLOBAL PROPERTY ENABLED_FEATURES),
+# this returns the successful FIND_PACKAGE() calls, maybe this can help
+# Depends:
+# You should set: DEBIAN_PACKAGE_DEPENDS
+# TODO: automate 'objdump -p | grep NEEDED'
+IF(NOT CPACK_DEBIAN_PACKAGE_DEPENDS)
+  MESSAGE(STATUS "CPACK_DEBIAN_PACKAGE_DEPENDS not set, the package will have no dependencies.")
+ENDIF(NOT CPACK_DEBIAN_PACKAGE_DEPENDS)
+
+# Maintainer: (mandatory)
+IF(NOT CPACK_DEBIAN_PACKAGE_MAINTAINER)
+  IF(NOT CPACK_PACKAGE_CONTACT)
+    MESSAGE(FATAL_ERROR "Debian package requires a maintainer for a package, set CPACK_PACKAGE_CONTACT or CPACK_DEBIAN_PACKAGE_MAINTAINER")
+  ENDIF(NOT CPACK_PACKAGE_CONTACT)
+  SET(CPACK_DEBIAN_PACKAGE_MAINTAINER ${CPACK_PACKAGE_CONTACT})
+ENDIF(NOT CPACK_DEBIAN_PACKAGE_MAINTAINER)
+
+# Description: (mandatory)
+IF(NOT CPACK_DEBIAN_PACKAGE_DESCRIPTION)
+  IF(NOT CPACK_PACKAGE_DESCRIPTION_SUMMARY)
+    MESSAGE(FATAL_ERROR "Debian package requires a summary for a package, set CPACK_PACKAGE_DESCRIPTION_SUMMARY or CPACK_DEBIAN_PACKAGE_DESCRIPTION")
+  ENDIF(NOT CPACK_PACKAGE_DESCRIPTION_SUMMARY)
+  SET(CPACK_DEBIAN_PACKAGE_DESCRIPTION ${CPACK_PACKAGE_DESCRIPTION_SUMMARY})
+ENDIF(NOT CPACK_DEBIAN_PACKAGE_DESCRIPTION)
+
+# Section: (recommended)
+IF(NOT CPACK_DEBIAN_PACKAGE_SECTION)
+  SET(CPACK_DEBIAN_PACKAGE_SECTION "devel")
+ENDIF(NOT CPACK_DEBIAN_PACKAGE_SECTION)
+
+# Priority: (recommended)
+IF(NOT CPACK_DEBIAN_PACKAGE_PRIORITY)
+  SET(CPACK_DEBIAN_PACKAGE_PRIORITY "optional")
+ENDIF(NOT CPACK_DEBIAN_PACKAGE_PRIORITY )
+
+# Recommends:
+# You should set: CPACK_DEBIAN_PACKAGE_RECOMMENDS
+
+# Suggests:
+# You should set: CPACK_DEBIAN_PACKAGE_SUGGESTS
+
+# CPACK_DEBIAN_PACKAGE_CONTROL_EXTRA
+# This variable allow advanced user to add custom script to the control.tar.gz (inside the .deb archive)
+# Typical examples are: 
+# - conffiles
+# - postinst
+# - postrm
+# - prerm"
+# Usage:
+# SET(CPACK_DEBIAN_PACKAGE_CONTROL_EXTRA 
+#    "${CMAKE_CURRENT_SOURCE_DIR/prerm;${CMAKE_CURRENT_SOURCE_DIR}/postrm")
+
+
+# For debian source packages:
+# debian/control
+# http://www.debian.org/doc/debian-policy/ch-controlfields.html#s-sourcecontrolfiles
+
+# .dsc
+# http://www.debian.org/doc/debian-policy/ch-controlfields.html#s-debiansourcecontrolfiles
+
+# Builds-Depends:
+#IF(NOT CPACK_DEBIAN_PACKAGE_BUILDS_DEPENDS)
+#  SET(CPACK_DEBIAN_PACKAGE_BUILDS_DEPENDS
+#    "debhelper (>> 5.0.0), libncurses5-dev, tcl8.4"
+#  )
+#ENDIF(NOT CPACK_DEBIAN_PACKAGE_BUILDS_DEPENDS)
+
+# Description: (mandatory)
+#if(NOT CPACK_SECTION)
+#    message(FATAL_ERROR "opkg package requires a package section")
+#endif(NOT CPACK_SECTION)
+
+# Package for opkg
+FIND_PROGRAM(OPKG_CMD opkg-build)
+if( ${OPKG_CMD} STREQUAL "OPKG_CMD-NOTFOUND" )
+  message("CPack: opkg-build not found. Skipping packaging")
+else( ${OPKG_CMD} STREQUAL "OPKG_CMD-NOTFOUND" )
+  SET(CPACK_OPKG_ROOTDIR "${CPACK_TOPLEVEL_DIRECTORY}/${CPACK_PACKAGE_FILE_NAME}")
+  FILE(MAKE_DIRECTORY ${CPACK_OPKG_ROOTDIR}/CONTROL)
+  set(CPACK_OPKG_CONTROL_FILE "${CPACK_OPKG_ROOTDIR}/CONTROL/control")
+  # Write controlfile
+  FILE(WRITE ${CPACK_OPKG_CONTROL_FILE}
+    "Package: ${CPACK_PACKAGE_NAME}
+Version: ${CPACK_PACKAGE_VERSION}
+Description: ${CPACK_PACKAGE_DESCRIPTION_SUMMARY}
+Architecture: ${CPACK_DEBIAN_PACKAGE_ARCHITECTURE}
+Section: ${CPACK_DEBIAN_PACKAGE_SECTION}
+Priority: optional
+Maintainer: ${CPACK_DEBIAN_PACKAGE_MAINTAINER}
+Depends:
+Provides: ${CPACK_DEBIAN_PACKAGE_PROVIDES}
+Replaces: ${CPACK_DEBIAN_PACKAGE_REPLACES}
+Conflicts: ${CPACK_DEBIAN_PACKAGE_CONFLICTS}
+Source: https://github.com/intel-iot-devkit/mraa
+#Essential: no
+")
+
+set(OPKG_FILE_NAME "${CPACK_PACKAGE_NAME}_${CPACK_PACKAGE_VERSION}_${CPACK_DEBIAN_PACKAGE_ARCHITECTURE}")
+  execute_process(
+    COMMAND "${OPKG_CMD}" "-o" "0" "${CPACK_PACKAGE_FILE_NAME}" "."
+    RESULT_VARIABLE _result
+    OUTPUT_VARIABLE _res_output
+    ERROR_VARIABLE  _res_error
+    WORKING_DIRECTORY ${CPACK_TOPLEVEL_DIRECTORY}
+    )
+
+  if(${_result})
+    message("Result '${_result}'")
+    message("Output '${_res_output}'")
+    message("Error  '${_res_error}'")
+  else(${_result})
+    message("CPack: Package ${OPKG_FILE_NAME}.ipk generated.")
+    set(WDIR "${CPACK_TOPLEVEL_DIRECTORY}/${CPACK_PACKAGE_FILE_NAME}")
+    file(RENAME ${CPACK_TOPLEVEL_DIRECTORY}/${OPKG_FILE_NAME}.ipk ${CPACK_BINARY_DIR}/${OPKG_FILE_NAME}.ipk)
+  endif(${_result})
+endif( ${OPKG_CMD} STREQUAL "OPKG_CMD-NOTFOUND" )

cmake/modules/Copyright.txt

@@ -0,0 +1,57 @@
+CMake - Cross Platform Makefile Generator
+Copyright 2000-2015 Kitware, Inc.
+Copyright 2000-2011 Insight Software Consortium
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+* Redistributions of source code must retain the above copyright
+  notice, this list of conditions and the following disclaimer.
+
+* Redistributions in binary form must reproduce the above copyright
+  notice, this list of conditions and the following disclaimer in the
+  documentation and/or other materials provided with the distribution.
+
+* Neither the names of Kitware, Inc., the Insight Software Consortium,
+  nor the names of their contributors may be used to endorse or promote
+  products derived from this software without specific prior written
+  permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+------------------------------------------------------------------------------
+
+The above copyright and license notice applies to distributions of
+CMake in source and binary form.  Some source files contain additional
+notices of original copyright by their contributors; see each source
+for details.  Third-party software packages supplied with CMake under
+compatible licenses provide their own copyright notices documented in
+corresponding subdirectories.
+
+------------------------------------------------------------------------------
+
+CMake was initially developed by Kitware with the following sponsorship:
+
+ * National Library of Medicine at the National Institutes of Health
+   as part of the Insight Segmentation and Registration Toolkit (ITK).
+
+ * US National Labs (Los Alamos, Livermore, Sandia) ASC Parallel
+   Visualization Initiative.
+
+ * National Alliance for Medical Image Computing (NAMIC) is funded by the
+   National Institutes of Health through the NIH Roadmap for Medical Research,
+   Grant U54 EB005149.
+
+ * Kitware, Inc.

cmake/modules/FindFtd2xx.cmake

@@ -0,0 +1,73 @@
+# - Try to find libftd2xx
+# Once done this will define
+#
+#  LIBFTD2XX_FOUND - system has libftd2xx
+#  LIBFTD2XX_INCLUDE_DIRS - the libftd2xx include directory
+#  LIBFTD2XX_LIBRARIES - Link these to use libftd2xx
+#  LIBFTD2XX_DEFINITIONS - Compiler switches required for using libftd2xx
+#
+#  Adapted from cmake-modules Google Code project
+#
+#  Copyright (c) 2006 Andreas Schneider <mail@cynapses.org>
+#
+#  (Changes for libftd2xx) Copyright (c) 2008 Kyle Machulis <kyle@nonpolynomial.com>
+#
+# Redistribution and use is allowed according to the terms of the New BSD license.
+# For details see the accompanying COPYING-CMAKE-SCRIPTS file.
+
+if (LIBFTD2XX_LIBRARIES AND LIBFTD2XX_INCLUDE_DIRS)
+  # in cache already
+  set(LIBFTD2XX_FOUND TRUE)
+else (LIBFTD2XX_LIBRARIES AND LIBFTD2XX_INCLUDE_DIRS)
+  find_path(LIBFTD2XX_INCLUDE_DIR
+    NAMES
+    ftd2xx.h
+    PATHS
+    /usr/include
+    /usr/local/include
+    /opt/local/include
+    /sw/include
+	)
+
+  SET(FTD2XX_LIBNAME ftd2xx)
+  IF(WIN32)
+	SET(FTD2XX_LIBNAME ftd2xx.lib)
+  ENDIF(WIN32)
+
+  find_library(LIBFTD2XX_LIBRARY
+    NAMES
+    ${FTD2XX_LIBNAME}
+    PATHS
+    /usr/lib
+    /usr/local/lib
+    /opt/local/lib
+    /sw/lib
+	)
+
+  if(LIBFTD2XX_INCLUDE_DIR)
+	set(LIBFTD2XX_INCLUDE_DIRS
+      ${LIBFTD2XX_INCLUDE_DIR}
+	  )
+  endif(LIBFTD2XX_INCLUDE_DIR)
+  set(LIBFTD2XX_LIBRARIES
+    ${LIBFTD2XX_LIBRARY}
+	)
+
+  if (LIBFTD2XX_INCLUDE_DIRS AND LIBFTD2XX_LIBRARIES)
+    set(LIBFTD2XX_FOUND TRUE)
+  endif (LIBFTD2XX_INCLUDE_DIRS AND LIBFTD2XX_LIBRARIES)
+
+  if (LIBFTD2XX_FOUND)
+    if (NOT libftd2xx_FIND_QUIETLY)
+	  message(STATUS "Found libftd2xx: ${LIBFTD2XX_LIBRARIES}")
+    endif (NOT libftd2xx_FIND_QUIETLY)
+  else (LIBFTD2XX_FOUND)
+    if (libftd2xx_FIND_REQUIRED)
+	  message(FATAL_ERROR "Could not find libftd2xx")
+    endif (libftd2xx_FIND_REQUIRED)
+  endif (LIBFTD2XX_FOUND)
+
+  # show the LIBFTD2XX_INCLUDE_DIRS and LIBFTD2XX_LIBRARIES variables only in the advanced view
+  mark_as_advanced(LIBFTD2XX_INCLUDE_DIRS LIBFTD2XX_LIBRARIES)
+
+endif (LIBFTD2XX_LIBRARIES AND LIBFTD2XX_INCLUDE_DIRS)

cmake/modules/FindFtd4222.cmake

@@ -0,0 +1,75 @@
+# - Try to find LIBFT4222
+# Once done this will define
+#
+#  LIBFT4222_FOUND - system has LIBFT4222
+#  LIBFT4222_INCLUDE_DIRS - the LIBFT4222 include directory
+#  LIBFT4222_LIBRARIES - Link these to use LIBFT4222
+#  LIBFT4222_DEFINITIONS - Compiler switches required for using LIBFT4222
+#
+#  Adapted from cmake-modules Google Code project
+#
+#  Copyright (c) 2006 Andreas Schneider <mail@cynapses.org>
+#
+#  (Changes for LIBFTD2XX) Copyright (c) 2008 Kyle Machulis <kyle@nonpolynomial.com>
+#  (Changes for LIBFT4222) Henry Bruce <henry.bruce@intel.com> Copyright (c) 2015 Intel Corporation. 
+#
+# Redistribution and use is allowed according to the terms of the New BSD license.
+# For details see the accompanying COPYING-CMAKE-SCRIPTS file.
+
+if (LIBFT4222_LIBRARIES AND LIBFT4222_INCLUDE_DIRS)
+  # in cache already
+  set(LIBFT4222_FOUND TRUE)
+else (LIBFT4222_LIBRARIES AND LIBFT4222_INCLUDE_DIRS)
+  find_path(LIBFT4222_INCLUDE_DIR
+    NAMES
+    libft4222.h
+    PATHS
+    /usr/include
+    /usr/local/include
+    /opt/local/include
+    /sw/include
+	)
+
+  SET(FTD4222_LIBNAME ft4222)
+  IF(WIN32)
+	SET(FTD4222_LIBNAME LibFT4222.lib)
+  ENDIF(WIN32)
+
+  find_library(LIBFT4222_LIBRARY
+    NAMES
+    ${FTD4222_LIBNAME}
+    PATHS
+    /usr/lib
+    /usr/local/lib
+    /opt/local/lib
+    /sw/lib
+	)
+
+  if(LIBFT4222_INCLUDE_DIR)
+	set(LIBFT4222_INCLUDE_DIRS
+      ${LIBFT4222_INCLUDE_DIR}
+	  )
+  endif(LIBFT4222_INCLUDE_DIR)
+  set(LIBFT4222_LIBRARIES
+    ${LIBFT4222_LIBRARY}
+	)
+
+  if (LIBFT4222_INCLUDE_DIRS AND LIBFT4222_LIBRARIES)
+    set(LIBFT4222_FOUND TRUE)
+  endif (LIBFT4222_INCLUDE_DIRS AND LIBFT4222_LIBRARIES)
+
+  if (LIBFT4222_FOUND)
+    if (NOT LIBFT4222_FIND_QUIETLY)
+	  message(STATUS "Found LIBFT4222: ${LIBFT4222_LIBRARIES}")
+    endif (NOT LIBFT4222_FIND_QUIETLY)
+  else (LIBFT4222_FOUND)
+    if (LIBFT4222_FIND_REQUIRED)
+	  message(FATAL_ERROR "Could not find LIBFT4222")
+    endif (LIBFT4222_FIND_REQUIRED)
+  endif (LIBFT4222_FOUND)
+
+  # show the LIBFT4222_INCLUDE_DIRS and LIBFT4222_LIBRARIES variables only in the advanced view
+  mark_as_advanced(LIBFT4222_INCLUDE_DIRS LIBFT4222_LIBRARIES)
+
+endif (LIBFT4222_LIBRARIES AND LIBFT4222_INCLUDE_DIRS)
+

cmake/modules/FindJSON-C.cmake

@@ -0,0 +1,21 @@
+# JSON-C_FOUND - true if library and headers were found
+# JSON-C_INCLUDE_DIRS - include directories
+# JSON-C_LIBRARIES - library directories
+
+find_package (PkgConfig)
+pkg_search_module (PC_JSON-C QUIET json-c json)
+
+find_path (JSON-C_INCLUDE_DIR json.h HINTS ${PC_JSON-C_INCLUDEDIR}
+${PC_JSON-C_INCLUDE_DIRS} PATH_SUFFIXES json-c json)
+
+find_library (JSON-C_LIBRARY NAMES json-c libjson-c HINTS ${PC_JSON-C_LIBDIR}
+${PC_JSON-C_LIBRARY_DIRS})
+
+set (JSON-C_LIBRARIES ${JSON-C_LIBRARY})
+set (JSON-C_INCLUDE_DIRS ${JSON-C_INCLUDE_DIR})
+
+include (FindPackageHandleStandardArgs)
+
+find_package_handle_standard_args (JSON-C DEFAULT_MSG JSON-C_LIBRARY JSON-C_INCLUDE_DIR)
+
+mark_as_advanced (JSON-C_INCLUDE_DIR JSON-C_LIBRARY)

cmake/modules/FindNodejs.cmake

@@ -0,0 +1,94 @@
+ # Macro to add directory to NODEJS_INCLUDE_DIRS if it exists and is not /usr/include
+ macro(add_include_dir dir)
+    if (IS_DIRECTORY ${dir} AND NOT ${dir} STREQUAL "/usr/include")
+      set(NODEJS_INCLUDE_DIRS ${NODEJS_INCLUDE_DIRS} ${dir})
+    endif()
+endmacro()
+
+
+find_program (NODEJS_EXECUTABLE NAMES node nodejs
+    HINTS
+    $ENV{NODE_DIR}
+    PATH_SUFFIXES bin
+    DOC "Node.js interpreter"
+)
+
+include (FindPackageHandleStandardArgs)
+
+# If compat-libuv package exists, it must be at start of include path
+find_path (UV_ROOT_DIR "uv.h" PATHS /usr/include/compat-libuv010 NO_DEFAULT_PATH)
+if (UV_ROOT_DIR)
+  # set (NODEJS_INCLUDE_DIRS ${UV_ROOT_DIR})
+  add_include_dir(${UV_ROOT_DIR})
+endif()
+
+# Now look for node. Flag an error if not found
+find_path (NODE_ROOT_DIR "include/node/node.h" "include/src/node.h"
+  PATHS /usr/include/nodejs /usr/local/include/nodejs /usr/local/include)
+if (NODE_ROOT_DIR)
+  add_include_dir(${NODE_ROOT_DIR}/include/src)
+  add_include_dir(${NODE_ROOT_DIR}/include/node)
+  add_include_dir(${NODE_ROOT_DIR}/include/deps/v8/include)
+  add_include_dir(${NODE_ROOT_DIR}/include/deps/uv/include)
+else()
+  unset(NODEJS_INCLUDE_DIRS)
+  message(ERROR " - node.h not found")
+endif()
+
+# Check that v8.h is in NODEJS_INCLUDE_DIRS
+find_path (V8_ROOT_DIR "v8.h" PATHS ${NODEJS_INCLUDE_DIRS})
+if (NOT V8_ROOT_DIR)
+  unset(NODEJS_INCLUDE_DIRS)
+  message(ERROR " - v8.h not found")
+endif()
+
+# Check that uv.h is in NODEJS_INCLUDE_DIRS
+find_path (UV_ROOT_DIR "uv.h" PATHS ${NODEJS_INCLUDE_DIRS})
+if (NOT UV_ROOT_DIR)
+  unset(NODEJS_INCLUDE_DIRS)
+  message(ERROR " - uv.h not found")
+endif()
+
+find_package_handle_standard_args (Nodejs DEFAULT_MSG
+    NODEJS_EXECUTABLE
+    NODEJS_INCLUDE_DIRS
+)
+
+if (NODEJS_EXECUTABLE)
+    execute_process(COMMAND ${NODEJS_EXECUTABLE} --version
+                    OUTPUT_VARIABLE _VERSION
+                    RESULT_VARIABLE _NODE_VERSION_RESULT)
+    execute_process(COMMAND ${NODEJS_EXECUTABLE} -e "console.log(process.versions.v8)"
+                    OUTPUT_VARIABLE _V8_VERSION
+                    RESULT_VARIABLE _V8_RESULT)
+    if (NOT _NODE_VERSION_RESULT AND NOT _V8_RESULT)
+        string (REPLACE "v" "" NODE_VERSION_STRING "${_VERSION}")
+        string (REPLACE "." ";" _VERSION_LIST "${NODE_VERSION_STRING}")
+        list (GET _VERSION_LIST 0 NODE_VERSION_MAJOR)
+        list (GET _VERSION_LIST 1 NODE_VERSION_MINOR)
+        list (GET _VERSION_LIST 2 NODE_VERSION_PATCH)
+        set (V8_VERSION_STRING ${_V8_VERSION})
+        string (REPLACE "." ";" _V8_VERSION_LIST "${_V8_VERSION}")
+        list (GET _V8_VERSION_LIST 0 V8_VERSION_MAJOR)
+        list (GET _V8_VERSION_LIST 1 V8_VERSION_MINOR)
+        list (GET _V8_VERSION_LIST 2 V8_VERSION_PATCH)
+        # we end up with a nasty newline so strip everything that isn't a number
+        string (REGEX MATCH "^[0-9]*" V8_VERSION_PATCH ${V8_VERSION_PATCH})
+    else ()
+        set (NODE_VERSION_STRING "0.10.30")
+        set (NODE_VERSION_MAJOR "0")
+        set (NODE_VERSION_MINOR "10")
+        set (NODE_VERSION_PATCH "30")
+        set (V8_VERSION_MAJOR "3")
+        set (V8_VERSION_MINOR"14")
+        set (V8_VERSION_PATCH "5")
+        set (V8_VERSION_STRING "3.28.72")
+        message ("defaulted to node 0.10.30")
+    endif ()
+    string (REGEX REPLACE "\n" "" NODE_VERSION_STRING ${NODE_VERSION_STRING})
+    string (REGEX REPLACE "\n" "" V8_VERSION_STRING ${V8_VERSION_STRING})
+    message ("INFO - Node version is " ${NODE_VERSION_STRING})
+    message ("INFO - Node using v8 " ${V8_VERSION_STRING})
+    mark_as_advanced (NODEJS_EXECUTABLE)
+endif ()
+

cmake/modules/FindUDEV.cmake

@@ -0,0 +1,21 @@
+# UDEV_FOUND - true if library and headers were found
+# UDEV_INCLUDE_DIRS - include directories
+# UDEV_LIBRARIES - library directories
+
+find_package (PkgConfig)
+pkg_check_modules (PC_UDEV QUIET udev)
+
+find_path (UDEV_INCLUDE_DIR libudev.h HINTS ${PC_UDEV_INCLUDEDIR}
+${PC_UDEV_INCLUDE_DIRS} PATH_SUFFIXES udev)
+
+find_library (UDEV_LIBRARY NAMES udev libudev HINTS ${PC_UDEV_LIBDIR}
+${PC_UDEV_LIBRARY_DIRS})
+
+set (UDEV_LIBRARIES ${UDEV_LIBRARY})
+set (UDEV_INCLUDE_DIRS ${UDEV_INCLUDE_DIR})
+
+include (FindPackageHandleStandardArgs)
+
+find_package_handle_standard_args (UDEV DEFAULT_MSG UDEV_LIBRARY UDEV_INCLUDE_DIR)
+
+mark_as_advanced (UDEV_INCLUDE_DIR UDEV_LIBRARY)

cmake/modules/FindYuidoc.cmake

@@ -0,0 +1,21 @@
+find_program (YUIDOC_EXECUTABLE NAMES yuidoc
+  HINTS $ENV{YUIDOC_DIR}
+    PATHS usr usr/local
+  PATH_SUFFIXES bin
+  DOC "Yuidoc documentation generator"
+)
+
+include (FindPackageHandleStandardArgs)
+
+find_package_handle_standard_args (Yuidoc DEFAULT_MSG
+  YUIDOC_EXECUTABLE
+)
+
+# Get Yuidoc version
+if (YUIDOC_EXECUTABLE)
+  execute_process(COMMAND ${YUIDOC_EXECUTABLE} --version
+                  ERROR_VARIABLE YUIDOC_VERSION)
+  message ("INFO - Yuidoc version is " ${YUIDOC_VERSION})
+endif ()
+
+mark_as_advanced (YUIDOC_EXECUTABLE)

cmake/modules/LICENSE.LGPL

@@ -0,0 +1,504 @@
+		  GNU LESSER GENERAL PUBLIC LICENSE
+		       Version 2.1, February 1999
+
+ Copyright (C) 1991, 1999 Free Software Foundation, Inc.
+ 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+[This is the first released version of the Lesser GPL.  It also counts
+ as the successor of the GNU Library Public License, version 2, hence
+ the version number 2.1.]
+
+			    Preamble
+
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+Licenses are intended to guarantee your freedom to share and change
+free software--to make sure the software is free for all its users.
+
+  This license, the Lesser General Public License, applies to some
+specially designated software packages--typically libraries--of the
+Free Software Foundation and other authors who decide to use it.  You
+can use it too, but we suggest you first think carefully about whether
+this license or the ordinary General Public License is the better
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+

cmake/modules/OpenCVDetectPython.cmake

@@ -0,0 +1,160 @@
+# Find specified Python version
+# Arguments:
+#   preferred_version (value): Version to check for first
+#   min_version (value): Minimum supported version
+#   library_env (value): Name of Python library ENV variable to check
+#   include_dir_env (value): Name of Python include directory ENV variable to check
+#   found (variable): Set if interpreter found
+#   executable (variable): Output of executable found
+#   version_string (variable): Output of found version
+#   version_major (variable): Output of found major version
+#   version_minor (variable): Output of found minor version
+#   libs_found (variable): Set if libs found
+#   libs_version_string (variable): Output of found libs version
+#   libraries (variable): Output of found Python libraries
+#   library (variable): Output of found Python library
+#   debug_libraries (variable): Output of found Python debug libraries
+#   debug_library (variable): Output of found Python debug library
+#   include_path (variable): Output of found Python include path
+#   include_dir (variable): Output of found Python include dir
+#   include_dir2 (variable): Output of found Python include dir2
+#   packages_path (variable): Output of found Python packages path
+function(find_python preferred_version min_version library_env include_dir_env
+         found executable version_string version_major version_minor
+         libs_found libs_version_string libraries library debug_libraries
+         debug_library include_path include_dir include_dir2 packages_path)
+if(NOT ${found})
+  if(${executable})
+    set(PYTHON_EXECUTABLE "${${executable}}")
+  endif()
+
+  find_package(PythonInterp "${preferred_version}")
+  if(NOT PYTHONINTERP_FOUND)
+    find_package(PythonInterp "${min_version}")
+  endif()
+
+  if(PYTHONINTERP_FOUND)
+    # Copy outputs
+    set(_found ${PYTHONINTERP_FOUND})
+    set(_executable ${PYTHON_EXECUTABLE})
+    set(_version_string ${PYTHON_VERSION_STRING})
+    set(_version_major ${PYTHON_VERSION_MAJOR})
+    set(_version_minor ${PYTHON_VERSION_MINOR})
+    set(_version_patch ${PYTHON_VERSION_PATCH})
+
+    # Clear find_host_package side effects
+    unset(PYTHONINTERP_FOUND)
+    unset(PYTHON_EXECUTABLE CACHE)
+    unset(PYTHON_VERSION_STRING)
+    unset(PYTHON_VERSION_MAJOR)
+    unset(PYTHON_VERSION_MINOR)
+    unset(PYTHON_VERSION_PATCH)
+  endif()
+
+  if(_found)
+    set(_version_major_minor "${_version_major}.${_version_minor}")
+
+    if(NOT ANDROID AND NOT APPLE_FRAMEWORK)
+      # not using _version_string here, because it might not conform to the CMake version format
+      if(CMAKE_CROSSCOMPILING)
+        # builder version can differ from target, matching base version (e.g. 2.7)
+        find_package(PythonLibs "${_version_major_minor}")
+      else()
+        find_package(PythonLibs "${_version_major_minor}.${_version_patch}" EXACT)
+      endif()
+
+      if(PYTHONLIBS_FOUND)
+        # Copy outputs
+        set(_libs_found ${PYTHONLIBS_FOUND})
+        set(_libraries ${PYTHON_LIBRARIES})
+        set(_include_path ${PYTHON_INCLUDE_PATH})
+        set(_include_dirs ${PYTHON_INCLUDE_DIRS})
+        set(_debug_libraries ${PYTHON_DEBUG_LIBRARIES})
+        set(_libs_version_string ${PYTHONLIBS_VERSION_STRING})
+        set(_debug_library ${PYTHON_DEBUG_LIBRARY})
+        set(_library ${PYTHON_LIBRARY})
+        set(_library_debug ${PYTHON_LIBRARY_DEBUG})
+        set(_library_release ${PYTHON_LIBRARY_RELEASE})
+        set(_include_dir ${PYTHON_INCLUDE_DIR})
+        set(_include_dir2 ${PYTHON_INCLUDE_DIR2})
+
+        # Clear find_package side effects
+        unset(PYTHONLIBS_FOUND)
+        unset(PYTHON_LIBRARIES)
+        unset(PYTHON_INCLUDE_PATH)
+        unset(PYTHON_INCLUDE_DIRS)
+        unset(PYTHON_DEBUG_LIBRARIES)
+        unset(PYTHONLIBS_VERSION_STRING)
+        unset(PYTHON_DEBUG_LIBRARY CACHE)
+        unset(PYTHON_LIBRARY)
+        unset(PYTHON_LIBRARY_DEBUG)
+        unset(PYTHON_LIBRARY_RELEASE)
+        unset(PYTHON_LIBRARY CACHE)
+        unset(PYTHON_LIBRARY_DEBUG CACHE)
+        unset(PYTHON_LIBRARY_RELEASE CACHE)
+        unset(PYTHON_INCLUDE_DIR CACHE)
+        unset(PYTHON_INCLUDE_DIR2 CACHE)
+      endif()
+    endif()
+
+    execute_process(COMMAND ${_executable} -c "from distutils.sysconfig import *; print(get_python_lib())"
+                    RESULT_VARIABLE _cvpy_process
+                    OUTPUT_VARIABLE _std_packages_path
+                    OUTPUT_STRIP_TRAILING_WHITESPACE)
+    if("${_std_packages_path}" MATCHES "site-packages")
+      set(_packages_path "python${_version_major_minor}/site-packages")
+    else() #debian based assumed, install to the dist-packages.
+      set(_packages_path "python${_version_major_minor}/dist-packages")
+    endif()
+      if(EXISTS "${CMAKE_INSTALL_PREFIX}/lib${LIB_SUFFIX}/${${packages_path}}")
+        set(_packages_path "lib${LIB_SUFFIX}/${_packages_path}")
+      else()
+        set(_packages_path "lib/${_packages_path}")
+    endif()
+  endif()
+
+  # Export return values
+  set(${found} "${_found}" CACHE INTERNAL "")
+  set(${executable} "${_executable}" CACHE FILEPATH "Path to Python interpretor")
+  set(${version_string} "${_version_string}" CACHE INTERNAL "")
+  set(${version_major} "${_version_major}" CACHE INTERNAL "")
+  set(${version_minor} "${_version_minor}" CACHE INTERNAL "")
+  set(${libs_found} "${_libs_found}" CACHE INTERNAL "")
+  set(${libs_version_string} "${_libs_version_string}" CACHE INTERNAL "")
+  set(${libraries} "${_libraries}" CACHE INTERNAL "Python libraries")
+  set(${library} "${_library}" CACHE FILEPATH "Path to Python library")
+  set(${debug_libraries} "${_debug_libraries}" CACHE INTERNAL "")
+  set(${debug_library} "${_debug_library}" CACHE FILEPATH "Path to Python debug")
+  set(${include_path} "${_include_path}" CACHE INTERNAL "")
+  set(${include_dir} "${_include_dir}" CACHE PATH "Python include dir")
+  set(${include_dir2} "${_include_dir2}" CACHE PATH "Python include dir 2")
+  set(${packages_path} "${_packages_path}" CACHE PATH "Where to install the python packages.")
+endif()
+endfunction(find_python)
+
+set(MIN_VER_PYTHON2 2.7)
+set(MIN_VER_PYTHON3 3.2)
+
+find_python(2.7 "${MIN_VER_PYTHON2}" PYTHON2_LIBRARY PYTHON2_INCLUDE_DIR
+    PYTHON2INTERP_FOUND PYTHON2_EXECUTABLE PYTHON2_VERSION_STRING
+    PYTHON2_VERSION_MAJOR PYTHON2_VERSION_MINOR PYTHON2LIBS_FOUND
+    PYTHON2LIBS_VERSION_STRING PYTHON2_LIBRARIES PYTHON2_LIBRARY
+    PYTHON2_DEBUG_LIBRARIES PYTHON2_LIBRARY_DEBUG PYTHON2_INCLUDE_PATH
+    PYTHON2_INCLUDE_DIR PYTHON2_INCLUDE_DIR2 PYTHON2_PACKAGES_PATH)
+
+find_python(3 "${MIN_VER_PYTHON3}" PYTHON3_LIBRARY PYTHON3_INCLUDE_DIR
+    PYTHON3INTERP_FOUND PYTHON3_EXECUTABLE PYTHON3_VERSION_STRING
+    PYTHON3_VERSION_MAJOR PYTHON3_VERSION_MINOR PYTHON3LIBS_FOUND
+    PYTHON3LIBS_VERSION_STRING PYTHON3_LIBRARIES PYTHON3_LIBRARY
+    PYTHON3_DEBUG_LIBRARIES PYTHON3_LIBRARY_DEBUG PYTHON3_INCLUDE_PATH
+    PYTHON3_INCLUDE_DIR PYTHON3_INCLUDE_DIR2 PYTHON3_PACKAGES_PATH)
+
+if(PYTHON_DEFAULT_EXECUTABLE)
+    set(PYTHON_DEFAULT_AVAILABLE "TRUE")
+elseif(PYTHON2INTERP_FOUND) # Use Python 2 as default Python interpreter
+    set(PYTHON_DEFAULT_AVAILABLE "TRUE")
+    set(PYTHON_DEFAULT_EXECUTABLE "${PYTHON2_EXECUTABLE}")
+elseif(PYTHON3INTERP_FOUND) # Use Python 2 as fallback Python interpreter (if there is no Python 2)
+    set(PYTHON_DEFAULT_AVAILABLE "TRUE")
+    set(PYTHON_DEFAULT_EXECUTABLE "${PYTHON3_EXECUTABLE}")
+endif()

cmake/modules/TargetArch.cmake

@@ -0,0 +1,145 @@
+# Based on the Qt 5 processor detection code, so should be very accurate
+# https://qt.gitorious.org/qt/qtbase/blobs/master/src/corelib/global/qprocessordetection.h
+# Currently handles arm (v5, v6, v7), x86 (32/64), ia64, and ppc (32/64)
+
+# This file is under the terms of the GNU Lesser General Public License version
+# 2.1 as published by the Free Software Foundation and appearing in the file
+# LICENSE.LGPL included in the packaging of this file. Please review the
+# following information to ensure the GNU Lesser General Public License version
+# 2.1 requirements will be met:
+# http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
+
+# Regarding POWER/PowerPC, just as is noted in the Qt source,
+# "There are many more known variants/revisions that we do not handle/detect."
+
+set(archdetect_c_code "
+#if defined(__aarch64__)
+        #error cmake_ARCH armv8
+#elif defined(__arm__) || defined(__TARGET_ARCH_ARM)
+    #if defined(__ARM_ARCH_7__) \\
+        || defined(__ARM_ARCH_7A__) \\
+        || defined(__ARM_ARCH_7R__) \\
+        || defined(__ARM_ARCH_7M__) \\
+        || (defined(__TARGET_ARCH_ARM) && __TARGET_ARCH_ARM-0 >= 7)
+        #error cmake_ARCH armv7
+    #elif defined(__ARM_ARCH_6__) \\
+        || defined(__ARM_ARCH_6J__) \\
+        || defined(__ARM_ARCH_6T2__) \\
+        || defined(__ARM_ARCH_6Z__) \\
+        || defined(__ARM_ARCH_6K__) \\
+        || defined(__ARM_ARCH_6ZK__) \\
+        || defined(__ARM_ARCH_6M__) \\
+        || (defined(__TARGET_ARCH_ARM) && __TARGET_ARCH_ARM-0 >= 6)
+        #error cmake_ARCH armv6
+    #elif defined(__ARM_ARCH_5TEJ__) \\
+        || (defined(__TARGET_ARCH_ARM) && __TARGET_ARCH_ARM-0 >= 5)
+        #error cmake_ARCH armv5
+    #else
+        #error cmake_ARCH arm
+    #endif
+#elif defined(__i586) || defined(__i586__)
+    #error cmake_ARCH i586
+#elif defined(__i386) || defined(__i386__) || defined(_M_IX86)
+    #error cmake_ARCH i386
+#elif defined(__x86_64) || defined(__x86_64__) || defined(__amd64) || defined(_M_X64)
+    #error cmake_ARCH x86_64
+#elif defined(__ia64) || defined(__ia64__) || defined(_M_IA64)
+    #error cmake_ARCH ia64
+#elif defined(__ppc__) || defined(__ppc) || defined(__powerpc__) \\
+      || defined(_ARCH_COM) || defined(_ARCH_PWR) || defined(_ARCH_PPC)  \\
+      || defined(_M_MPPC) || defined(_M_PPC)
+    #if defined(__ppc64__) || defined(__powerpc64__) || defined(__64BIT__)
+        #error cmake_ARCH ppc64
+    #else
+        #error cmake_ARCH ppc
+    #endif
+#endif
+
+#error cmake_ARCH unknown
+")
+
+# Set ppc_support to TRUE before including this file or ppc and ppc64
+# will be treated as invalid architectures since they are no longer supported by Apple
+
+function(target_architecture output_var)
+    if(APPLE AND CMAKE_OSX_ARCHITECTURES)
+        # On OS X we use CMAKE_OSX_ARCHITECTURES *if* it was set
+        # First let's normalize the order of the values
+
+        # Note that it's not possible to compile PowerPC applications if you are using
+        # the OS X SDK version 10.6 or later - you'll need 10.4/10.5 for that, so we
+        # disable it by default
+        # See this page for more information:
+        # http://stackoverflow.com/questions/5333490/how-can-we-restore-ppc-ppc64-as-well-as-full-10-4-10-5-sdk-support-to-xcode-4
+
+        # Architecture defaults to i386 or ppc on OS X 10.5 and earlier, depending on the CPU type detected at runtime.
+        # On OS X 10.6+ the default is x86_64 if the CPU supports it, i386 otherwise.
+
+        foreach(osx_arch ${CMAKE_OSX_ARCHITECTURES})
+            if("${osx_arch}" STREQUAL "ppc" AND ppc_support)
+                set(osx_arch_ppc TRUE)
+            elseif("${osx_arch}" STREQUAL "i386")
+                set(osx_arch_i386 TRUE)
+            elseif("${osx_arch}" STREQUAL "x86_64")
+                set(osx_arch_x86_64 TRUE)
+            elseif("${osx_arch}" STREQUAL "ppc64" AND ppc_support)
+                set(osx_arch_ppc64 TRUE)
+            else()
+                message(FATAL_ERROR "Invalid OS X arch name: ${osx_arch}")
+            endif()
+        endforeach()
+
+        # Now add all the architectures in our normalized order
+        if(osx_arch_ppc)
+            list(APPEND ARCH ppc)
+        endif()
+
+        if(osx_arch_i386)
+            list(APPEND ARCH i386)
+        endif()
+
+        if(osx_arch_x86_64)
+            list(APPEND ARCH x86_64)
+        endif()
+
+        if(osx_arch_ppc64)
+            list(APPEND ARCH ppc64)
+        endif()
+    else()
+        file(WRITE "${CMAKE_BINARY_DIR}/arch.c" "${archdetect_c_code}")
+
+        enable_language(C)
+
+        # Detect the architecture in a rather creative way...
+        # This compiles a small C program which is a series of ifdefs that selects a
+        # particular #error preprocessor directive whose message string contains the
+        # target architecture. The program will always fail to compile (both because
+        # file is not a valid C program, and obviously because of the presence of the
+        # #error preprocessor directives... but by exploiting the preprocessor in this
+        # way, we can detect the correct target architecture even when cross-compiling,
+        # since the program itself never needs to be run (only the compiler/preprocessor)
+        try_run(
+            run_result_unused
+            compile_result_unused
+            "${CMAKE_BINARY_DIR}"
+            "${CMAKE_BINARY_DIR}/arch.c"
+            COMPILE_OUTPUT_VARIABLE ARCH
+            CMAKE_FLAGS CMAKE_OSX_ARCHITECTURES=${CMAKE_OSX_ARCHITECTURES}
+        )
+
+        # Parse the architecture name from the compiler output
+        string(REGEX MATCH "cmake_ARCH ([a-zA-Z0-9_]+)" ARCH "${ARCH}")
+
+        # Get rid of the value marker leaving just the architecture name
+        string(REPLACE "cmake_ARCH " "" ARCH "${ARCH}")
+
+        # If we are compiling with an unknown architecture this variable should
+        # already be set to "unknown" but in the case that it's empty (i.e. due
+        # to a typo in the code), then set it to unknown
+        if (NOT ARCH)
+            set(ARCH unknown)
+        endif()
+    endif()
+
+    set(${output_var} "${ARCH}" PARENT_SCOPE)
+endfunction()

docs/banana_pi.md

@@ -0,0 +1,87 @@
+Banana Pi/Pro    {#bananapi}
+============
+
+The Banana Pi/Pro is a clone of the well known Raspberry Pi. It has advantages
+compared to the 'old' Raspberry Pi A/B/A+/B+ devices as it is based on the
+Allwinner A20 Dual Core Cortex-A7. It also has 1G Ethernet compared to 100M
+Ethernet on the Raspberry.
+
+There is a lot of effort on Mainline Kernel to fully support the Allwinner
+Chips, for example Fedora 22 Arm will come with support for BananaPi/Pro which
+means that you will be able to have HDMI Output and a number of periperal
+modules work out of the box.
+
+Pin-wise the Banana Pi matches the Raspberry Pi, the Banana Pro has a connector
+similar to the Raspberry Pi A+/B+
+
+Revision Support
+----------------
+Banana Pi
+Banana Pro
+
+Interface notes
+---------------
+
+**PWM** Whilst the Banana Pi is meant to have 1 PWM channel this is currently
+not supported.
+
+**SPI** works fine when used with old 3.4 Kernels provided by Lemaker, on
+Mainline Kernel SPI does currently not work
+
+**COM** I have created devicetree patches so that Mainline Kernel supports all
+COM-Interfaces, this is not yet visible in Kernel
+
+Mainline Kernel requires the use of Device-Trees, mraa tries it's best to guess
+which gpio/serial/i2c/spi is connected where but there is currently no support
+to manipulate the Device-Tree settings from within mraa. If a device does not
+work as expected then please check syslog, mraa usually complains with a
+meaningful message when it is unable to initialize the device.
+
+Pin Mapping
+-----------
+
+This pin mapping refers to the Banana Pi but gives an idea
+as to what the values are from mraa. Note that there is an emum to use wiringPi
+style numbers.
+
+| MRAA Number | Physical Pin | Function  |
+|-------------|--------------|-----------|
+| 1           | P1-01        | 3V3 VCC   |
+| 2           | P1-02        | 5V VCC    |
+| 3           | P1-03        | I2C SDA   |
+| 4           | P1-04        | 5V VCC    |
+| 5           | P1-05        | I2C SCL   |
+| 6           | P1-06        | GND       |
+| 7           | P1-07        | GPIO(PI03)|
+| 8           | P1-08        | UART4 TX  |
+| 9           | P1-09        | GND       |
+| 10          | P1-10        | UART4 RX  |
+| 11          | P1-11        | GPIO(PI19)|
+| 12          | P1-12        | GPIO(PH02)|
+| 13          | P1-13        | GPIO(PI18)|
+| 14          | P1-14        | GND       |
+| 15          | P1-15        | GPIO(PI17)|
+| 16          | P1-16        | GPIO(PH20)|
+| 17          | P1-17        | 3V3 VCC   |
+| 18          | P1-18        | GPIO(PH21)|
+| 19          | P1-19        | SPI MOSI  |
+| 20          | P1-20        | GND       |
+| 21          | P1-21        | SPI MISO  |
+| 22          | P1-22        | GPIO(PI16)|
+| 23          | P1-23        | SPI SCL   |
+| 24          | P1-24        | SPI CS0   |
+| 25          | P1-25        | GND       |
+| 26          | P1-26        | SPI CS1   |
+
+There is also a second 8-pin connector on the Banana Pi, the pins are as follows:
+
+| MRAA Number | Physical Pin | Function  |
+|-------------|--------------|-----------|
+| 27          | P1-19        | 5V VCC    |
+| 28          | P1-20        | 3V3 VCC   |
+| 29          | P1-21        | GPIO(PH5) |
+| 30          | P1-22        | GPIO(PI22)|
+| 31          | P1-23        | GPIO(PH03)|
+| 32          | P1-24        | GPIO(PI20)|
+| 33          | P1-25        | GND       |
+| 34          | P1-26        | GND       |

docs/beaglebone.md

@@ -0,0 +1,74 @@
+Beaglebone Black    {#beaglebone}
+================
+
+The Beaglebone Black is a very maker friendly Board with a huge amount of
+available I/O Pins. It consists of an Cortex-A8 single core CPU plus two
+additional microcontroller cores called 'pru' that can be used for realtime
+tasks.
+
+The official Beaglebone Black Image runs Debian on a 3.8.13 Kernel. But there
+are also mainline kernels available, either from Robert C. Nelson or also as
+part of the upcoming Fedora 22 release.
+
+The kernel releases from Robert C. Nelson have usually more complete support as
+not all code is yet commited to mainline kernel, your mileage may vary!
+
+In Kernel 3.8.13 there is a Capemanager included, a mechanism to load
+configuration data for devices and extension boards from userland.
+
+This mechanism does not (yet) exist in Mainline kernels, so for mainline
+kernels you need to either rely on the pre-delivered devicetree's or you will
+need to build your own devicetree to support hardware not available by default.
+
+Revision Support
+----------------
+Beaglebone Black Rev. B
+Beaglebone Black Rev. C
+
+Interface notes
+---------------
+
+**SPI** works fine with 3.8.13 kernels, on Mainline Kernel SPI does currently
+not work. mraa will activate spi on 3.8.13 if it finds out that spi is not yet
+configured
+
+**I2C** works both on 3.8.13 and mainline. i2c is activated if missing for
+3.8.13 kernels
+
+Mainline Kernel requires the use of Device-Trees, mraa tries it's best to guess
+which gpio/serial/i2c/spi is connected where but there is currently no support
+to manipulate the Device-Tree settings from within mraa.  If a device does not
+work as expected then please check syslog, mraa usually complains with a
+meaningful message when it is unable to initialize the device.
+
+It will also tell you which overlay for SPI/COM/I2C/PWM it tries to load, on
+some older Debian distributions (or heaven forbid, on Angström) you may need to
+install thoses overlays to /lib/firmware
+
+Capes and further documentation
+-------------------------------
+
+Correctly configuring i2c/spi/serial can get a little challenging as some pins
+have double functionality or are not available at all because hdmi is enabled.
+When something does not work as expected make sure to first check the syslog,
+then check the Beaglebone documentation. Some pointers for good descriptions
+are:
+
+http://elinux.org/BeagleBone_Black_Enable_SPIDEV
+http://elinux.org/Interfacing_with_I2C_Devices
+
+When working with mainline kernels take every hit you have on google with a
+grain of salt, a lot of documentation is based on 3.8 and older kernels. Using
+mainline kernels can be very rewarding, but at least at time of writing also
+can have some nasty
+pitfalls.
+
+Pin Mapping
+-----------
+
+mraa will take into account if you have hdmi cape or mmc enabled and will show
+you the gpio's available for your given configuration.
+
+To see the pin mapping use the command:
+
+$ sudo mraa-gpio list

docs/building.md

@@ -0,0 +1,180 @@
+Building libmraa                         {#building}
+===============
+libmraa uses cmake in order to make compilation relatively painless. CMake runs
+build out of tree so the recommended way is to clone from git and make a `build/`
+directory inside the clone directory.
+
+For building imraa check [building imraa](./imraa.md)
+## Build dependencies
+Not all these are required but if you're unsure of what you're doing this is
+what you'll need:
+* [SWIG](http://swig.org) 3.0.5+
+* [git](http://git-scm.com)
+* [python](http://python.org) 2.7 or 3.4+ (you'll need not just the interpreter but python-dev)
+* [node.js](http://nodejs.org) 0.10.x or 0.12.x (you'll need not just the interpreter but nodejs-dev)
+* [CMake](http://cmake.org) 2.8.8+ (3.1+ is recommended for node.js version 2+)
+
+For Debian-like distros the below command installs the basic set:
+
+```bash
+sudo apt-get install git build-essential swig3.0 python-dev nodejs-dev cmake
+```
+
+To build the documentation you'll also need:
+* [Doxygen](http://www.stack.nl/~dimitri/doxygen/) 1.8.9.1+
+* [Graphviz](http://graphviz.org/) 2+ (For Doxygen graph generation)
+* [Sphinx](http://sphinx-doc.org/) 1.1.3+ (For Python docs)
+
+
+## Basic build steps
+
+~~~~~~~~~~~~~{.sh}
+mkdir build
+cd build
+cmake ..
+make
+~~~~~~~~~~~~~
+
+If this goes wrong and you have all the dependencies installed, then please
+file an issue with the full output of `cmake ..` and `make` or however far you
+got.
+
+After that you can install built files (into default path) by running:
+
+
+```bash
+sudo make install
+```
+
+See flags for adjusting install paths in the section below.
+
+Currently our install logic puts Python bindings into standard paths, which
+do not work on Debian due to their
+ [policy](http://www.debian.org/doc/packaging-manuals/python-policy/ch-python.html#s-paths).
+
+We are working on a permanent solution, in the meanwhile please use this command
+after `make install` to link installed modules where Debian's Python expects them:
+
+```bash
+sudo ln -s <your install prefix, e.g. /usr>/lib/python2.7/site-packages/* /usr/lib/python2.7/dist-packages
+```
+
+Same approach works for Python 3, you'll just need to adjust the version number
+in the path accordingly.
+
+## Configuration flags
+
+Our CMake configuration has a number of options, `cmake-gui` or `ccmake` (`cmake -i` is
+no longer with us :() can show you all the options. A few of the more common
+ones are listed below. Note that when the option starts with `CMAKE_` it's an
+option that is made available by CMake and will be similar in all CMake
+projects. You need to add them after `cmake` but before `..`
+
+A few recommended options:
+
+Changing install path from `/usr/local` to `/usr`:
+ `-DCMAKE_INSTALL_PREFIX:PATH=/usr`
+
+Building debug build - adds `-g` and disables optimisations - this will force a
+full rebuild:
+ `-DCMAKE_BUILD_TYPE=DEBUG`
+
+Using `clang` instead of `gcc`:
+ `-DCMAKE_C_COMPILER=/usr/bin/clang -DCMAKE_CXX_COMPILER=/usr/bin/clang++`
+
+Building with an older version of SWIG (< 3.0.2) requires the disabling of JavaScript:
+ `-DBUILDSWIGNODE=OFF`
+
+Disabling Python module building:
+ `-DBUILDSWIGPYTHON=OFF`
+
+Building doc, this will require [SPHINX](http://sphinx-doc.org) &
+[Doxygen](http://doxygen.org):
+ `-DBUILDDOC=ON`
+
+Override build architecture (this is useful because on x86 ARM code is not
+compiled so use this flag to force the target arch)
+ `-DBUILDARCH=arm`
+
+## Dependencies continued
+
+You'll need at least SWIG version 3.0.2 and we recommend 3.0.5 to build the
+JavaScript & Python modules. If your version of SWIG is older than this then
+please see above for disabling `SWIGNODE`. Otherwise you will get a weird build
+failure when building the JavaScript module. The Python module builds with SWIG
+2.x.
+
+During the build, we'll assume you're building from git, note that if you
+compile with `git` installed your version of mraa will be tagged `-dirty`. This
+simply means `git` wasn't installed or that you where building from a tarball.
+You can modify `build/src/version.c` before running `make` if this is incorrect.
+The instructions listed here all assume that `build/` is an empty dir that lives
+inside the cloned repository of mraa.
+
+If you have multiple versions of Python then mraa can get confused, we
+recommend using virtualenv to select which version of Python you want. We test
+2.7 the most but SWIG will generate valid 3.x Python code but we do not
+generally support building both at once.
+
+## Using a Yocto/OE toolchain
+
+In order to compile with a Yocto/OE toolchain use the following toolchain file.
+This works well on the Edison 1.7.2 SDK. First source the environment file, then
+use our CMake toolchain file.
+
+~~~~~~~~~~~~~{.sh}
+source /opt/poky-edison/1.7.2/environment-setup-core2-32-poky-linux
+mkdir build
+cmake -DCMAKE_TOOLCHAIN_FILE=../cmake/Toolchains/oe-sdk_cross.cmake ..
+make
+~~~~~~~~~~~~~
+
+## Using Coverity
+
+Static analysis is routinely performed using Coverity on libmraa's codebase.
+This is the procedure to submit a build to Coverity. You'll need to install
+`coverity-submit` for your OS.
+
+~~~~~~~~~~~~~{.sh}
+mkdir covbuild/ && cd covbuild
+cmake -DBUILDDOC=OFF -DBUILDSWIG=OFF ..
+cov-build --dir cov-int make
+tar caf mraa.tar.bz2 cov-int
+~~~~~~~~~~~~~
+
+## Building Java bindings
+Have JAVA_HOME set to JDK install directory. Most distributions set this from `/etc/profile.d/`
+ and have a way of switching between alternatives. We support both OpenJDK and Oracle's JDK.
+ On Arch Linux with OpenJDK 8 you'll have to set this yourself like this:
+~~~~~~~~~~~~~{.sh}
+export JAVA_HOME=/usr/lib/jvm/default/
+~~~~~~~~~~~~~
+Then use the CMake configuration flag:
+ `-DBUILDSWIGJAVA=ON`
+To compile `Example.java`
+~~~~~~~~~~~~~{.sh}
+javac -cp $DIR_WHERE_YOU_INSTALLED_MRAA/mraa.jar:. Example.java
+~~~~~~~~~~~~~
+To run, make sure `libmraajava.so` is in `LD_LIBRARY_PATH`
+ ~~~~~~~~~~~~~{.sh}
+jave -cp $DIR_WHERE_YOU_INSTALLED_MRAA/mraa.jar:. Example
+~~~~~~~~~~~~~
+
+If you want to add or improve Java bindings for mraa, please follow the [Creating Java Bindings Guide](https://github.com/intel-iot-devkit/upm/blob/master/docs/creating_java_bindings.md).
+
+## Building an IPK/RPM package using `cpack`
+
+You can get `cpack` to generate an IPK or RPM package fairly easily if you have
+the correct packaging tools
+
+~~~~~~~~~~~~~{.sh}
+cmake -DIPK=ON -DCMAKE_INSTALL_PREFIX=/usr ..
+make package
+~~~~~~~~~~~~~
+
+To use RPM simply enable the RPM option. You'll need `rpmbuild` installed on your
+build machine.
+
+~~~~~~~~~~~~~{.sh}
+cmake -DRPM=ON -DCMAKE_INSTALL_PREFIX=/usr ..
+~~~~~~~~~~~~~

docs/changelog.md

@@ -0,0 +1,306 @@
+Changelog                         {#changelog}
+=========
+
+This changelog is meant as a quick & rough guide to what has changed between
+versions. The API is now fairly stable but when new calls/features are added
+they are listed here. Anything pre 0.2.x is ignored.
+
+**1.2.3**
+  * Revert 1.2.1 binding.gyp changed that had side effect of enabling JSONPLAT in mraa.c
+  * improve travis.ci to load mraa.node as compiled from make npmpkg target
+
+**1.2.2**
+  * remove jsonplat from prehashed npm builds (see docs/npm.md for details)
+  * internal spelling fix
+
+**1.2.1**
+  * Fix npm pkg build - no other fix
+
+**1.2.0**
+  * JSON platform support
+  * mock I2c functionality
+  * Intel Grosse Tete PWM fix
+  * AIO firmata bug fix
+
+**1.1.2**
+  * Mock platform support
+  * mraa-i2c treats i2c buses by default as linux
+  * grosse tete i2c fixes
+  * travis now uses 14.04 instead of 12.04
+
+**1.1.1**
+  * IIO 4.6 kernel matrix support
+  * Intel Grosse Tete radio led support
+  * mraa_init_io() examples
+  * MRAAPLATFORMFORCE fixes
+  * fix python documentation
+
+**1.1.0**
+  * build python2 & python3 bindings
+  * Intel Grosse Tete support
+  * mraa_init_io() generic funtion
+  * mraa-gpio fixes
+  * edison PWM 0% improvements
+  * iio location maping fix
+
+**1.0.0**
+  * Change API to enhance error checking in C. Changes include:
+    - mraa_aio_read
+    - mraa_i2c_read_byte
+    - mraa_i2c_read
+    - mraa_i2c_read_byte_data
+    - mraa_i2c_read_word_data
+    - mraa_spi_write_word
+    - mraa::Spi:write_word becomes mraa::Spi::writeWord
+  * Remove MRAA_ERROR_PLATFORM_ALREADY_INITIALISED which was deprecated for C89 compatibility
+  * Remove pwm config_* apis as unused
+  * Add mraa_remove_subplatform
+  * Support NPM for android
+  * Fix AIO always returning channel 0 with firmata support
+
+**0.10.1**
+  * Remove imraa from node package
+
+**0.10.0**
+  * Add Firmata support with -DFIRMATA=ON
+  * Add imraa with support for pinmuxing and arduino101 flashing
+  * Add better support for NVM installed node via NODE_ROOT_DIR.
+  * Mraa bindings now link to libmraa.so.x
+  * mraa_init() now returns MRAA_SUCCESS if platform is already initialize
+  * Mraa java bindings now support JNI 1.6+
+  * Added support for a02082 rpi2
+  * Mraa has a logo!
+
+**0.9.6**
+  * ftdi ft4222 now dynamically loaded
+  * FT4222 improved ISR code
+
+**0.9.5**
+  * Add support for the UP board (up-board.org)
+  * Support OpenJDK 7 as well as OpenJDK 8
+  * 96board better pin numbering
+  * node v4 improvements
+  * Support for PCA9555 i2c expander read/write on FT4222
+
+**0.9.4**
+  * Fix issue with edison ADC initilisation
+  * documentation update
+
+**0.9.3**
+  * Intel edison detection much improved
+  * ftdi ft4222 interrupt improvement
+  * small fixes to java lib
+
+**0.9.2**
+  * Fix bug with mraa_init & USBPLAT
+  * Add mraa_gpio_read_dir call
+  * Enable cherryhill/braswell platform
+  * Improved 96 board support
+
+**0.9.1**
+  * Minnowboard Turbot support
+  * Change to java runables for ISR support
+  * New platform version call
+  * Default i2c bus on edison miniboard is now i2c-1
+  * More compatibility with node.js versions > 0.10
+  * New C++ get i2c default bus call
+  * Various bug fixes & optimisations
+
+**0.9.0**
+  * Beta iio API in C & C++ (no SWIG support)
+  * Added 96Board support
+  * Added Brillo/Android support
+  * Java ISR fixes
+  * FT4222 gpio support
+
+**0.8.1**
+  * Nodejs 4.1.1 support
+  * Java examples fixes
+  * Nodejs SPI tweaks
+  * Misc fixes
+
+**0.8.0**
+  * Better java support
+  * Support for FT4222 subplatforms
+  * New types.hpp improves C++ & SWIG APIs
+  * Added support for minnowboard max compatible boards
+
+**0.7.5**
+  * 5th Generation NUC i2c support
+  * NPM 0.10.x ia32 fix
+
+**0.7.4**
+  * Minnowboard i2c fix
+  * Add NPM arm support
+  * Uart initialisation improved
+  * Better i2c bus detection on DE3815 & mmax
+
+**0.7.3**
+  * DE3815 i2c fix when using different kernels
+  * Fixed various memory leaks in SWIG wrappers
+  * gpio enums all prefixed with mraa_
+  * Fix SPI CS pin caps causing mux_total to be > 0
+  * Improved error checking/handling
+
+**0.7.2**
+  * Fix node.js npm builds with binding.gyp that didn't use --target-arch
+
+**0.7.1**
+  * Uart now uses binary arrays and has optional 'Str' functions in C++/SWIG
+  * Various Uart module bugfixes
+  * Node.js 0.12.4 support
+  * Node.js documentation support
+
+**0.7.0**
+  * Uart module now contains read/write interactions and configuration
+  * Python API contains more buffer checks
+  * Java support
+  * RPM cpack support
+
+**0.6.2**
+  * Node.js 0.12 support
+  * NPM support
+  * Formatting done with clang-format
+  * Various examples and documentation updates
+  * Supported added for Beaglebone Black + Banana Pi
+
+**0.6.1**
+  * 16bit spi iunctions added
+  * Node.js ISR now supported
+
+**0.6.0**
+  * add device path queries for uart
+  * add platform configuration querying
+  * gpio sample added
+  * improve i2c/spi write/read API for python & nodejs
+  * performance improvements on edison & galileo
+
+**0.5.4**
+  * pwm read_* fix introduced in 0.5.3
+  * improved npmpkg support
+
+**0.5.3**
+  * OE toolchain support added to CMake
+  * Various UART fixes
+  * SPI add CS exposure
+  * Remove functions from mraa.c into modules
+  * Rework of support for mmap
+  * Intel Edison MMAP support added. Read and Write
+  * I2C clean up, add cleaner functions
+  * MinnowBoard Max support added
+  * PWM period is written before duty
+  * Node GYP build supported added
+  * Add Get Platform Name function
+
+**0.5.2**
+  * pwm improvement & bugfix
+  * spi mraa_spi_bit_per_word fix
+  * new spi transfer function
+  * i2c object api uses uint8_t
+  * i2c readReg() calls added
+  * edison i2c bus now defaults to a sensible value
+  * edison uart enable support
+  * edison hardware CS exposed as IO10
+  * DE3815tykhe NUC support
+
+**0.5.1**
+  * Intel Edison - Mini breakout board support
+  * Change to use syslog throughout instead of printing to stderr.
+  * Fix misc issues brought up throuh coverity scans
+  * Clear up Analog call documentation
+
+**0.5.0**
+  * Intel Edison - Arduino board support.
+  * Boost Allowable i2c busses to 12
+  * Additional platform hooks added
+  * ADC is now 10bits by default on all platforms but can be changed
+
+**0.4.5**
+  * if only one spidev we default to it reguardless of number
+  * mraa_pwm_config_ms & mraa_pwm_config_percent functions added
+  * Uart C++ class added, adds python & node support
+  * galileo gen2 gpio modes supported
+
+**0.4.4**
+  * prefix SPI mode with MRAA_SPI_
+  * added C++ adc bitness calls
+
+**0.4.3**
+  * SPI Mode function now functional, API Change in SPI
+  * I2C read in swig worked on.
+  * Galileo Gen 2: PWM setting period sets all channel's period
+  * Galileo Gen 2: I2C setup now specific to Gen 2.
+  * General commits around freeing memory at the right times.
+
+**0.4.2**
+  * Barebone UART module added.
+  * Hook branch merged.
+  * I2C init hooks added.
+  * Intel Galileo Gen 2, I2C gpio pins now go hiz input when I2C initialised.
+
+**0.4.1**
+  * Rename python & nodejs modules to mraa
+  * common.hpp introduced for C++
+  * python & nodejs modules can now take binary strings for Spi & I2c
+  * improved Aio module and clear bitness
+  * Improved Galileo Gen 2 support
+
+**0.4.0**
+  * Rename to mraa
+  * get_platform_type function added.
+
+**0.3.1**
+  * Initial Intel Galileo Gen 2 support
+  * mraa_gpio_isr parameters added.
+  * Detection of different supported platforms added.
+
+**0.3.0**
+  * mraa_i2c_read now returns length of read
+
+**0.2.9**
+  * Add global mraa.h & mraa.hpp headers
+  * usage of "gpio.h" is not legal you need to use "mraa/gpio.h" unless adding
+    -L/usr/include/mraa
+
+**0.2.8**
+  * Added mraa_set_priority call
+  * Added mmap gpio call mraa_gpio_use_mmaped
+
+**0.2.7**
+  * C++ API now uses basic types and not unistd types as C
+  * Clearer and consistent use of unistd tpyes in C api
+
+**0.2.6**
+  * C++ examples added, using c++ headers/api.
+  * moved to open instead of fopen in all modules
+  * rename mraa_check functions and made them internal to mraa only.
+  * removed "export" functions from api
+  * Intel Galileo Gen 1 (rev d) fixes, incorrect definition of some items
+  * SPI, implementation completed.
+  * I2C internal function, completed.
+  * PWM fix bug in period set method.
+  * Swig upstream can be used for building.
+  * No longer builds docs on default cmake, needs flag
+  * GPIO/PWM ownership guard prevents closing on existing pins, still can be forced.
+
+**0.2.5**
+  * C++/Python/Node Enums/const names now do not contain MRAA_GPIO
+  * Enum type declaration for C++ changed
+  * Python/Node get_version() -> GetVersion()
+  * i2c read calls don't use const char* and i2c write calls do
+
+**0.2.4**
+  * All mraa_ contexts now are pointers to the actual struct which is not
+    delcared in the header. The only end user change is that instead of
+    returning a type mraa_gpio_context pointer mraa_gpio_init() now returns a
+    mraa_gpio_context (which is actually a pointer to struct _gpio internally).
+  * C++ API is available, use the .hpp headers and add stdc++  to the linker
+    flags.
+  * Initial SPI implementation is provided
+
+**0.2.3**
+  * mraa_aio_read_u16() -> mraa_aio_read()
+  * mraa_aio_read() now returns a uint16_t instead of an unsigned int
+
+**0.2.2**
+  * First version with API considered 'stable'

docs/debugging.md

@@ -0,0 +1,31 @@
+Debugging libmraa                         {#debugging}
+=================
+
+This page contains a few debugging tip. When filing an issue please go through
+this list as it's the first thing we'll ask you to do.
+
+### Finding your mraa version
+
+Getting the exact version of libmraa you're running is really important to us.
+The best way to get this is to call mraa_get_version() or mraa.getVersion(). If
+mraa returns x.x.x-dirty then your version was not built from a git tree or you
+built out of tree (see our building doc) - or you don't have git installed.
+
+### Finding error logs
+
+mraa logs pretty much everything that goes wrong to syslog. These days it'll go
+to the systemd journal so check with `sudo journalctl -f` whilst running your
+app or check all libmraa messages with `journalctl -t libmraa`.  Grab all the
+messages from the initialisation message right up to your last one. Using a
+pastebin is always a good idea, I like dpaste.com. If your system does not have
+systemd likely your log is in /var/log/messages or a similar location.
+
+### Common errors to check for
+
+* Not running as root
+* Incorrect IO pin numbers, mraa uses physical connector pin numbering see your
+  platform documentation for details
+* Your platform is unsupported
+* Using the wrong pin, check pin capabilities either using the API or your
+  platform documentation
+

docs/edison.md

@@ -0,0 +1,116 @@
+Intel Edison                            {#edison}
+=============
+
+Intel(R) Edison is a dual-core Silvermont Atom(TM) clocked at 500MHz. The
+Edison also features 4GB of storage, 1GB ram and on-board WiFi and Bluetooth.
+
+Currently supported boards:
+- Intel Arduino board
+- Intel breakout board
+
+UART
+----
+On both the Arduino board and the breakout board, The available UART interface is on /dev/ttyMFD1
+
+Intel Arduino board
+-------------------
+The Edison used with the Arduino board has the following limitations
+in libmraa:
+
+- Do not use the 'reset' button on the arduino shields, there is a hardware
+  bug and the platform will likely not come back up correctly
+- I2C is exposed on i2c-6, therefore you must use bus 6 and not bus 0
+- PWM available on default swizzler positions. (3,5,6,9)
+- SPI exposed is also used for the ADC. Try not to use your own CS.
+- Max SPI speed is 25Mhz/4 ~6.25Mhz
+- SPI PM can sometimes do weird things you can disable it with:
+  `echo on > /sys/devices/pci0000\:00/0000\:00\:07.1/power/control`
+- ADC kernel module will return 16bit number but the ADC itself only has an
+  accuracy of maximum 12bits and in MRAA it's limited to 10bits by default.
+  Use `mraa_aio_set_bit(12)` to switch to the maximum resolution mode.
+  This ADC is only included on the Arduino board.
+- AIO pins are treated as 0-5 in `mraa_aio_init()` but as 14-19 for everything
+  else. Therefore use `mraa_gpio_init(14)` to use A0 as a GPIO
+- Arduino pin 7 can sometimes negatively impact the WiFi capability, if using
+  WiFi avoid using this pin
+- Edison's i2c-1 can be used using for example the sparkfun i2c breakout ontop
+  of the Arduino breakout board, this is not supported officially so asking for
+  mraa_i2c_init(1) will result in getting i2c bus 6 (the default one). However
+  using raw mode (mraa_i2c_init_raw(1)) this bus is fully usable
+- If you want to use /dev/ttyMFD2 you have to use the raw uart mode passing a
+  std::string or char* argument of "/dev/ttyMFD2" to mraa:Uart() or
+  mraa_uart_init_raw. By default there is a getty running on that interface so
+  you will need to disable that first
+
+Because of the way IO is setup with the tristate on the Arduino breakout board
+IO will be flipped as it is setup. It's recommended to setup IO pins &
+direction before using them in a `setup()` method or similar. It's impossible on
+this platform to avoid some GPIOs flipping on setup.
+
+Intel(R) breakout board
+-----------------------
+
+- Both I2C buses are available 1 & 6
+- IO on the miniboard is 1.8V
+- Requesting GPIO 4 will break your FTDI UART console, so bear in mind when trying to use it
+
+Please see the following table on how the physical pins map to mraa pin numbers
+
+| MRAA Number | Physical Pin | Edison Pin    | Notes                   | Pinmode0 | Pinmode1   | Pinmode2 |
+|-------------|--------------|---------------|-------------------------|----------|------------|----------|
+| 0           | J17-1        | GP182         |                         | GPIO-182 | PWM2       |          |
+| 1           | J17-2        | NC            | Nothing from mraa       |          |            |          |
+| 2           | J17-3        | NC            | Nothing from mraa       |          |            |          |
+| 3           | J17-4        | VIN           | Nothing from mraa       |          |            |          |
+| 4           | J17-5        | GP135         |                         | GPIO-135 | UART       |          |
+| 5           | J17-6        | RCVR_MODE     | Nothing from mraa       |          |            |          |
+| 6           | J17-7        | GP27          |                         | GPIO-27  | I2C-6-SCL  |          |
+| 7           | J17-8        | GP20          |                         | GPIO-20  | I2C-1-SDA  |          |
+| 8           | J17-9        | GP28          |                         | GPIO-28  | I2C-6-SDA  |          |
+| 9           | J17-10       | GP111         |                         | GPIO-111 | SPI-5-CS1  |          |
+| 10          | J17-11       | GP109         |                         | GPIO-109 | SPI-5-SCK  |          |
+| 11          | J17-12       | GP115         |                         | GPIO-115 | SPI-5-MOSI |          |
+| 12          | J17-13       | OSC_CLK_OUT_0 | Nothing from mraa/check |          |            |          |
+| 13          | J17-14       | GP128         |                         | GPIO-128 | UART-1-CTS |          |
+| 14          | J18-1        | GP13          |                         | GPIO-13  | PWM1       |          |
+| 15          | J18-2        | GP165         |                         | GPIO-165 |            |          |
+| 16          | J18-3        | GPI_PWRBTN_N  | Nothing from mraa       |          |            |          |
+| 17          | J18-4        | MSIC_SLP_CLK2 | Nothing from mraa       |          |            |          |
+| 18          | J18-5        | V_VBAT_BKUP   | Nothing from mraa       |          |            |          |
+| 19          | J18-6        | GP19          |                         | GPIO-19  | I2C-1-SCL  |          |
+| 20          | J18-7        | GP12          | PWM0                    | GPIO-12  | PWM0       |          |
+| 21          | J18-8        | GP183         | PWM3                    | GPIO-183 | PWM3       |          |
+| 22          | J18-9        | NC            | Nothing from mraa       |          |            |          |
+| 23          | J18-10       | GP110         |                         | GPIO-110 | SPI-5-CS0  |          |
+| 24          | J18-11       | GP114         |                         | GPIO-114 | SPI-5-MISO |          |
+| 25          | J18-12       | GP129         |                         | GPIO-129 | UART-1-RTS |          |
+| 26          | J18-13       | GP130         |                         | GPIO-130 | UART-1-RX  |          |
+| 27          | J18-14       | FW_RCVR       | Nothing from mraa       |          |            |          |
+| 28          | J19-1        | NC            | Nothing from mraa       |          |            |          |
+| 29          | J19-2        | V_V1P80       | Nothing from mraa       |          |            |          |
+| 30          | J19-3        | GND           | Nothing from mraa       |          |            |          |
+| 31          | J19-4        | GP44          |                         | GPIO-44  |            |          |
+| 32          | J19-5        | GP46          |                         | GPIO-46  |            |          |
+| 33          | J19-6        | GP48          |                         | GPIO-48  |            |          |
+| 34          | J19-7        | RESET_OUT     | Nothing from mraa       |          |            |          |
+| 35          | J19-8        | GP131         |                         | GPIO-131 | UART-1-TX  |          |
+| 36          | J19-9        | GP14          |                         | GPIO-14  |            |          |
+| 37          | J19-10       | GP40          |                         | GPIO-40  | SSP2_CLK   |          |
+| 38          | J19-11       | GP43          |                         | GPIO-43  | SSP2_TXD   |          |
+| 39          | J19-12       | GP77          |                         | GPIO-77  | SD         |          |
+| 40          | J19-13       | GP82          |                         | GPIO-82  | SD         |          |
+| 41          | J19-14       | GP83          |                         | GPIO-83  | SD         |          |
+| 42          | J20-1        | V_VSYS        | Nothing from mraa       |          |            |          |
+| 43          | J20-2        | V_V3P30       | Nothing from mraa       |          |            |          |
+| 44          | J20-3        | GP134         |                         |          |            |          |
+| 45          | J20-4        | GP45          |                         | GPIO-45  |            |          |
+| 46          | J20-5        | GP47          |                         | GPIO-47  |            |          |
+| 47          | J20-6        | GP49          |                         | GPIO-49  |            |          |
+| 48          | J20-7        | GP15          |                         | GPIO-15  |            |          |
+| 49          | J20-8        | GP84          |                         | GPIO-84  | SD         |          |
+| 50          | J20-9        | GP42          |                         | GPIO-42  | SSP2_RXD   |          |
+| 51          | J20-10       | GP41          |                         | GPIO-41  | SSP2_FS    |          |
+| 52          | J20-11       | GP78          |                         | GPIO-78  | SD         |          |
+| 53          | J20-12       | GP79          |                         | GPIO-79  | SD         |          |
+| 54          | J20-13       | GP80          |                         | GPIO-80  | SD         |          |
+| 55          | J20-14       | GP81          |                         | GPIO-81  | SD         |          |

docs/firmata.md

@@ -0,0 +1,37 @@
+Using Firmata board with mraa      {#firmata}
+=============================
+
+Mraa can use a Firmata board as a subplatform. This means one can access the
+native IO as well as the IO on a firmata compatible board
+
+### Supported Firmata boards ###
+
+- Genuino/Arduino 101 running either CustomFirmata or StandardFirmata
+- Other Arduino boards will likely work but are as of yet unsuported
+
+### Using the subplatform API ###
+
+Using the subplatform API is relatively simple, simply add '512', the platform
+offset to any IO calls. I2c 0 becomes I2c 512+0 etc... The API works from UPM
+or mraa in any of the bindings as long as you compiled mraa with -DFIRMATA=ON.
+Currently -DFIRMATA is not compatible with USBPLAT. Multiple subplatforms are
+not yet supported
+
+### Sending custom SYSSEX messages ###
+
+You can use the firmata API to send custom SYSEX messages.
+
+### CurieImu Plugin ###
+
+Using Customisable firmata we're able to use the onboard IMU to get data. This
+uses the public SYSEX firmata API from mraa and there is a UPM module that
+exposes this capability in a simple way. To use it your board needs to use
+CustomFirmata with the CurieIMU plugin
+
+### Limitations ###
+
+Only one instance of mraa (one process linking to mraa) can communicate to an
+firmata subplatform. This is a limitation due to only having one application
+using the Uart at once. In order to get around this a daemon type methodology
+has to be used. Technically you can mirror the TTY port from firmata but this
+is likely going to cause issues

docs/ftdi_ft4222.md

@@ -0,0 +1,80 @@
+FTDI FT4222H                             {#ft4222}
+============
+
+The FT4222H is a High/Full Speed USB2.0-to-Quad SPI/I2C device controller. Mraa
+supports it as a USB subplatform using the libft4222 library from FTDI which
+can be found
+[here](http://www.ftdichip.com/Support/SoftwareExamples/libft4222-1.2.1.4.tgz).
+You need the latest version for the GPIO to work.
+
+The FT4222H has 4 configuration modes selected by {DCNF1, DCNF0}.  The chip
+configuration mode will determine the number of USB interfaces for data streams
+and for GPIOs control. Mraa supports chip modes CNFMODE0 and CNFMODE3. In
+CNFMODE0 the chip can provide either 4 GPIOs and SPI, or 2 GPIOs and I2C
+since SCL/SDA are shared with GPIO0/GPIO1. It is possible to change this
+selection dynamically by calling the corresponding mraa init functions.
+CNFMODE3 on the other hand will only provide SPI or I2C.
+
+By default, both modes start with I2C enabled and the driver will scan for
+known GPIO expanders on the I2C bus when the FT4222H is initialized.
+
+Supported GPIO expanders:
+* PCA9672
+* PCA9555
+* PCF8575
+
+Output from 'mraa-gpio list' would be as follows:
+~~~~~~~~~~~~~
+512 IGPIO0/SCL0: GPIO I2C
+513 IGPIO1/SDA0: GPIO I2C
+514   INT-GPIO2: GPIO
+515   INT-GPIO3: GPIO
+~~~~~~~~~~~~~
+
+When an I2C GPIO expander is present, the pins on the expander will appear after
+the 4 FT4222H GPIO pins (i.e. starting at physical pin #4, logical pin #516).
+~~~~~~~~~~~~~
+512 IGPIO0/SCL0: GPIO I2C
+513 IGPIO1/SDA0: GPIO I2C
+514   INT-GPIO2: GPIO
+515   INT-GPIO3: GPIO
+516   EXP-GPIO0: GPIO
+517   EXP-GPIO1: GPIO
+518   EXP-GPIO2: GPIO
+519   EXP-GPIO3: GPIO
+520   EXP-GPIO4: GPIO
+521   EXP-GPIO5: GPIO
+522   EXP-GPIO6: GPIO
+523   EXP-GPIO7: GPIO
+~~~~~~~~~~~~~
+
+If a PCA9545 I2C switch is detected an extra four I2C busses will appear,
+representing the four downstream busses. Output from 'mraa-i2c list'
+would be as follows:
+~~~~~~~~~~~~~
+Bus 512: id=00 type=ft4222  default
+Bus 513: id=01 type=ft4222
+Bus 514: id=02 type=ft4222
+Bus 515: id=03 type=ft4222
+Bus 516: id=04 type=ft4222
+~~~~~~~~~~~~~
+
+Please note that some mraa features might not be fully implemented yet and they
+are still under development (e.g. SPI replacement functions).
+
+We tested the module using FTDI's UMFT4222EV reference board. More details on
+this board can be found
+[here](http://www.ftdichip.com/Support/Documents/DataSheets/Modules/DS_UMFT4222EV.pdf).
+
+Interface notes
+---------------
+
+You will need to unload all ftdi kernel modules for libft4222 to work
+correctly. You will also have to compile mraa with FT4222 support which may not
+be enabled by default.
+
+The cmake options to build this driver are:
+~~~~~~~~~~~~~
+FTDI4222=ON
+USBPLAT=ON
+~~~~~~~~~~~~~

docs/galileorevd.md

@@ -0,0 +1,14 @@
+Galileo Gen 1 - Rev D                            {#galileorevd}
+=====================
+
+Galileo is a microcontroller board based on the Intel(R) Quark(TM) SoC X1000
+Application Processor, a 32-bit Intel Pentium-class system on a chip.
+
+The rev D board has the following limitations in libmraa:
+
+- gpio 13 will not switch the LED as it's a different Gpio, use raw gpio '3' to do this
+- gpio register access via /dev/uio is limited to pin2 and 3
+- gpio interrupts will only work on GPIO_EDGE_BOTH
+- adc kernel module will return 12bit number. MRAA defaults shift this to 10bits
+- AIO pins are treated as 0-5 in mraa_aio_init() but as 14-19 for everything
+  else. Therefore use mraa_gpio_init(14) to use A0 as a Gpio

docs/galileorevh.md

@@ -0,0 +1,66 @@
+Galileo Gen 2 - Rev H                           {#galileorevh}
+=====================
+
+Galileo is a microcontroller board based on the Intel(R) Quark(TM) SoC X1000
+Application Processor, a 32-bit Intel Pentium-class system on a chip.
+
+The Gen 2 board has the following limitations in libmraa:
+
+- i2c is set at 400Khz speed cannot be changed without reloading kernel module,
+  the driver is intel_qrk_gip_i2c and the parameter is i2c_std_mode which must
+  be set to 1 in order to set the i2c bus speed to 100Khz
+- i2c bus is shared with multiple devices in kernel space, scanning it usually
+  fails
+- pwm period is set globally for all pwm channels, when changed this will halt
+  all pwm channels
+- adc kernel module will return 12bit number but the ADC itself only has an
+  accuracy of 10bits.
+- AIO pins are treated as 0-5 in mraa_aio_init() but as 14-19 for everything
+  else. Therefore use mraa_gpio_init(14) to use A0 as a Gpio
+- To explicitly use GPIO 10 for SPI and allow the kernel to handle the chip select, set
+  `intel_qrk_plat_galileo_gen2.gpio_cs=1` on the kernel line in the boot config on the
+  galileo, this can be found at `/media/mmcblk0p1/boot/grub/grub.conf`
+- if done correctly it should look similiar to this:
+
+<pre>
+  title Quark X1000 kernel-MassStorage iot-devkit on SD IMR-On IO-APIC/HPET NoEMU debug
+  root (hd0,0)
+  kernel /bzImage root=/dev/mmcblk0p2 <b>intel_qrk_plat_galileo_gen2.gpio_cs=1</b> rootwait console=ttyS1,115200n8 earlycon=uart8250,mmio32,0x8010f000,115200n8 reboot=efi,warm apic=debug rw LABEL=boot debugshell=5
+</pre>
+
+Uart 1 on gen2
+--------------
+
+Uart 1 is connected to the FTDI header and the linux console. It's also
+possible to use it from A2(Rx)/A3(Tx). However mraa does not support this
+directly so you need to enable the muxing manually. Here is an example of how
+this is done, this was tested using an FTDI 3.3V TTL cable:
+
+```
+$ systemctl stop serial-getty@ttyS1.service
+$ python
+>>> # Configure the Muxes for Uart1 on Aio2/3
+>>> import mraa as m
+>>> p77 = m.Gpio(77, False, True)
+>>> p76 = m.Gpio(76, False, True)
+>>> p16 = m.Gpio(16, False, True)
+>>> p17 = m.Gpio(17, False, True)
+>>> p77.write(1)
+>>> p76.write(1)
+>>> p16.dir(m.DIR_OUT)
+>>> p16.write(0)
+>>> p17.dir(m.DIR_OUT)
+>>> p17.write(1)
+
+>>> # For Rx to work correctly switch the level shifter
+>>> p34 = m.Gpio(34, False, True)
+>>> p34.dir(m.DIR_OUT)
+>>> p34.write(1)
+
+>>> # Use the uart
+>>> x = m.Uart(1)
+>>> x.setBaudRate(115200)
+>>> x.writeStr('hello')
+>>> x.read(5)
+bytearray(b'dsds\n')
+```

docs/grossetete.md

@@ -0,0 +1,112 @@
+Grosse Tete {#grossetete}
+===========
+
+The Grosse Tete with the Tuchuck board is supported by Mraa
+
+Revision Support
+----------------
+Tuchuck
+
+Interface notes
+---------------
+
+**SPI** Currently not working
+
+**UART** Some pins are labelled as UARTs but are not configured in BIOS as UART
+so only available UART is on the FTDI header
+
+Pin Mapping
+-----------
+
+Tuchuck has two breakouts, breakout #1 is 1-40 whilst breakout2 is 41-80. The
+LEDs are numbered from 100-103.
+
+| MRAA Number | Physical Pin | Function |
+|-------------|--------------|----------|
+| 1           | GPIO         | GPIO     |
+| 2           | SPP1RX       | GPIO     |
+| 3           | PMICRST      | NONE     |
+| 4           | SPP1TX       | GPIO     |
+| 5           | 19.2mhz      | GPIO     |
+| 6           | SPP1FS0      | GPIO     |
+| 7           | UART0TX      | GPIO     |
+| 8           | SPP1FS2      | GPIO     |
+| 9           | PWRGD        | NONE     |
+| 10          | SPP1CLK      | GPIO     |
+| 11          | I2C0SDA      | I2C      |
+| 12          | I2S1SDI      | GPIO     |
+| 13          | I2C0SCL      | I2C      |
+| 14          | I2S1SDO      | GPIO     |
+| 15          | I2C1SDA      | I2C      |
+| 16          | I2S1WS       | GPIO     |
+| 17          | I2C1SCL      | I2C      |
+| 18          | I2S1CLK      | GPIO     |
+| 19          | I2C2SDA      | I2C      |
+| 20          | I2S1MCL      | GPIO     |
+| 21          | I2C2SCL	     | I2CO     |
+| 22          | UART1TX	     | UART     |
+| 23          | I2S4SDO      | NONE     |
+| 24          | UART1RX      | UART     |
+| 25          | I2S4SDI	     | NONE     |
+| 26          | PWM0         | GPIO PWM |
+| 27          | I2S4BLK      | GPIO     |
+| 28          | PWM1         | GPIO PWM |
+| 29          | I2S4WS       | NONE     |
+| 30          | PWM2         | GPIO PWM |
+| 31          | I2S3SDO      | NONE     |
+| 32          | PWM3         | GPIO PWM |
+| 33          | I2S3SDI      | NONE     |
+| 34          | 1.8V         | NONE     |
+| 35          | I2S4BLK      | GPIO     |
+| 36          | GND          | NONE     |
+| 37          | GND          | NONE     |
+| 38          | GND          | NONE     |
+| 39          | GND          | NONE     |
+| 40          | 3.3V         | NONE     |
+| 41          | GND          | NONE     |
+| 42          | 5V           | NONE     |
+| 43          | GND          | NONE     |
+| 44          | 5V           | NONE     |
+| 45          | GND          | NONE     |
+| 46          | 3.3V         | NONE     |
+| 47          | GND          | NONE     |
+| 48          | 3.3V         | NONE     |
+| 49          | GND          | NONE     |
+| 50          | 1.8V         | NONE     |
+| 51          | GPIO         | GPIO     |
+| 52          | 1.8V         | NONE     |
+| 53          | PANEL        | GPIO     |
+| 54          | GND          | NONE     |
+| 55          | PANEL        | GPIO     |
+| 56          | CAMERA       | NONE     |
+| 57          | PANEL        | GPIO     |
+| 58          | CAMERA       | NONE     |
+| 59          | SPP0FS0      | GPIO     |
+| 60          | CAMERA       | NONE     |
+| 61          | SPP0FS1      | GPIO     |
+| 62          | SPI_DAT      | SPI      |
+| 63          | SPP0FS2      | GPIO     |
+| 64          | SPICLKB      | GPIO SPI |
+| 65          | SPP0FS3      | GPIO     |
+| 66          | SPICLKA      | GPIO SPI |
+| 67          | SPP0TX       | GPIO     |
+| 68          | UART0RX      | GPIO UART|
+| 69          | SPP0RX       | GPIO     |
+| 70          | UART0RT      | GPIO UART|
+| 71          | I2C1SDA      | GPIO I2C |
+| 72          | UART0CT      | GPIO UART|
+| 73          | I2C1SCL      | GPIO I2C |
+| 74          | UART1TX      | GPIO UART|
+| 75          | I2C2SDA      | GPIO I2C |
+| 76          | UART1RX      | GPIO UART|
+| 77          | I2C1SCL      | GPIO I2C |
+| 78          | UART1RT      | GPIO UART|
+| 79          | RTC_CLK      | GPIO     |
+| 80          | UART1CT      | GPIO UART|
+| 100         | LED100       | GPIO     |
+| 101         | LED101       | GPIO 	|
+| 102         | LED102       | GPIO 	|
+| 103         | LED103       | GPIO 	|
+
+To see a live pin mapping use the command:
+$ mraa-gpio list

docs/i2c.txt

@@ -0,0 +1,3 @@
+It is considered best practice to make sure the address is correct before doing
+any calls on i2c, in case another application or even thread changed the addres
+on that bus. Multiple instances of the same bus can exist.

docs/iio.md

@@ -0,0 +1,44 @@
+iio             {#iio}
+===
+IIO is the kernel's framework for supporting sensors.
+## Using dummy_iio driver
+For platforms without IIO hardware the iio_dummy driver can be used. You can
+add the driver by either rebuilding the kernel with IIO component enabled or
+just building the IIO modules and load them.  You must add the following config
+fragment. Known to work for kernel 3.19 and later.
+<pre><code>
+CONFIG_IIO_DUMMY_EVGEN=m
+CONFIG_IIO_SIMPLE_DUMMY=m
+CONFIG_IIO_SIMPLE_DUMMY_EVENTS=y
+CONFIG_IIO_SIMPLE_DUMMY_BUFFER=y
+</code></pre>
+### Add driver to kernel
+Boot with new kernel, then load modules
+<pre><code>
+$ modprobe iio_dummy
+$ modprobe iio_dummy_evgen
+</code></pre>
+### Load kernel modules
+Depending our your kernel config, some of these modules may already be loaded.
+<pre><code>
+$ insmod drivers/iio/industrialio.ko
+$ insmod drivers/iio/kfifo_buf.ko
+$ insmod drivers/staging/iio/iio_dummy_evgen.ko
+$ insmod drivers/staging/iio/iio_dummy.ko
+</code></pre>
+## 'RAW' access
+
+Mraa supports raw access
+
+###Channels
+
+###Attributes
+
+###Events
+
+###Triggers
+
+Activate the trigger in /sys/class/iio
+$ echo 1 > trigger0/trigger_now
+
+

docs/imraa.md

@@ -0,0 +1,63 @@
+# Building mraa with imraa	{#buildingimraa}
+Imraa allows seamless communication between the Arduino101 and your mraa
+projects. Imraa will flash an arduino101 and allow automatic loading of the
+MRAA_GENERIC_FIRMATA subplatform to the first process that calls imraa_init
+(done through mraa_init automatically)
+
+## Build dependencies
+To build imraa, you'll need to build mraa with -DIMRAA=ON and all the normal
+dependencies for build mraa, see [Building mraa](./building.md).
+You'll also need the following:
+* [dfu-utils-cross](https://github.com/arduino/dfu-utils-cross) or dfu 0.8 (0.9
+  does not work well with the 101). Precompiled binaries can be found on
+  [here](https://github.com/01org/intel-arduino-tools)
+* [json-c](https://github.com/json-c/json-c): likely called libjson-c-dev or
+  json-c-devel
+* libudev: likely called libudev-dev or libudev-devel
+
+## Basic build steps
+This will build mraa with imraa for the local default path. To build mraa for
+the system add `-DCMAKE_INSTALL_PREFIX=/usr` to the cmake command before
+running it.
+
+```bash
+mkdir build
+cd build
+cmake -DIMRAA=ON -DFIRMATA=ON ..
+make
+```
+
+After you've built mraa you can install using `make install`.
+
+## Running Imraa
+
+Before being able to use mraa to program the Arduino101 you will need to run
+imraa to flash the sketch file onto the board. The sketch file that imraa will
+look for is located here: [Arduino101 Sketch](http://iotdk.intel.com/misc/ConfigurableFirmataCurieImu.ino.bin).
+Once downloaded the file needs to be renamed and moved to the where mraa was
+installed. This is dependant on whether you installed locally or for the
+system. The example below is for a locally installed copy. Note this sketch is
+using ConfigurableFirmata + the [CurieIMU plugin](https://github.com/intel-iot-devkit/FirmataCurieIMU).
+
+
+```bash
+$ mv ConfigurableFirmataCurieImu.ino.bin firmata101.ino.bin
+$ mv firmata101.ino.bin /usr/local/share/mraa
+```
+
+You will also need to move the imraa config so that imraa can find it.
+```bash
+$ mv mraa/imraa/imraa.conf /etc/
+```
+
+To flash the board run imraa and it will create the lockfile and flash the
+Arduino101. You may need root permissions or to add yourself to the uucp or
+modem group to access the device node (typically /dev/ttyACM0).
+```
+$ imraa
+```
+
+After this is successful you will be able to use mraa like normal, in the
+background mraa will handle talking to the arduino101 by creating
+/tmp/imraa.lock which imraa_init() will parse on startup.
+

docs/index.java.md

@@ -0,0 +1,71 @@
+libmraa - Low Level Skeleton Library for Communication on GNU/Linux platforms
+==============
+
+Libmraa is a C/C++ library with bindings to Java, Python and JavaScript to
+interface with the I/O on Galileo, Edison & other platforms, with a structured
+and sane API where port names/numbering matches the board that you are on. Use
+of libmraa does not tie you to specific hardware with board detection done at
+runtime you can create portable code that will work across the supported
+platforms.
+
+The intent is to make it easier for developers and sensor manufacturers to map
+their sensors & actuators on top of supported hardware and to allow control of
+low level communication protocol by high level languages & constructs.
+
+## API
+
+These interfaces allow you to interact with all libmraa functionality. The
+Java classes directly wrap the C/C++ API and provide a near 1:1 mapping of
+functionality.
+
+<center>
+| C API Modules          | Java API Classes              |
+|:----------------------:|:----------------------------:|
+| @ref gpio.h "gpio"     | @ref mraa::Gpio "Gpio class" |
+| @ref i2c.h "i2c"       | @ref mraa::I2c "I2c class"   |
+| @ref aio.h "aio"       | @ref mraa::Aio "Aio class"   |
+| @ref pwm.h "pwm"       | @ref mraa::Pwm "Pwm class"   |
+| @ref spi.h "spi"       | @ref mraa::Spi "Spi class"   |
+| @ref uart.h "uart"     | @ref mraa::Uart "Uart class" |
+| @ref common.h "common" | @ref mraa::mraa "mraa class" |
+</center>
+
+### Hello Mraa
+@snippet HelloEdison.java Interesting
+
+## Supported platforms
+
+Specific platform information for supported platforms is documented here:
+
+- @ref galileorevd
+- @ref galileorevh
+- @ref edison
+- @ref de3815
+- @ref minnowmax
+- @ref rasppi
+- @ref bananapi
+- @ref beaglebone
+- @ref nuc5
+- @ref up
+- @ref grossetete
+- @ref ft4222
+
+## DEBUGGING
+
+Sometimes it just doesn't want to work, let us try and help you, you can file
+issues in github or join us in #mraa on freenode IRC, hang around for a little
+while because we're not necessarily on 24/7, but we'll get back to you! Have a
+glance at our @debugging page too
+
+## COMPILING
+
+More information on compiling is @ref building page.
+
+## CONTRIBUTING
+
+Please see the @ref contributing page, the @ref internals page may also be of
+use.
+
+## API Changelog
+
+Version @ref changelog here.

docs/index.md

@@ -0,0 +1,71 @@
+libmraa - Low Level Skeleton Library for Communication on GNU/Linux platforms
+==============
+
+Libmraa is a C/C++ library with bindings to Python, Javascript and Java to
+interface with the I/O on Galileo, Edison & other platforms, with a structured
+and sane API where port names/numbering matches the board that you are on. Use
+of libmraa does not tie you to specific hardware with board detection done at
+runtime you can create portable code that will work across the supported
+platforms.
+
+The intent is to make it easier for developers and sensor manufacturers to map
+their sensors & actuators on top of supported hardware and to allow control of
+low level communication protocol by high level languages & constructs.
+
+## API
+
+These interfaces allow you to interact with all libmraa functionality. The C++
+classes directly wrap the C API and provide a near 1:1 mapping of
+functionality.
+
+<center>
+| C API Modules          | C++ API Classes              |
+|:----------------------:|:----------------------------:|
+| @ref gpio.h "gpio"     | @ref mraa::Gpio "Gpio class" |
+| @ref i2c.h "i2c"       | @ref mraa::I2c "I2c class"   |
+| @ref aio.h "aio"       | @ref mraa::Aio "Aio class"   |
+| @ref pwm.h "pwm"       | @ref mraa::Pwm "Pwm class"   |
+| @ref spi.h "spi"       | @ref mraa::Spi "Spi class"   |
+| @ref uart.h "uart"     | @ref mraa::Uart "Uart class" |
+| @ref common.h "common" | @ref mraa "common"           |
+</center>
+
+### Hello Mraa
+@snippet hellomraa.c Interesting
+
+## Supported platforms
+
+Specific platform information for supported platforms is documented here:
+
+- @ref galileorevd
+- @ref galileorevh
+- @ref edison
+- @ref de3815
+- @ref minnowmax
+- @ref rasppi
+- @ref bananapi
+- @ref beaglebone
+- @ref nuc5
+- @ref up
+- @ref grossetete
+- @ref ft4222
+
+## DEBUGGING
+
+Sometimes it just doesn't want to work, let us try and help you, you can file
+issues in github or join us in #mraa on freenode IRC, hang around for a little
+while because we're not necessarily on 24/7, but we'll get back to you! Have a
+glance at our @debugging page too
+
+## COMPILING
+
+More information on compiling is @ref building page.
+
+## CONTRIBUTING
+
+Please see the @ref contributing page, the @ref internals page may also be of
+use.
+
+## API Changelog
+
+Version @ref changelog here.

docs/intel_de3815.md

@@ -0,0 +1,38 @@
+Intel(R) NUC DE3815tykhe                            {#de3815}
+=============
+
+The DE3815 NUC Kit is a single core Atom(TM) clocked at 1.46GHz.
+http://www.intel.com/content/www/us/en/nuc/nuc-kit-de3815tykhe.html
+
+Interface notes
+---------------
+**GPIO** Not yet implemented.
+
+**PWM** Functionality for the PWM is provided by the `pwm_lpss` module `CONFIG_PWM_LPSS`
+
+**I2C** Depending on your system you may need to load `i2c-dev`
+
+Custom Solutions Header mapping
+-------------------------------
+Based on: http://downloadmirror.intel.com/23745/eng/DE3815TYBE_TechProdSpec06.pdf
+
+| MRAA Number | Physical Pin | Function     | Notes                |
+|-------------|--------------|--------------|----------------------|
+| 0           | 1            | 1.8V sby     |                      |
+| 1           | 2            | GND          |                      |
+| 2           | 3            | HDMI_CEC     |                      |
+| 3           | 4            | DMIC_CLK     |                      |
+| 4           | 5            | 3.3V sby     |                      |
+| 5           | 6            | DMIC_DATA    |                      |
+| 6           | 7            | Key (no pin) |                      |
+| 7           | 8            | SMB_ALERT#   |                      |
+| 8           | 9            | 5V sby (2A)  |                      |
+| 9           | 10           | SCI_SMI_GPIO |                      |
+| 10          | 11           | PWM[0]       | PWM Chip 0 Channel 0 |
+| 11          | 12           | PWM[1]       | PWM Chip 0 Channel 1 |
+| 12          | 13           | I2C0_CLK     | /dev/i2c-0 SCL       |
+| 13          | 14           | I2C0_DATA    | /dev/i2c-0 SDA       |
+| 14          | 15           | I2C1_CLK     | /dev/i2c-1 SCL       |
+| 15          | 16           | I2C1_DATA    | /dev/i2c-1-SDA       |
+| 16          | 17           | SMB_CLK      |                      |
+| 17          | 18           | SMB_DATA     |                      |

docs/intel_nuc5.md

@@ -0,0 +1,46 @@
+Intel NUC NUC5i5MYBE                             {#nuc5}
+====================
+
+Pinmuxing on the 5th generation Intel NUCs is done in the BIOS. This is only
+tested on bios 0024+ (MYBDWi5v.86A). By default the custom solution header is
+disabled, currently in Linux (as of 4.2). Both i2c buses are currently
+supported.
+
+The NUCs supported are the NUC5i5MYBE & NUC5i3MYBE which also come as the
+NUC5i5MYHE and NUC5i3MYHE motherboards. It's possible that others expose the IO
+in a very similar way so could be supported, get in touch if you have one!
+
+In the BIOS you are required to enable the following:
+Devices -> Onboard Devices - GPIO Lockdown
+Select I2c under GPIO for the 12/13 14/15 pins
+
+Interface notes
+---------------
+
+**I2C** Depending on your system you may need to load `i2c-dev`
+
+Custom Solutions Header mapping
+-------------------------------
+
+The mapping is the same as the DE3815tykhe.
+
+| MRAA Number | Physical Pin | Function     | Notes                |
+|-------------|--------------|--------------|----------------------|
+| 0           | 1            | 1.8V sby     |                      |
+| 1           | 2            | GND          |                      |
+| 2           | 3            | HDMI_CEC     |                      |
+| 3           | 4            | DMIC_CLK     |                      |
+| 4           | 5            | 3.3V sby     |                      |
+| 5           | 6            | DMIC_DATA    |                      |
+| 6           | 7            | Key (no pin) |                      |
+| 7           | 8            | SMB_ALERT#   |                      |
+| 8           | 9            | 5V sby (2A)  |                      |
+| 9           | 10           | SCI_SMI_GPIO |                      |
+| 10          | 11           | PWM[0]       |                      |
+| 11          | 12           | PWM[1]       |                      |
+| 12          | 13           | I2C0_CLK     | /dev/i2c-0 SCL       |
+| 13          | 14           | I2C0_DATA    | /dev/i2c-0 SDA       |
+| 14          | 15           | I2C1_CLK     | /dev/i2c-1 SCL       |
+| 15          | 16           | I2C1_DATA    | /dev/i2c-1-SDA       |
+| 16          | 17           | SMB_CLK      |                      |
+| 17          | 18           | SMB_DATA     |                      |

docs/internals.md

@@ -0,0 +1,180 @@
+libmraa Internals                       {#internals}
+=================
+
+For building see @ref building. This will describe the general internal build
+of libmraa and will be useful to developers who'd like to understand more of
+how libmraa works or who'd like to add additional platforms. The internals will
+deal with the C API as that is the low level API which libmraa is built around.
+Note that C++ is simply a header only wrapper of the C API.
+
+libmraa has the philosophy that the board mapping is what we typically use in
+the API with the execption of i2c/spi bus numbering as they are typically not
+labelled on boards and so we use the kernel numbering scheme. Whilst this can
+confuse some, it's typically not an issue as platforms rarely expose more than
+one of these for user use and so when this is the case, libmraa will always use
+the bus in the pinmapper. For example edison uses i2c #6 but since there is
+only one, libmraa will try to be helpful and everything is treated as 6 when
+doing a mraa_i2c_init(). The _raw functions will override the pinmapper and can
+be accessed without a valid board configuration. This can be helpful either in
+development of platform configurations for mraa or when modifying kernels
+etc... Internally the mechanism is used heavily.
+
+In libmraa, all code is split into 7 modules, src/{i2c, spi, gpio, uart, pwm,
+aio and common}. These should be fairly self explanatory in goals/purpose but a
+few work in different ways. Public APIs are stored in api/ and internal headers
+are in include/
+
+### Logging ###
+
+Logging is now done purely in syslog(). Note that on platforms running systemd
+journald will intercept syslog(3) calls and log to the journal instead. You can
+set the log mask by using mraa_set_log_level(). Doing a DEBUG build of libmraa
+will also cause the DEBUG macro to be defined which will cause the syslog mask
+to be unset.
+
+### Contexts ###
+
+libmraa uses contexts to store all information, this context cannot be accessed
+by the user and so it's layout can and may be changed without warning to users.
+If an init() function fails it will return NULL and further calls with this
+context will lead to undefined behaviour.
+
+### Pinmapper ###
+
+The mraa_board_t is defined in mraa/common.h. It's a mostly static structure
+initialised during mraa_init(). The pinmap file in
+src/{arch}/{manufacturer}_{boardname}_{revision}.c then fills this array. It's
+also where platform hooks can be defined, functions that will be run at various
+'hook' points in the code.
+
+The mraa_pininfo_t structure needs to be set for the board pincount (set in a
+macro in the platform configuration header. Every pin will have a
+mraa_pincapabilities_t which will define what it can do. The doxygen
+documentation explains how this works but it's essentially a bitfield which
+needs to be set for every capability the pin can have. Gpios can have multiple
+muxes which will be set at the gpio init before it can be toggled.
+
+### i2c ###
+
+I2c from userspace in GNU/Linux is handled by character devices handled by the
+kernel driver i2c-dev. For more details the i2c/dev-interface documentation
+file in the kernel is the place to go.
+
+In libmraa, we re-use part of a library - libi2c from RoadNarrows -
+i2c/smbus.c. This library simply makes it easier for us to handle the error
+conditions that can arrise when writing on i2c buses. Essentially the API is
+fairly simple consisting of writes & reads.
+
+Careful - on alot of platforms i2cdetect will often crash. To findi your i2c
+addresses please look at your sensor's datasheet! If using i2cdetect most
+platforms do not support SMBus quick write so use the '-r' flag.
+
+### spi ###
+
+Mraa deals exclusively with spidev, so when we say bus we really mean bus +
+chip select from spidev. Spi(0) could lead to spidev5.1 and Spi(1) to
+spidev5.2. Typically on a micro using a random gpio as a chip select works
+well, and on some platforms if one is careful with threads this can work well
+with mraa. However when a kernel module shares the same bus as spidev (but on a
+different CS) this behaviour is *very* dangerous. Platforms such as Galileo
+Gen2 & Edison + Arduino breakout board work this way. Mraa will not help you in
+using a non hardware chip select, do so at your own peril!
+
+### gpio ###
+
+GPIO is probably the most complicated and odd module in libmraa. It is based on
+the gpiolib kernel driver framework which uses sysfs. There is a lot of good
+documentation in gpio/sysfs.txt in the kernel docs.
+
+The main issue is that gpios on hobbyist boards typically come with a number of
+muxers or level shifters and are often mapped in crazy ways. libmraa's goal is
+to make the label on your board match the API :) We hope that pleases you.
+
+Because boards are very different we use alot of platform hooks (@ref hooks) to
+make the initialisation work on all platforms. The hope is that simple
+platforms with no level shifters or expanders will work with just the pinmap
+definition.
+
+GPIOs are typically interfaced via sysfs because that's easier for us but we
+can also work with fast gpio. This is typically preffered to do mmap gpio
+access. This is however trickier and typically relies on lots of platform
+hooks. By default we support hitting /dev/mem or another device at specific
+addresses to toggle gpios which is how mmap access works on some boards.
+
+Note that in Linux gpios are numbered from ARCH_NR_GPIOS down. This means that
+if ARCH_NR_GPIOS is changed, the gpio numbering will change. In 3.18+ the
+default changed from 256 to 512, sadly the value cannot be viewed from
+userspace so we rely on the kernel version to extrapolate the likely value.
+
+### uart ###
+
+libmraa does not support UART/serial as there are many good libraries that do
+this already. In the future we may wrap or use one. However the class exists to
+set the pinmapper correctly for uart to work on some platforms.
+
+### pwm ###
+
+Internally everything with PWM in mraa is in microseconds because that's what
+the linux kernel uses and is probably all the granularity we'll ever
+need/achieve with the kind of hardware we're targetting. Board configuration
+pwm max/min values are always set in microseconds.
+
+### aio ###
+
+AIO pins are numbered after GPIO pins. This means that on Arduino style boards
+pin 14 is A0. Typically mraa will only support an ADC if a platform ships with
+one and has a good kernel module for it. Extra i2c/spi ADCs can be supported
+via something like UPM but are unlikely to receive support in mraa at the moment.
+
+Note that giving mraa_aio_init(0) will literally query the pinmapper for
+board->gpio_count + 0 so you must place your aio pins after gpio_count. This is
+the default behaviour but can of course be overriden by advance function
+pointers. Whilst maybe not the sanest of defaults, most of the hobbyist boards
+we deal with follow a naming pattern similar to Arduino or have no ADC so for
+now we have considered this sensible.
+
+### Initialisation ###
+
+mraa_init() needs to be called in order to initialise the platform files or
+'pinmap'. Because calling this is tedious libmraa uses a C constructor to run
+mraa_init on library load. This means that it is not possible to stop this
+running and all function calls like mraa_set_log_level() will not work during
+mraa_init(). This feature is supported by most sane compilers and libcs but you
+can turn off CTORS in uclibc, though I've yet to find a configuration with
+someone doing that. mraa_init() can be called multiple times if you feel like
+being 'safe'.
+
+In the SWIG modules mraa_init() is called during the %init stage of the module
+loading. This is simply to avoid mraa_init() running 'too' early, though I've
+never seen an issue in running it in a CTOR.
+
+### SWIG ###
+
+At the time when libmraa was created (still the case?) the only - working -
+API/wrapper generation tool that supported nodejs was SWIG. For more general
+information on SWIG please see the SWIG documentation.
+
+The src/{javascript, python} & src/mraa.i folders contain all the files for the
+SWIG generation. The C++ headers in api/mraa/ are given as input sources to
+SWIG. SWIG modules do not link to libmraa (although maybe that would be a good
+idea...)
+
+Typemaps are used heavily to map uint8_t* pointers to bytearrays and
+node_buffers. These are native python & node.js types that represent uint8_t
+data the best and are very well supported in both languages. Argument
+conversions and memory allocations are performed so the performance of using
+these functions compared to the C/C++ equivalent will likely be a little lower,
+however it is much more natural than using carrays.i typemap library.
+
+### NPM ###
+
+mraa is published on NPM, there is a target to prebuild a mraa src tarball that
+can be built with node-gyp. The way this works is to use the mraa_LIB_SRCS
+array to generate a binding.gyp file from the skeleton binding.gyp.cmake in
+src/javascript. Because we don't expect most NPM users to have SWIG we
+precompile the src/mraajsJAVASCRIPT_wrap.cxx. The src/version.c is already
+known since this is a static tarball so we write that too. These files are
+placed not in a build/ directory but in the main mraa directory. You can then
+tar the directory up and send it to NPM. This is done automatically on every
+commit by our automated build system.
+

docs/minnow_max.md

@@ -0,0 +1,58 @@
+Intel(R) Minnowboard Max               {#minnowmax}
+========================
+MinnowBoard MAX is an open hardware embedded board designed with the Intel(R)
+Atom(TM) E38xx series SOC (Fromerly Bay Trail).
+
+For product overview and faq see
+http://www.minnowboard.org/faq-minnowboard-max/
+
+For technical details see http://www.elinux.org/Minnowboard:MinnowMax
+
+Supported Firmware
+------------------
+mraa has only been tested with 64 bit firmware version 0.73 or later.
+
+SPI
+---
+For SPI support you need to load the low_speed_spidev kernel module and that
+will create the /dev/spidev0.0 device node. Mraa only knows about this one SPI
+bus and no other.
+
+Interface notes
+---------------
+The low speed I/O connector supported as per table below.  This assumes default
+BIOS settings, as they are not dynamcially detected If any changes are mode
+(Device Manager -> System Setup -> South Cluster -> LPSS & CSS) them mraa calls
+will not behave as expected.
+
+Documentation shows i2c on bus #5, ACPI shows it on bus #6, but driver uses
+bus #7.
+
+| MRAA Number | Physical Pin  | Function   | Sysfs GPIO | Notes                |
+|-------------|---------------|------------|------------|----------------------|
+| 1           | 1             | GND        |            |                      |
+| 2           | 2             | GND        |            |                      |
+| 3           | 3             | 5v         |            |                      |
+| 4           | 4             | 3.3v       |            |                      |
+| 5           | 5             | SPI_CS     | 220        | SPI (via low_speed)  |
+| 6           | 6             | UART1_TXD  | 225        | UART1                |
+| 7           | 7             | SPI_MISO   | 221        | SPI (via low_speed)  |
+| 8           | 8             | UART1_RXD  | 224        | UART1                |
+| 9           | 9             | SPI_MOSI   | 222        | SPI (via low_speed)  |
+| 10          | 10            | UART1_CTS  | 227        | GPIO                 |
+| 11          | 11            | SPI_CLK    | 223        | SPI (via low_speed)  |
+| 12          | 12            | UART1_RTS  | 226        | GPIO                 |
+| 13          | 13            | I2C_SCL    | 243        | /dev/i2c-7           |
+| 14          | 14            | I2S_CLK    | 216        | GPIO                 |
+| 15          | 15            | I2C_SDA    | 242        | /dev/i2c-7           |
+| 16          | 16            | I2S_FRM    | 217        | GPIO                 |
+| 17          | 17            | UART2_TXD  | 229        | UART2                |
+| 18          | 18            | I2S_DO     | 219        | GPIO                 |
+| 19          | 19            | UART2_RXD  | 228        | UART2                |
+| 20          | 20            | I2S_DI     | 218        | GPIO                 |
+| 21          | 21            | GPIO_S5_0  |  82        | GPIO                 |
+| 22          | 22            | PWM0       | 248        | PWM Chip 0 Channel 0 |
+| 23          | 23            | GPIO_S5_1  |  83        | GPIO                 |
+| 24          | 24            | PWM1       | 249        | PWM Chip 1 Channel 0 |
+| 25          | 25            | S5_4       |  84        | GPIO                 |
+| 26          | 26            | IBL_8254   | 208        | GPIO                 |

docs/mock.md

@@ -0,0 +1,92 @@
+Mock platform   {#mock}
+=============
+
+Mocking capability allows libmraa user to work with the library without any real
+hardware available. Enabling this requires library recompilation with architecture
+override (see Building section below). When mock is enabled, library simulates
+actual HW operations at the backend so that for the application it looks
+like a usual board. Being implemented at the backend, the functionality is available
+in all language bindings libmraa supports.
+
+Board configuration
+-------------------
+
+This feature is yet in the experimental mode and not all functionality is available.
+Right now we simulate a single generic board with:
+* GPIO (without ISR)
+* ADC with 10 (std)/12 (max) bit resolution, which returns random values on read
+* Single I2C bus with one device at address 0x33 and 10 bytes of register space,
+which can be read or written in bytes or words (big-endian). Technically those
+registers are just an array of `uint8_t`, so you can treat them as 10 single-byte
+registers or 5 single-word ones or a mix thereof.
+
+We plan to develop it further and all [contributions](../CONTRIBUTING.md) are more than welcome.
+
+See the table below for pin layout and features
+
+| MRAA Number | Pin Name |            Notes                      |
+|-------------|----------|---------------------------------------|
+| 0           | GPIO0    | GPIO pin, no muxing, no ISR           |
+| 1           | ADC0     | AIO pin, returns random value on read |
+| 2           | I2C0SDA  | SDA pin for I2C0 bus                  |
+| 3           | I2C0SCL  | SCL pin for I2C0 bus                  |
+
+Building
+--------
+
+Generally all the building steps are the same as listed
+in the [main building guide](./building.md), you just need to set some specific
+CMake options.
+
+### Linux
+
+To build under Linux, follow standard instructions, just make sure to set
+the `-DBUILDARCH="MOCK"` CMake option.
+
+### Windows
+
+Mocking capability allows us to build and use libmraa under Windows. That helps
+if you e.g. don't want to leave your customary Windows-based Python IDE, but
+want to develop libmraa-based programs.
+
+Building Node.js bindings was not yet tested under Windows as MSYS2
+does not have a ready-made package. Java was not tested either.
+
+#### Prerequisites
+
+You'll need the following to build libmraa under Windows:
+
+* [MSYS2](http://mingw-w64.org/doku.php/download/msys2) basic installation
+* Several additional packages, install them by running
+
+  ```bash
+  pacman -S cmake base-devel gcc git
+  ```
+
+#### Compiling
+
+The procedure is conceptually the same as under Linux - you first need to run
+CMake with specific options to generate makefiles and then run make to build everything.
+
+* Run MSYS2 shell (not a MinGW one)
+* Clone the libmraa git repo (let's assume into `/home/test/mraa/mraa-src` dir)
+* Create a build directory outside of the clone one (let's say `/home/test/mraa/mraa-build`)
+* Run CMake, switching off unsupported options and enabling mock platform:
+
+  ```bash
+  cmake ../mraa-src/ -DBUILDARCH="MOCK" -DBUILDSWIGNODE=OFF -DENABLEEXAMPLES=OFF
+  ```
+
+* Make, install and test:
+
+  ```bash
+  make clean && make install && make test
+  ```
+
+  All tests should pass.
+
+**Note:** To have autocompletion in Python IDE, just point it to MSYS2's Python
+and make sure to specify any additional paths pointing to site-packages dir
+with mraa module if IDE requires that ("Interpreter Paths" in PyCharm).
+With the above settings the module will be installed into `/usr/local/lib/python2.7/site-packages`
+and the libmraa itself - into `/usr/local/bin`.

docs/npm.md

@@ -0,0 +1,49 @@
+mraa NPM pkg                        {#npmpkg}
+============
+
+What you are looking at is a tarball made after 'make npmpkg' has been run on
+our build system. It contains a few prebuilt files in order to build easily
+with node-gyp on most systems. Note that this is not the preffered way of
+building libmraa and if you'd like to contribute, please learn how the build
+system works and get your sources from git.
+
+Any patches for mraajsJAVASCRIPT_wrap.cxx or version.c will be ignored as these
+are automatically generated files. When you execute a build from node-gyp/npm
+you do not generate the mraajsJAVASCRIPT_wrap.cxx file but rather use one that
+we have generated for you.
+
+Recreating tarball
+------------------
+
+You can run the following commands to 'generate' this tarball from a checkout
+of mraa.  It's important to not leave a .git directory as npm will then
+consider the tarball contains a full git tree. You also you need a top level
+dir which matches the npm pkg name so we create one with a symlink and add the
+'h' flag to tar to follow symlinks.
+
+~~~~~~~~~~~~~{.sh}
+mkdir build
+cd build
+cmake -DBUILDSWIGNODE=ON  ..
+make npmpkg
+ln -s ../ mraa
+tar hczv --exclude='build*' --exclude='.gitignore' --exclude='.git' --exclude='build*/*' --exclude='.git/*' -f mraa.tar.gz mraa
+~~~~~~~~~~~~~
+
+Building with node-gyp
+----------------------
+
+You can build with node-gyp using the binding.gyp file, obviously this requires
+either the prebuilt tarball from npm or to do the above to generate it with the
+npmpkg target. Note the --target='' flag will not work since binding.gyp will
+do a check for the running node v8 version, you'll also need to run that
+version (or close to) in your $PATH.
+
+~~~~~~~~~~~{.sh}
+node-gyp configure --python=/usr/bin/python2
+node-gyp build --python=/usr/bin/python2 --verbose
+~~~~~~~~~~~
+
+Note that no cross compilation is available without modifying the --arch flag
+manually. If you want to cross compile, it's recommended to use cmake.
+

docs/platform-hooks.md

@@ -0,0 +1,33 @@
+platform-hooks                             {#hooks}
+==============
+
+Hooks can be defined per supported platform to allow for highly custom
+operations if needed.  This feature of MRAA should only be used by developers
+defining the board definitions, NOT an end user.
+
+##Types of Hooks
+
+###REPLACE
+Defining a replace function will entirely replace the associate function. This
+should only be done if your new function can handle everything the mraa
+function would normally.
+
+###PRE
+Any functionality defined here will be performed when the main function is
+called.
+
+###POST
+Any functionality perfomed here is done just before the normal function
+returns. All post functions will have passed into them the return value that
+would normally be returned.
+
+##Hooks
+### GPIO
+ * init (pre-post)
+ * mode (replace-pre-post)
+ * dir (replace-pre-post)
+ * write (pre-post)
+ * use-mmaped (replace-pre-post)
+
+### I2C
+ * init (pre-post) - On RAW

docs/raspberry_pi.md

@@ -0,0 +1,100 @@
+Raspberry Pi    {#rasppi}
+============
+
+The Raspberry Pi is based on the Broadcom BCM2835 system on a chip, which
+includes an ARM1176JZF-S 700 MHz processor, VideoCore IV GPU and was originally
+shipped with 256 megabytes of RAM, later upgraded (Model B & Model B+) to 512
+MB. The Raspberry Pi 2 is based on an armv7 CPU but shares a number of
+similarities with the original.
+
+Revision Support
+----------------
+Raspberry Pi A/B/A+/B+
+Raspberry Pi 2 B
+
+Interface notes
+---------------
+
+**PWM** Whilst the Raspberry Pi is meant to have 1 PWM channel this is currently not supported.
+
+Pin Mapping
+-----------
+
+This pin mapping refers to the first generation 'B' model Pi but gives an idea
+as to what the values are from mraa. Note that there is an emum to use wiringPi
+style numbers.
+
+| MRAA Number | Physical Pin | Function |
+|-------------|--------------|----------|
+| 1           | P1-01        | 3V3 VCC  |
+| 2           | P1-02        | 5V VCC   |
+| 3           | P1-03        | I2C SDA  |
+| 4           | P1-04        | 5V VCC   |
+| 5           | P1-05        | I2C SCL  |
+| 6           | P1-06        | GND      |
+| 7           | P1-07        | GPIO(4)  |
+| 8           | P1-08        | UART TX  |
+| 9           | P1-09        | GND      |
+| 10          | P1-10        | UART RX  |
+| 11          | P1-11        | GPIO(17) |
+| 12          | P1-12        | GPIO(18) |
+| 13          | P1-13        | GPIO(21) |
+| 14          | P1-14        | GND      |
+| 15          | P1-15        | GPIO(22) |
+| 16          | P1-16        | GPIO(23) |
+| 17          | P1-17        | 3V3 VCC  |
+| 18          | P1-18        | GPIO(24) |
+| 19          | P1-19        | SPI MOSI |
+| 20          | P1-20        | GND      |
+| 21          | P1-21        | SPI MISO |
+| 22          | P1-22        | GPIO(25) |
+| 23          | P1-23        | SPI SCL  |
+| 24          | P1-24        | SPI CS0  |
+| 25          | P1-25        | GND      |
+| 26          | P1-26        | SPI CS1  |
+
+
+The following pin mapping applies to the new Raspberry Pi model 2 and B+. Note that GPIO(21) is now GPIO(27)
+
+| MRAA Number | Physical Pin | Function |
+|-------------|--------------|----------|
+| 1           | P1-01        | 3V3 VCC  |
+| 2           | P1-02        | 5V VCC   |
+| 3           | P1-03        | I2C SDA  |
+| 4           | P1-04        | 5V VCC   |
+| 5           | P1-05        | I2C SCL  |
+| 6           | P1-06        | GND      |
+| 7           | P1-07        | GPIO(4)  |
+| 8           | P1-08        | UART TX  |
+| 9           | P1-09        | GND      |
+| 10          | P1-10        | UART RX  |
+| 11          | P1-11        | GPIO(17) |
+| 12          | P1-12        | GPIO(18) |
+| 13          | P1-13        | GPIO(27) |
+| 14          | P1-14        | GND      |
+| 15          | P1-15        | GPIO(22) |
+| 16          | P1-16        | GPIO(23) |
+| 17          | P1-17        | 3V3 VCC  |
+| 18          | P1-18        | GPIO(24) |
+| 19          | P1-19        | SPI MOSI |
+| 20          | P1-20        | GND      |
+| 21          | P1-21        | SPI MISO |
+| 22          | P1-22        | GPIO(25) |
+| 23          | P1-23        | SPI SCL  |
+| 24          | P1-24        | SPI CS0  |
+| 25          | P1-25        | GND      |
+| 26          | P1-26        | SPI CS1  |
+| 27          | P1-27        | I2C SDA1 |
+| 28          | P1-28        | I2C SCL1 |
+| 29          | P1-29        | GPIO(5)  |
+| 30          | P1-30        | GND      |
+| 31          | P1-31        | GPIO(6)  |
+| 32          | P1-32        | GPIO(12) |
+| 33          | P1-33        | GPIO(13) |
+| 34          | P1-34        | GND      |
+| 35          | P1-35        | SPI MISO1|
+| 36          | P1-36        | GPIO(16) |
+| 37          | P1-37        | GPIO(26) |
+| 38          | P1-38        | SPI MOSI1|
+| 39          | P1-39        | GND      |
+| 40          | P1-40        | SPI SCL1 |

docs/testing.md

@@ -0,0 +1,42 @@
+# Testing mraa
+
+Mraa has a test suite written in python which can be run by users to check
+their platform is working correctly. The aim is to have a full API coverage
+using python scripts using unittests. Currently the test suite is far from
+complete.
+
+## Supported platforms
+
+Intel Galileo v1 was used and is currently the only supported platform. Tests
+were conducted on Intel Galileo v2, but because of hardware differences, some
+failures may occur. Logic will be added to auto-select board to work on. To
+start with boards with an arduino type shield/layout should work
+
+## How to run these tests
+
+You need to compile from source with -DBUILDSWIGPYTHON=ON and then tests can be
+executed with:
+$ make test
+
+More detail can be seen by running:
+$ ctest -VV
+
+Note tests will not run on platforms which cannot initialise, checking the
+amount of 'skipped' tests can be useful
+
+## What's next?
+
+At this point tests were made to do a quick sanity check. In the future the
+followings will be implemented:
+ * Create a physical layer that will emulate sensors behavior and generate I/O
+   signals. This layer will be available to the community and will help replace
+   the need of specific sensors. The simplest solution will be chosen allowing
+   anyone to rapidly implement it.
+ * Implement stress tests over long periods of time. This feature alone is
+   possible only with the use of a physical layer since it will behave both as
+   signals generator and interpreter.
+ * Analyze a tests result collection solution (and after, interpretation). This
+   is useful since tests mean nothing without a history and possibility to
+   check on results.
+ * Any idea welcome!
+

docs/up.md

@@ -0,0 +1,84 @@
+UP Board   {#up}
+============
+
+UP Board is based on the Intel(R) Atom(TM) x5-Z83xx SoC (formerly Cherry Trail).
+It includes 2GB RAM, 16/32GB eMMC flash, 6 USB2.0 ports, 1 USB 3.0 OTG port,
+1 Gigabit Ethernet, HDMI and DSI Graphics ports, RTC and a 40-pin I/O header.
+The form-factor for the board is based on the Raspberry Pi 2, and can be used
+with many of the add-on HAT boards designed for the Raspberry Pi 2.
+
+Interface notes
+---------------
+
+**PWM** PWM frequency range is from 293 Hz to 6.4 MHz.  8-bit resolution is
+supported for duty-cycle adjustments, but this reduces for frequencies > 97.6kHz
+
+**I2C** 2 I2C channels support standard-mode (100kHz) and fast-mode (400kHz).
+Bus frequency can be selected in BIOS settings.  Note that, unlike Raspberry Pi,
+the I2C controller issues Repeated-START commands for combined transactions
+(e.g. a write-then-read transaction) which may not be supported by some I2C
+slave devices.  For such devices, it is advisable to use separate write and
+read transactions to ensure that Repeated-STARTs are not issued.
+
+**SPI** Bus frequencies up to 25MHz are supported, in steps which are less
+granular at higher speeds.  E.g. Available speeds include:
+ 25MHz, 12.5MHz, 8.33MHz, 6.25MHz, 5MHz, 4.167MHz, 3.571MHz, 3.125MHz, etc.
+Please be aware that speeds in between those steps will be rounded UP to the
+next nearest available speed, and capped at 25MHz.
+At the time of writing, only a single native chip-select is available (SPI CS0).
+
+**UART** 2 high-speed UARTs are available, supporting baud rates up to
+support baud rates between 300 and 3686400.  Hardware flow-control signals are
+not exposed, so software flow-control may be needed for rates above 115200.
+A console UART is also available but is not fully supported at this time.
+
+Pin Mapping
+-----------
+
+The GPIO numbering in the following pin mapping is based on the Raspberry Pi
+model 2 and B+ numbering scheme.
+
+Note that there is an enum to use wiringPi style numbers.
+
+| MRAA Number | Physical Pin | Function | Sysfs GPIO | Notes                |
+|-------------|--------------|----------|------------|----------------------|
+| 1           | P1-01        | 3V3 VCC  |            |                      |
+| 2           | P1-02        | 5V VCC   |            |                      |
+| 3           | P1-03        | I2C SDA1 |  2         | I2C1 (/dev/i2c-1)    |
+| 4           | P1-04        | 5V VCC   |            |                      |
+| 5           | P1-05        | I2C SCL1 |  3         | I2C1 (/dev/i2c-1)    |
+| 6           | P1-06        | GND      |            |                      |
+| 7           | P1-07        | GPIO(4)  |  4         |                      |
+| 8           | P1-08        | UART TX1 | 14         | UART1 (/dev/ttyS1)   |
+| 9           | P1-09        | GND      |            |                      |
+| 10          | P1-10        | UART RX1 | 15         | UART1 (/dev/ttyS1)   |
+| 11          | P1-11        | GPIO(17) | 17         |                      |
+| 12          | P1-12        | I2S CLK  | 18         | I2S0 (PCM Audio)     |
+| 13          | P1-13        | UART RX2 | 27         | UART2 (/dev/ttyS2)   |
+| 14          | P1-14        | GND      |            |                      |
+| 15          | P1-15        | GPIO(22) | 22         |                      |
+| 16          | P1-16        | GPIO(23) | 23         |                      |
+| 17          | P1-17        | 3V3 VCC  |            |                      |
+| 18          | P1-18        | GPIO(24) | 24         |                      |
+| 19          | P1-19        | SPI MOSI | 10         | SPI2 (/dev/spidev2.x)|
+| 20          | P1-20        | GND      |            |                      |
+| 21          | P1-21        | SPI MISO | 9          | SPI2 (/dev/spidev2.x)|
+| 22          | P1-22        | UART TX2 | 25         | UART2 (/dev/ttyS2)   |
+| 23          | P1-23        | SPI SCL  | 11         | SPI2 (/dev/spidev2.x)|
+| 24          | P1-24        | SPI CS0  | 8          | SPI2 (/dev/spidev2.0)|
+| 25          | P1-25        | GND      |            |                      |
+| 26          | P1-26        | SPI CS1  | 7          | SPI2 (/dev/spidev2.1)|
+| 27          | P1-27        | I2C SDA0 | 0          | I2C0 (/dev/i2c-0)    |
+| 28          | P1-28        | I2C SCL0 | 1          | I2C0 (/dev/i2c-0)    |
+| 29          | P1-29        | GPIO(5)  | 5          |                      |
+| 30          | P1-30        | GND      |            |                      |
+| 31          | P1-31        | GPIO(6)  | 6          |                      |
+| 32          | P1-32        | PWM0     | 12         | PWM Chip 0 Channel 0 |
+| 33          | P1-33        | PWM1     | 13         | PWM Chip 1 Channel 0 |
+| 34          | P1-34        | GND      |            |                      |
+| 35          | P1-35        | I2S FRM  | 19         | I2S0 (PCM Audio)     |
+| 36          | P1-36        | GPIO(16) | 16         |                      |
+| 37          | P1-37        | GPIO(26) | 26         |                      |
+| 38          | P1-38        | I2S DIN  | 20         | I2S0 (PCM Audio)     |
+| 39          | P1-39        | GND      |            |                      |
+| 40          | P1-40        | I2S DOUT | 21         | I2S0 (PCM Audio)     |

examples/CMakeLists.txt

@@ -1,17 +1,61 @@
 add_executable (i2c_HMC5883L i2c_HMC5883L.c)
-add_executable (hellomaa hellomaa.c)
+add_executable (hellomraa hellomraa.c)
 add_executable (cycle-pwm3 cycle-pwm3.c)
 add_executable (blink-io blink-io.c)
 add_executable (analogin_a0 analogin_a0.c)
 add_executable (isr_pin6 isr_pin6.c)
 add_executable (gpio_read6 gpio_read6.c)
+add_executable (spi_mcp4261 spi_mcp4261.c)
+add_executable (mmap-io2 mmap-io2.c)
+add_executable (blink_onboard blink_onboard.c)
+add_executable (uart uart.c)
+add_executable (mraa-gpio mraa-gpio.c)
+add_executable (mraa-i2c mraa-i2c.c)
+add_executable (spi_max7219 spi_max7219.c)
+add_executable (iio_driver iio_driver.c)
 
-include_directories(${PROJECT_SOURCE_DIR}/api ${PROJECT_SOURCE_DIR}/include)
+include_directories(${PROJECT_SOURCE_DIR}/api)
+# FIXME Hack to access mraa internal types used by mraa-i2c
+include_directories(${PROJECT_SOURCE_DIR}/include)
+include_directories(${PROJECT_SOURCE_DIR}/api/mraa)
 
-target_link_libraries (hellomaa maa ${CMAKE_THREAD_LIBS_INIT})
-target_link_libraries (i2c_HMC5883L maa m ${CMAKE_THREAD_LIBS_INIT})
-target_link_libraries (cycle-pwm3 maa ${CMAKE_THREAD_LIBS_INIT})
-target_link_libraries (blink-io maa ${CMAKE_THREAD_LIBS_INIT})
-target_link_libraries (analogin_a0 maa ${CMAKE_THREAD_LIBS_INIT})
-target_link_libraries (isr_pin6 maa ${CMAKE_THREAD_LIBS_INIT})
-target_link_libraries (gpio_read6 maa ${CMAKE_THREAD_LIBS_INIT})
+target_link_libraries (hellomraa mraa)
+target_link_libraries (i2c_HMC5883L mraa m)
+target_link_libraries (cycle-pwm3 mraa)
+target_link_libraries (blink-io mraa)
+target_link_libraries (analogin_a0 mraa)
+target_link_libraries (isr_pin6 mraa)
+target_link_libraries (gpio_read6 mraa)
+target_link_libraries (spi_mcp4261 mraa)
+target_link_libraries (mmap-io2 mraa)
+target_link_libraries (blink_onboard mraa)
+target_link_libraries (uart mraa)
+target_link_libraries (mraa-gpio mraa)
+target_link_libraries (mraa-i2c mraa)
+target_link_libraries (spi_max7219 mraa)
+target_link_libraries (iio_driver mraa)
+
+if (ONEWIRE)
+  add_executable (uart_ow uart_ow.c)
+  target_link_libraries (uart_ow mraa)
+endif ()
+
+if (FIRMATA)
+  add_executable (firmata_curie_imu firmata_curie_imu.c)
+  add_executable (i2c_firmata i2c_firmata.c)
+  target_link_libraries (firmata_curie_imu mraa)
+  target_link_libraries (i2c_firmata mraa)
+endif ()
+
+add_subdirectory (c++)
+
+install (DIRECTORY ${PROJECT_SOURCE_DIR}/examples/ DESTINATION ${CMAKE_INSTALL_DATADIR}/mraa/examples)
+
+if (INSTALLGPIOTOOL AND NOT INSTALLTOOLS)
+   install (TARGETS mraa-gpio DESTINATION bin)
+endif()
+
+if (INSTALLTOOLS)
+   install (TARGETS mraa-gpio DESTINATION bin)
+   install (TARGETS mraa-i2c DESTINATION bin)
+endif()

examples/analogin_a0.c

@@ -23,26 +23,30 @@
  */
 
 #include <unistd.h>
+//! [Interesting]
+#include "mraa/aio.h"
 
-#include "aio.h"
-
-int main ()
+int
+main()
 {
-    maa_init();
-    maa_aio_context* adc_a0;
+    mraa_aio_context adc_a0;
     uint16_t adc_value = 0;
+    float adc_value_float = 0.0;
 
-    adc_a0 = maa_aio_init(0);
+    adc_a0 = mraa_aio_init(0);
     if (adc_a0 == NULL) {
         return 1;
     }
 
-    for(;;) {
-        adc_value = maa_aio_read(adc_a0);
+    for (;;) {
+        adc_value = mraa_aio_read(adc_a0);
+        adc_value_float = mraa_aio_read_float(adc_a0);
         fprintf(stdout, "ADC A0 read %X - %d\n", adc_value, adc_value);
+        fprintf(stdout, "ADC A0 read float - %.5f\n", adc_value_float);
     }
 
-    maa_aio_close(adc_a0);
+    mraa_aio_close(adc_a0);
 
-    return MAA_SUCCESS;
+    return MRAA_SUCCESS;
 }
+//! [Interesting]

examples/blink-io.c

@@ -28,7 +28,7 @@
 #include <signal.h>
 #include <stdlib.h>
 
-#include "gpio.h"
+#include "mraa.h"
 
 #define DEFAULT_IOPIN 8
 
@@ -45,9 +45,9 @@ sig_handler(int signo)
 }
 
 int
-main(int argc, char **argv)
+main(int argc, char** argv)
 {
-    maa_result_t r = MAA_SUCCESS;
+    mraa_result_t r = MRAA_SUCCESS;
     iopin = DEFAULT_IOPIN;
 
     if (argc < 2) {
@@ -56,35 +56,38 @@ main(int argc, char **argv)
         iopin = strtol(argv[1], NULL, 10);
     }
 
-    maa_init();
-    fprintf(stdout, "MAA Version: %s\nStarting Blinking on IO%d\n",
-            maa_get_version(), iopin);
+    mraa_init();
+    fprintf(stdout, "MRAA Version: %s\nStarting Blinking on IO%d\n", mraa_get_version(), iopin);
 
-    maa_gpio_context* gpio;
-    gpio = maa_gpio_init(iopin);
-    printf("Initialised pin%d which is atually pin%d\n", iopin, gpio->pin);
+    mraa_gpio_context gpio;
+    gpio = mraa_gpio_init(iopin);
+    if (gpio == NULL) {
+        fprintf(stderr, "Are you sure that pin%d you requested is valid on your platform?", iopin);
+        exit(1);
+    }
+    printf("Initialised pin%d\n", iopin);
 
     // set direction to OUT
-    r = maa_gpio_dir(gpio, MAA_GPIO_OUT);
-    if (r != MAA_SUCCESS) {
-        maa_result_print(r);
+    r = mraa_gpio_dir(gpio, MRAA_GPIO_OUT);
+    if (r != MRAA_SUCCESS) {
+        mraa_result_print(r);
     }
 
     signal(SIGINT, sig_handler);
 
     while (running == 0) {
-        r = maa_gpio_write(gpio, 0);
-        if (r != MAA_SUCCESS) {
-            maa_result_print(r);
+        r = mraa_gpio_write(gpio, 0);
+        if (r != MRAA_SUCCESS) {
+            mraa_result_print(r);
         } else {
             printf("off\n");
         }
 
         sleep(1);
 
-        r = maa_gpio_write(gpio, 1);
-        if (r != MAA_SUCCESS) {
-            maa_result_print(r);
+        r = mraa_gpio_write(gpio, 1);
+        if (r != MRAA_SUCCESS) {
+            mraa_result_print(r);
         } else {
             printf("on\n");
         }
@@ -92,9 +95,9 @@ main(int argc, char **argv)
         sleep(1);
     }
 
-    r = maa_gpio_close(gpio);
-    if (r != MAA_SUCCESS) {
-        maa_result_print(r);
+    r = mraa_gpio_close(gpio);
+    if (r != MRAA_SUCCESS) {
+        mraa_result_print(r);
     }
 
     return r;

examples/blink_onboard.c

@@ -0,0 +1,83 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <unistd.h>
+
+#include "mraa/gpio.h"
+
+int
+main(int argc, char** argv)
+{
+    mraa_platform_t platform = mraa_get_platform_type();
+    mraa_gpio_context gpio, gpio_in = NULL;
+    const char* board_name = mraa_get_platform_name();
+    int ledstate = 0;
+
+    switch (platform) {
+        case MRAA_INTEL_GALILEO_GEN1:
+            gpio = mraa_gpio_init_raw(3);
+            break;
+        case MRAA_INTEL_MINNOWBOARD_MAX:
+            // there is no onboard LED that we can flash on the minnowboard max
+            // but on the calamari lure pin 21 is an LED. If you don't have the
+            // lure put an LED on pin 21
+            gpio = mraa_gpio_init(21);
+            break;
+        default:
+            gpio = mraa_gpio_init(13);
+    }
+
+    fprintf(stdout, "Welcome to libmraa\n Version: %s\n Running on %s\n", mraa_get_version(), board_name);
+
+
+    if (gpio == NULL) {
+        fprintf(stdout, "Could not initilaize gpio\n");
+        return 1;
+    }
+
+    // on platforms with physical button use gpio_in
+    if (platform == MRAA_INTEL_MINNOWBOARD_MAX) {
+        gpio_in = mraa_gpio_init(14);
+        if (gpio_in != NULL) {
+            mraa_gpio_dir(gpio_in, MRAA_GPIO_IN);
+            // S1 on minnowboardmax's calamari lure maps to pin 14, SW1 != S1
+            fprintf(stdout, "Press and hold S1 to stop, Press SW1 to shutdown!\n");
+        }
+    }
+
+    mraa_gpio_dir(gpio, MRAA_GPIO_OUT);
+
+    for (;;) {
+        if (gpio_in != NULL && mraa_gpio_read(gpio_in) == 0) {
+            return 0;
+        }
+        ledstate = !ledstate;
+        mraa_gpio_write(gpio, !ledstate);
+        sleep(1);
+    }
+
+    return 0;
+}

examples/c++/AioA0.cpp

@@ -0,0 +1,49 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+//! [Interesting]
+#include "mraa.hpp"
+
+int
+main()
+{
+    uint16_t adc_value;
+    float adc_value_float;
+    mraa::Aio* a0;
+
+    a0 = new mraa::Aio(0);
+    if (a0 == NULL) {
+        return MRAA_ERROR_UNSPECIFIED;
+    }
+
+    for (;;) {
+        adc_value = a0->read();
+        adc_value_float = a0->readFloat();
+        fprintf(stdout, "ADC A0 read %X - %d\n", adc_value, adc_value);
+        fprintf(stdout, "ADC A0 read float - %.5f\n", adc_value_float);
+    }
+
+    return MRAA_SUCCESS;
+}
+//! [Interesting]

examples/c++/Blink-IO.cpp

@@ -0,0 +1,77 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <signal.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+
+#include "mraa.hpp"
+#define DEFAULT_IOPIN 8
+
+static int iopin;
+int running = 0;
+
+void
+sig_handler(int signo)
+{
+    if (signo == SIGINT) {
+        printf("closing IO%d nicely\n", iopin);
+        running = -1;
+    }
+}
+int
+main(int argc, char** argv)
+{
+    if (argc < 2) {
+        printf("Provide an int arg if you want to flash on something other than %d\n", DEFAULT_IOPIN);
+        iopin = DEFAULT_IOPIN;
+    } else {
+        iopin = strtol(argv[1], NULL, 10);
+    }
+
+    signal(SIGINT, sig_handler);
+
+    //! [Interesting]
+    mraa::Gpio* gpio = new mraa::Gpio(iopin);
+    if (gpio == NULL) {
+        return mraa::ERROR_UNSPECIFIED;
+    }
+    mraa::Result response = gpio->dir(mraa::DIR_OUT);
+    if (response != mraa::SUCCESS) {
+        mraa::printError(response);
+        return 1;
+    }
+
+    while (running == 0) {
+        response = gpio->write(1);
+        sleep(1);
+        response = gpio->write(0);
+        sleep(1);
+    }
+    delete gpio;
+    return response;
+    //! [Interesting]
+}

examples/c++/CMakeLists.txt

@@ -0,0 +1,26 @@
+enable_language(CXX)
+
+add_executable (AioA0 AioA0.cpp)
+add_executable (blink-io-cpp Blink-IO.cpp)
+add_executable (Pwm3-cycle Pwm3-cycle.cpp)
+add_executable (I2c-compass I2c-compass.cpp)
+add_executable (Spi-pot Spi-pot.cpp)
+add_executable (Uart Uart-example.cpp)
+add_executable (Isr-pin6 Isr-pin6.cpp)
+add_executable (Iio-dummy Iio-dummy.cpp)
+
+include_directories(${PROJECT_SOURCE_DIR}/api)
+
+target_link_libraries (AioA0 mraa stdc++)
+target_link_libraries (blink-io-cpp mraa stdc++)
+target_link_libraries (Pwm3-cycle mraa stdc++)
+target_link_libraries (I2c-compass mraa stdc++ m)
+target_link_libraries (Spi-pot mraa stdc++)
+target_link_libraries (Uart mraa stdc++)
+target_link_libraries (Isr-pin6 mraa stdc++)
+target_link_libraries (Iio-dummy mraa stdc++)
+
+if (ONEWIRE)
+  add_executable (UartOW UartOW.cpp)
+  target_link_libraries (UartOW mraa stdc++)
+endif ()

examples/c++/I2c-compass.cpp

@@ -0,0 +1,144 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <unistd.h>
+#include <signal.h>
+
+#include "mraa.hpp"
+#include "math.h"
+
+#define MAX_BUFFER_LENGTH 6
+#define HMC5883L_I2C_ADDR 0x1E
+
+// configuration registers
+#define HMC5883L_CONF_REG_A 0x00
+#define HMC5883L_CONF_REG_B 0x01
+
+// mode register
+#define HMC5883L_MODE_REG 0x02
+
+// data register
+#define HMC5883L_X_MSB_REG 0
+#define HMC5883L_X_LSB_REG 1
+#define HMC5883L_Z_MSB_REG 2
+#define HMC5883L_Z_LSB_REG 3
+#define HMC5883L_Y_MSB_REG 4
+#define HMC5883L_Y_LSB_REG 5
+#define DATA_REG_SIZE 6
+
+// status register
+#define HMC5883L_STATUS_REG 0x09
+
+// ID registers
+#define HMC5883L_ID_A_REG 0x0A
+#define HMC5883L_ID_B_REG 0x0B
+#define HMC5883L_ID_C_REG 0x0C
+
+#define HMC5883L_CONT_MODE 0x00
+#define HMC5883L_DATA_REG 0x03
+
+// scales
+#define GA_0_88_REG 0x00 << 5
+#define GA_1_3_REG 0x01 << 5
+#define GA_1_9_REG 0x02 << 5
+#define GA_2_5_REG 0x03 << 5
+#define GA_4_0_REG 0x04 << 5
+#define GA_4_7_REG 0x05 << 5
+#define GA_5_6_REG 0x06 << 5
+#define GA_8_1_REG 0x07 << 5
+
+// digital resolutions
+#define SCALE_0_73_MG 0.73
+#define SCALE_0_92_MG 0.92
+#define SCALE_1_22_MG 1.22
+#define SCALE_1_52_MG 1.52
+#define SCALE_2_27_MG 2.27
+#define SCALE_2_56_MG 2.56
+#define SCALE_3_03_MG 3.03
+#define SCALE_4_35_MG 4.35
+
+
+int running = 0;
+
+void
+sig_handler(int signo)
+{
+    if (signo == SIGINT) {
+        printf("closing nicely\n");
+        running = -1;
+    }
+}
+
+int
+main()
+{
+    float direction = 0;
+    int16_t x = 0, y = 0, z = 0;
+    uint8_t rx_tx_buf[MAX_BUFFER_LENGTH];
+
+    //! [Interesting]
+    mraa::I2c* i2c;
+    i2c = new mraa::I2c(0);
+
+    i2c->address(HMC5883L_I2C_ADDR);
+    rx_tx_buf[0] = HMC5883L_CONF_REG_B;
+    rx_tx_buf[1] = GA_1_3_REG;
+    i2c->write(rx_tx_buf, 2);
+    //! [Interesting]
+
+    i2c->address(HMC5883L_I2C_ADDR);
+    rx_tx_buf[0] = HMC5883L_MODE_REG;
+    rx_tx_buf[1] = HMC5883L_CONT_MODE;
+    i2c->write(rx_tx_buf, 2);
+
+    signal(SIGINT, sig_handler);
+
+    while (running == 0) {
+        i2c->address(HMC5883L_I2C_ADDR);
+        i2c->writeByte(HMC5883L_DATA_REG);
+
+        i2c->address(HMC5883L_I2C_ADDR);
+        i2c->read(rx_tx_buf, DATA_REG_SIZE);
+
+        x = (rx_tx_buf[HMC5883L_X_MSB_REG] << 8) | rx_tx_buf[HMC5883L_X_LSB_REG];
+        z = (rx_tx_buf[HMC5883L_Z_MSB_REG] << 8) | rx_tx_buf[HMC5883L_Z_LSB_REG];
+        y = (rx_tx_buf[HMC5883L_Y_MSB_REG] << 8) | rx_tx_buf[HMC5883L_Y_LSB_REG];
+
+        // scale and calculate direction
+        direction = atan2(y * SCALE_0_92_MG, x * SCALE_0_92_MG);
+
+        // check if the signs are reversed
+        if (direction < 0)
+            direction += 2 * M_PI;
+
+        printf("Compass scaled data x : %f, y : %f, z : %f\n", x * SCALE_0_92_MG, y * SCALE_0_92_MG,
+               z * SCALE_0_92_MG);
+        printf("Heading : %f\n", direction * 180 / M_PI);
+        sleep(1);
+    }
+    delete i2c;
+
+    return MRAA_SUCCESS;
+}

examples/c++/Iio-dummy.cpp

@@ -0,0 +1,157 @@
+/*
+ * Author: Henry Bruce
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <unistd.h>
+#include <iostream>
+#include <math.h>
+#include <float.h>
+#include "mraa/iio.hpp"
+
+#define EXPECT_FAILURE 0
+#define EXPECT_SUCCESS 1
+
+#define IIO_TRY(func) \
+{ \
+    bool success = true;    \
+    try { \
+        iio_device->func;  \
+    } catch (std::exception& e) { \
+        success = false; \
+    } \
+    log_result(#func, "", true, success); \
+}
+
+// Macro to run IIO method on attribute and log output
+#define IIO_RUN(func, attr, value, expect) \
+{ \
+    std::string attr_name = attr; \
+    bool success = true;    \
+    try { \
+        iio_device->func(attr_name, value);  \
+    } catch (std::exception& e) { \
+        success = false; \
+    } \
+    log_result(#func, attr_name, expect, success); \
+}
+
+// Macro to run IIO method on attribute and check for expected result and log output
+#define IIO_TEST(func, attr, value, expect) \
+{ \
+    std::string attr_name = attr; \
+    bool success = false;    \
+    try { \
+        success = fabs(iio_device->func(attr_name) - value) < FLT_EPSILON; \
+    } catch (std::exception& e) { \
+        success = false; \
+    } \
+    log_result(#func, attr_name, expect, success); \
+}
+
+mraa::Iio* iio_device;
+int eventCount = 0;
+
+// Log result of test. Note a "fail" (i.e. success is false) will be displayed as a pass if a fail was expected
+void log_result(std::string test_name, std::string attr_name, bool expect_success, bool success)
+{
+    std::string result;
+    if (expect_success)
+       result = success ? "PASS" : "FAIL";
+    else
+       result = success ? "FAIL" : "PASS";
+    if (attr_name.empty())
+        fprintf(stdout, "%s: %s\n", test_name.c_str(), result.c_str());
+    else
+        fprintf(stdout, "%s(%s): %s\n", test_name.c_str(), attr_name.c_str(), result.c_str());
+}
+
+// Generate iio_dummy driver event by writing a string to a specific sysfs node
+bool generate_event()
+{
+    FILE *fp = fopen("/sys/bus/iio/devices/iio_evgen/poke_ev0", "w");
+    if (fp == NULL)
+        return false;
+    fprintf(fp, "1\n");
+    fclose(fp);
+    return true;
+}
+
+
+// IIO event handler that checks for event from dummy_iio_evgen driver
+class IioTestHandler : public mraa::IioHandler
+{
+protected:
+    void onIioEvent(const mraa::IioEventData& eventData) {
+        if (eventData.channelType == IIO_VOLTAGE && eventData.direction == IIO_EV_DIR_RISING && eventData.type == IIO_EV_TYPE_THRESH)
+            eventCount++;
+    }
+};
+
+int
+main()
+{
+    IioTestHandler testHandler;
+    std::string deviceName;
+    try {
+        mraa::Iio* iio_device0 = new mraa::Iio(0);
+        std::cout << "IIO device 0 found by id." << std::endl;
+        deviceName = iio_device0->getDeviceName();
+        delete iio_device0;
+    } catch (std::exception& e) {
+        std::cerr << "IIO device 0 not found." << std::endl;
+        return EXIT_FAILURE;
+    }
+
+    try {
+        mraa::Iio* iio_device1 = new mraa::Iio(1);
+        delete iio_device1;
+    } catch (std::exception& e) {
+        std::cerr << "IIO device 1 not found. This is expected behavior." << std::endl;
+    }
+
+    try {
+        iio_device = new mraa::Iio(deviceName);
+        std::cout << "IIO device 0 found by name." << std::endl;
+    } catch (std::exception& e) {
+        std::cerr << "IIO device 0 not found." << std::endl;
+        return EXIT_FAILURE;
+    }
+
+
+    std::cout << "Using IIO device0. Name is " << iio_device->getDeviceName() << std::endl;
+    IIO_RUN(writeFloat, "in_accel_x_raw", 100, EXPECT_FAILURE);
+    IIO_RUN(writeFloat, "in_voltage0_scale", 100, EXPECT_FAILURE);
+    IIO_RUN(writeInt, "out_voltage0_raw", 100, EXPECT_SUCCESS);
+    IIO_TEST(readInt, "in_accel_x_raw", 34, EXPECT_SUCCESS);
+    IIO_TEST(readFloat, "in_voltage0_scale", 0.001333, EXPECT_SUCCESS);
+    IIO_RUN(writeInt, "events/in_voltage0_thresh_rising_en", 1, EXPECT_SUCCESS);
+    IIO_TRY(registerEventHandler(&testHandler));
+    eventCount = 0;
+    generate_event();
+    usleep(500000);
+    log_result("eventReceived", "", (eventCount == 1), true);
+
+    delete iio_device;
+    return EXIT_SUCCESS;
+}
+

examples/c++/Isr-pin6.cpp

@@ -0,0 +1,57 @@
+/*
+ * Author: Brendan Le Foll
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <unistd.h>
+
+#include "mraa.hpp"
+
+static volatile int counter = 0;
+static volatile int oldcounter = 0;
+
+void
+interrupt(void* args)
+{
+    ++counter;
+}
+
+int
+main()
+{
+    mraa::Gpio* x = new mraa::Gpio(6);
+
+    x->dir(mraa::DIR_IN);
+
+    x->isr(mraa::EDGE_BOTH, &interrupt, NULL);
+
+    for (;;) {
+        if (counter != oldcounter) {
+            fprintf(stdout, "timeout counter == %d\n", counter);
+            oldcounter = counter;
+        }
+        // got to relieve our poor CPU!
+        sleep(1);
+    }
+
+    return EXIT_SUCCESS;
+}

examples/c++/Pwm3-cycle.cpp

@@ -0,0 +1,68 @@
+/*
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <unistd.h>
+#include <signal.h>
+
+#include "mraa.hpp"
+
+int running = 0;
+
+void
+sig_handler(int signo)
+{
+    if (signo == SIGINT) {
+        printf("closing PWM nicely\n");
+        running = -1;
+    }
+}
+
+int
+main()
+{
+    signal(SIGINT, sig_handler);
+    //! [Interesting]
+    mraa::Pwm* pwm;
+
+    pwm = new mraa::Pwm(3);
+    if (pwm == NULL) {
+        return MRAA_ERROR_UNSPECIFIED;
+    }
+    fprintf(stdout, "Cycling PWM on IO3 (pwm3) \n");
+    pwm->enable(true);
+
+    float value = 0.0f;
+    while (running == 0) {
+        value = value + 0.01f;
+        pwm->write(value);
+        usleep(50000);
+        if (value >= 1.0f) {
+            value = 0.0f;
+        }
+    }
+    delete pwm;
+    //! [Interesting]
+
+    return MRAA_SUCCESS;
+}

examples/c++/Spi-pot.cpp

@@ -0,0 +1,80 @@
+/*
+ * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <unistd.h>
+#include <signal.h>
+#include <stdint.h>
+
+#include "mraa.hpp"
+
+int running = 0;
+
+void
+sig_handler(int signo)
+{
+    if (signo == SIGINT) {
+        printf("closing spi nicely\n");
+        running = -1;
+    }
+}
+
+int
+main()
+{
+    signal(SIGINT, sig_handler);
+
+    //! [Interesting]
+    mraa::Spi* spi;
+
+    spi = new mraa::Spi(0);
+
+    uint8_t data[] = { 0x00, 100 };
+    uint8_t rxBuf[2];
+    uint8_t* recv;
+    while (running == 0) {
+        int i;
+        for (i = 90; i < 130; i++) {
+            data[1] = i;
+            recv = spi->write(data, 2);
+            printf("Writing -%i", i);
+            if (recv) {
+                printf("RECIVED-%i-%i\n", recv[0], recv[1]);
+                free(recv);
+            }
+            usleep(100000);
+        }
+        for (i = 130; i > 90; i--) {
+            data[1] = i;
+            if (spi->transfer(data, rxBuf, 2) == mraa::SUCCESS) {
+                printf("Writing -%i", i);
+                printf("RECIVED-%i-%i\n", rxBuf[0], rxBuf[1]);
+            }
+            usleep(100000);
+        }
+    }
+    delete spi;
+    //! [Interesting]
+
+    return mraa::SUCCESS;
+}

examples/c++/Uart-example.cpp

@@ -0,0 +1,70 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <unistd.h>
+#include <iostream>
+#include <exception>
+
+#include "mraa.hpp"
+
+int
+main()
+{
+    //! [Interesting]
+    // If you have a valid platform configuration use numbers to represent uart
+    // device. If not use raw mode where std::string is taken as a constructor
+    // parameter
+    mraa::Uart* dev;
+    try {
+        dev = new mraa::Uart(0);
+    } catch (std::exception& e) {
+        std::cout << e.what() << ", likely invalid platform config" << std::endl;
+    }
+
+    try {
+        dev = new mraa::Uart("/dev/ttyACM0");
+    } catch (std::exception& e) {
+        std::cout << "Error while setting up raw UART, do you have a uart?" << std::endl;
+        std::terminate();
+    }
+
+    if (dev->setBaudRate(115200) != mraa::SUCCESS) {
+        std::cout << "Error setting parity on UART" << std::endl;
+    }
+
+    if (dev->setMode(8, mraa::UART_PARITY_NONE, 1) != mraa::SUCCESS) {
+        std::cout << "Error setting parity on UART" << std::endl;
+    }
+
+    if (dev->setFlowcontrol(false, false) != mraa::SUCCESS) {
+        std::cout << "Error setting flow control UART" << std::endl;
+    }
+
+    dev->writeStr("Hello monkeys");
+    //! [Interesting]
+
+    delete dev;
+
+    return mraa::SUCCESS;
+}

examples/c++/UartOW.cpp

@@ -0,0 +1,82 @@
+/*
+ * Author: Jon Trulson <jtrulson@ics.com>
+ * Copyright (c) 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "stdio.h"
+#include "iostream"
+//! [Interesting]
+#include "uart_ow.hpp"
+
+using namespace std;
+
+int
+main(int argc, char** argv)
+{
+    mraa::UartOW* uart = new mraa::UartOW(0);
+
+    // Reset the ow bus and see if anything is present
+    mraa::Result rv;
+
+    if ((rv = uart->reset()) == mraa::SUCCESS) {
+        cout << "Reset succeeded, device(s) detected!" << endl;
+    } else {
+        cout << "Reset failed, returned " << int(rv) << ". No devices on bus?" << endl;
+        return 1;
+    }
+
+    cout << "Looking for devices..." << endl;
+    ;
+
+    uint8_t count = 0;
+    // start the search from scratch
+    string id = uart->search(true);
+
+    if (id.empty()) {
+        cout << "No devices detected." << endl;
+        return 1;
+    }
+
+    while (!id.empty()) {
+        // hack so we don't need to cast each element of the romcode
+        // for printf purposes
+        uint8_t* ptr = (uint8_t*) id.c_str();
+
+        // The first byte (0) is the device type (family) code.
+        // The last byte (7) is the rom code CRC value.  The
+        // intervening bytes are the unique 48 bit device ID.
+
+        printf("Device %02d Type 0x%02x ID %02x%02x%02x%02x%02x%02x CRC 0x%02x\n", count, ptr[0],
+               ptr[6], ptr[5], ptr[4], ptr[3], ptr[2], ptr[1], ptr[7]);
+        count++;
+
+        // continue the search with start argument set to false
+        id = uart->search(false);
+    }
+
+    cout << "Exiting..." << endl;
+
+    delete uart;
+
+    return 0;
+}
+//! [Interesting]

examples/c++/initio.cpp

@@ -0,0 +1,68 @@
+/*
+ * Author: Houman Brinjcargorabi <houman.brinjcargorabi@intel.com>
+ * Copyright (c) 2016 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "mraa.hpp"
+
+int main()
+{
+    // GPIO-PIN
+    mraa::Gpio* gpio = mraa::initIo<mraa::Gpio>("gpio-1");
+    // GPIO-RAW-RAWPIN
+    mmraa::Gpio* gpioraw = mraa::initIo<mraa::Gpio>initIo("gpio-raw-131");
+    // AIO-PIN
+    mraa::Aio aio = mraa::initIo<mraa::Aio>("aio-0");
+    // PWM-PIN
+    mraa::Pwm pwm = mraa::initIo<mraa::Pwm>("pwm-6");
+    // PWM-RAW-CHIPID-PIN
+    mraa::Pwm pwmraw = mraa::initIo<mraa::Pwm>("pwm-raw-0,1");
+    // UART-INDEX: the index is the one represented internally in the uart_dev array
+    mraa::Uart uart = mraa::initIo<mraa::Uart>("uart-1");
+    // UART-RAW-PATH
+    mraa::Uart uartraw = mraa::initIo<mraa::Uart>("uart-raw-/dev/ttyS0");
+    // SPI-INDEX: same as UART
+    mraa::Spi spi = mraa::initIo<mraa::Spi>("spi-0");
+    // SPI-RAW-BUS-CS: USED to open and use /dev/spidev<BUS>.<CS>
+    mraa::Spi spiraw = mraa::initIo<mraa::Spi>("spi-raw-0-1");
+    // I2C-INDEX: same as UART
+    mraa::I2c i2c = mraa::initIo<mraa::I2c>("i2c-0");
+    // I2C-RAW-BUS
+    mraa::I2c i2craw = mraa::initIo<mraa::I2c>("i2c-raw-0");
+
+    // FREE STUFF
+    delete gpio;
+    delete gpioraw;
+    delete aio;
+    delete pwm;
+    delete pwmraw;
+    delete uart;
+    delete uartraw;
+    delete spi;
+    delete spiraw;
+    delete i2c;
+    delete i2craw;
+}

examples/cycle-pwm3.c

@@ -24,30 +24,32 @@
 
 #include <unistd.h>
 
-#include "pwm.h"
+#include "mraa.h"
 
 int
-main ()
+main()
 {
-    maa_init();
-    maa_pwm_context* pwm;
-    pwm = maa_pwm_init(3);
+    mraa_init();
+    //! [Interesting]
+    mraa_pwm_context pwm;
+    pwm = mraa_pwm_init(3);
     if (pwm == NULL) {
         return 1;
     }
-    maa_pwm_period_us(pwm, 200);
-    maa_pwm_enable(pwm, 1);
+    mraa_pwm_period_us(pwm, 200);
+    mraa_pwm_enable(pwm, 1);
 
     float value = 0.0f;
 
     while (1) {
         value = value + 0.01f;
-        maa_pwm_write(pwm, value);
+        mraa_pwm_write(pwm, value);
         usleep(50000);
         if (value >= 1.0f) {
             value = 0.0f;
         }
-        float output = maa_pwm_read(pwm);
+        float output = mraa_pwm_read(pwm);
     }
+    //! [Interesting]
     return 0;
 }

examples/firmata_curie_imu.c

@@ -0,0 +1,92 @@
+/*
+ * Author: Brendan Le Foll
+ * Copyright (c) 2016 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <unistd.h>
+
+#include "mraa.h"
+#include "mraa/firmata.h"
+
+#define FIRMATA_START_SYSEX 0xF0
+#define FIRMATA_END_SYSEX 0xF7
+#define FIRMATA_CURIE_IMU 0x11
+#define FIRMATA_CURIE_IMU_READ_ACCEL 0x00
+
+void
+interrupt(uint8_t* buf, int length)
+{
+    printf("reg read returned: %d, with buffer size %d\n", ((buf[6] & 0x7f) | ((buf[7] & 0x7f) << 7)), length);
+}
+
+int
+main()
+{
+    mraa_init();
+    //! [Interesting]
+
+   /**
+    * This example reads from the FirmataCurieIMU plugin
+    */
+
+    mraa_add_subplatform(MRAA_GENERIC_FIRMATA, "/dev/ttyACM0");
+    mraa_firmata_context firm = mraa_firmata_init(FIRMATA_CURIE_IMU);
+    if (firm == NULL) {
+        return EXIT_FAILURE;
+    }
+
+    mraa_firmata_response(firm, interrupt);
+
+    uint8_t* buffer = calloc(4, 0);
+    if (buffer == NULL) {
+        free(firm);
+        return EXIT_FAILURE;
+    }
+    buffer[0] = FIRMATA_START_SYSEX;
+    buffer[1] = FIRMATA_CURIE_IMU;
+    buffer[2] = FIRMATA_CURIE_IMU_READ_ACCEL;
+    buffer[3] = FIRMATA_END_SYSEX;
+
+    mraa_firmata_write_sysex(firm, buffer, 4);
+
+    sleep(1);
+
+    // stop the isr and set it again
+    mraa_firmata_response_stop(firm);
+    mraa_firmata_response(firm, interrupt);
+    mraa_firmata_write_sysex(firm, buffer, 4);
+
+    sleep(1);
+
+    // close everything and try again
+    mraa_firmata_close(firm);
+    firm = mraa_firmata_init(FIRMATA_CURIE_IMU);
+    mraa_firmata_response(firm, interrupt);
+    mraa_firmata_write_sysex(firm, buffer, 4);
+
+    sleep(10);
+
+    mraa_firmata_close(firm);
+    //! [Interesting]
+
+    return EXIT_SUCCESS;
+}

examples/gpio_read6.c

@@ -25,27 +25,28 @@
 #include "stdio.h"
 #include "unistd.h"
 
-#include "gpio.h"
+#include "mraa.h"
 
 int
-main(int argc, char **argv)
+main(int argc, char** argv)
 {
-    maa_init();
-    fprintf(stdout, "MAA Version: %s\nStarting Read on IO6\n",
-            maa_get_version());
+    mraa_init();
+    fprintf(stdout, "MRAA Version: %s\nStarting Read on IO6\n", mraa_get_version());
 
-    maa_gpio_context* gpio;
+    //! [Interesting]
+    mraa_gpio_context gpio;
 
-    gpio = maa_gpio_init(6);
+    gpio = mraa_gpio_init(6);
 
-    maa_gpio_dir(gpio, MAA_GPIO_IN);
+    mraa_gpio_dir(gpio, MRAA_GPIO_IN);
 
     for (;;) {
-        fprintf(stdout, "Gpio is %d\n", maa_gpio_read(gpio));
+        fprintf(stdout, "Gpio is %d\n", mraa_gpio_read(gpio));
         sleep(1);
     }
 
-    maa_gpio_close(gpio);
+    mraa_gpio_close(gpio);
+    //! [Interesting]
 
     return 0;
 }