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110 Commits

Author SHA1 Message Date
Brendan Le Foll
ff2eba732e types.h: Add C99 guards around duplicat & deprecated enm value
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2017-02-27 18:17:30 +01:00
Brendan Le Foll
694e6eab23 joule.md: Fix i2c bus number in documentation
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2017-02-27 18:07:51 +01:00
Brendan Le Foll
4264aa5a3b blink_onboard.c: Blink LED101 on Joule
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2017-02-27 18:07:51 +01:00
Wai Lun
0092e13f57 Joule: Update references to the Intel Joule
GT/GrosseTete -> Joule. This commit deprecates the MRAA_INTEL_GT_TUCHUCK
mraa_platform_t value and links the grossetete.md page to joule.md.

Signed-off-by: Wai Lun Poon <wai.lun.poon@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2017-02-27 18:06:40 +01:00
Fan Jiang
2c529689ed 96boards.c: Fixed wrong i2c port numbers and array length in bubblegum 96 board
Signed-off-by: Fan Jiang <i@fanjiang.me>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2017-02-22 08:55:50 +00:00
Brendan Le Foll
fc03ea4816 docs/building.md: add note about forcing a static build of mraa
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2017-02-21 17:27:04 +00:00
Nicola Lunghi
caabca37be iio.hpp: Added an empty destructor to get rid of a warning
Signed-off-by: Nicola Lunghi <nicola.lunghi@emutex.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2017-02-21 12:13:17 +00:00
Nicola Lunghi Emutex
2ea68105f0 uart.c: Simple compiler error fixes
Signed-off-by: Nicola Lunghi Emutex <nicola.lunghi@emutex.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2017-02-06 21:34:13 +00:00
Nicola Lunghi
6fabccf131 x86: Normalized function names in up & byt platform
Signed-off-by: Nicola Lunghi Emutex <nicola.lunghi@emutex.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2017-02-06 21:32:54 +00:00
Norbert Wesp
19d69b71da phyboard.c: set each length of snprintf() to defined MAX_SIZE
Signed-off-by: Norbert Wesp <nwesp@phytec.de>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2017-01-31 21:26:21 +00:00
Machiel Bruinink
e606d1d615 i2c.c: added close of file handle on mraa_i2c_stop
Signed-off-by: Machiel Bruinink <m.bruinink@robotcaresystems.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2017-01-31 21:25:57 +00:00
Norbert Wesp
4472ff1629 phyboard-wega: Added platform support for phyBOARD-Wega
Like the beaglebone, the phyBOARD-Wega also got an am335x.
So I merged the four mmap-functions for gpio_context and some
identical defines in a separate header and c-file.
The new platform support-files are based on beaglebone-files.

The documentation of phyBOARD-Wega is still in process,
but for now there are enough informations.
At this time it is possible to use GPIO-Pins and Uart0
(tested via python with mraa). The code for using SPI, I2C and
PWM is also still in process and not tested yet.

Signed-off-by: Norbert Wesp <nwesp@phytec.de>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2017-01-26 22:11:46 +01:00
Mihai Tudor Panu
72261d61bd joule: enable ISH_GPIOs and GPIO_22 exposed on J12 header
Signed-off-by: Mihai Tudor Panu <mihai.tudor.panu@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2017-01-24 19:43:19 +01:00
Jon Trulson
e38630097e UartOW.cpp example: Use .data() string accessor instead of .c_str().
.c_str() works accidentally, but is technically incorrect as these
"strings" can have embedded 0 bytes in them.

Signed-off-by: Jon Trulson <jtrulson@ics.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2017-01-19 08:04:45 +00:00
Jon Trulson
c3332f5542 uart_ow.hpp: Correct a logic bug, and 2 questionable uses of c_str()
The command() function had a logic error that caused a command to be
broadcast to all devices on the DS OW bus when a proper ID was
specified.  This should only be done when NO ID is specified.

This fixes UPM issue #502.

In addition, there were two cases where the C++ string accessor method
.c_str() was used when .data() should be used instead.  This worked
anyway (accidentally), but is improper since the strings can have
embedded 0 bytes.

Signed-off-by: Jon Trulson <jtrulson@ics.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2017-01-19 08:04:45 +00:00
Abhishek Malik
3bd590c18c Firmata: I2C read bytes data array size mismatch fix
Signed-off-by: Abhishek Malik <abhishek.malik@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-12-29 18:51:35 +00:00
Abhishek Malik
17b147ba82 Firmata: Reducing wait time
Signed-off-by: Abhishek Malik <abhishek.malik@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-12-29 18:49:24 +00:00
Abhishek Malik
4b22a923cf Firmata: Increasing iterations to allow more precise readings and allow more time for response
Signed-off-by: Abhishek Malik <abhishek.malik@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-12-29 18:49:24 +00:00
Alex Tereschenko
af051d820a intel_edison_fab_c.c: further fix for PWM disable problem
This adds logic to save PWM duty when disabling the pin (which sets
the duty to 0), and restore it when re-enabling the pin.

Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-12-29 18:48:53 +00:00
belugon
2558866d4a intel_edison_fab_c.c: Fix edison disabled pwm stuck at high
Edison pwm can stuck at high if pin is disabled during ON pwm peroid.
Workaround is to force zero duty time before disabling the pin.

Signed-off-by: Billy Bai <belugon@outlook.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-12-29 18:48:41 +00:00
Brendan Le Foll
c1017bb6ea intel_gt_tuchuck.c: Clear uart pin cap since bios doesn't allow muxing
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-30 11:37:47 +01:00
Brendan Le Foll
1c180e393c uart.c: Allocate mem for dev->path to fix getDevicePath in raw mode
When mraa_init_uart_raw is called it places the path arg in dev->path. This
works in non raw mode because the path is statically in the device
configuration but in raw mode this is a dynamic address meaning that we need to
copy it. Fix this by simply copying the device path rather than relying on the
user keeping that string path in memory.

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-30 11:33:40 +01:00
Fan Jiang
250590e1ed 96boards.c: Added Bubblegum 96 board
- Proper board detection
- Styling refactored using clang-format

Signed-off-by: Fan Jiang <i@fanjiang.me>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-30 11:13:38 +01:00
Brendan Le Foll
68e9399c4c cmake: use TARGETS instead of FILES for js module install
This strips the local RPATH when doing a `make install` rather than running
from the build/ dir

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-23 17:59:04 +00:00
Brendan Le Foll
ad6eb53f81 jsonplatform.c: Remove for loop initial delcarations
This is C99 only and doesn't really provide any value

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-21 10:33:29 +00:00
Dan O'Donovan
d2f1b068b7 update UP board hardware details and enable ADC
Some details regarding the UP board are not in-sync with the
final production version of the board.  This update adds an
ADC, removes a UART, and some corrections in the docs for UP.

Signed-off-by: Dan O'Donovan <dan@emutex.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-21 10:24:05 +00:00
Henry Bruce
a0332a13b0 examples: Python MCP3004 ADC example (use with MinnowMax Calamari lure)
Signed-off-by: Henry Bruce <henry.bruce@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-21 10:23:21 +00:00
Henry Bruce
a63ad7e10d json: Initial config file for Intel Aero platform (i2c and spi only)
Signed-off-by: Henry Bruce <henry.bruce@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-21 10:23:21 +00:00
Henry Bruce
9de294b389 json: Improve i2c and spi configuration.
Bus number no longer has to be the same as its id and all busses are
disabled until a configuration entry is found.

Signed-off-by: Henry Bruce <henry.bruce@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-21 10:23:21 +00:00
Henry Bruce
61d20c7266 json: Removed tabs and tidied up Turbot JSON formatting
Signed-off-by: Henry Bruce <henry.bruce@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-21 10:23:21 +00:00
Thomas Ingleby
d043faf687 imraa: correct imraa.service
Should work in more environments now.

Signed-off-by: Thomas Ingleby <thomas.ingleby@intel.com>
2016-11-08 16:24:51 +01:00
Brendan Le Foll
6f9b470d8d mraa: Update to v1.5.1
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-04 13:39:32 +00:00
Brendan Le Foll
92188ab950 mraa.c: Fix another memleak in mraa_find_i2c_bus_pci
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-04 13:36:53 +00:00
Brendan Le Foll
3d790a8278 mraa.c: fix memleak in find_i2c_bus_pci
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-04 13:27:38 +00:00
Brendan Le Foll
dbcba5cbeb imraa.c: remove ARGP_KEY_ARG checking that makes no sense
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-04 13:04:44 +00:00
Brendan Le Foll
ef8102deb1 imraa_io.c: Avoid gpio handle going out of scope if uid == NULL
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-04 12:55:34 +00:00
Brendan Le Foll
7b7b11415b imraa.c: We have 0 args as minimum so remove error check for < 0 against unsinged int
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-04 12:48:47 +00:00
Brendan Le Foll
5a3f73731c mraa: Update to v1.5.0
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-04 12:32:49 +00:00
Brendan Le Foll
e466d1f890 imraa.service: Adjust flag to match new imraa argp options
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-04 10:29:26 +00:00
Brendan Le Foll
ae127b19a5 binding.gyp.cmake: Use node or nodejs depending on what the binary is called
This should fix npm builds on some recent ubuntu and debian images

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-03 15:24:47 +00:00
Brendan Le Foll
fe76260837 npm.md: Update docs to include json removal
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-03 15:24:12 +00:00
Brendan Le Foll
bf4d14ef02 imraa: change list_serialport function to get_101_serialport
This makes things alot less confusing!

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-03 09:40:23 +00:00
Brendan Le Foll
d602196bd6 mraa.c: add LOG_NOTICE to checkout what i2c bus is added from pci
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-02 17:22:38 +00:00
Brendan Le Foll
e387946208 jsonplatform.c: Disable i2c bus in case of bus count being high but busses are undefined
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-02 17:20:31 +00:00
Brendan Le Foll
fa35855bb6 mraa.c: Use mraa_atoi instead of atoi in lockfile adding
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-02 15:30:56 +00:00
Brendan Le Foll
4a33aca8fd intel_gt_tuchuck.c: Use new mraa_find_i2c_bus_pci to find i2c busses
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-02 15:30:56 +00:00
Brendan Le Foll
9d365ce0d6 mraa.c: Find i2c bus by pci id
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-02 15:30:56 +00:00
Brendan Le Foll
23e871c5bb mraa_internal.h: Add internal definition for mraa_atoi
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-11-02 15:30:56 +00:00
Thomas Ingleby
3bb17bb7b9 travis: use mirror of swig-3.0.10.tar.gz
closes #595

Signed-off-by: Thomas Ingleby <thomas.ingleby@intel.com>
2016-10-31 14:31:18 +01:00
Fathi Boudra
8218e42d41 doc: fix spelling errors
Signed-off-by: Fathi Boudra <fathi.boudra@linaro.org>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-30 10:58:36 +00:00
Brendan Le Foll
3971d27f8a imraa: split imraa up into imraa_io and imraa_lock
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-26 14:24:50 +01:00
Brendan Le Foll
c69d1884c9 imraa.io.conf: Imraa IO configuration
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-26 14:24:50 +01:00
Brendan Le Foll
cada819c39 intel_edison_fab_c.c: don't undo muxing if we don't own the pin
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-26 14:24:50 +01:00
Brendan Le Foll
0b5130335d mraa.c: add error if adding a MRAA_GENERIC_FIRMATA subplat and not supported
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-26 14:24:50 +01:00
Brendan Le Foll
b4cf93f1f8 gpio.c: Remove use of sprintf in favour of snprintf
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-26 14:24:50 +01:00
Brendan Le Foll
c7ff9a5173 imraa: Add argp support, split arduino functionality
This commit gets us closer to what was intended for imraa, support of setting
sysfs user permissions

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-26 14:24:50 +01:00
Brendan Le Foll
c993cf10b4 firmata_curie_imu.c: Fix warning due to signed nature of function input buffer
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-26 14:24:50 +01:00
Brendan Le Foll
623fef670e firmata: Add pthread spin locks around uart operations
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-26 14:24:50 +01:00
Brendan Le Foll
bb5ec8bd10 firmata: Remove all 6.2.x warnings
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-26 12:56:20 +01:00
Brendan Le Foll
a3c717553c cmake: enable INSTALLTOOLS by default
This means mraa-i2c and mraa-gpio are installed in <prefix>/bin by default

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-26 11:55:19 +01:00
Mihai Tudor Panu
6ce1b1c4ce python: remove temporary RPATH from _mraa.so when installing
Signed-off-by: Mihai Tudor Panu <mihai.tudor.panu@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-25 12:15:29 +01:00
Alex Tereschenko
9f03afbcbc mock: implement UART functionality
Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-25 12:04:04 +01:00
Alex Tereschenko
8a9efd1bcc uart.c: add replace functions used by mock
Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-25 12:04:04 +01:00
Alex Tereschenko
1b3a9371a1 uart.c: rework mraa_uart_init_raw to use common cleanup block
This will align it with spi.c and make it easier to introduce
a replace function.

Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-25 12:04:04 +01:00
Alex Tereschenko
ccc4185eff uart.hpp: fix typo in setNonBlocking() function name
Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-25 12:04:04 +01:00
Alex Tereschenko
6fda865af7 uart.hpp: fix typo in write() description
Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-25 12:04:04 +01:00
Brendan Le Foll
dd33a32744 README.md: Fix typo in README.md
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-25 12:03:23 +01:00
Joseph Butler
7d1ee0c6fe README.MD: Fix ubuntu instructions to update repo
Signed-off-by: Joseph Butler <joseph.butler@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-25 12:02:17 +01:00
Brendan Le Foll
19791be2f5 CONTRIBUTING.md: Add author rules and suggestion on filing issues for feature review
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-24 11:36:22 +01:00
Brendan Le Foll
49ef1623b2 python: Move docs to depend on BUILDPYTHON2 to not build with py3
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-11 15:21:06 +01:00
Brendan Le Foll
37deb5003b mraa: Update to v1.4.0
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-11 14:44:36 +01:00
Brendan Le Foll
980dfce80e mraa.c: return MRAA_SUCCESS when trying to call mraa_add_subplatform twice
If we already have a subplatform present with the same type, return success
when trying to add it again. We don't check that the tty is the same because
that is hidden inside the t_firmata* structure but we should do at some point

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-11 13:58:40 +01:00
Brendan Le Foll
08e270818a firmata_mraa.c: Clean up for loops with useless statements
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-11 08:49:36 +01:00
Brendan Le Foll
6bac8594a5 mraa.c: Remove unused variables in mraa_add_from_lockfile
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-11 08:49:12 +01:00
Brendan Le Foll
11bbd05533 mraa.c: Add MRAA_SUCCESS return to mraa_remove_subplatform
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-11 08:48:47 +01:00
Brendan Le Foll
1d4b19dc4b mraa.c: Move firmata syslog message to useful location
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-11 08:48:23 +01:00
Brendan Le Foll
02a7fbf191 imraa.c: Remove unused variables
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-11 08:47:26 +01:00
Brendan Le Foll
ae15b10997 types.h: Remove tabs that crept in
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-10-11 08:38:09 +01:00
SaschaWeisenberger
be22844922 src/x86/x86.c: add support for Siemens SIMATIC IOT2000
The Siemens device "SIMATIC IOT2000" is identical to the Intel Galileo
Gen 2 regarding the gpios. So if the board name is "SIMATIC IOT2000"
treat the board as if it is Galileo Gen 2.

Signed-off-by: Sascha Weisenberger sascha.weisenberger@siemens.com
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-09-27 13:08:44 +01:00
Thomas Ingleby
92fdb8aa01 README: Update PPA instructions
Fixes #581

Signed-off-by: Thomas Ingleby <thomas.ingleby@intel.com>
2016-09-21 23:50:28 +03:00
Stefan Andritoiu
def454e33c java: Renamed pom.xml file to the standard naming convention
Signed-off-by: Stefan Andritoiu <stefan.andritoiu@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-09-14 15:17:58 +01:00
Brendan Le Foll
122cab1f1e cmake: Add lots of fancy warnings to CC/CXX and make cmake check they exist
Thanks to Dan Liew for cmake work in fpbench that this is copied from

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-09-13 11:45:49 +01:00
Brendan Le Foll
6c85b61daa mraa: Fix compiler warnings unused vars and useless statements
Should have 0 functionality effect, just cleans up a few things. Fixes #577

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-09-13 11:20:41 +01:00
Alex Tereschenko
139d42d084 FindNodejs.cmake: added search paths for Ubuntu 16.04
Closes #566.

Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-09-12 12:24:24 +01:00
Stefan Andritoiu
8e38c762f0 java: Added automatic pom.xml file creation in CMake
This is to add mraa package in a Maven repo

Signed-off-by: Stefan Andritoiu <stefan.andritoiu@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-09-12 12:23:18 +01:00
Jon Trulson
590f733ff9 uart_ow: convert static const int MRAA_UART_OW_ROMCODE_SIZE to #define
This is needed so that this value can be used in all places in C (and
C++) code.  Unlike C++ you can't always use a static const int
variable to declare an array size for example.  Trying to do so will
yield compiler errors.

In addition, during the declaration of the uart_ow_context, replace a
hardcoded '8' with this macro.  Originally, the '8' was hardcoded for
this very reason.

Signed-off-by: Jon Trulson <jtrulson@ics.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-09-12 12:21:46 +01:00
Brendan Le Foll
045ceb084f grossetete.md: Add documentation for uart
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-09-07 13:51:58 +01:00
Brendan Le Foll
ff3b3004da intel_gt_tuchuck.c: Add SPI to joule pinmap file
This commit fixes documentation for SPI bus to match latest changes in pinmap
file

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-09-07 13:51:32 +01:00
Brendan Le Foll
5cb2bd220e spi.hpp: Add documentation to raw mode constructor
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-09-07 13:27:07 +01:00
Brendan Le Foll
8ec4fcb333 intel_galileo_rev_g.c: use pincmd to set OUT_HIGH instead of value
The i/o expander looses connection as soon as direction is set so use direction
OUT_HIGH instead of setting value after direction. Closes #573

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-09-02 12:00:29 +01:00
Brendan Le Foll
bf2a504774 firmata_mraa.c: retry counter should not be decremented past 0
This means the retry counter works appropriately in case of failure. Closes #574

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-09-02 11:49:26 +01:00
Brendan Le Foll
9bc91f4b12 docs/joule: Rename docs to use joule naming
This also adds the 2 LEDs on the 8260 radio to the mapping

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-08-30 16:06:31 +01:00
Brendan Le Foll
6180ddaa8e README.md: update mraa instructions
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-08-30 16:03:30 +01:00
Brendan Le Foll
8a93351f0e building.md: Update building docs
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-08-30 15:53:39 +01:00
Brendan Le Foll
1591b92605 python2/cmake: Remove unused pydocs target
Pydocs has been deprecated in favour of sphinx as it's really very very ugly

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-08-30 15:43:23 +01:00
Brendan Le Foll
22b0f63238 cmake: Remove dirty tag on compilation from non git tree
This is removed to make building in buildsystems like ubuntu's or yocto's
easier. Bugs reported from old versions haven't been that annoying so this is
probably be ok

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-08-30 15:00:10 +01:00
Brendan Le Foll
2832909856 mraa: Update to v1.3.0
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-08-30 13:03:47 +01:00
Alex Tereschenko
636c9feb4f travis: add builds for mock
Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-08-30 12:32:20 +01:00
Alex Tereschenko
0292c960b3 mock SPI: remove loop variable declarations
While working fine on my Fedora 22, under Travis (and Ubuntu)
that fails asking to enable C99 standard first, so let's be conservative.

Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-08-30 12:32:20 +01:00
Alex Tereschenko
9ff47aa64a mock SPI: correct error message to actually use data provided
Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-08-30 12:32:20 +01:00
Houman Brinjcargorabi
a704a956ea raspberry_pi.c: Added support for pi zero
Signed-off-by: Houman Brinjcargorabi <hbrinjcar@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-08-30 12:30:56 +01:00
Brendan Le Foll
94b7477212 intel_gt_tuchuck.c: Make sure GPIOs are set to 0 muxes
Use calloc for pinsize and set mux_total to 0 in all gpios

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-08-30 12:26:36 +01:00
Brendan Le Foll
1589389c3f intel_gt_tuchuck.c: LED101 reset to GPIO338
A bios change to 395 was never made so this broke LED101

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-08-30 11:40:32 +01:00
Alex Tereschenko
bdbbfd03dd mraa mock: Add SPI functionality
Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-08-19 16:00:53 +01:00
Alex Tereschenko
9030ae2eeb spi.c: added replace functions for all basic actions
Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-08-19 16:00:53 +01:00
Alex Tereschenko
3a638caf01 spi.c: added context validity checks
Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-08-19 16:00:53 +01:00
Alex Tereschenko
07f6181c91 mock_board_i2c.c: removed surplus includes
Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-08-19 16:00:53 +01:00
Houman Brinjcargorabi
0630c5f505 jsonplatform.md: Added documentation
Signed-off-by: Houman Brinjcargorabi <hbrinjcar@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-08-19 15:59:53 +01:00
Houman Brinjcargorabi
4277a3ee23 mraa.c: Replaced string values with #defines
Signed-off-by: Houman Brinjcargorabi <hbrinjcar@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-08-19 15:46:39 +01:00
Jon Trulson
c976e9f982 gpio.h: remove extraneous extern C declaration
Signed-off-by: Jon Trulson <jtrulson@ics.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-08-19 15:45:08 +01:00
113 changed files with 4990 additions and 1321 deletions

View File

@@ -10,6 +10,10 @@ env:
- JSONPLAT=true NODE012=true
- JSONPLAT=true NODE4=true
- JSONPLAT=true NODE5=true
- MOCK=true NODE010=true
- MOCK=true NODE012=true
- MOCK=true NODE4=true
- MOCK=true NODE5=true
# node010 npm builds don't work in clang and anyone using npm should want to
# use something newer
- NPM=true NODE4=true
@@ -26,16 +30,17 @@ before_script:
# Turn off JAVA SWIG for clang++, use 4.8 for all g++ builds
- if [ "$CC" == "gcc" ]; then export BUILDJAVA=ON; export CC=gcc-4.8; export CXX=g++-4.8; else export BUILDJAVA=OFF; fi
- if [ "${JSONPLAT}" ]; then export JSONPLAT=ON; else export JSONPLAT=OFF; fi
- if [ "${MOCK}" ]; then export BUILDARCH="MOCK"; else export BUILDARCH=""; fi
- if [ "${NODE010}" ]; then nvm install 0.10; fi
- if [ "${NODE012}" ]; then nvm install 0.12; fi
- if [ "${NODE4}" ]; then nvm install 4.1; fi
- if [ "${NODE5}" ]; then nvm install 5; fi
- npm install node-gyp && export NODE_GYP="/home/travis/build/intel-iot-devkit/mraa/node_modules/node-gyp/bin/node-gyp.js"
# Handle 0.10 NODE_ROOT_DIR differently than other versions
- wget http://prdownloads.sourceforge.net/swig/swig-3.0.10.tar.gz && tar xf swig-3.0.10.tar.gz && cd swig-3.0.10 && ./configure --prefix=/home/travis/ && make && make install && cd ..
- wget http://iotdk.intel.com/misc/tr/swig-3.0.10.tar.gz && tar xf swig-3.0.10.tar.gz && cd swig-3.0.10 && ./configure --prefix=/home/travis/ && make && make install && cd ..
script:
- echo "CC=$CC BUILDJAVA=$BUILDJAVA JSONPLAT=$JSONPLAT NODE010=$NODE010 NODE012=$NODE012 NODE4=$NODE4 NODE5=$NODE5 NODE_ROOT_DIR=$NODE_ROOT_DIR"
- if [ -z ${NPM} ]; then mkdir build && cd build && cmake -DBUILDSWIGJAVA="$BUILDJAVA" -DJSONPLAT=$JSONPLAT -DNODE_ROOT_DIR:PATH="${NVM_BIN}/.." -DCMAKE_INSTALL_PREFIX:PATH=../install -DSWIG_EXECUTABLE=/home/travis/bin/swig -DSWIG_DIR:PATH=/home/travis/share/swig/3.0.10/ .. && make install && make test; else mkdir build && cd build && cmake -DBUILDSWIGJAVA="$BUILDJAVA" -DJSONPLAT=$JSONPLAT -DNODE_ROOT_DIR:PATH="${NVM_BIN}/.." -DCMAKE_INSTALL_PREFIX:PATH=../install -DSWIG_EXECUTABLE=/home/travis/bin/swig -DSWIG_DIR:PATH=/home/travis/share/swig/3.0.10/ .. && make npmpkg && cd .. && ${NODE_GYP} configure && ${NODE_GYP} build; fi
- echo "CC=$CC BUILDJAVA=$BUILDJAVA BUILDARCH=$BUILDARCH JSONPLAT=$JSONPLAT NODE010=$NODE010 NODE012=$NODE012 NODE4=$NODE4 NODE5=$NODE5 NODE_ROOT_DIR=$NODE_ROOT_DIR"
- if [ -z ${NPM} ]; then mkdir build && cd build && cmake -DBUILDSWIGJAVA="$BUILDJAVA" -DBUILDARCH="$BUILDARCH" -DJSONPLAT=$JSONPLAT -DNODE_ROOT_DIR:PATH="${NVM_BIN}/.." -DCMAKE_INSTALL_PREFIX:PATH=../install -DSWIG_EXECUTABLE=/home/travis/bin/swig -DSWIG_DIR:PATH=/home/travis/share/swig/3.0.10/ .. && make install && make test; else mkdir build && cd build && cmake -DBUILDSWIGJAVA="$BUILDJAVA" -DJSONPLAT=$JSONPLAT -DNODE_ROOT_DIR:PATH="${NVM_BIN}/.." -DCMAKE_INSTALL_PREFIX:PATH=../install -DSWIG_EXECUTABLE=/home/travis/bin/swig -DSWIG_DIR:PATH=/home/travis/share/swig/3.0.10/ .. && make npmpkg && cd .. && ${NODE_GYP} configure && ${NODE_GYP} build; fi
# simple test to see if we can load our node module
- if [ ${NPM} ]; then cd build/Release/obj.target/ && node -e "var m = require('./mraa.node'); m.getVersion()";fi
addons:

View File

@@ -38,7 +38,7 @@ LOCAL_SRC_FILES := \
src/x86/intel_minnow_byt_compatible.c \
src/x86/intel_cherryhills.c \
src/x86/up.c \
src/x86/intel_gt_tuchuck.c
src/x86/intel_joule_expansion.c
# glob.c pulled in from NetBSD project (BSD 3-clause License)
LOCAL_SRC_FILES += \

View File

@@ -1,10 +1,70 @@
cmake_minimum_required (VERSION 2.8)
project (mraa C)
project (mraa C CXX)
FIND_PACKAGE (Threads REQUIRED)
set (CMAKE_CXX_FLAGS_DEBUG "${CMAKE_CXX_FLAGS_DEBUG} -Wall -fno-omit-frame-pointer ")
set (CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -Wall ")
###############################################################################
# Detect supported warning flags
# Modified from work By Dan Liew (fpbench - MIT)
# https://github.com/delcypher/fp-bench/blob/master/CMakeLists.txt
###############################################################################
# Warnings for both the C and C++ compiler
set (MRAA_BOTH_WARNING_FLAGS
-Wall
-Werror=main
-Wformat
-Wmain
-Wuninitialized
-Winit-self
)
# Warning flags for the C compiler only
set (MRAA_C_WARNING_FLAGS
-Werror=implicit
-Werror=missing-parameter-type
)
# Warning flags for the C++ compiler only
set (MRAA_CXX_WARNING_FLAGS
-Wnon-virtual-dtor
-Woverloaded-virtual
-Wreorder
)
include (CheckCCompilerFlag)
include (CheckCXXCompilerFlag)
function (MRAA_SANITIZE_FLAG_NAME OUTPUT_VAR FLAG)
string (REPLACE "-" "_" SANITIZED_FLAG_NAME "${FLAG}")
string (REPLACE "/" "_" SANITIZED_FLAG_NAME "${SANITIZED_FLAG_NAME}")
string (REPLACE "=" "_" SANITIZED_FLAG_NAME "${SANITIZED_FLAG_NAME}")
string (REPLACE " " "_" SANITIZED_FLAG_NAME "${SANITIZED_FLAG_NAME}")
set (${OUTPUT_VAR} "${SANITIZED_FLAG_NAME}" PARENT_SCOPE)
endfunction ()
# Globally set C compiler warning flags that are supported and emit
# a warning about unsupported flags
foreach (flag ${MRAA_BOTH_WARNING_FLAGS} ${MRAA_C_WARNING_FLAGS})
MRAA_SANITIZE_FLAG_NAME(SANITIZED_FLAG_NAME "${flag}")
CHECK_C_COMPILER_FLAG("${flag}" HAS_C_${SANITIZED_FLAG_NAME})
if (HAS_C_${SANITIZED_FLAG_NAME})
set (CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${flag}")
else ()
message (WARNING "C compiler does not support flag \"${flag}\"")
endif ()
endforeach ()
# Globally set C++ compiler warning flags that are supported and emit
# a warning about unsupported flags
foreach (flag ${MRAA_BOTH_WARNING_FLAGS} ${MRAA_CXX_WARNING_FLAGS})
MRAA_SANITIZE_FLAG_NAME (SANITIZED_FLAG_NAME "${flag}")
CHECK_CXX_COMPILER_FLAG ("${flag}" HAS_CXX_${SANITIZED_FLAG_NAME})
if (HAS_CXX_${SANITIZED_FLAG_NAME})
set (CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${flag}")
else ()
message (WARNING "C++ compiler does not support flag \"${flag}\"")
endif ()
endforeach ()
# Set CMAKE_INSTALL_LIBDIR if not defined
include(GNUInstallDirs)
@@ -31,7 +91,7 @@ include (GetGitRevisionDescription)
git_describe (VERSION "--tags")
if ("x_${VERSION}" STREQUAL "x_GIT-NOTFOUND" OR "x_${VERSION}" STREQUAL "x_HEAD-HASH-NOTFOUND" OR "x_${VERSION}" STREQUAL "x_-128-NOTFOUND")
message (WARNING " - Install git to compile a production libmraa!")
set (VERSION "v1.2.3-dirty")
set (VERSION "v1.5.1")
endif ()
message (STATUS "INFO - libmraa Version ${VERSION}")
@@ -78,7 +138,7 @@ option (IPK "Generate IPK using CPack" OFF)
option (RPM "Generate RPM using CPack" OFF)
option (ENABLEEXAMPLES "Disable building of examples" ON)
option (INSTALLGPIOTOOL "Install gpio tool" OFF)
option (INSTALLTOOLS "Install all tools" OFF)
option (INSTALLTOOLS "Install all tools" ON)
option (BUILDTESTS "Override the addition of tests" ON)
set (BUILDARCH "" CACHE STRING "Override architecture to build for")

View File

@@ -10,7 +10,8 @@ with:
The recommended method to contribute is to fork on github, and then send pull
requests to the main project. You can open issues if you find any bugs/have
questions.
questions. If you want to work on a large feature then we suggest you file an
issue first so we can avoid dissapointments come merging time!
If you'd rather not use github you are more than welcome to send git formatted
patches to our mailing list mraa@lists.01.org which you can register for access
@@ -42,6 +43,16 @@ job. Few exceptions to coding styles:
Use common sense and don't be afraid to challenge something if it doesn't make sense!
Author Rules
------------
If you create a file, then add yourself as the Author at the top. If you did a
large contribution to it (or if you want to ;-)), then fee free to add yourself
to the contributors list in that file. You can also add your own copyright
statement to the file but cannot add a license of your own. If you're borrowing
code that comes from a project with another license, make sure to explicitly
note this in your PR.
Code signing
------------

View File

@@ -29,13 +29,14 @@ X86
* [Minnowboard Max](../master/docs/minnow_max.md)
* [NUC 5th generation](../master/docs/intel_nuc5.md)
* [UP](../master/docs/up.md)
* [Intel Grosse Tete](../master/docs/grossetete.md)
* [Intel Joule](../master/docs/joule.md)
ARM
---
* [Raspberry Pi](../master/docs/raspberry_pi.md)
* [Bannana Pi](../master/docs/banana_pi.md)
* [Banana Pi](../master/docs/banana_pi.md)
* [Beaglebone Black](../master/docs/beaglebone.md)
* [phyBOARD-Wega](../master/docs/phyboard-wega.md)
USB
---
@@ -45,15 +46,57 @@ Mock
----
* [Generic simulated board](../master/docs/mock.md)
JSON platform
----
* [Platform loading](../master/docs/jsonplatform.md)
Installing on your board
========
========================
Installing on Ubuntu
--------------------
Here is a PPA for installing on ubuntu:
https://launchpad.net/~mraa/+archive/ubuntu/mraa
```bash
sudo add-apt-repository ppa:mraa/mraa
sudo apt-get update
sudo apt-get install libmraa1 libmraa-dev mraa-tools python-mraa python3-mraa
```
Node.js package is available seperately.
Install on Arch Linux
---------------------
There is an AUR package for mraa here: https://aur.archlinux.org/packages/mraa
Installing for Node.js only
---------------------------
You can also install just the node.js mraa module by using npm. You will need a
C++ compiler and the node development headers, however it's not required to
have SWIG installed.
```bash
npm install mraa
```
Note that installing mraa in this way builds mraa without json-c so you cannot
use mraa_init_json_platform(). Also building this way means the mraa.node
includes a static version of libmraa rather than relying on a dynamic library
in /usr/lib.
Installing on Intel 32bit Yocto based opkg image
------------------------------------------------
See the section below on compiling or use our repository to install on a glibc
based yocto poky image that supports opkg. Adding this repository is as simple
as and you'll have the latest stable tagged build of mraa installed!
``` bash
echo "src mraa-upm http://iotdk.intel.com/repos/3.0/intelgalactic/opkg/i586" > /etc/opkg/mraa-upm.conf
echo "src mraa-upm http://iotdk.intel.com/repos/3.5/intelgalactic/opkg/i586" > /etc/opkg/mraa-upm.conf
opkg update
opkg install mraa
```
@@ -62,19 +105,11 @@ If you would like to get the latest & greatest builds from master HEAD you can
use our -dev repository
```bash
echo "src mraa-upm http://iotdk.intel.com/repos/3.0/intelgalactic-dev/opkg/i586" > /etc/opkg/mraa-upm.conf
echo "src mraa-upm http://iotdk.intel.com/repos/3.5/intelgalactic-dev/opkg/i586" > /etc/opkg/mraa-upm.conf
opkg update
opkg install mraa
```
You can also install just the node.js mraa module by using npm. You will need a
C++ compiler and the node development headers, however it's not required to
have SWIG installed.
```bash
npm install mraa
```
Compiling
=========

View File

@@ -46,9 +46,7 @@ extern "C" {
#if defined(SWIGJAVA) || defined(JAVACALLBACK)
#include <jni.h>
extern "C" {
void mraa_java_isr_callback(void *args);
}
void mraa_java_isr_callback(void *args);
#endif
/**

View File

@@ -45,7 +45,7 @@ class I2c
public:
/**
* Instantiates an i2c bus. Multiple instances of the same bus can
* exist and the bus is not guarranteed to be on the correct address
* exist and the bus is not guaranteed to be on the correct address
* before read/write.
*
* @param bus The i2c bus to use
@@ -76,7 +76,7 @@ class I2c
}
/**
* Closes the I2c Bus used. This does not guarrantee the bus will not
* Closes the I2c Bus used. This does not guarantee the bus will not
* be usable by anyone else or communicates this disconnect to any
* slaves.
*/

View File

@@ -47,6 +47,7 @@ class IioHandler
{
public:
virtual void onIioEvent(const IioEventData& eventData) = 0;
virtual ~IioHandler() {}; // add an empty destructor to get rid of warning
};

View File

@@ -70,6 +70,12 @@ class Spi
}
}
/**
* Initialise SPI object using 'raw' mode. Mraa will go and grab the spidev device lablled /dev/spidev<bus>.<cs>
*
* @param bus to use
* @param cs to use
*/
Spi(int bus, int cs)
{
m_spi = mraa_spi_init_raw(bus, cs);

View File

@@ -50,7 +50,11 @@ typedef enum {
MRAA_INTEL_SOFIA_3GR = 10, /**< The Intel SoFIA 3GR */
MRAA_INTEL_CHERRYHILLS = 11, /**< The Intel Braswell Cherryhills */
MRAA_UP = 12, /**< The UP Board */
MRAA_INTEL_GT_TUCHUCK = 13, /**< The Intel GT Tuchuck Board */
MRAA_INTEL_JOULE_EXPANSION = 13, /**< The Intel Joule Expansion Board */
#if __STDC_VERSION__ >= 199901L
MRAA_INTEL_GT_TUCHUCK __attribute__((deprecated)) = MRAA_INTEL_JOULE_EXPANSION, // deprecated
#endif
MRAA_PHYBOARD_WEGA = 14, /**< The phyBOARD-Wega */
// USB platform extenders start at 256
MRAA_FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */
@@ -240,11 +244,11 @@ typedef enum {
} mraa_i2c_mode_t;
typedef enum {
MRAA_UART_PARITY_NONE = 0,
MRAA_UART_PARITY_EVEN = 1,
MRAA_UART_PARITY_ODD = 2,
MRAA_UART_PARITY_MARK = 3,
MRAA_UART_PARITY_SPACE = 4
MRAA_UART_PARITY_NONE = 0,
MRAA_UART_PARITY_EVEN = 1,
MRAA_UART_PARITY_ODD = 2,
MRAA_UART_PARITY_MARK = 3,
MRAA_UART_PARITY_SPACE = 4
} mraa_uart_parity_t;
#ifdef __cplusplus

View File

@@ -51,7 +51,8 @@ typedef enum {
INTEL_SOFIA_3GR = 10, /**< The Intel SoFIA 3GR */
INTEL_CHERRYHILLS = 11, /**< The Intel Braswell Cherryhills */
INTEL_UP = 12, /**< The UP Board */
INTEL_GT_TUCHUCK = 13, /**< The Intel GT Board */
INTEL_JOULE_EXPANSION = 13, /**< The Intel Joule Expansion Board */
PHYBOARD_WEGA = 14, /**< The phyBOARD-Wega */
FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */

View File

@@ -124,7 +124,7 @@ class Uart
}
/**
* Write bytes in String object to a device
* Write bytes in char* buffer to a device
*
* @param data buffer pointer
* @param length maximum size of buffer
@@ -263,7 +263,7 @@ class Uart
* @return Result of operation
*/
Result
SetNonBlocking(bool nonblock)
setNonBlocking(bool nonblock)
{
return (Result) mraa_uart_set_non_blocking(m_uart, nonblock);
}

View File

@@ -64,19 +64,19 @@ extern "C" {
#include "common.h"
#include "uart.h"
/* 8 bytes (64 bits) for a device rom code */
#define MRAA_UART_OW_ROMCODE_SIZE 8
/* for now, we simply use the normal MRAA UART context */
typedef struct _mraa_uart_ow {
mraa_uart_context uart;
/* search state */
unsigned char ROM_NO[8]; /* 8 byte (64b) rom code */
unsigned char ROM_NO[MRAA_UART_OW_ROMCODE_SIZE]; /* 8 byte (64b) rom code */
int LastDiscrepancy;
int LastFamilyDiscrepancy;
mraa_boolean_t LastDeviceFlag;
} *mraa_uart_ow_context;
/* 8 bytes (64 bits) for a device rom code */
static const int MRAA_UART_OW_ROMCODE_SIZE = 8;
/**
* UART One Wire ROM related Command bytes
*/

View File

@@ -233,7 +233,7 @@ class UartOW
mraa::Result
command(uint8_t command, std::string id)
{
if (id.empty() == 0)
if (id.empty())
return (mraa::Result) mraa_uart_ow_command(m_uart, command, NULL);
else {
if (id.size() != 8) {
@@ -241,7 +241,7 @@ class UartOW
throw std::invalid_argument(std::string(__FUNCTION__) +
": id must be 8 bytes only");
}
return (mraa::Result) mraa_uart_ow_command(m_uart, command, (uint8_t*) id.c_str());
return (mraa::Result) mraa_uart_ow_command(m_uart, command, (uint8_t*) id.data());
}
}
@@ -268,7 +268,7 @@ class UartOW
uint8_t
crc8(std::string buffer)
{
return mraa_uart_ow_crc8((uint8_t*) buffer.c_str(), buffer.size());
return mraa_uart_ow_crc8((uint8_t*) buffer.data(), buffer.size());
}
private:

View File

@@ -23,13 +23,16 @@ if (UV_ROOT_DIR)
endif()
# Now look for node. Flag an error if not found
find_path (NODE_ROOT_DIR "include/node/node.h" "include/src/node.h"
find_path (NODE_ROOT_DIR "include/node/node.h" "include/src/node.h" "src/node.h"
PATHS /usr/include/nodejs /usr/local/include/nodejs /usr/local/include)
if (NODE_ROOT_DIR)
add_include_dir(${NODE_ROOT_DIR}/include/src)
add_include_dir(${NODE_ROOT_DIR}/src)
add_include_dir(${NODE_ROOT_DIR}/include/node)
add_include_dir(${NODE_ROOT_DIR}/include/deps/v8/include)
add_include_dir(${NODE_ROOT_DIR}/deps/v8/include)
add_include_dir(${NODE_ROOT_DIR}/include/deps/uv/include)
add_include_dir(${NODE_ROOT_DIR}/deps/uv/include)
else()
unset(NODEJS_INCLUDE_DIRS)
message(ERROR " - node.h not found")

View File

@@ -11,13 +11,14 @@ what you'll need:
* [SWIG](http://swig.org) 3.0.5+
* [git](http://git-scm.com)
* [python](http://python.org) 2.7 or 3.4+ (you'll need not just the interpreter but python-dev)
* [node.js](http://nodejs.org) 0.10.x or 0.12.x (you'll need not just the interpreter but nodejs-dev)
* [node.js](http://nodejs.org) 4.x recommended (you'll need not just the interpreter but nodejs-dev)
* [CMake](http://cmake.org) 2.8.8+ (3.1+ is recommended for node.js version 2+)
* [json-c](https://github.com/json-c/json-c) 0.12+ (0.10+ probably works in reality)
For Debian-like distros the below command installs the basic set:
```bash
sudo apt-get install git build-essential swig3.0 python-dev nodejs-dev cmake
sudo apt-get install git build-essential swig3.0 python-dev nodejs-dev cmake libjson-c-dev
```
To build the documentation you'll also need:
@@ -52,8 +53,9 @@ Currently our install logic puts Python bindings into standard paths, which
do not work on Debian due to their
[policy](http://www.debian.org/doc/packaging-manuals/python-policy/ch-python.html#s-paths).
We are working on a permanent solution, in the meanwhile please use this command
after `make install` to link installed modules where Debian's Python expects them:
We are working on a permanent solution, in the meantime please use this command
after `make install` to link installed modules where Debian's Python expects
them:
```bash
sudo ln -s <your install prefix, e.g. /usr>/lib/python2.7/site-packages/* /usr/lib/python2.7/dist-packages
@@ -91,30 +93,35 @@ Disabling Python module building:
Building doc, this will require [SPHINX](http://sphinx-doc.org) &
[Doxygen](http://doxygen.org):
`-DBUILDDOC=ON`
You will also require clone git submodules from your existing checkout:
`git submodule update --init --recursive`
The from doxygen2jsdoc dir:
`npm install mkdirp commander lodash bluebird pegjs`
Override build architecture (this is useful because on x86 ARM code is not
compiled so use this flag to force the target arch)
`-DBUILDARCH=arm`
You can also enable -Wall for gcc before running cmake by exporting your wanted
CC flags to the CC env var
`export CC="gcc -Wall"`
Sometimes it's nice to build a static libary, on Linux systems just set
`-DBUILD_SHARED_LIBS=OFF`
## Dependencies continued
You'll need at least SWIG version 3.0.2 and we recommend 3.0.5 to build the
JavaScript & Python modules. If your version of SWIG is older than this then
please see above for disabling `SWIGNODE`. Otherwise you will get a weird build
failure when building the JavaScript module. The Python module builds with SWIG
2.x.
2.x but we don't test it.
During the build, we'll assume you're building from git, note that if you
compile with `git` installed your version of mraa will be tagged `-dirty`. This
simply means `git` wasn't installed or that you where building from a tarball.
You can modify `build/src/version.c` before running `make` if this is incorrect.
The instructions listed here all assume that `build/` is an empty dir that lives
inside the cloned repository of mraa.
If you have multiple versions of Python then mraa can get confused, we
recommend using virtualenv to select which version of Python you want. We test
2.7 the most but SWIG will generate valid 3.x Python code but we do not
generally support building both at once.
compile with `git` installed your version of mraa will be versioned with `git
desribe --tag` to make it easy for intentification. You can easily modify
version.c in build/src. If you don't build from a git tree then you will simply
have a version which matches the latest released version of mraa.
## Using a Yocto/OE toolchain
@@ -131,7 +138,6 @@ make
## Using Coverity
Static analysis is routinely performed using Coverity on libmraa's codebase.
This is the procedure to submit a build to Coverity. You'll need to install
`coverity-submit` for your OS.

View File

@@ -5,6 +5,31 @@ This changelog is meant as a quick & rough guide to what has changed between
versions. The API is now fairly stable but when new calls/features are added
they are listed here. Anything pre 0.2.x is ignored.
**1.5.1**
* Small memleaks plugged
* imraa useless arp statements removed
* NPM 1.5.0 did not 100% match real 1.5.0 tag, this resolves this
**1.5.0**
* imraa now uses argp, slight option changes, you need to use -a to flash a 101
* Joule i2c enumeration much improved, uses pci id
* Firmata add a spinlock to remove possible race condition
* Mock Uart functionality
**1.4.0**
* Add support for Siemens SIMATIC IOT2000
* Cmake now enables much more error detection depending on compiler support
* Mraa Maven packages now enabled
* Galileo Gen2 AIO fix using pincmd
* Adding an already added firmata platform now returns MRAA_SUCCESS
* Cmake no longer tags builds without git as '-dirty' version.c for easier
packaging support
**1.3.0**
* Fix GT GPIO bugs
* Mock SPI and travis now uses mock and tests it
* RPI zero support
**1.2.3**
* Revert 1.2.1 binding.gyp changed that had side effect of enabling JSONPLAT in mraa.c
* improve travis.ci to load mraa.node as compiled from make npmpkg target
@@ -19,25 +44,25 @@ they are listed here. Anything pre 0.2.x is ignored.
**1.2.0**
* JSON platform support
* mock I2c functionality
* Intel Grosse Tete PWM fix
* Intel Joule PWM fix
* AIO firmata bug fix
**1.1.2**
* Mock platform support
* mraa-i2c treats i2c buses by default as linux
* grosse tete i2c fixes
* Intel Joule i2c fixes
* travis now uses 14.04 instead of 12.04
**1.1.1**
* IIO 4.6 kernel matrix support
* Intel Grosse Tete radio led support
* Intel Joule radio led support
* mraa_init_io() examples
* MRAAPLATFORMFORCE fixes
* fix python documentation
**1.1.0**
* build python2 & python3 bindings
* Intel Grosse Tete support
* Intel Joule support
* mraa_init_io() generic funtion
* mraa-gpio fixes
* edison PWM 0% improvements

View File

@@ -1,112 +1,5 @@
Grosse Tete {#grossetete}
===========
{#grossetete}
The Grosse Tete with the Tuchuck board is supported by Mraa
You probably meant to go here: @joule.
Revision Support
----------------
Tuchuck
Interface notes
---------------
**SPI** Currently not working
**UART** Some pins are labelled as UARTs but are not configured in BIOS as UART
so only available UART is on the FTDI header
Pin Mapping
-----------
Tuchuck has two breakouts, breakout #1 is 1-40 whilst breakout2 is 41-80. The
LEDs are numbered from 100-103.
| MRAA Number | Physical Pin | Function |
|-------------|--------------|----------|
| 1 | GPIO | GPIO |
| 2 | SPP1RX | GPIO |
| 3 | PMICRST | NONE |
| 4 | SPP1TX | GPIO |
| 5 | 19.2mhz | GPIO |
| 6 | SPP1FS0 | GPIO |
| 7 | UART0TX | GPIO |
| 8 | SPP1FS2 | GPIO |
| 9 | PWRGD | NONE |
| 10 | SPP1CLK | GPIO |
| 11 | I2C0SDA | I2C |
| 12 | I2S1SDI | GPIO |
| 13 | I2C0SCL | I2C |
| 14 | I2S1SDO | GPIO |
| 15 | I2C1SDA | I2C |
| 16 | I2S1WS | GPIO |
| 17 | I2C1SCL | I2C |
| 18 | I2S1CLK | GPIO |
| 19 | I2C2SDA | I2C |
| 20 | I2S1MCL | GPIO |
| 21 | I2C2SCL | I2CO |
| 22 | UART1TX | UART |
| 23 | I2S4SDO | NONE |
| 24 | UART1RX | UART |
| 25 | I2S4SDI | NONE |
| 26 | PWM0 | GPIO PWM |
| 27 | I2S4BLK | GPIO |
| 28 | PWM1 | GPIO PWM |
| 29 | I2S4WS | NONE |
| 30 | PWM2 | GPIO PWM |
| 31 | I2S3SDO | NONE |
| 32 | PWM3 | GPIO PWM |
| 33 | I2S3SDI | NONE |
| 34 | 1.8V | NONE |
| 35 | I2S4BLK | GPIO |
| 36 | GND | NONE |
| 37 | GND | NONE |
| 38 | GND | NONE |
| 39 | GND | NONE |
| 40 | 3.3V | NONE |
| 41 | GND | NONE |
| 42 | 5V | NONE |
| 43 | GND | NONE |
| 44 | 5V | NONE |
| 45 | GND | NONE |
| 46 | 3.3V | NONE |
| 47 | GND | NONE |
| 48 | 3.3V | NONE |
| 49 | GND | NONE |
| 50 | 1.8V | NONE |
| 51 | GPIO | GPIO |
| 52 | 1.8V | NONE |
| 53 | PANEL | GPIO |
| 54 | GND | NONE |
| 55 | PANEL | GPIO |
| 56 | CAMERA | NONE |
| 57 | PANEL | GPIO |
| 58 | CAMERA | NONE |
| 59 | SPP0FS0 | GPIO |
| 60 | CAMERA | NONE |
| 61 | SPP0FS1 | GPIO |
| 62 | SPI_DAT | SPI |
| 63 | SPP0FS2 | GPIO |
| 64 | SPICLKB | GPIO SPI |
| 65 | SPP0FS3 | GPIO |
| 66 | SPICLKA | GPIO SPI |
| 67 | SPP0TX | GPIO |
| 68 | UART0RX | GPIO UART|
| 69 | SPP0RX | GPIO |
| 70 | UART0RT | GPIO UART|
| 71 | I2C1SDA | GPIO I2C |
| 72 | UART0CT | GPIO UART|
| 73 | I2C1SCL | GPIO I2C |
| 74 | UART1TX | GPIO UART|
| 75 | I2C2SDA | GPIO I2C |
| 76 | UART1RX | GPIO UART|
| 77 | I2C1SCL | GPIO I2C |
| 78 | UART1RT | GPIO UART|
| 79 | RTC_CLK | GPIO |
| 80 | UART1CT | GPIO UART|
| 100 | LED100 | GPIO |
| 101 | LED101 | GPIO |
| 102 | LED102 | GPIO |
| 103 | LED103 | GPIO |
To see a live pin mapping use the command:
$ mraa-gpio list
Note: This page will be deleted in the future, don't link to it!

View File

@@ -30,7 +30,6 @@ make
After you've built mraa you can install using `make install`.
## Running Imraa
Before being able to use mraa to program the Arduino101 you will need to run
imraa to flash the sketch file onto the board. The sketch file that imraa will
look for is located here: [Arduino101 Sketch](http://iotdk.intel.com/misc/ConfigurableFirmataCurieImu.ino.bin).

View File

@@ -45,9 +45,10 @@ Specific platform information for supported platforms is documented here:
- @ref rasppi
- @ref bananapi
- @ref beaglebone
- @ref phyboard-wega
- @ref nuc5
- @ref up
- @ref grossetete
- @ref joule
- @ref ft4222
## DEBUGGING

View File

@@ -45,9 +45,10 @@ Specific platform information for supported platforms is documented here:
- @ref rasppi
- @ref bananapi
- @ref beaglebone
- @ref phyboard-wega
- @ref nuc5
- @ref up
- @ref grossetete
- @ref joule
- @ref ft4222
## DEBUGGING

139
docs/joule.md Normal file
View File

@@ -0,0 +1,139 @@
Intel Joule {#joule}
===========
[http://www.intel.com/joule](http://www.intel.com/joule)
The Intel Joule expansion board is supported by Mraa
Revision Support
----------------
Intel Joule expansion board
Interface notes
---------------
**SPI**
Two SPI buses are available, with one chipselect each. Pins listed are MRAA
numbered pins. Other chip selects are available if enabled in BIOS/EEPROM but
cannot be enabled as BIOS options. You will need the spidev kernel module
loaded, Ostro-XT does this by default.
Bus 0 (32765)
MOSI = 2
MISO = 4
CS = 6
CLK = 10
Bus 1 (32766)
MOSI = 67
MISO = 69
CS0 = 59
CS1 = 61
CLK = 65
(remove 40 from numbers to get pin header number for pins on low speed header
2)
**UART** Some pins are labelled as UARTs but are not configured in BIOS as UART
so only available UART is on the FTDI header. Disable the getty on ttyS2 and
use mraa's uart raw mode to initialise on ttyS2. The Jumper J8 can be used to
switch between using the FTDI 6 pin header and the micro USB output.
Pin Mapping
-----------
The Intel Joule expansion board has two breakouts, breakout #1 is 1-40 whilst breakout2 is 41-80. The
LEDs are numbered from 100-103.
| MRAA Number | Physical Pin | Function |
|-------------|--------------|----------|
| 1 | GPIO | GPIO |
| 2 | SPP1RX | GPIO SPI |
| 3 | PMICRST | NONE |
| 4 | SPP1TX | GPIO SPI |
| 5 | 19.2mhz | GPIO |
| 6 | SPP1FS0 | GPIO SPI |
| 7 | UART0TX | GPIO |
| 8 | SPP1FS2 | GPIO SPI |
| 9 | PWRGD | NONE |
| 10 | SPP1CLK | GPIO SPI |
| 11 | I2C0SDA | I2C |
| 12 | I2S1SDI | GPIO |
| 13 | I2C0SCL | I2C |
| 14 | I2S1SDO | GPIO |
| 15 | I2C1SDA | I2C |
| 16 | I2S1WS | GPIO |
| 17 | I2C1SCL | I2C |
| 18 | I2S1CLK | GPIO |
| 19 | I2C2SDA | I2C |
| 20 | I2S1MCL | GPIO |
| 21 | I2C2SCL | I2CO |
| 22 | UART1TX | UART |
| 23 | I2S4SDO | NONE |
| 24 | UART1RX | UART |
| 25 | I2S4SDI | NONE |
| 26 | PWM0 | GPIO PWM |
| 27 | I2S4BLK | GPIO |
| 28 | PWM1 | GPIO PWM |
| 29 | I2S4WS | NONE |
| 30 | PWM2 | GPIO PWM |
| 31 | I2S3SDO | NONE |
| 32 | PWM3 | GPIO PWM |
| 33 | I2S3SDI | NONE |
| 34 | 1.8V | NONE |
| 35 | I2S4BLK | GPIO |
| 36 | GND | NONE |
| 37 | GND | NONE |
| 38 | GND | NONE |
| 39 | GND | NONE |
| 40 | 3.3V | NONE |
| 41 | GND | NONE |
| 42 | 5V | NONE |
| 43 | GND | NONE |
| 44 | 5V | NONE |
| 45 | GND | NONE |
| 46 | 3.3V | NONE |
| 47 | GND | NONE |
| 48 | 3.3V | NONE |
| 49 | GND | NONE |
| 50 | 1.8V | NONE |
| 51 | GPIO | GPIO |
| 52 | 1.8V | NONE |
| 53 | PANEL | GPIO |
| 54 | GND | NONE |
| 55 | PANEL | GPIO |
| 56 | CAMERA | NONE |
| 57 | PANEL | GPIO |
| 58 | CAMERA | NONE |
| 59 | SPP0FS0 | GPIO SPI |
| 60 | CAMERA | NONE |
| 61 | SPP0FS1 | GPIO SPI |
| 62 | SPI_DAT | SPI |
| 63 | SPP0FS2 | GPIO SPI |
| 64 | SPICLKB | GPIO |
| 65 | SPP0FS3 | GPIO SPI |
| 66 | SPICLKA | GPIO |
| 67 | SPP0TX | GPIO SPI |
| 68 | UART0RX | GPIO UART|
| 69 | SPP0RX | GPIO SPI |
| 70 | UART0RT | GPIO UART|
| 71 | I2C1SDA | GPIO I2C |
| 72 | UART0CT | GPIO UART|
| 73 | I2C1SCL | GPIO I2C |
| 74 | UART1TX | GPIO UART|
| 75 | I2C2SDA | GPIO I2C |
| 76 | UART1RX | GPIO UART|
| 77 | I2C2SCL | GPIO I2C |
| 78 | UART1RT | GPIO UART|
| 79 | RTC_CLK | GPIO |
| 80 | UART1CT | GPIO UART|
| 100 | LED100 | GPIO |
| 101 | LED101 | GPIO |
| 102 | LED102 | GPIO |
| 103 | LED103 | GPIO |
| 104 | LEDWIFI | GPIO |
| 105 | LEDBT | GPIO |
To see a live pin mapping use the command:
$ mraa-gpio list

127
docs/jsonplatform.md Normal file
View File

@@ -0,0 +1,127 @@
JSON platform {#jsonplat}
=============
JSON platform loading allows libmraa users who work with **simple** and unsupported
boards to create JSON configuration files which libmraa understands, allowing
libmraa to just 'work' with the unsupported platform. JSON platform **does not work**
with boards which require advanced functions which overwrite default functionality or
boards that require the mux functionality.
Syntax
------
The JSON file that libmraa reads needs specific values to be set by default, they
are required in every JSON file intended to be used to load the platform.
The keywords are case sensitive so be aware when writing the JSON file.
Each heading is a top level key in the JSON file, each key's type is Array
### platform
|Key |Type |Required |Description |
|-------------|-------|-----------|-----------------------------------------------|
|id |int |no | An ID that can be assigned |
|name |string |yes | The platform name |
|pin_count |int |yes | The total pin count |
|gpio_count |int |no | The subset of pincount which able to do GPIO |
|i2c_count |int |no | The number of usable I2C ports |
|aio_count |int |no | The number of usable AIO ports |
|spi_count |int |no | The number of usable SPI ports |
|uart_count |int |no | The total UART ports |
|pwmDefPeriod |int |no | The default PWM period |
|pwmMaxPeriod |int |no | The max PWM period |
|pwmMinPeriod |int |no | The min PWM period |
### layout
**THIS INDEX'S THE PIN ARRAY**
Each available pin specified using pin_count requires a label. There is no need to use an
index identifier as the json objects are indexed as they are read, starting with the first
json object being treated as index 0.
The number of json objects in layout should be equal to the pin_count.
|Key |Type |Required |Description |
|-----------|-------|-----------|-----------------------------------------------|
|label |string |yes | The label used to describe the pin |
|invalid |boolean|no | Sets the labeled pin as an invalid pin |
### GPIO
**THIS INDEX'S THE PIN ARRAY**
For the supported GPIO pins here is where we set the raw linux pin it needs to use, the
index cannot exceed the total pin_count and the number of JSON ojects cannot exceed the
gpio_count total. The index is also used to set the specified pin's capabilities. Each set
of keys should be enclosed in a json object.
|Key |Type |Required |Description |
|-----------|-------|-----------|-------------------------------------|
|index |int |yes | used to index the pin array |
|rawpin |int |yes | used to reference the actual IO pin |
### I2C
**THIS INDEX'S THE I2C ARRAY**
This is used to setup the I2C functionality. The total number of json objects and the index
cannot exceed the i2c_count. Each set of keys should be enclosed in a json object.
|Key |Type |Required |Description |
|-----------|-------|-----------|-------------------------------------|
|index |int |yes | Used to index the I2C array |
|rawpin |int |yes | The sysfs pin |
|sclpin |int |no | The clock pin |
|sdapin |int |no | The data pin |
|default |boolean|no | Sets the default I2C device used |
### AIO
**THIS INDEX'S THE PIN ARRAY**
This is used to setup which pins are able to perform AIO. Each set of keys should be
enclosed in a json object.
|Key |Type |Required |Description |
|-----------|-------|-----------|-------------------------------------|
|index |int |yes | Used to index the pin array |
|rawpin |int |yes | The sysfs pin |
### PWM
**THIS INDEX'S THE PIN ARRAY**
This is used to setup which IO pins can do PWM Each set of keys should be enclosed in a
json object.
|Key |Type |Required |Description |
|-----------|-------|-----------|-------------------------------|
|index |int |yes | Used to index the pin array |
|rawpin |int |yes | The sysfs pin |
|chipID |int |yes | The parent ID |
## SPI
**THIS INDEX'S THE SPI ARRAY**
This is used to setup the SPI functionality. The total number of json objects and the index
cannot exceed the spi_count. Each set of keys should be enclosed in a json object.
|Key |Type |Required |Description |
|-----------|-------|-----------|--------------------------------------------|
|index |int |yes | The index into the SPI array |
|chipID |int |yes | The parent ID |
|clock |int |no | The clock used for transmissions |
|miso |int |no | Pin used for incoming data from the slave |
|mosi |int |no | Pin used for outgoing data from the master |
|chipselect |int |no | Pin used to select the slave device |
|default |boolean|no | Sets the default SPI device |
### UART
**THIS INDEX'S THE UART ARRAY**
This is used to setup the UART functionality. The total number of json objects and the index
cannot exceed the uart_count. Each set of keys should be enclosed in a json object.
|Key |Type |Required |Description |
|-----------|-------|-----------|-----------------------------------------|
|index |int |yes | Used to index the UART array |
|chipID |int |yes | Parent ID |
|rawpin |int |yes | Sysfs pin |
|rx |int |no | Read pin |
|tx |int |no | Transmit pin |
|path |string |yes | Used to talk to a connected UART device |
|default |boolean|no | Sets the default UART device |

View File

@@ -19,6 +19,12 @@ Right now we simulate a single generic board with:
which can be read or written in bytes or words (big-endian). Technically those
registers are just an array of `uint8_t`, so you can treat them as 10 single-byte
registers or 5 single-word ones or a mix thereof.
* Single SPI bus with one Chip Select. All write functions are supported, received
data items (words or bytes) are calculated from the sent ones using
`sent_byte (or word) XOR constant` formula.
See [SPI mock header](../include/mock/mock_board_spi.h#L38-L39) for constant values.
* Single UART port. All functions are supported, but many are simple stubs. Write
always succeeds, read returns 'Z' symbol as many times as `read()` requested.
We plan to develop it further and all [contributions](../CONTRIBUTING.md) are more than welcome.
@@ -30,6 +36,12 @@ See the table below for pin layout and features
| 1 | ADC0 | AIO pin, returns random value on read |
| 2 | I2C0SDA | SDA pin for I2C0 bus |
| 3 | I2C0SCL | SCL pin for I2C0 bus |
| 4 | SPI0CS | CS pin for SPI0 bus |
| 5 | SPI0MOSI | MOSI pin for SPI0 bus |
| 6 | SPI0MISO | MISO pin for SPI0 bus |
| 7 | SPI0SCLK | SCLK pin for SPI0 bus |
| 8 | UART0RX | RX pin for UART0 port |
| 9 | UART0TX | TX pin for UART0 port |
Building
--------

View File

@@ -24,12 +24,16 @@ dir which matches the npm pkg name so we create one with a symlink and add the
~~~~~~~~~~~~~{.sh}
mkdir build
cd build
cmake -DBUILDSWIGNODE=ON ..
cmake -DBUILDSWIGNODE=ON -DJSONPLAT=OFF ..
make npmpkg
ln -s ../ mraa
tar hczv --exclude='build*' --exclude='.gitignore' --exclude='.git' --exclude='build*/*' --exclude='.git/*' -f mraa.tar.gz mraa
~~~~~~~~~~~~~
You need to disable jsonplatform otherwise you will need to change the
binding.gyp file to include those sources and make sure target platform has
json-c headers & libs.
Building with node-gyp
----------------------

237
docs/phyboard-wega.md Normal file
View File

@@ -0,0 +1,237 @@
phyBOARD-Wega {#phyboard-wega}
=============
The phyBOARD-Wega for phyCORE-AM335x is a low-cost, feature-rich software
development platform supporting the Texas Instruments AM335x microcontroller.
Moreover, due to the numerous standard interfaces the phyBOARD-Wega AM335x can
serve as bedrock for your application. At the core of the phyBOARD-Wega is the
PCL-051/phyCORE-AM335x System on Module (SOM) in a direct solder form factor,
containing the processor, DRAM, NAND Flash, power regulation, supervision,
transceivers, and other core functions required to support the AM335x
processor. Surrounding the SOM is the PBA-CD-02/phyBOARD-Wega carrier board,
adding power input, buttons, connectors, signal breakout, and Ethernet
connectivity amongst other things.
There are (for example) some expansion boards available for the phyBOARD-Wega:
- Power Module (PEB-POW-01)
- Evaluation Board (PEB-EVAL-01)
- HDMI Adapter (PEB-AV-01)
For further information and instruction please visit:
www.phytec.de/produkt/system-on-modules/single-board-computer/phyboard-wega
Interface notes
---------------
**SPI**
Spi0 can be used over pins on X69 connector. There are no more spi-devices.
Independent of the given index in mraa_phyboard_spi_init_pre() function,
it will be always initialized spi0.
**I2C**
/* TODO */
**UART**
Uart0 can be used over pins on X69 connector or serial port on Evaluation Board.
The other Uarts not have been tested yet. This is a small TODO for future.
Pin Assignment of X69 Expansion Connector
-----------------------------------------
| Physical Pin | Signal Name | Type | SL | Description |
|--------------|---------------------|------|-------|-------------------------|
| 1 | VCC3V3 | OUT | 3.3 V | 3.3V power supply |
| 2 | VCC5V | OUT | 5.0 V | 5V power supply |
| 3 | VDIG1_1P8V | OUT | 1.8 V | 1.8V power supply |
| | | | | (max. 300mA) |
| 4 | GND | - | - | Ground |
| 5 | X_SPIO_CS0 | OUT | 3.3 V | SPI 0 chip select 0 |
| 6 | X_SPIO_MOSI | OUT | 3.3 V | SPI 0 master output / |
| | | | | slave input |
| 7 | X_SPIO_MISO | IN | 3.3 V | SPI 0 master input / |
| | | | | slave output |
| 8 | X_SPIO_CLK | OUT | 3.3 V | SPI 0 clock output |
| 9 | GND | - | - | Ground |
| 10 | X_UART0_RXD | IN | 3.3 V | UART 0 receive data |
| | | | | (std. debug iface) |
| 11 | X_I2C0_SDA | I/O | 3.3 V | I2C0 Data |
| 12 | X_UART0_TXD | OUT | 3.3 V | UART 0 transmit data |
| | | | | (std. debug iface) |
| 13 | X_I2C0_SCL | I/O | 3.3 V | I2C0 Clock |
| 14 | GND | - | - | Ground |
| 15 | X_JTAG_TMS | IN | 3.3 V | JTAG Chain Test |
| | | | | Mode Select signal |
| 16 | X_nJTAG_TRST | IN | 3.3 V | JTAG Chain Test Reset |
| 17 | X_JTAG_TDI | IN | 3.3 V | JTAG Chain Test |
| | | | | Data Input |
| 18 | X_JTAG_TDO | OUT | 3.3 V | JTAG Chain Test |
| | | | | Data Output |
| 19 | GND | - | - | Ground |
| 20 | X_JTAG_TCK | IN | 3.3 V | JTAG Chain Test |
| | | | | Clock signal |
| 21 | X_USB_DP_EXP | I/O | 3.3 V | USB data plus |
| | | | | (for USB0 or USB1) |
| 22 | X_USB_DM_EXP | I/O | 3.3 V | USB data minus |
| | | | | (for USB0 or USB1) |
| 23 | nRESET_OUT | OUT | 3.3 V | Reset |
| 24 | GND | - | - | Ground |
| 25 | X_MMC2_CMD | I/O | 3.3 V | MMC command |
| 26 | X_MMC2_DATO | I/O | 3.3 V | MMC data 0 |
| 27 | X_MMC2_CLK | I/O | 3.3 V | MMC clock |
| 28 | X_MMC2_DAT1 | I/O | 3.3 V | MMC data 1 |
| 29 | GND | - | - | Ground |
| 30 | X_MMC2_DAT2 | I/O | 3.3 V | MMC data 2 |
| 31 | X_UART2_RX_GPIO3_9 | I/O | 3.3 V | UART 2 receive data |
| | | | | or GPIO3_9 |
| 32 | X_MMC2_DAT3 | I/O | 3.3 V | MMC data 3 |
| 33 | X_UART2_TX_GPIO3_10 | I/O | 3.3 V | UART 2 transmit data |
| | | | | or GPIO3_10 |
| 34 | GND | - | - | Ground |
| 35 | X_UART3_RX_GPIO2_18 | I/O | 3.3 V | UART 3 receive data |
| | | | | or GPIO2_18 |
| 36 | X_UART3_TX_GPIO2_19 | I/O | 3.3 V | UART 3 transmit data |
| | | | | or GPIO2_19 |
| 37 | X_INTR1_GPIO0_20 | I/O | 3.3 V | Interrupt 1 or GPIO0_20 |
| 38 | X_GPIO0_7 | I/O | 3.3 V | GPIO0_7 |
| 39 | X_AM335_EXT_WAKEUP | IN | 3.3 V | External wakeup |
| 40 | X_INT_RTCn | OUT | 3.3 V | Interrupt from the RTC |
| 41 | GND | - | - | Ground |
| 42 | X_GPIO3_7_nPMOD_PW | I/O | 3.3 V | GPIO3_7; Caution! Also |
| | RFAIL | | | connected to power fail |
| | | | | signal through R415. |
| 43 | nRESET_IN | IN | 3.3 V | Push-button reset |
| 44 | X_GPIO1_31 | I/O | 3.3 V | GPIO1_31 |
| 45 | X_AM335_NMIn | IN | 3.3 V | AM335x |
| | | | | non-maskable interrupt |
| 46 | GND | - | - | Ground |
| 47 | X_AIN4 | IN | 1.8 V | Analog input 4 |
| 48 | X_AIN5 | IN | 1.8 V | Analog input 5 |
| 49 | X_AIN6 | IN | 1.8 V | Analog input 6 |
| 50 | X_AIN7 | IN | 1.8 V | Analog input 7 |
| 51 | GND | - | - | Ground |
| 52 | X_GPIO_CKSYNC | I/O | 3.3 V | GPIO Clock |
| | | | | Synchronization |
| 53 | X_USB_ID_EXP | IN | 1.8 V | USB port identification |
| | | | | (for USB0 or USB1) |
| 54 | USB_VBUS_EXP | OUT | 5.0 V | USB bus voltage |
| | | | | (for USB0 or USB1) |
| 55 | X_USB1_CE | OUT | 3.3 V | USB 1 charger enable |
| 56 | GND | - | - | Ground |
| 57 | VCC_BL | OUT | NS | Backlight power supply |
| 58 | X_BP_POWER | IN | 5.0 V | Power On for Power |
| | | | | Management IC for AM335x|
| 59 | GND | - | - | Ground |
| 60 | VCC5V_IN | IN | 5.0 V | 5 V input supply voltage|
Pin Assignment of X70 A/V Connector
-----------------------------------
| Physical Pin | Signal Name | Type | SL | Description |
|--------------|---------------------|------|-------|-------------------------|
| 1 | GND | - | - | Ground |
| 2 | X_LCD_D21 | OUT | 3.3 V | LCD D21 |
| 3 | X_LCD_D18 | OUT | 3.3 V | LCD D18 |
| 4 | X_LCD_D16 | OUT | 3.3 V | LCD D16 |
| 5 | X_LCD_D0 | OUT | 3.3 V | LCD D0 |
| 6 | GND | - | - | Ground |
| 7 | X_LCD_D1 | OUT | 3.3 V | LCD D1 |
| 8 | X_LCD_D2 | OUT | 3.3 V | LCD D2 |
| 9 | X_LCD_D3 | OUT | 3.3 V | LCD D3 |
| 10 | X_LCD_D4 | OUT | 3.3 V | LCD D4 |
| 11 | GND | - | - | Ground |
| 12 | X_LCD_D22 | OUT | 3.3 V | LCD D22 |
| 13 | X_LCD_D19 | OUT | 3.3 V | LCD D19 |
| 14 | X_LCD_D5 | OUT | 3.3 V | LCD D5 |
| 15 | X_LCD_D6 | OUT | 3.3 V | LCD D6 |
| 16 | GND | - | - | Ground |
| 17 | X_LCD_D7 | OUT | 3.3 V | LCD D7 |
| 18 | X_LCD_D8 | OUT | 3.3 V | LCD D8 |
| 19 | X_LCD_D9 | OUT | 3.3 V | LCD D9 |
| 20 | X_LCD_D10 | OUT | 3.3 V | LCD D10 |
| 21 | GND | - | - | Ground |
| 22 | X_LCD_D23 | OUT | 3.3 V | LCD D23 |
| 23 | X_LCD_D20 | OUT | 3.3 V | LCD D20 |
| 24 | X_LCD_D17 | OUT | 3.3 V | LCD D17 |
| 25 | X_LCD_D11 | OUT | 3.3 V | LCD D11 |
| 26 | GND | - | - | Ground |
| 27 | X_LCD_D12 | OUT | 3.3 V | LCD D12 |
| 28 | X_LCD_D13 | OUT | 3.3 V | LCD D13 |
| 29 | X_LCD_D14 | OUT | 3.3 V | LCD D14 |
| 30 | X_LCD_D15 | OUT | 3.3 V | LCD D15 |
| 31 | GND | - | - | Ground |
| 32 | X_LCD_PCLK | OUT | 3.3 V | LCD Pixel Clock |
| 33 | X_LCD_BIAS_EN | OUT | 3.3 V | LCD BIAS |
| 34 | X_LCD_HSYNC | OUT | 3.3 V | LCD Horizontal |
| | | | | Synchronization |
| 35 | X_LCD_VSYNC | OUT | 3.3 V | LCD Vertical |
| | | | | Synchronisation |
| 36 | GND | - | - | Ground |
| 37 | GND | - | - | Ground |
| 38 | X_PWM1_OUT | OUT | 3.3 V | Pulse Width Modulation |
| 39 | VCC_BL | OUT | NS | Backlight power supply |
| 40 | VCC5V | OUT | 5.0 V | 5 V power supply |
Pin Assignment of X71 A/V Connector
-----------------------------------
| Physical Pin | Signal Name | Type | SL | Description |
|--------------|---------------------|------|-------|-------------------------|
| 1 | X_I2S_CLK | I/O | 3.3 V | I2S Clock |
| 2 | X_I2S_FRM | I/O | 3.3 V | I2S Frame |
| 3 | X_I2S_ADC | I/O | 3.3 V | I2S Analog-Digital |
| | | | | converter (microphone) |
| 4 | X_I2S_DAC | I/O | 3.3 V | I2S Digital-Analog |
| | | | | converter (speaker) |
| 5 | X_AV_INT_GPIO1_30 | I/O | 3.3 V | A/V interrupt; GPIO1_30 |
| 6 | nUSB1_OC_GPIO3_19 or| I/O | 3.3 V | GPIO3_19 or McASP0 |
| | X_MCASP0_AHCLKX_GPIO3_21| | | high frequency clock |
| 7 | GND | - | - | Ground |
| 8 | nRESET_OUT | OUT | 3.3 V | Reset |
| 9 | TS_X+ | IN | 1.8 V | Touch X+ |
| 10 | TS_X- | IN | 1.8 V | Touch X- |
| 11 | TS_Y+ | IN | 1.8 V | Touch Y+ |
| 12 | TS_Y- | IN | 1.8 V | Touch Y- |
| 13 | VCC3V3 | OUT | 3.3 V | 3.3 V power supply |
| 14 | GND | - | - | Ground |
| 15 | X_I2C0_SCL | I/O | 3.3 V | I2C Clock |
| 16 | X_I2C0_SDA | I/O | 3.3 V | I2C Data |
Jumper J77 connects either signal X_MCASP0_AHCLKX_GPIO3_21 or signal
nUSB1_OC_GPIO3_19 to pin 6 of X71.
The following table shows the available configurations:
A/V Jumper configuration J77
----------------------------
| J77 | Description |
|-----|--------------------------|
| 1+2 | X_MCASP0_AHCLKX_GPIO3_21 |
| 2+3 | nUSB1_OC_GPIO3_19 |
Caution: If J77 is set to 2+3 , J78 also has to be set to 2+3 !
GPIO - Pin-mapping (with installed expansion board)
---------------------------------------------------
| Physical Pin | Pin-Name | Pin-Map / Sysfs GPIO | Def. usage | Connector|
|--------------|---------------|----------------------|------------|----------|
| 31 | X_GPIO3_9 | 105 | OUT LED3 | X69 |
| 33 | X_GPIO3_10 | 106 | IN S3 | X69 |
| 35 | X_GPIO2_18 | 82 (busy) | OUT LED1 | X69 |
| 36 | X_GPIO2_19 | 83 | OUT LED2 | X69 |
| 37 | X_GPIO0_20 | 20 (busy) | IN S1 | X69 |
| 38 | X_GPIO0_7 | 7 | IN S2 | X69 |
| 42 | X_GPIO3_7 | 103 | IN | X69 |
| 44 | X_GPIO1_31 | 63 | IN | X69 |
|--------------|---------------|----------------------|------------|----------|
| 5 (105) | X_GPIO1_30 | 62 | IN | X71 |
| 6 (106) | X_GPIO3_19 or | 115 | IN | X71 |
| | X_GPIO3_21 | 117 | IN | X71 |
Info: (busy) means, that it is used by kernel driver!

View File

@@ -1,11 +1,11 @@
UP Board {#up}
============
UP Board is based on the Intel(R) Atom(TM) x5-Z83xx SoC (formerly Cherry Trail).
It includes 2GB RAM, 16/32GB eMMC flash, 6 USB2.0 ports, 1 USB 3.0 OTG port,
1 Gigabit Ethernet, HDMI and DSI Graphics ports, RTC and a 40-pin I/O header.
The form-factor for the board is based on the Raspberry Pi 2, and can be used
with many of the add-on HAT boards designed for the Raspberry Pi 2.
UP Board is based on the Intel(R) Atom(TM) x5-Z8350 SoC (formerly Cherry Trail).
It includes 1/2/4GB RAM, 16/32/64GB eMMC flash, 6 USB2.0 ports, 1 USB 3.0 OTG
port, 1 Gigabit Ethernet, HDMI and DSI/eDP Graphics ports, RTC and a 40-pin I/O
header. The form-factor for the board is based on the Raspberry Pi 2, and can be
used with many of the add-on HAT boards designed for the Raspberry Pi.
Interface notes
---------------
@@ -25,12 +25,15 @@ granular at higher speeds. E.g. Available speeds include:
25MHz, 12.5MHz, 8.33MHz, 6.25MHz, 5MHz, 4.167MHz, 3.571MHz, 3.125MHz, etc.
Please be aware that speeds in between those steps will be rounded UP to the
next nearest available speed, and capped at 25MHz.
At the time of writing, only a single native chip-select is available (SPI CS0).
2 chip-selects are available, one natively (SPI CS0) and one by GPIO (SPI CS1).
**UART** 2 high-speed UARTs are available, supporting baud rates up to
support baud rates between 300 and 3686400. Hardware flow-control signals are
not exposed, so software flow-control may be needed for rates above 115200.
A console UART is also available but is not fully supported at this time.
**UART** 1 high-speed UART is available, supporting baud rates between 300 and
3686400. Hardware flow-control signals are available on pins 11/36 (RTS/CTS).
**ADC** 1 8-bit single-channel ADC (TI ADC081C021) is available on pin 7.
Please note that a kernel with UP board support is required to enable the I/O
interfaces above. Refer to https://up-community.org for more information.
Pin Mapping
-----------
@@ -48,13 +51,13 @@ Note that there is an enum to use wiringPi style numbers.
| 4 | P1-04 | 5V VCC | | |
| 5 | P1-05 | I2C SCL1 | 3 | I2C1 (/dev/i2c-1) |
| 6 | P1-06 | GND | | |
| 7 | P1-07 | GPIO(4) | 4 | |
| 7 | P1-07 | GPIO(4) | 4 | ADC0 (iio:device0) |
| 8 | P1-08 | UART TX1 | 14 | UART1 (/dev/ttyS1) |
| 9 | P1-09 | GND | | |
| 10 | P1-10 | UART RX1 | 15 | UART1 (/dev/ttyS1) |
| 11 | P1-11 | GPIO(17) | 17 | |
| 12 | P1-12 | I2S CLK | 18 | I2S0 (PCM Audio) |
| 13 | P1-13 | UART RX2 | 27 | UART2 (/dev/ttyS2) |
| 13 | P1-13 | GPIO(27) | 27 | |
| 14 | P1-14 | GND | | |
| 15 | P1-15 | GPIO(22) | 22 | |
| 16 | P1-16 | GPIO(23) | 23 | |
@@ -63,7 +66,7 @@ Note that there is an enum to use wiringPi style numbers.
| 19 | P1-19 | SPI MOSI | 10 | SPI2 (/dev/spidev2.x)|
| 20 | P1-20 | GND | | |
| 21 | P1-21 | SPI MISO | 9 | SPI2 (/dev/spidev2.x)|
| 22 | P1-22 | UART TX2 | 25 | UART2 (/dev/ttyS2) |
| 22 | P1-22 | GPIO(25) | 25 | |
| 23 | P1-23 | SPI SCL | 11 | SPI2 (/dev/spidev2.x)|
| 24 | P1-24 | SPI CS0 | 8 | SPI2 (/dev/spidev2.0)|
| 25 | P1-25 | GND | | |

View File

@@ -46,6 +46,9 @@ main(int argc, char** argv)
// lure put an LED on pin 21
gpio = mraa_gpio_init(21);
break;
case MRAA_INTEL_JOULE_EXPANSION:
gpio = mraa_gpio_init(101);
break;
default:
gpio = mraa_gpio_init(13);
}

View File

@@ -59,7 +59,7 @@ main(int argc, char** argv)
while (!id.empty()) {
// hack so we don't need to cast each element of the romcode
// for printf purposes
uint8_t* ptr = (uint8_t*) id.c_str();
uint8_t* ptr = (uint8_t*) id.data();
// The first byte (0) is the device type (family) code.
// The last byte (7) is the rom code CRC value. The

View File

@@ -49,6 +49,7 @@ main()
value = 0.0f;
}
float output = mraa_pwm_read(pwm);
printf("PWM value is %f\n", output);
}
//! [Interesting]
return 0;

View File

@@ -56,7 +56,7 @@ main()
mraa_firmata_response(firm, interrupt);
uint8_t* buffer = calloc(4, 0);
char* buffer = calloc(4, 0);
if (buffer == NULL) {
free(firm);
return EXIT_FAILURE;

View File

@@ -55,7 +55,7 @@ interrupt(char* data)
mraa_iio_channel* channels = mraa_iio_get_channels(iio_device0);
int i = 0;
for (i; i < mraa_iio_get_channel_count(iio_device0); i++) {
for (; i < mraa_iio_get_channel_count(iio_device0); i++) {
if (channels[i].enabled) {
printf("channel %d - bytes %d\n", channels[i].index, channels[i].bytes);
switch (channels[i].bytes) {

View File

@@ -144,7 +144,6 @@ i2c_set_exit:
void
i2c_detect_devices(int bus)
{
mraa_result_t status = MRAA_SUCCESS;
mraa_i2c_context i2c = mraa_i2c_init(bus);
if (i2c == NULL) {
return;

View File

@@ -0,0 +1,26 @@
{
"version": "0.1.0",
"platform":[
{
"id":301,
"name":"Intel Aero",
"pin_count": 0,
"gpio_count": 0,
"i2c_count": 1,
"aio_count": 0,
"spi_count": 1,
"uart_count": 0,
}
],
"layout":[
],
"GPIO":[
],
"I2C": [
{ "index": 0, "bus" : 2, "default":true }
],
"SPI": [
{ "index":0, "bus": 3, "slaveselect": 0, "default": true}
],
}

View File

@@ -1,73 +1,74 @@
{
"version": "1.0.0",
"platform":[
{ "id":300,
"name":"Turbot",
"pin_count": 28,
"gpio_count": 28,
"i2c_count": 1,
"aio_count": 0,
"spi_count": 1,
"uart_count": 1,
"pwmDefPeriod":500,
"pwmMaxPeriod":1000000000,
"pwmMinPeriod":1
"version": "1.1.0",
"platform": [
{
"id":300,
"name":"Turbot",
"pin_count": 28,
"gpio_count": 28,
"i2c_count": 1,
"aio_count": 0,
"spi_count": 1,
"uart_count": 1,
"pwmDefPeriod":500,
"pwmMaxPeriod":1000000000,
"pwmMinPeriod":1
}
],
"layout":[
{"label": "INVALID", "invalid": true},
{"label": "GND"},
{"label": "GND"},
{"label": "5v"},
{"label": "3.3v"},
{"label": "SPI_CS"},
{"label": "UART1TX"},
{"label": "SPIMISO"},
{"label": "UART1RX"},
{"label": "SPIMOSI"},
{"label": "UART1CT"},
{"label": "SPI_CLK"},
{"label": "UART1RT"},
{"label": "I2C_SCL"},
{"label": "I2S_CLK"},
{"label": "I2C_SDA"},
{"label": "I2S_FRM"},
{"label": "UART2TX"},
{"label": "I2S_DO"},
{"label": "UART2RX"},
{"label": "I2S_DI"},
{"label": "S5_0"},
{"label": "PWM0"},
{"label": "S5_1"},
{"label": "PWM1"},
{"label": "S5_4"},
{"label": "I2S_MCLK"},
{"label": "S5_22"}
"layout": [
{"label": "INVALID", "invalid": true},
{"label": "GND"},
{"label": "GND"},
{"label": "5v"},
{"label": "3.3v"},
{"label": "SPI_CS"},
{"label": "UART1TX"},
{"label": "SPIMISO"},
{"label": "UART1RX"},
{"label": "SPIMOSI"},
{"label": "UART1CT"},
{"label": "SPI_CLK"},
{"label": "UART1RT"},
{"label": "I2C_SCL"},
{"label": "I2S_CLK"},
{"label": "I2C_SDA"},
{"label": "I2S_FRM"},
{"label": "UART2TX"},
{"label": "I2S_DO"},
{"label": "UART2RX"},
{"label": "I2S_DI"},
{"label": "S5_0"},
{"label": "PWM0"},
{"label": "S5_1"},
{"label": "PWM1"},
{"label": "S5_4"},
{"label": "I2S_MCLK"},
{"label": "S5_22"}
],
"GPIO": [
{ "index": 10, "rawpin": 483 },
{ "index": 12, "rawpin": 482 },
{ "index": 14, "rawpin": 472 },
{ "index": 16, "rawpin": 473 },
{ "index": 18, "rawpin": 475 },
{ "index": 20, "rawpin": 474 },
{ "index": 21, "rawpin": 338 },
{ "index": 23, "rawpin": 339 },
{ "index": 25, "rawpin": 340 },
{ "index": 26, "rawpin": 509 },
{ "index": 27, "rawpin": 360 }
],
"GPIO":[
{ "index": 10, "rawpin": 483 },
{ "index": 12, "rawpin": 482 },
{ "index": 14, "rawpin": 472 },
{ "index": 16, "rawpin": 473 },
{ "index": 18, "rawpin": 475 },
{ "index": 20, "rawpin": 474 },
{ "index": 21, "rawpin": 338 },
{ "index": 23, "rawpin": 339 },
{ "index": 25, "rawpin": 340 },
{ "index": 26, "rawpin": 509 },
{ "index": 27, "rawpin": 360 }
"I2C": [
{ "sclpin":13, "sdapin":15, "bus": 9, "index": 0, "default":true }
],
"I2C": [
{ "sclpin":13, "sdapin":15, "rawpin": 0, "index": 0, "default":true }
],
"PWM": [
{ "index":22, "rawpin":0, "chipID":0},
{ "index":24, "rawpin":0, "chipID":1 }
],
"SPI": [
{ "index":0, "chipID": 0, "clock": 11, "miso": 7, "mosi": 9, "chipselect": 5, "default": true}
],
"UART":[
{ "index":0, "chipID":0, "rawpin":0, "path":"/dev/ttyS0", "default":true}
]
"PWM": [
{ "index":22, "rawpin":0, "chipID":0},
{ "index":24, "rawpin":0, "chipID":1 }
],
"SPI": [
{ "index":0, "bus": 0, "slaveselect": 0, "clock": 11, "miso": 7, "mosi": 9, "chipselect": 5, "default": true}
],
"UART": [
{ "index":0, "chipID":0, "rawpin":0, "path":"/dev/ttyS0", "default":true}
]
}

View File

@@ -0,0 +1,40 @@
#!/usr/bin/env python
# Author: Henry Bruce <henry.bruce@intel.com>
# Copyright (c) 2016 Intel Corporation.
#
# Permission is hereby granted, free of charge, to any person obtaining
# a copy of this software and associated documentation files (the
# "Software"), to deal in the Software without restriction, including
# without limitation the rights to use, copy, modify, merge, publish,
# distribute, sublicense, and/or sell copies of the Software, and to
# permit persons to whom the Software is furnished to do so, subject to
# the following conditions:
#
# The above copyright notice and this permission notice shall be
# included in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
# LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
# OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
# WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE
# Read from MCP3004 ADC pin 0 in single ended mode
import mraa
import time
dev = mraa.Spi(0)
txbuf = bytearray(3)
txbuf[0] = 0x01
txbuf[1] = 0x80
txbuf[2] = 0x00
while True:
rxbuf = dev.write(txbuf)
value = ((rxbuf[1] & 0x03) << 8) | rxbuf[2]
print value
time.sleep(0.5)

View File

@@ -33,7 +33,6 @@ main(int argc, char** argv)
//! [Interesting]
mraa_spi_context spi;
spi = mraa_spi_init(0);
unsigned int response = 0;
printf("Hello, SPI initialised\n");
uint8_t data[] = { 0x00, 100 };
uint8_t* recv;

View File

@@ -1,10 +1,11 @@
add_executable (imraa imraa.c)
add_executable (imraa imraa.c imraa_arduino.c imraa_io.c imraa_lock.c)
include_directories (${PROJECT_SOURCE_DIR}/api)
include_directories (${PROJECT_SOURCE_DIR}/include)
include_directories (${PROJECT_SOURCE_DIR}/api/mraa)
include_directories (${PROJECT_SOURCE_DIR}/imraa)
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DIMRAA=1")
set (CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DIMRAA=1")
find_package (JSON-C REQUIRED)
include_directories (${JSON-C_INCLUDE_DIR})

View File

@@ -1,7 +1,7 @@
/*
* Author: Brendan Le Foll <brendan.le.foll@intel.com>
* Author: Longwei Su <lsu@ics.com>
* Copyright (c) 2015 Intel Corporation.
* Copyright (c) 2015-2016 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
@@ -29,395 +29,23 @@
#include <stdint.h>
#include <stdbool.h>
#include <unistd.h>
#include <json-c/json.h>
#include <libudev.h>
#include <error.h>
#include <sys/types.h>
#include <mraa/uart.h>
#include <mraa/gpio.h>
#include <mraa/i2c.h>
#include <mraa/pwm.h>
#include <json-c/json.h>
#include <argp.h>
#include <mraa_internal.h>
#include <imraa_arduino.h>
#include <imraa_io.h>
#include <imraa_lock.h>
#define IMRAA_CONF_FILE "/etc/imraa.conf"
typedef struct mraa_io_objects_t {
const char* type;
int index;
bool raw;
const char* label;
} mraa_io_objects_t;
const char*
imraa_list_serialport()
{
struct udev* udev;
struct udev_enumerate* enumerate;
struct udev_list_entry *devices, *dev_list_entry;
struct udev_device* dev;
const char* ret = NULL;
udev = udev_new();
if (!udev) {
printf("Can't create udev, check libudev\n");
exit(1);
}
enumerate = udev_enumerate_new(udev);
udev_enumerate_add_match_subsystem(enumerate, "tty");
udev_enumerate_add_match_property(enumerate, "ID_VENDOR_ID", "8087");
udev_enumerate_add_match_property(enumerate, "ID_MODEL_ID", "0ab6");
// udev_enumerate_add_match_property(enumerate, "ID_SERIAL",
// "Intel_ARDUINO_101_AE6642SQ55000RS");
udev_enumerate_scan_devices(enumerate);
devices = udev_enumerate_get_list_entry(enumerate);
udev_list_entry_foreach(dev_list_entry, devices)
{
const char* path;
path = udev_list_entry_get_name(dev_list_entry);
dev = udev_device_new_from_syspath(udev, path);
ret = udev_device_get_devnode(dev);
}
udev_enumerate_unref(enumerate);
udev_unref(udev);
if (ret) {
printf("Ardunio 101 Device Node Path: %s\n", ret);
} else {
printf("Can't detect any Ardunio 101 Device on tty\n");
}
return ret;
}
mraa_result_t
imraa_reset_arduino(const char* modem)
{
mraa_uart_context uart;
uart = mraa_uart_init_raw(modem);
mraa_uart_set_baudrate(uart, 1200);
if (uart == NULL) {
fprintf(stderr, "UART failed to setup\n");
return MRAA_ERROR_UNSPECIFIED;
}
mraa_uart_stop(uart);
mraa_deinit();
return MRAA_SUCCESS;
}
int
imraa_flash_101(const char* bin_path, const char* bin_file_name, const char* tty)
{
if (imraa_reset_arduino(tty) != MRAA_SUCCESS) {
fprintf(stderr, "Failed to reset arduino on %s for unknown reason, carrying on...\n", tty);
}
char* ln = NULL;
size_t len = 0;
bool board_found = false;
const char* dfu_list = "/dfu-util -d ,8087:0ABA -l";
size_t bin_path_len = strlen(bin_path);
char* full_dfu_list = (char*) calloc((bin_path_len + strlen(dfu_list) + 1), sizeof(char));
if (!full_dfu_list) {
printf("imraa_flash_101 can't allocate string buffer for dfu list\n");
exit(1);
}
strncat(full_dfu_list, bin_path, strlen(bin_path));
strncat(full_dfu_list, dfu_list, strlen(dfu_list));
int i;
// dfu list is still needed, as the time for reset and recognized is varies from platform to
// platform.
// once dfu able to query available devices, then it is ready to flash
for (i = 0; i < 10 && board_found == false; i++) {
printf("Waiting for device...\n");
// dfu-util -d,8087:0ABA -l
FILE* dfu_result = popen(full_dfu_list, "r");
if (dfu_result == NULL) {
printf("Failed to run command\n");
exit(1);
}
if (i == 4) {
printf("Flashing is taking longer than expected\n");
printf("Try pressing MASTER_RESET button\n");
}
while (getline(&ln, &len, dfu_result) != -1) {
if (strstr(ln, "sensor_core")) {
board_found = true;
printf("Device found!\n");
break;
}
}
sleep(1);
if (pclose(dfu_result) != 0) {
printf("Failed to close command\n");
exit(1);
}
}
free(ln);
if (board_found == false) {
printf("ERROR: Device is not responding.\n");
exit(1);
}
const char* dfu_upload = "/dfu-util -d ,8087:0ABA -D ";
const char* dfu_option = " -v -a 7 -R";
int buffersize = bin_path_len + strlen(dfu_upload) + strlen(bin_file_name) + strlen(dfu_option) + 1;
char* full_dfu_upload = calloc(buffersize, sizeof(char));
if (!full_dfu_upload) {
printf("imraa_flash_101 can't allocate string buffer for dfu flash\n");
exit(1);
}
strncat(full_dfu_upload, bin_path, strlen(bin_path));
strncat(full_dfu_upload, dfu_upload, strlen(dfu_upload));
strncat(full_dfu_upload, bin_file_name, strlen(bin_file_name));
strncat(full_dfu_upload, dfu_option, strlen(dfu_option));
printf("flash cmd: %s\n", full_dfu_upload);
int status = system(full_dfu_upload);
if (status != 0) {
printf("ERROR: Upload failed on %s\n", tty);
exit(1);
}
printf("SUCCESS: Sketch will execute in about 5 seconds.\n");
free(full_dfu_list);
free(full_dfu_upload);
sleep(5);
return 0;
}
void
imraa_write_lockfile(const char* lock_file_location, const char* serialport)
{
FILE* fh;
char str[10];
json_object* platform1 = json_object_new_object();
snprintf(str, 10, "%d", MRAA_NULL_PLATFORM);
json_object_object_add(platform1, "id", json_object_new_string(str));
json_object* platform2 = json_object_new_object();
snprintf(str, 10, "%d", MRAA_GENERIC_FIRMATA);
json_object_object_add(platform2, "id", json_object_new_string(str));
json_object_object_add(platform2, "uart", json_object_new_string(serialport));
json_object* platfroms = json_object_new_array();
json_object_array_add(platfroms, platform1);
json_object_array_add(platfroms, platform2);
json_object* lock_file = json_object_new_object();
json_object_object_add(lock_file, "Platform", platfroms);
fh = fopen(lock_file_location, "w");
if (fh != NULL) {
fputs(json_object_to_json_string_ext(lock_file, JSON_C_TO_STRING_PRETTY), fh);
fclose(fh);
} else {
fprintf(stderr, "can't write to lock file\n");
}
json_object_put(lock_file);
}
void
imraa_handle_subplatform(struct json_object* jobj, bool force_update)
{
struct json_object* platform;
int i, ionum;
const char* dfu_loc = NULL;
const char* lockfile_loc = NULL;
const char* flash_loc = NULL;
const char* usbserial = NULL;
struct json_object* dfu_location;
if (json_object_object_get_ex(jobj, "dfu-utils-location", &dfu_location) == true) {
if (json_object_is_type(dfu_location, json_type_string)) {
printf("dfu location: %s\n", json_object_get_string(dfu_location));
dfu_loc = json_object_get_string(dfu_location);
} else {
fprintf(stderr, "dfu location string incorrectly parsed\n");
}
}
struct json_object* lockfile_location;
if (json_object_object_get_ex(jobj, "lockfile-location", &lockfile_location) == true) {
if (json_object_is_type(lockfile_location, json_type_string)) {
printf("lock file location: %s\n", json_object_get_string(lockfile_location));
lockfile_loc = json_object_get_string(lockfile_location);
} else {
fprintf(stderr, "lock file string incorrectly parsed\n");
}
}
if (json_object_object_get_ex(jobj, "Platform", &platform) == true) {
if (json_object_is_type(platform, json_type_array)) {
ionum = json_object_array_length(platform);
for (i = 0; i < ionum; i++) {
struct json_object* ioobj = json_object_array_get_idx(platform, i);
json_object_object_foreach(ioobj, key, val)
{
if (strcmp(key, "flash") == 0) {
flash_loc = json_object_get_string(val);
}
if (strcmp(key, "usbserial") == 0) {
usbserial = json_object_get_string(val);
}
}
}
} else {
fprintf(stderr, "platform string incorrectly parsed\n");
}
}
if (flash_loc == NULL || usbserial == NULL ) {
printf("conf didn't give image location or usb serial, skip flashing\n");
return;
}
if (!dfu_loc) {
dfu_loc = "/usr/bin";
printf("No dfu path found, using default path /usr/bin instead");
}
if (!lockfile_loc) {
lockfile_loc = "/tmp/imraa.lock";
printf("No lock path found, using default lock file /tmp/imraa.lock instead");
}
// got flash? do flash
if (access(lockfile_loc, F_OK) != -1 && force_update == false) {
printf("already exist a lock file, skip flashing\n");
printf("force upgrade? remove the lockfile or run with force\n", lockfile_loc);
return;
} else {
fprintf(stdout, "Starting to flash board\n");
if (force_update) {
fprintf(stdout, "**Caution: force update mode**\n");
}
// TODO flash img checksum, and serialport validation?
const char* detected_serialport = imraa_list_serialport();
if (detected_serialport == NULL) {
printf("No subplatform detected, check USB connection, skip flashing\n");
return;
}
if (strcmp(usbserial, "auto") != 0 && strcmp(usbserial, detected_serialport) != 0) {
printf("given serial port didn't match detected serial port, skip flashing\n");
return;
}
if (imraa_flash_101(dfu_loc, flash_loc, detected_serialport) == 0) {
imraa_write_lockfile(lockfile_loc, detected_serialport);
} else {
fprintf(stderr, "invalid flashing paramenters, please check agian\n");
fprintf(stderr, "DFU Util location: %s\n", dfu_loc);
fprintf(stderr, "Flash Img location: %s\n", dfu_loc);
fprintf(stderr, "USB Serial: %s\n", usbserial);
fprintf(stderr, "Flash failed, push master reset and try again\n");
}
}
}
void
imraa_handle_IO(struct json_object* jobj)
{
struct mraa_io_objects_t* mraa_io_obj;
struct json_object* ioarray;
int ionum = 0;
int i;
if (json_object_object_get_ex(jobj, "IO", &ioarray) == true) {
ionum = json_object_array_length(ioarray);
printf("Length of IO array is %d\n", ionum);
mraa_io_obj = (mraa_io_objects_t*) malloc(ionum * sizeof(mraa_io_objects_t));
if (!mraa_io_obj) {
printf("imraa_handle_IO malloc failed\n");
exit(1);
}
int index2 = -1;
; // optional index for io configuration;
if (json_object_is_type(ioarray, json_type_array)) {
for (i = 0; i < ionum; i++) {
struct json_object* ioobj = json_object_array_get_idx(ioarray, i);
struct json_object* x;
if (json_object_object_get_ex(ioobj, "type", &x) == true) {
mraa_io_obj[i].type = json_object_get_string(x);
}
if (json_object_object_get_ex(ioobj, "index", &x) == true) {
mraa_io_obj[i].index = json_object_get_int(x);
}
if (json_object_object_get_ex(ioobj, "raw", &x) == true) {
mraa_io_obj[i].raw = json_object_get_boolean(x);
}
if (json_object_object_get_ex(ioobj, "label", &x) == true) {
mraa_io_obj[i].label = json_object_get_string(x);
}
if (json_object_object_get_ex(ioobj, "index2", &x) == true) {
index2 = json_object_get_int(x);
}
// starting io configuration
if (strcmp(mraa_io_obj[i].type, "gpio") == 0) {
mraa_gpio_context gpio = NULL;
if (mraa_io_obj[i].raw) {
gpio = mraa_gpio_init_raw(mraa_io_obj[i].index);
} else {
gpio = mraa_gpio_init(mraa_io_obj[i].index);
}
if (gpio != NULL) {
mraa_result_t r = mraa_gpio_owner(gpio, 0);
if (r != MRAA_SUCCESS) {
mraa_result_print(r);
}
mraa_gpio_close(gpio);
}
} else if (strcmp(mraa_io_obj[i].type, "i2c") == 0) {
mraa_i2c_context i2c = NULL;
if (mraa_io_obj[i].raw) {
i2c = mraa_i2c_init_raw(mraa_io_obj[i].index);
} else {
i2c = mraa_i2c_init(mraa_io_obj[i].index);
}
if (i2c != NULL) {
mraa_i2c_stop(i2c);
}
} else if (strcmp(mraa_io_obj[i].type, "pwm") == 0) {
mraa_pwm_context pwm = NULL;
if (mraa_io_obj[i].raw) {
pwm = mraa_pwm_init_raw(index2, mraa_io_obj[i].index);
} else {
pwm = mraa_pwm_init(mraa_io_obj[i].index);
}
if (pwm != NULL) {
mraa_result_t r = mraa_pwm_owner(pwm, 0);
if (r != MRAA_SUCCESS) {
mraa_result_print(r);
}
mraa_pwm_close(pwm);
}
} else if (strcmp(mraa_io_obj[i].type, "spi") == 0) {
mraa_spi_context spi = NULL;
if (mraa_io_obj[i].raw) {
spi = mraa_spi_init_raw(mraa_io_obj[i].index, index2);
} else {
spi = mraa_spi_init(mraa_io_obj[i].index);
}
if (spi != NULL) {
mraa_spi_stop(spi);
}
} else if (strcmp(mraa_io_obj[i].type, "uart") == 0) {
mraa_uart_context uart = NULL;
if (mraa_io_obj[i].raw) {
uart = mraa_uart_init_raw(mraa_io_obj[i].label);
} else {
uart = mraa_uart_init(mraa_io_obj[i].index);
}
if (uart != NULL) {
mraa_uart_stop(uart);
}
}
}
} else {
fprintf(stderr, "IO array incorrectly parsed\n");
}
free(mraa_io_obj);
}
}
int
check_version(struct json_object* jobj)
imraa_check_version(struct json_object* jobj)
{
struct json_object* imraa_version;
if (json_object_object_get_ex(jobj, "version", &imraa_version) == true) {
@@ -434,58 +62,82 @@ check_version(struct json_object* jobj)
return 0;
}
void
print_version()
const char *argp_program_version = "imraa version 2.0";
const char *argp_program_bug_address = "http://github.com/intel-iot-devkit/mraa/issues";
static char doc[] = "somestuff";
static char args_doc[] = "-i imraa.conf";
static struct argp_option options[] = {
{"verbose", 'v', 0, 0, "Produce verbose output" },
{"quiet", 'q', 0, 0, "Don't produce any output" },
{"silent", 's', 0, OPTION_ALIAS },
{"force", 'f', 0, 0, "Force update" },
{"arduino", 'a', 0, 0, "Arduino detection" },
{"input", 'i', "FILE", 0,
"configuration file" },
{ 0 }
};
struct arguments
{
fprintf(stdout, "Version %s on %s\n", mraa_get_version(), mraa_get_platform_name());
char *args[2];
int silent, verbose, force, arduino;
char *input_file;
};
static error_t
parse_opt(int key, char *arg, struct argp_state *state)
{
/* Get the input argument from argp_parse, which we
know is a pointer to our arguments structure. */
struct arguments *arguments = state->input;
switch(key) {
case 'q': case 's':
arguments->silent = 1;
break;
case 'v':
arguments->verbose = 1;
break;
case 'a':
arguments->arduino = 1;
break;
case 'f':
arguments->force = 1;
break;
case 'i':
arguments->input_file = arg;
break;
case ARGP_KEY_ARG:
break;
case ARGP_KEY_END:
break;
default:
return ARGP_ERR_UNKNOWN;
}
return 0;
}
void
print_help()
{
fprintf(stdout, "version Get mraa version and board name\n");
fprintf(stdout, "force Force update subplatform\n");
fprintf(stdout, "conf_path Force update with override configuration\n");
}
void
print_command_error()
{
fprintf(stdout, "Invalid command, options are:\n");
print_help();
exit(EXIT_FAILURE);
}
static struct argp argp = { options, parse_opt, args_doc, doc};
int
main(int argc, char** argv)
{
char* buffer = NULL;
char* imraa_conf_file = IMRAA_CONF_FILE;
long fsize;
bool force_update = false;
int i = 0;
uint32_t ionum = 0;
struct arguments arguments;
if (argc > 2) {
print_command_error();
}
arguments.silent = 0;
arguments.verbose = 0;
arguments.force = 0;
arguments.input_file = IMRAA_CONF_FILE;
if (argc > 1) {
if (strcmp(argv[1], "help") == 0) {
print_help();
return EXIT_SUCCESS;
} else if (strcmp(argv[1], "version") == 0) {
print_version();
return EXIT_SUCCESS;
} else if (strcmp(argv[1], "force") == 0) {
force_update = true;
} else {
imraa_conf_file = argv[1];
force_update = true;
}
}
argp_parse(&argp, argc, argv, 0, 0, &arguments);
FILE* fh = fopen(imraa_conf_file, "r");
FILE* fh = fopen(arguments.input_file, "r");
if (fh == NULL) {
fprintf(stderr, "Failed to open configuration file\n");
return EXIT_FAILURE;
@@ -497,28 +149,33 @@ main(int argc, char** argv)
buffer = calloc(fsize, sizeof(char));
if (buffer != NULL) {
int result = fread(buffer, sizeof(char), fsize, fh);
if (result != fsize) {
printf("imraa conf reading error");
if (result != (fsize - 1)) {
printf("imraa conf reading error\n");
}
} else {
printf("imraa read_conf buffer can't allocated\n");
exit(1);
}
// call reduced imraa_init (not that mraa_init) will already have been called
imraa_init();
json_object* jobj = json_tokener_parse(buffer);
if (check_version(jobj) != 0) {
if (imraa_check_version(jobj) != 0) {
printf("version of configuration file is not compatible, please check again\n");
} else {
mraa_platform_t type = mraa_get_platform_type();
imraa_handle_subplatform(jobj, force_update);
if (type == MRAA_NULL_PLATFORM || type == MRAA_UNKNOWN_PLATFORM) {
printf("imraa: Failed to do IO pinmuxing on null/unkown platform\n");
} else {
imraa_handle_IO(jobj);
if (arguments.arduino) {
imraa_handle_subplatform(jobj, arguments.force);
}
if (type == MRAA_NULL_PLATFORM || type == MRAA_UNKNOWN_PLATFORM) {
printf("imraa: attempting to do IO pinmuxing on null/unkown platform\n");
}
imraa_handle_IO(jobj);
}
fclose(fh);
json_object_put(jobj);
free(buffer);

View File

@@ -1,12 +1,8 @@
{
"version": "0.9.6",
"version": "1.4.0",
"lockfile-location": "/tmp/imraa.lock",
"dfu-utils-location": "/usr/bin",
"Platform" :[
{"id":"1280", "flash":"/usr/share/mraa/firmata101.ino.bin", "usbserial": "auto"}
],
"IO": [
{"type":"gpio", "index":0, "raw": false, "label": "none"},
{"type":"i2c", "index":0, "raw": false, "label": "i2c-0"}
]
}

12
imraa/imraa.io.conf Normal file
View File

@@ -0,0 +1,12 @@
{
"version": "1.4.0",
"lockfile-location": "/tmp/imraa.lock",
"dfu-utils-location": "/usr/bin",
"Platform" :[
{"id":"1280", "flash":"/usr/share/mraa/firmata101.ino.bin", "usbserial": "auto"}
],
"IO": [
{"type":"gpio", "index":0, "raw": false, "label": "none", "user": "brendan", "group": "brendan"},
{"type":"i2c", "index":0, "raw": false, "label": "i2c-0", "user": "brendan", "group": "user"}
]
}

View File

@@ -3,7 +3,7 @@ Description=imraa
[Service]
Type=oneshot
ExecStart=/usr/bin/imraa
ExecStart=/usr/bin/imraa -a
[Install]
WantedBy = multi-user.target
WantedBy=multi-user.target

279
imraa/imraa_arduino.c Normal file
View File

@@ -0,0 +1,279 @@
/*
* Author: Brendan Le Foll <brendan.le.foll@intel.com>
* Author: Longwei Su <lsu@ics.com>
* Copyright (c) 2015-2016 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include <stdbool.h>
#include <unistd.h>
#include <json-c/json.h>
#include <libudev.h>
#include <argp.h>
#include <error.h>
#include <mraa/uart.h>
#include <mraa/gpio.h>
#include <mraa/i2c.h>
#include <mraa/pwm.h>
#include <mraa_internal.h>
#include <imraa_lock.h>
const char*
imraa_get_101_serialport()
{
struct udev* udev;
struct udev_enumerate* enumerate;
struct udev_list_entry *devices, *dev_list_entry;
struct udev_device* dev;
const char* ret = NULL;
udev = udev_new();
if (!udev) {
printf("Can't create udev, check libudev\n");
exit(1);
}
enumerate = udev_enumerate_new(udev);
udev_enumerate_add_match_subsystem(enumerate, "tty");
udev_enumerate_add_match_property(enumerate, "ID_VENDOR_ID", "8087");
udev_enumerate_add_match_property(enumerate, "ID_MODEL_ID", "0ab6");
// udev_enumerate_add_match_property(enumerate, "ID_SERIAL",
// "Intel_ARDUINO_101_AE6642SQ55000RS");
udev_enumerate_scan_devices(enumerate);
devices = udev_enumerate_get_list_entry(enumerate);
udev_list_entry_foreach(dev_list_entry, devices)
{
const char* path;
path = udev_list_entry_get_name(dev_list_entry);
dev = udev_device_new_from_syspath(udev, path);
ret = udev_device_get_devnode(dev);
}
udev_enumerate_unref(enumerate);
udev_unref(udev);
if (ret) {
printf("Ardunio 101 Device Node Path: %s\n", ret);
} else {
printf("Can't detect any Ardunio 101 Device on tty\n");
}
return ret;
}
mraa_result_t
imraa_reset_arduino(const char* modem)
{
mraa_uart_context uart;
uart = mraa_uart_init_raw(modem);
mraa_uart_set_baudrate(uart, 1200);
if (uart == NULL) {
fprintf(stderr, "UART failed to setup\n");
return MRAA_ERROR_UNSPECIFIED;
}
mraa_uart_stop(uart);
mraa_deinit();
return MRAA_SUCCESS;
}
int
imraa_flash_101(const char* bin_path, const char* bin_file_name, const char* tty)
{
if (imraa_reset_arduino(tty) != MRAA_SUCCESS) {
fprintf(stderr, "Failed to reset arduino on %s for unknown reason, carrying on...\n", tty);
}
char* ln = NULL;
size_t len = 0;
bool board_found = false;
const char* dfu_list = "/dfu-util -d ,8087:0ABA -l";
size_t bin_path_len = strlen(bin_path);
char* full_dfu_list = (char*) calloc((bin_path_len + strlen(dfu_list) + 1), sizeof(char));
if (!full_dfu_list) {
printf("imraa_flash_101 can't allocate string buffer for dfu list\n");
exit(1);
}
strncat(full_dfu_list, bin_path, strlen(bin_path));
strncat(full_dfu_list, dfu_list, strlen(dfu_list));
int i;
// dfu list is still needed, as the time for reset and recognized is varies from platform to
// platform.
// once dfu able to query available devices, then it is ready to flash
for (i = 0; i < 10 && board_found == false; i++) {
printf("Waiting for device...\n");
// dfu-util -d,8087:0ABA -l
FILE* dfu_result = popen(full_dfu_list, "r");
if (dfu_result == NULL) {
printf("Failed to run command\n");
exit(1);
}
if (i == 4) {
printf("Flashing is taking longer than expected\n");
printf("Try pressing MASTER_RESET button\n");
}
while (getline(&ln, &len, dfu_result) != -1) {
if (strstr(ln, "sensor_core")) {
board_found = true;
printf("Device found!\n");
break;
}
}
sleep(1);
if (pclose(dfu_result) != 0) {
printf("Failed to close command\n");
exit(1);
}
}
free(ln);
if (board_found == false) {
printf("ERROR: Device is not responding.\n");
exit(1);
}
const char* dfu_upload = "/dfu-util -d ,8087:0ABA -D ";
const char* dfu_option = " -v -a 7 -R";
int buffersize = bin_path_len + strlen(dfu_upload) + strlen(bin_file_name) + strlen(dfu_option) + 1;
char* full_dfu_upload = calloc(buffersize, sizeof(char));
if (!full_dfu_upload) {
printf("imraa_flash_101 can't allocate string buffer for dfu flash\n");
exit(1);
}
strncat(full_dfu_upload, bin_path, strlen(bin_path));
strncat(full_dfu_upload, dfu_upload, strlen(dfu_upload));
strncat(full_dfu_upload, bin_file_name, strlen(bin_file_name));
strncat(full_dfu_upload, dfu_option, strlen(dfu_option));
printf("flash cmd: %s\n", full_dfu_upload);
int status = system(full_dfu_upload);
if (status != 0) {
printf("ERROR: Upload failed on %s\n", tty);
exit(1);
}
printf("SUCCESS: Sketch will execute in about 5 seconds.\n");
free(full_dfu_list);
free(full_dfu_upload);
sleep(5);
return 0;
}
void
imraa_handle_subplatform(struct json_object* jobj, bool force_update)
{
struct json_object* platform;
int i, ionum;
const char* dfu_loc = NULL;
const char* lockfile_loc = NULL;
const char* flash_loc = NULL;
const char* usbserial = NULL;
struct json_object* dfu_location;
if (json_object_object_get_ex(jobj, "dfu-utils-location", &dfu_location) == true) {
if (json_object_is_type(dfu_location, json_type_string)) {
printf("dfu location: %s\n", json_object_get_string(dfu_location));
dfu_loc = json_object_get_string(dfu_location);
} else {
fprintf(stderr, "dfu location string incorrectly parsed\n");
}
}
struct json_object* lockfile_location;
if (json_object_object_get_ex(jobj, "lockfile-location", &lockfile_location) == true) {
if (json_object_is_type(lockfile_location, json_type_string)) {
printf("lock file location: %s\n", json_object_get_string(lockfile_location));
lockfile_loc = json_object_get_string(lockfile_location);
} else {
fprintf(stderr, "lock file string incorrectly parsed\n");
}
}
if (json_object_object_get_ex(jobj, "Platform", &platform) == true) {
if (json_object_is_type(platform, json_type_array)) {
ionum = json_object_array_length(platform);
for (i = 0; i < ionum; i++) {
struct json_object* ioobj = json_object_array_get_idx(platform, i);
json_object_object_foreach(ioobj, key, val)
{
if (strcmp(key, "flash") == 0) {
flash_loc = json_object_get_string(val);
}
if (strcmp(key, "usbserial") == 0) {
usbserial = json_object_get_string(val);
}
}
}
} else {
fprintf(stderr, "platform string incorrectly parsed\n");
}
}
if (flash_loc == NULL || usbserial == NULL ) {
printf("conf didn't give image location or usb serial, skip flashing\n");
return;
}
if (!dfu_loc) {
dfu_loc = "/usr/bin";
printf("No dfu path found, using default path /usr/bin instead");
}
if (!lockfile_loc) {
lockfile_loc = "/tmp/imraa.lock";
printf("No lock path found, using default lock file /tmp/imraa.lock instead");
}
// got flash? do flash
if (access(lockfile_loc, F_OK) != -1 && force_update == false) {
printf("already exist a lock file, skip flashing\n");
printf("force upgrade? remove the lockfile or run with force\n");
return;
} else {
fprintf(stdout, "Starting to flash board\n");
if (force_update) {
fprintf(stdout, "**Caution: force update mode**\n");
}
// TODO flash img checksum, and serialport validation?
const char* detected_serialport = imraa_get_101_serialport();
if (detected_serialport == NULL) {
printf("No subplatform detected, check USB connection, skip flashing\n");
return;
}
if (strcmp(usbserial, "auto") != 0 && strcmp(usbserial, detected_serialport) != 0) {
printf("given serial port didn't match detected serial port, skip flashing\n");
return;
}
if (imraa_flash_101(dfu_loc, flash_loc, detected_serialport) == 0) {
imraa_write_lockfile(lockfile_loc, detected_serialport);
} else {
fprintf(stderr, "invalid flashing paramenters, please check agian\n");
fprintf(stderr, "DFU Util location: %s\n", dfu_loc);
fprintf(stderr, "Flash Img location: %s\n", dfu_loc);
fprintf(stderr, "USB Serial: %s\n", usbserial);
fprintf(stderr, "Flash failed, push master reset and try again\n");
}
}
}

29
imraa/imraa_arduino.h Normal file
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@@ -0,0 +1,29 @@
/*
* Author: Brendan Le Foll <brendan.le.folL@intel.com>
* Copyright (c) 2016 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
void imraa_handle_subplatform(struct json_object* jobj, bool force_update);

178
imraa/imraa_io.c Normal file
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@@ -0,0 +1,178 @@
/*
* Author: Brendan Le Foll <brendan.le.foll@intel.com>
* Copyright (c) 2015-2016 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include <stdbool.h>
#include <unistd.h>
#include <error.h>
#include <sys/types.h>
#include <json-c/json.h>
#include <pwd.h>
#include <mraa/uart.h>
#include <mraa/gpio.h>
#include <mraa/i2c.h>
#include <mraa/pwm.h>
#include <mraa_internal.h>
#include <imraa_arduino.h>
#define SYSFS_CLASS_GPIO "/sys/class/gpio"
#define MAX_SIZE 64
typedef struct mraa_io_objects_t {
const char* type;
int index;
bool raw;
const char* label;
const char* user;
} mraa_io_objects_t;
void
imraa_handle_IO(struct json_object* jobj)
{
struct mraa_io_objects_t* mraa_io_obj;
struct json_object* ioarray;
int ionum = 0;
int i;
if (json_object_object_get_ex(jobj, "IO", &ioarray) == true) {
ionum = json_object_array_length(ioarray);
printf("Length of IO array is %d\n", ionum);
mraa_io_obj = (mraa_io_objects_t*) calloc(ionum, sizeof(mraa_io_objects_t));
if (!mraa_io_obj) {
printf("imraa_handle_IO malloc failed\n");
exit(1);
}
int index2 = -1;
// optional index for io configuration;
if (json_object_is_type(ioarray, json_type_array)) {
for (i = 0; i < ionum; i++) {
struct json_object* ioobj = json_object_array_get_idx(ioarray, i);
struct json_object* x;
if (json_object_object_get_ex(ioobj, "type", &x) == true) {
mraa_io_obj[i].type = json_object_get_string(x);
}
if (json_object_object_get_ex(ioobj, "index", &x) == true) {
mraa_io_obj[i].index = json_object_get_int(x);
}
if (json_object_object_get_ex(ioobj, "raw", &x) == true) {
mraa_io_obj[i].raw = json_object_get_boolean(x);
}
if (json_object_object_get_ex(ioobj, "label", &x) == true) {
mraa_io_obj[i].label = json_object_get_string(x);
}
if (json_object_object_get_ex(ioobj, "index2", &x) == true) {
index2 = json_object_get_int(x);
}
if (json_object_object_get_ex(ioobj, "user", &x) == true) {
mraa_io_obj[i].user = json_object_get_string(x);
}
// starting io configuration
if (strcmp(mraa_io_obj[i].type, "gpio") == 0) {
mraa_gpio_context gpio = NULL;
if (mraa_io_obj[i].raw) {
gpio = mraa_gpio_init_raw(mraa_io_obj[i].index);
} else {
gpio = mraa_gpio_init(mraa_io_obj[i].index);
}
if (gpio != NULL) {
if (mraa_io_obj[i].user != NULL) {
int sysfs_gpio_pin = mraa_gpio_get_pin_raw(gpio);
if (sysfs_gpio_pin >= 0) {
char bu[MAX_SIZE];
snprintf(bu, MAX_SIZE, SYSFS_CLASS_GPIO "/gpio%d/value", sysfs_gpio_pin);
struct passwd* user = getpwnam(mraa_io_obj[i].user);
if (user != NULL) {
if (chown(bu, user->pw_uid, user->pw_gid) == -1) {
fprintf(stderr, "Couldn't change ownership of file %s to %d:%d\n", bu, user->pw_uid, user->pw_gid);
} else {
fprintf(stderr, "Invalid user %s\n", mraa_io_obj[i].user);
}
}
}
mraa_result_t r = mraa_gpio_owner(gpio, 0);
if (r != MRAA_SUCCESS) {
mraa_result_print(r);
}
}
mraa_gpio_close(gpio);
} else if (strcmp(mraa_io_obj[i].type, "i2c") == 0) {
mraa_i2c_context i2c = NULL;
if (mraa_io_obj[i].raw) {
i2c = mraa_i2c_init_raw(mraa_io_obj[i].index);
} else {
i2c = mraa_i2c_init(mraa_io_obj[i].index);
}
if (i2c != NULL) {
mraa_i2c_stop(i2c);
}
} else if (strcmp(mraa_io_obj[i].type, "pwm") == 0) {
mraa_pwm_context pwm = NULL;
if (mraa_io_obj[i].raw) {
pwm = mraa_pwm_init_raw(index2, mraa_io_obj[i].index);
} else {
pwm = mraa_pwm_init(mraa_io_obj[i].index);
}
if (pwm != NULL) {
mraa_result_t r = mraa_pwm_owner(pwm, 0);
if (r != MRAA_SUCCESS) {
mraa_result_print(r);
}
mraa_pwm_close(pwm);
}
} else if (strcmp(mraa_io_obj[i].type, "spi") == 0) {
mraa_spi_context spi = NULL;
if (mraa_io_obj[i].raw) {
spi = mraa_spi_init_raw(mraa_io_obj[i].index, index2);
} else {
spi = mraa_spi_init(mraa_io_obj[i].index);
}
if (spi != NULL) {
mraa_spi_stop(spi);
}
} else if (strcmp(mraa_io_obj[i].type, "uart") == 0) {
mraa_uart_context uart = NULL;
if (mraa_io_obj[i].raw) {
uart = mraa_uart_init_raw(mraa_io_obj[i].label);
} else {
uart = mraa_uart_init(mraa_io_obj[i].index);
}
if (uart != NULL) {
mraa_uart_stop(uart);
}
}
}
}
} else {
fprintf(stderr, "IO array incorrectly parsed\n");
}
free(mraa_io_obj);
}
}

28
imraa/imraa_io.h Normal file
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@@ -0,0 +1,28 @@
/*
* Author: Brendan Le Foll <brendan.le.folL@intel.com>
* Copyright (c) 2016 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
void imraa_handle_IO(struct json_object* jobj);

71
imraa/imraa_lock.c Normal file
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@@ -0,0 +1,71 @@
/*
* Author: Brendan Le Foll <brendan.le.foll@intel.com>
* Copyright (c) 2016 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include <stdbool.h>
#include <unistd.h>
#include <json-c/json.h>
#include <libudev.h>
#include <argp.h>
#include <error.h>
#include <mraa/uart.h>
#include <mraa/gpio.h>
#include <mraa/i2c.h>
#include <mraa/pwm.h>
#include <mraa_internal.h>
void
imraa_write_lockfile(const char* lock_file_location, const char* serialport)
{
FILE* fh;
char str[10];
json_object* platform1 = json_object_new_object();
snprintf(str, 10, "%d", MRAA_NULL_PLATFORM);
json_object_object_add(platform1, "id", json_object_new_string(str));
json_object* platform2 = json_object_new_object();
snprintf(str, 10, "%d", MRAA_GENERIC_FIRMATA);
json_object_object_add(platform2, "id", json_object_new_string(str));
json_object_object_add(platform2, "uart", json_object_new_string(serialport));
json_object* platfroms = json_object_new_array();
json_object_array_add(platfroms, platform1);
json_object_array_add(platfroms, platform2);
json_object* lock_file = json_object_new_object();
json_object_object_add(lock_file, "Platform", platfroms);
fh = fopen(lock_file_location, "w");
if (fh != NULL) {
fputs(json_object_to_json_string_ext(lock_file, JSON_C_TO_STRING_PRETTY), fh);
fclose(fh);
} else {
fprintf(stderr, "can't write to lock file\n");
}
json_object_put(lock_file);
}

28
imraa/imraa_lock.h Normal file
View File

@@ -0,0 +1,28 @@
/*
* Author: Brendan Le Foll <brendan.le.folL@intel.com>
* Copyright (c) 2016 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
void imraa_write_lockfile(const char* lock_file_location, const char* serialport);

86
include/arm/am335x.h Normal file
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@@ -0,0 +1,86 @@
/*
* Author: Norbert Wesp <nwesp@phytec.de>
* Author: Stefan Müller-Klieser <S.Mueller-Klieser@phytec.de>
* Copyright (c) 2016 Phytec Messtechnik GmbH.
*
* Based on src/arm/beaglebone.c
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#include <stdlib.h>
#include <string.h>
#include <sys/mman.h>
#include <mraa/types.h>
#include "common.h"
#define SYSFS_CLASS_PWM "/sys/class/pwm/"
#define SYSFS_CLASS_MMC "/sys/class/mmc_host/"
#define MMAP_PATH "/dev/mem"
#define MAX_SIZE 64
#define AM335X_GPIO0_BASE 0x44e07000
#define AM335X_GPIO1_BASE 0x4804c000
#define AM335X_GPIO2_BASE 0x481AC000
#define AM335X_GPIO3_BASE 0x481AE000
#define AM335X_GPIO_SIZE (4 * 1024)
#define AM335X_IN 0x138
#define AM335X_CLR 0x190
#define AM335X_SET 0x194
/**
* Writes 'value' to gpio_context 'dev'
*
* @return mraa_result_t indicating success of actions.
*/
mraa_result_t mraa_am335x_mmap_write(mraa_gpio_context dev, int value);
/**
* Unsetup register of mmap_gpio[]
*
* @return static mraa_result_t indicating success of actions.
*/
static mraa_result_t mraa_am335x_mmap_unsetup();
/**
* Read from gpio_context 'dev'
*
* @return int result indicating success of actions.
*/
int mraa_am335x_mmap_read(mraa_gpio_context dev);
/**
* Disables gpio_context 'dev' in case of 'en' or mmap'ing gpio_context 'dev'
*
* @return mraa_result_t indicating success of actions.
*/
mraa_result_t mraa_am335x_mmap_setup(mraa_gpio_context dev, mraa_boolean_t en);
#ifdef __cplusplus
}
#endif

42
include/arm/phyboard.h Normal file
View File

@@ -0,0 +1,42 @@
/*
* Author: Norbert Wesp <nwesp@phytec.de>
* Author: Stefan Müller-Klieser <S.Mueller-Klieser@phytec.de>
* Copyright (c) 2016 Phytec Messtechnik GmbH.
*
* Based on include/arm/beaglebone.h
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#include "mraa_internal.h"
#define MRAA_PHYBOARD_WEGA_PINCOUNT 117
mraa_board_t * mraa_phyboard();
#ifdef __cplusplus
}
#endif

View File

@@ -36,6 +36,7 @@ extern "C" {
#define MRAA_RASPBERRY_PI2_B_REV_1_PINCOUNT 41
#define MRAA_RASPBERRY_PI_AB_PLUS_PINCOUNT 41
#define MRAA_RASPBERRY_PI_COMPUTE_MODULE_PINCOUNT 41
#define MRAA_RASPBERRY_PI_ZERO_PINCOUNT 41
mraa_board_t *
mraa_raspberry_pi();

View File

@@ -24,6 +24,8 @@
#pragma once
#include <pthread.h>
#include "uart.h"
#define MODE_INPUT 0x00
@@ -99,6 +101,7 @@ typedef struct s_firmata {
char firmware[140];
uint8_t dev_count;
struct _firmata** devs;
pthread_spinlock_t lock;
} t_firmata;
t_firmata* firmata_new(const char* name);

View File

@@ -30,7 +30,7 @@ extern "C" {
#include "mraa_internal.h"
#define MRAA_MOCK_PINCOUNT 4
#define MRAA_MOCK_PINCOUNT 10
mraa_board_t*
mraa_mock_board();

View File

@@ -0,0 +1,73 @@
/*
* Author: Alex Tereschenko <alext.mkrs@gmail.com>
* Copyright (c) 2016 Alex Tereschenko.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#include "mraa_internal.h"
#define MOCK_SPI_DEFAULT_FREQ 4000000
#define MOCK_SPI_DEFAULT_MODE MRAA_SPI_MODE0
#define MOCK_SPI_DEFAULT_LSBMODE 0
#define MOCK_SPI_DEFAULT_BIT_PER_WORD 8
// This is XORed with each byte/word of the transmitted message to get the received one
#define MOCK_SPI_REPLY_DATA_MODIFIER_BYTE 0xAB
#define MOCK_SPI_REPLY_DATA_MODIFIER_WORD 0xABBA
mraa_result_t
mraa_mock_spi_init_raw_replace(mraa_spi_context dev, unsigned int bus, unsigned int cs);
mraa_result_t
mraa_mock_spi_stop_replace(mraa_spi_context dev);
mraa_result_t
mraa_mock_spi_bit_per_word_replace(mraa_spi_context dev, unsigned int bits);
mraa_result_t
mraa_mock_spi_lsbmode_replace(mraa_spi_context dev, mraa_boolean_t lsb);
mraa_result_t
mraa_mock_spi_mode_replace(mraa_spi_context dev, mraa_spi_mode_t mode);
mraa_result_t
mraa_mock_spi_frequency_replace(mraa_spi_context dev, int hz);
int
mraa_mock_spi_write_replace(mraa_spi_context dev, uint8_t data);
int
mraa_mock_spi_write_word_replace(mraa_spi_context dev, uint16_t data);
mraa_result_t
mraa_mock_spi_transfer_buf_replace(mraa_spi_context dev, uint8_t* data, uint8_t* rxbuf, int length);
mraa_result_t
mraa_mock_spi_transfer_buf_word_replace(mraa_spi_context dev, uint16_t* data, uint16_t* rxbuf, int length);
#ifdef __cplusplus
}
#endif

View File

@@ -0,0 +1,68 @@
/*
* Author: Alex Tereschenko <alext.mkrs@gmail.com>
* Copyright (c) 2016 Alex Tereschenko.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#include "mraa_internal.h"
// ASCII code for "Z", used as a basis for our mock reads
#define MOCK_UART_DATA_BYTE 0x5A
mraa_result_t
mraa_mock_uart_set_baudrate_replace(mraa_uart_context dev, unsigned int baud);
mraa_result_t
mraa_mock_uart_init_raw_replace(mraa_uart_context dev, const char* path);
mraa_result_t
mraa_mock_uart_flush_replace(mraa_uart_context dev);
mraa_result_t
mraa_mock_uart_set_flowcontrol_replace(mraa_uart_context dev, mraa_boolean_t xonxoff, mraa_boolean_t rtscts);
mraa_result_t
mraa_mock_uart_set_mode_replace(mraa_uart_context dev, int bytesize, mraa_uart_parity_t parity, int stopbits);
mraa_result_t
mraa_mock_uart_set_non_blocking_replace(mraa_uart_context dev, mraa_boolean_t nonblock);
mraa_result_t
mraa_mock_uart_set_timeout_replace(mraa_uart_context dev, int read, int write, int interchar);
mraa_boolean_t
mraa_mock_uart_data_available_replace(mraa_uart_context dev, unsigned int millis);
int
mraa_mock_uart_write_replace(mraa_uart_context dev, const char* buf, size_t len);
int
mraa_mock_uart_read_replace(mraa_uart_context dev, char* buf, size_t len);
#ifdef __cplusplus
}
#endif

View File

@@ -97,8 +97,27 @@ typedef struct {
mraa_result_t (*spi_init_pre) (int bus);
mraa_result_t (*spi_init_post) (mraa_spi_context spi);
mraa_result_t (*spi_init_raw_replace) (mraa_spi_context spi, unsigned int bus, unsigned int cs);
mraa_result_t (*spi_lsbmode_replace) (mraa_spi_context dev, mraa_boolean_t lsb);
mraa_result_t (*spi_mode_replace) (mraa_spi_context dev, mraa_spi_mode_t mode);
mraa_result_t (*spi_bit_per_word_replace) (mraa_spi_context dev, unsigned int bits);
mraa_result_t (*spi_frequency_replace) (mraa_spi_context dev, int hz);
mraa_result_t (*spi_transfer_buf_replace) (mraa_spi_context dev, uint8_t* data, uint8_t* rxbuf, int length);
mraa_result_t (*spi_transfer_buf_word_replace) (mraa_spi_context dev, uint16_t* data, uint16_t* rxbuf, int length);
int (*spi_write_replace) (mraa_spi_context dev, uint8_t data);
int (*spi_write_word_replace) (mraa_spi_context dev, uint16_t data);
mraa_result_t (*spi_stop_replace) (mraa_spi_context dev);
mraa_result_t (*uart_init_pre) (int index);
mraa_result_t (*uart_init_post) (mraa_uart_context uart);
mraa_result_t (*uart_init_raw_replace) (mraa_uart_context dev, const char* path);
mraa_result_t (*uart_flush_replace) (mraa_uart_context dev);
mraa_result_t (*uart_set_baudrate_replace) (mraa_uart_context dev, unsigned int baud);
mraa_result_t (*uart_set_mode_replace) (mraa_uart_context dev, int bytesize, mraa_uart_parity_t parity, int stopbits);
mraa_result_t (*uart_set_flowcontrol_replace) (mraa_uart_context dev, mraa_boolean_t xonxoff, mraa_boolean_t rtscts);
mraa_result_t (*uart_set_timeout_replace) (mraa_uart_context dev, int read, int write, int interchar);
mraa_result_t (*uart_set_non_blocking_replace) (mraa_uart_context dev, mraa_boolean_t nonblock);
int (*uart_read_replace) (mraa_uart_context dev, char* buf, size_t len);
int (*uart_write_replace)(mraa_uart_context dev, const char* buf, size_t len);
mraa_boolean_t (*uart_data_available_replace) (mraa_uart_context dev, unsigned int millis);
} mraa_adv_func_t;

View File

@@ -140,6 +140,25 @@ mraa_boolean_t mraa_link_targets(const char* filename, const char* targetname);
*/
int mraa_find_i2c_bus(const char* devname, int startfrom);
/**
* helper function to wrap strtol for our basic usage
*
* @param string representing int
* @param converted string
* @return Result of the operation
*/
mraa_result_t mraa_atoi(char* intStr, int* value);
/**
* helper function to find an i2c bus based on pci data
*
* @param pci_device
* @param pci_id on pci_device
* @param i2c adapter name & number
* @return the matching i2c-dev bus id or -1
*/
int mraa_find_i2c_bus_pci(const char* pci_device, const char *pci_id, const char* adapter_name);
#if defined(IMRAA)
/**
* read Imraa subplatform lock file, caller is responsible to free return

View File

@@ -35,6 +35,12 @@
#define HAVE_PTHREAD_CANCEL
#endif
// Max count for various busses
#define MAX_I2C_BUS_COUNT 12
#define MAX_SPI_BUS_COUNT 12
#define MAX_UART_COUNT 6
// general status failures for internal functions
#define MRAA_PLATFORM_NO_INIT -3
#define MRAA_IO_SETUP_FAILURE -2
@@ -66,9 +72,11 @@
#define MISO_KEY "miso"
#define MOSI_KEY "mosi"
#define CS_KEY "chipselect"
#define SS_KEY "slaveselect"
#define PIN_KEY "pin"
#define IO_KEY "layout"
#define PLATFORM_KEY "platform"
#define BUS_KEY "bus"
// IO keys
#define GPIO_KEY "GPIO"
@@ -346,16 +354,16 @@ typedef struct _board_t {
int gpio_count; /**< GPIO Count */
int aio_count; /**< Analog side Count */
int i2c_bus_count; /**< Usable i2c Count */
mraa_i2c_bus_t i2c_bus[12]; /**< Array of i2c */
mraa_i2c_bus_t i2c_bus[MAX_I2C_BUS_COUNT]; /**< Array of i2c */
unsigned int def_i2c_bus; /**< Position in array of default i2c bus */
int spi_bus_count; /**< Usable spi Count */
mraa_spi_bus_t spi_bus[12]; /**< Array of spi */
mraa_spi_bus_t spi_bus[MAX_SPI_BUS_COUNT]; /**< Array of spi */
unsigned int def_spi_bus; /**< Position in array of defult spi bus */
unsigned int adc_raw; /**< ADC raw bit value */
unsigned int adc_supported; /**< ADC supported bit value */
unsigned int def_uart_dev; /**< Position in array of defult uart */
int uart_dev_count; /**< Usable spi Count */
mraa_uart_dev_t uart_dev[6]; /**< Array of UARTs */
mraa_uart_dev_t uart_dev[MAX_UART_COUNT]; /**< Array of UARTs */
mraa_boolean_t no_bus_mux; /**< i2c/spi/adc/pwm/uart bus muxing setup not required */
int pwm_default_period; /**< The default PWM period is US */
int pwm_max_period; /**< Maximum period in us */

View File

@@ -32,10 +32,10 @@ extern "C" {
// +1 as pins are "1 indexed"
// we have 20 useless pins then the 4 LEDS and the 2 LEDs on the module.
#define MRAA_INTEL_GT_TUCHUCK_PINCOUNT (40*2 + 23 +1 +2)
#define MRAA_INTEL_JOULE_EXPANSION_PINCOUNT (40*2 + 23 +1 +2)
mraa_board_t*
mraa_gt_tuchuck_board();
mraa_joule_expansion_board();
#ifdef __cplusplus
}

View File

@@ -41,7 +41,7 @@ set (mraa_LIB_X86_SRCS_NOAUTO
${PROJECT_SOURCE_DIR}/src/x86/intel_sofia_3gr.c
${PROJECT_SOURCE_DIR}/src/x86/intel_cherryhills.c
${PROJECT_SOURCE_DIR}/src/x86/up.c
${PROJECT_SOURCE_DIR}/src/x86/intel_gt_tuchuck.c
${PROJECT_SOURCE_DIR}/src/x86/intel_joule_expansion.c
)
message (STATUS "INFO - Adding support for platform ${MRAAPLATFORMFORCE}")
@@ -67,8 +67,8 @@ if (NOT ${MRAAPLATFORMFORCE} STREQUAL "ALL")
set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/intel_cherryhills.c)
elseif (${MRAAPLATFORMFORCE} STREQUAL "MRAA_UP")
set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/up.c)
elseif( ${MRAAPLATFORMFORCE} STREQUAL "MRAA_INTEL_GT_TUCHUCK")
set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/intel_gt_tuchuck.c)
elseif( ${MRAAPLATFORMFORCE} STREQUAL "MRAA_INTEL_JOULE_EXPANSION")
set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/intel_joule_expansion.c)
else ()
message (FATAL_ERROR "Unknown x86 platform enabled!")
endif ()
@@ -81,6 +81,7 @@ set (mraa_LIB_ARM_SRCS_NOAUTO
${PROJECT_SOURCE_DIR}/src/arm/96boards.c
${PROJECT_SOURCE_DIR}/src/arm/raspberry_pi.c
${PROJECT_SOURCE_DIR}/src/arm/beaglebone.c
${PROJECT_SOURCE_DIR}/src/arm/phyboard.c
${PROJECT_SOURCE_DIR}/src/arm/banana.c
)
@@ -90,6 +91,8 @@ set (mraa_LIB_MOCK_SRCS_NOAUTO
${PROJECT_SOURCE_DIR}/src/mock/mock_board_gpio.c
${PROJECT_SOURCE_DIR}/src/mock/mock_board_aio.c
${PROJECT_SOURCE_DIR}/src/mock/mock_board_i2c.c
${PROJECT_SOURCE_DIR}/src/mock/mock_board_spi.c
${PROJECT_SOURCE_DIR}/src/mock/mock_board_uart.c
)
if (JSONPLAT)
@@ -238,6 +241,8 @@ if (BUILDSWIG)
if (BUILDSWIGJAVA)
configure_file (${CMAKE_CURRENT_SOURCE_DIR}/java/manifest.txt.in
${CMAKE_CURRENT_BINARY_DIR}/java/manifest.txt)
configure_file (${CMAKE_CURRENT_SOURCE_DIR}/java/pom.xml.in
${CMAKE_CURRENT_BINARY_DIR}/java/mraa-${VERSION_SHORT}.pom)
add_subdirectory (java)
endif ()
if (BUILDSWIGNODE)

View File

@@ -25,67 +25,74 @@
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include <stdlib.h>
#include <mraa/common.h>
#include <stdarg.h>
#include <stdlib.h>
#include <string.h>
#include <sys/mman.h>
#include <mraa/common.h>
#include "common.h"
#include "arm/96boards.h"
#include "common.h"
#define DT_BASE "/sys/firmware/devicetree/base"
#define DT_BASE "/proc/device-tree"
#define PLATFORM_NAME_DB410C "DB410C"
#define PLATFORM_NAME_HIKEY "HIKEY"
#define PLATFORM_NAME_BBGUM "BBGUM"
int db410c_ls_gpio_pins[MRAA_96BOARDS_LS_GPIO_COUNT] = {
36, 12, 13, 69, 115, 4, 24, 25, 35, 34, 28, 33,
36, 12, 13, 69, 115, 4, 24, 25, 35, 34, 28, 33,
};
const char* db410c_serialdev[MRAA_96BOARDS_LS_UART_COUNT] = { "/dev/ttyMSM0", "/dev/ttyMSM1"};
const char* db410c_serialdev[MRAA_96BOARDS_LS_UART_COUNT] = { "/dev/ttyMSM0", "/dev/ttyMSM1" };
int hikey_ls_gpio_pins[MRAA_96BOARDS_LS_GPIO_COUNT] = {
488, 489, 490, 491, 492, 415, 463, 495, 426, 433, 427, 434,
488, 489, 490, 491, 492, 415, 463, 495, 426, 433, 427, 434,
};
const char* hikey_serialdev[MRAA_96BOARDS_LS_UART_COUNT] = { "/dev/ttyAMA2", "/dev/ttyAMA3"};
void mraa_96boards_pininfo(mraa_board_t* board, int index, int sysfs_pin,
char *fmt, ...)
const char* hikey_serialdev[MRAA_96BOARDS_LS_UART_COUNT] = { "/dev/ttyAMA2", "/dev/ttyAMA3" };
int bbgum_ls_gpio_pins[MRAA_96BOARDS_LS_GPIO_COUNT] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 155, 154 };
const char* bbgum_serialdev[MRAA_96BOARDS_LS_UART_COUNT] = { "/dev/ttyS3", "/dev/ttyS5" };
void
mraa_96boards_pininfo(mraa_board_t* board, int index, int sysfs_pin, char* fmt, ...)
{
va_list arg_ptr;
if (index > board->phy_pin_count)
return;
va_list arg_ptr;
if (index > board->phy_pin_count)
return;
mraa_pininfo_t* pininfo = &board->pins[index];
va_start(arg_ptr, fmt);
vsnprintf(pininfo->name, MRAA_PIN_NAME_SIZE, fmt, arg_ptr);
va_end(arg_ptr);
if (sysfs_pin >= 0)
pininfo->capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
else
pininfo->capabilities = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 };
pininfo->gpio.pinmap = sysfs_pin;
pininfo->gpio.mux_total = 0;
mraa_pininfo_t* pininfo = &board->pins[index];
va_start(arg_ptr, fmt);
vsnprintf(pininfo->name, MRAA_PIN_NAME_SIZE, fmt, arg_ptr);
va_end(arg_ptr);
if (sysfs_pin >= 0)
pininfo->capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
else
pininfo->capabilities = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 };
pininfo->gpio.pinmap = sysfs_pin;
pininfo->gpio.mux_total = 0;
}
mraa_board_t* mraa_96boards()
mraa_board_t*
mraa_96boards()
{
int i, pin;
int *ls_gpio_pins = NULL;
char ch;
int i, pin;
int* ls_gpio_pins = NULL;
char ch;
mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
if (b == NULL) {
return NULL;
}
mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
if (b == NULL) {
return NULL;
}
// pin mux for buses are setup by default by kernel so tell mraa to ignore them
b->no_bus_mux = 1;
b->phy_pin_count = MRAA_96BOARDS_LS_PIN_COUNT + 1;
// pin mux for buses are setup by default by kernel so tell mraa to ignore them
b->no_bus_mux = 1;
b->phy_pin_count = MRAA_96BOARDS_LS_PIN_COUNT + 1;
if (mraa_file_exist(DT_BASE "/model")) {
if (mraa_file_exist(DT_BASE "/model")) {
// We are on a modern kernel, great!!!!
if (mraa_file_contains(DT_BASE "/model", "Qualcomm Technologies, Inc. APQ 8016 SBC")) {
b->platform_name = PLATFORM_NAME_DB410C;
@@ -97,78 +104,88 @@ mraa_board_t* mraa_96boards()
ls_gpio_pins = hikey_ls_gpio_pins;
b->uart_dev[0].device_path = hikey_serialdev[0];
b->uart_dev[1].device_path = hikey_serialdev[1];
}
}
} else if (mraa_file_contains(DT_BASE "/model", "s900")) {
b->platform_name = PLATFORM_NAME_BBGUM;
ls_gpio_pins = bbgum_ls_gpio_pins;
b->uart_dev[0].device_path = bbgum_serialdev[0];
b->uart_dev[1].device_path = bbgum_serialdev[1];
}
}
//UART
b->uart_dev_count = MRAA_96BOARDS_LS_UART_COUNT;
b->def_uart_dev = 0;
// UART
b->uart_dev_count = MRAA_96BOARDS_LS_UART_COUNT;
b->def_uart_dev = 0;
//I2C
b->i2c_bus_count = MRAA_96BOARDS_LS_I2C_COUNT;
b->def_i2c_bus = 0;
b->i2c_bus[0].bus_id = 0;
b->i2c_bus[1].bus_id= 1;
// I2C
if (b->platform_name == PLATFORM_NAME_BBGUM) {
b->i2c_bus_count = MRAA_96BOARDS_LS_I2C_COUNT;
b->def_i2c_bus = 0;
b->i2c_bus[0].bus_id = 1;
b->i2c_bus[1].bus_id = 2;
} else {
b->i2c_bus_count = MRAA_96BOARDS_LS_I2C_COUNT;
b->def_i2c_bus = 0;
b->i2c_bus[0].bus_id = 0;
b->i2c_bus[1].bus_id = 1;
}
//SPI
b->spi_bus_count = MRAA_96BOARDS_LS_SPI_COUNT;
b->spi_bus[0].bus_id = 0;
b->def_spi_bus = 0;
// SPI
b->spi_bus_count = MRAA_96BOARDS_LS_SPI_COUNT;
b->spi_bus[0].bus_id = 0;
b->def_spi_bus = 0;
b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t));
if (b->adv_func == NULL) {
free(b);
return NULL;
}
b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t));
if (b->adv_func == NULL) {
free(b);
return NULL;
}
b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * b->phy_pin_count);
if (b->pins == NULL) {
free(b->adv_func);
free(b);
return NULL;
}
b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * b->phy_pin_count);
if (b->pins == NULL) {
free(b->adv_func);
free(b);
return NULL;
}
mraa_96boards_pininfo(b, 0, -1, "INVALID");
mraa_96boards_pininfo(b, 1, -1, "GND");
mraa_96boards_pininfo(b, 2, -1, "GND");
mraa_96boards_pininfo(b, 3, -1, "UART0_CTS");
mraa_96boards_pininfo(b, 4, -1, "PWR_BTN_N");
mraa_96boards_pininfo(b, 5, -1, "UART0_TXD");
mraa_96boards_pininfo(b, 6, -1, "RST_BTN_N");
mraa_96boards_pininfo(b, 7, -1, "UART0_RXD");
mraa_96boards_pininfo(b, 8, -1, "SPI0_SCLK");
mraa_96boards_pininfo(b, 9, -1, "UART0_RTS");
mraa_96boards_pininfo(b, 10, -1, "SPI0_DIN");
mraa_96boards_pininfo(b, 11, -1, "UART1_TXD");
mraa_96boards_pininfo(b, 12, -1, "SPI0_CS");
mraa_96boards_pininfo(b, 13, -1, "UART1_RXD");
mraa_96boards_pininfo(b, 14, -1, "SPI0_DOUT");
mraa_96boards_pininfo(b, 15, -1, "I2C0_SCL");
mraa_96boards_pininfo(b, 16, -1, "PCM_FS");
mraa_96boards_pininfo(b, 17, -1, "I2C0_SDA");
mraa_96boards_pininfo(b, 18, -1, "PCM_CLK");
mraa_96boards_pininfo(b, 19, -1, "I2C1_SCL");
mraa_96boards_pininfo(b, 20, -1, "PCM_DO");
mraa_96boards_pininfo(b, 21, -1, "I2C1_SDA");
mraa_96boards_pininfo(b, 22, -1, "PCM_DI");
// GPIOs are labelled "GPIO-A" through "GPIO-L"
for (i = 0; i < MRAA_96BOARDS_LS_GPIO_COUNT; i++)
{
mraa_96boards_pininfo(b, 23 + i, ls_gpio_pins ? ls_gpio_pins[i] : -1,
"GPIO-%c", 'A'+i);
}
mraa_96boards_pininfo(b, 35, -1, "1.8v");
mraa_96boards_pininfo(b, 36, -1, "SYS_DCIN");
mraa_96boards_pininfo(b, 37, -1, "5v");
mraa_96boards_pininfo(b, 38, -1, "SYS_DCIN");
mraa_96boards_pininfo(b, 39, -1, "GND");
mraa_96boards_pininfo(b, 40, -1, "GND");
mraa_96boards_pininfo(b, 0, -1, "INVALID");
mraa_96boards_pininfo(b, 1, -1, "GND");
mraa_96boards_pininfo(b, 2, -1, "GND");
mraa_96boards_pininfo(b, 3, -1, "UART0_CTS");
mraa_96boards_pininfo(b, 4, -1, "PWR_BTN_N");
mraa_96boards_pininfo(b, 5, -1, "UART0_TXD");
mraa_96boards_pininfo(b, 6, -1, "RST_BTN_N");
mraa_96boards_pininfo(b, 7, -1, "UART0_RXD");
mraa_96boards_pininfo(b, 8, -1, "SPI0_SCLK");
mraa_96boards_pininfo(b, 9, -1, "UART0_RTS");
mraa_96boards_pininfo(b, 10, -1, "SPI0_DIN");
mraa_96boards_pininfo(b, 11, -1, "UART1_TXD");
mraa_96boards_pininfo(b, 12, -1, "SPI0_CS");
mraa_96boards_pininfo(b, 13, -1, "UART1_RXD");
mraa_96boards_pininfo(b, 14, -1, "SPI0_DOUT");
mraa_96boards_pininfo(b, 15, -1, "I2C0_SCL");
mraa_96boards_pininfo(b, 16, -1, "PCM_FS");
mraa_96boards_pininfo(b, 17, -1, "I2C0_SDA");
mraa_96boards_pininfo(b, 18, -1, "PCM_CLK");
mraa_96boards_pininfo(b, 19, -1, "I2C1_SCL");
mraa_96boards_pininfo(b, 20, -1, "PCM_DO");
mraa_96boards_pininfo(b, 21, -1, "I2C1_SDA");
mraa_96boards_pininfo(b, 22, -1, "PCM_DI");
// GPIOs are labelled "GPIO-A" through "GPIO-L"
for (i = 0; i < MRAA_96BOARDS_LS_GPIO_COUNT; i++) {
mraa_96boards_pininfo(b, 23 + i, ls_gpio_pins ? ls_gpio_pins[i] : -1, "GPIO-%c", 'A' + i);
}
mraa_96boards_pininfo(b, 35, -1, "1.8v");
mraa_96boards_pininfo(b, 36, -1, "SYS_DCIN");
mraa_96boards_pininfo(b, 37, -1, "5v");
mraa_96boards_pininfo(b, 38, -1, "SYS_DCIN");
mraa_96boards_pininfo(b, 39, -1, "GND");
mraa_96boards_pininfo(b, 40, -1, "GND");
b->gpio_count = MRAA_96BOARDS_LS_GPIO_COUNT;
b->gpio_count = MRAA_96BOARDS_LS_GPIO_COUNT;
b->aio_count = 0;
b->adc_raw = 0;
b->adc_supported = 0;
b->aio_count = 0;
b->adc_raw = 0;
b->adc_supported = 0;
return b;
return b;
}

160
src/arm/am335x.c Normal file
View File

@@ -0,0 +1,160 @@
/*
* Author: Norbert Wesp <nwesp@phytec.de>
* Author: Stefan Müller-Klieser <S.Mueller-Klieser@phytec.de>
* Copyright (c) 2016 Phytec Messtechnik GmbH.
*
* Based on src/arm/beaglebone.c
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include <stdlib.h>
#include <string.h>
#include <sys/mman.h>
#include <mraa/types.h>
#include "common.h"
#include "arm/am335x.h"
// MMAP
static uint8_t* mmap_gpio[4] = { NULL, NULL, NULL, NULL };
static int mmap_fd = 0;
static unsigned int mmap_count = 0;
mraa_result_t
mraa_am335x_mmap_write(mraa_gpio_context dev, int value)
{
if (value) {
*(volatile uint32_t*) (mmap_gpio[dev->pin / 32] + AM335X_SET) = (uint32_t)(1 << (dev->pin % 32));
} else {
*(volatile uint32_t*) (mmap_gpio[dev->pin / 32] + AM335X_CLR) = (uint32_t)(1 << (dev->pin % 32));
}
return MRAA_SUCCESS;
}
static mraa_result_t
mraa_am335x_mmap_unsetup()
{
if (mmap_gpio[0] == NULL) {
syslog(LOG_ERR, "am335x mmap: null register cant unsetup");
return MRAA_ERROR_INVALID_RESOURCE;
}
munmap(mmap_gpio[0], AM335X_GPIO_SIZE);
mmap_gpio[0] = NULL;
munmap(mmap_gpio[1], AM335X_GPIO_SIZE);
mmap_gpio[1] = NULL;
munmap(mmap_gpio[2], AM335X_GPIO_SIZE);
mmap_gpio[2] = NULL;
munmap(mmap_gpio[3], AM335X_GPIO_SIZE);
mmap_gpio[3] = NULL;
if (close(mmap_fd) != 0) {
return MRAA_ERROR_INVALID_RESOURCE;
}
return MRAA_SUCCESS;
}
int
mraa_am335x_mmap_read(mraa_gpio_context dev)
{
uint32_t value = *(volatile uint32_t*) (mmap_gpio[dev->pin / 32] + AM335X_IN);
if (value & (uint32_t)(1 << (dev->pin % 32))) {
return 1;
}
return 0;
}
mraa_result_t
mraa_am335x_mmap_setup(mraa_gpio_context dev, mraa_boolean_t en)
{
if (dev == NULL) {
syslog(LOG_ERR, "am335x mmap: context not valid");
return MRAA_ERROR_INVALID_HANDLE;
}
if (en == 0) {
if (dev->mmap_write == NULL && dev->mmap_read == NULL) {
syslog(LOG_ERR, "am335x mmap: can't disable disabled mmap gpio");
return MRAA_ERROR_INVALID_PARAMETER;
}
dev->mmap_write = NULL;
dev->mmap_read = NULL;
mmap_count--;
if (mmap_count == 0) {
return mraa_am335x_mmap_unsetup();
}
return MRAA_SUCCESS;
}
if (dev->mmap_write != NULL && dev->mmap_read != NULL) {
syslog(LOG_ERR, "am335x mmap: can't enable enabled mmap gpio");
return MRAA_ERROR_INVALID_PARAMETER;
}
// Might need to make some elements of this thread safe.
// For example only allow one thread to enter the following block
// to prevent mmap'ing twice.
if (mmap_gpio[0] == NULL) {
if ((mmap_fd = open(MMAP_PATH, O_RDWR)) < 0) {
syslog(LOG_ERR, "am335x map: unable to open resource file");
return MRAA_ERROR_INVALID_HANDLE;
}
mmap_gpio[0] = (uint8_t*) mmap(NULL, AM335X_GPIO_SIZE, PROT_READ | PROT_WRITE,
MAP_FILE | MAP_SHARED, mmap_fd, AM335X_GPIO0_BASE);
if (mmap_gpio[0] == MAP_FAILED) {
syslog(LOG_ERR, "am335x mmap: failed to mmap");
mmap_gpio[0] = NULL;
close(mmap_fd);
return MRAA_ERROR_NO_RESOURCES;
}
mmap_gpio[1] = (uint8_t*) mmap(NULL, AM335X_GPIO_SIZE, PROT_READ | PROT_WRITE,
MAP_FILE | MAP_SHARED, mmap_fd, AM335X_GPIO1_BASE);
if (mmap_gpio[1] == MAP_FAILED) {
syslog(LOG_ERR, "am335x mmap: failed to mmap");
mmap_gpio[1] = NULL;
close(mmap_fd);
return MRAA_ERROR_NO_RESOURCES;
}
mmap_gpio[2] = (uint8_t*) mmap(NULL, AM335X_GPIO_SIZE, PROT_READ | PROT_WRITE,
MAP_FILE | MAP_SHARED, mmap_fd, AM335X_GPIO2_BASE);
if (mmap_gpio[2] == MAP_FAILED) {
syslog(LOG_ERR, "am335x mmap: failed to mmap");
mmap_gpio[2] = NULL;
close(mmap_fd);
return MRAA_ERROR_NO_RESOURCES;
}
mmap_gpio[3] = (uint8_t*) mmap(NULL, AM335X_GPIO_SIZE, PROT_READ | PROT_WRITE,
MAP_FILE | MAP_SHARED, mmap_fd, AM335X_GPIO3_BASE);
if (mmap_gpio[3] == MAP_FAILED) {
syslog(LOG_ERR, "am335x mmap: failed to mmap");
mmap_gpio[3] = NULL;
close(mmap_fd);
return MRAA_ERROR_NO_RESOURCES;
}
}
dev->mmap_write = &mraa_am335x_mmap_write;
dev->mmap_read = &mraa_am335x_mmap_read;
mmap_count++;
return MRAA_SUCCESS;
}

View File

@@ -26,11 +26,12 @@
#include <stdlib.h>
#include <string.h>
#include "mraa_internal.h"
#include "arm/raspberry_pi.h"
#include "arm/beaglebone.h"
#include "arm/banana.h"
#include "arm/96boards.h"
#include "arm/banana.h"
#include "arm/beaglebone.h"
#include "arm/phyboard.h"
#include "arm/raspberry_pi.h"
#include "mraa_internal.h"
mraa_platform_t
@@ -46,21 +47,23 @@ mraa_arm_platform()
if (strncmp(line, "Hardware", 8) == 0) {
if (strstr(line, "BCM2708")) {
platform_type = MRAA_RASPBERRY_PI;
}
else if (strstr(line, "BCM2709")) {
} else if (strstr(line, "BCM2709")) {
platform_type = MRAA_RASPBERRY_PI;
}
else if (strstr(line, "Generic AM33XX")) {
platform_type = MRAA_BEAGLEBONE;
}
else if (strstr(line, "HiKey Development Board")) {
} else if (strstr(line, "Generic AM33XX")) {
if(mraa_file_contains("/sys/firmware/devicetree/base/model", "phyBOARD-WEGA")) {
platform_type = MRAA_PHYBOARD_WEGA;
} else {
platform_type = MRAA_BEAGLEBONE;
}
} else if (strstr(line, "HiKey Development Board")) {
platform_type = MRAA_96BOARDS;
}
else if (strstr(line, "sun7i")) {
} else if (strstr(line, "s900")) {
platform_type = MRAA_96BOARDS;
} else if (strstr(line, "sun7i")) {
if (mraa_file_contains("/sys/firmware/devicetree/base/model", "Banana Pro")) {
platform_type = MRAA_BANANA;
}
else if (mraa_file_contains("/sys/firmware/devicetree/base/model", "Banana Pi")) {
} else if (mraa_file_contains("/sys/firmware/devicetree/base/model",
"Banana Pi")) {
platform_type = MRAA_BANANA;
}
// For old kernels
@@ -69,19 +72,22 @@ mraa_arm_platform()
}
}
}
}
fclose(fh);
}
free(line);
/* Get compatible string from Device tree for boards that dont have enough info in /proc/cpuinfo */
/* Get compatible string from Device tree for boards that dont have enough info in /proc/cpuinfo
*/
if (platform_type == MRAA_UNKNOWN_PLATFORM) {
if (mraa_file_contains("/sys/firmware/devicetree/base/compatible", "qcom,apq8016-sbc"))
platform_type = MRAA_96BOARDS;
else if (mraa_file_contains("/sys/firmware/devicetree/base/model", "HiKey Development Board"))
platform_type = MRAA_96BOARDS;
}
platform_type = MRAA_96BOARDS;
else if (mraa_file_contains("/sys/firmware/devicetree/base/model",
"HiKey Development Board"))
platform_type = MRAA_96BOARDS;
else if (mraa_file_contains("/proc/device-tree/model", "s900"))
platform_type = MRAA_96BOARDS;
}
switch (platform_type) {
case MRAA_RASPBERRY_PI:
@@ -90,6 +96,9 @@ mraa_arm_platform()
case MRAA_BEAGLEBONE:
plat = mraa_beaglebone();
break;
case MRAA_PHYBOARD_WEGA:
plat = mraa_phyboard();
break;
case MRAA_BANANA:
plat = mraa_banana();
break;

View File

@@ -30,6 +30,7 @@
#include "common.h"
#include "arm/beaglebone.h"
#include "arm/am335x.h"
#define NUM2STR(x) #x
@@ -37,147 +38,11 @@
#define PLATFORM_NAME_BEAGLEBONE_BLACK_REV_C "Beaglebone Black Rev. C"
#define SYSFS_DEVICES_CAPEMGR_SLOTS "/sys/devices/bone_capemgr.*/slots"
#define SYSFS_CLASS_PWM "/sys/class/pwm/"
#define SYSFS_CLASS_MMC "/sys/class/mmc_host/"
#define SYSFS_PWM_OVERLAY "am33xx_pwm"
#define UART_OVERLAY(x) "ADAFRUIT-UART" NUM2STR(x)
//#define ADAFRUIT_SPI_OVERLAY "ADAFRUIT-SPI%d"
#define SPI_OVERLAY(x) "BB-SPI" NUM2STR(x) "-01"
#define I2C_OVERLAY(x) "ADAFRUIT-I2C" NUM2STR(x)
#define MAX_SIZE 64
#define MMAP_PATH "/dev/mem"
#define AM335X_GPIO0_BASE 0x44e07000
#define AM335X_GPIO1_BASE 0x4804c000
#define AM335X_GPIO2_BASE 0x481AC000
#define AM335X_GPIO3_BASE 0x481AE000
#define AM335X_GPIO_SIZE (4 * 1024)
#define AM335X_IN 0x138
#define AM335X_CLR 0x190
#define AM335X_SET 0x194
// MMAP
static uint8_t* mmap_gpio[4] = { NULL, NULL, NULL, NULL };
static int mmap_fd = 0;
static unsigned int mmap_count = 0;
mraa_result_t
mraa_beaglebone_mmap_write(mraa_gpio_context dev, int value)
{
if (value) {
*(volatile uint32_t*) (mmap_gpio[dev->pin / 32] + AM335X_SET) = (uint32_t)(1 << (dev->pin % 32));
} else {
*(volatile uint32_t*) (mmap_gpio[dev->pin / 32] + AM335X_CLR) = (uint32_t)(1 << (dev->pin % 32));
}
return MRAA_SUCCESS;
}
static mraa_result_t
mraa_beaglebone_mmap_unsetup()
{
if (mmap_gpio[0] == NULL) {
syslog(LOG_ERR, "beaglebone mmap: null register cant unsetup");
return MRAA_ERROR_INVALID_RESOURCE;
}
munmap(mmap_gpio[0], AM335X_GPIO_SIZE);
mmap_gpio[0] = NULL;
munmap(mmap_gpio[1], AM335X_GPIO_SIZE);
mmap_gpio[1] = NULL;
munmap(mmap_gpio[2], AM335X_GPIO_SIZE);
mmap_gpio[2] = NULL;
munmap(mmap_gpio[3], AM335X_GPIO_SIZE);
mmap_gpio[3] = NULL;
if (close(mmap_fd) != 0) {
return MRAA_ERROR_INVALID_RESOURCE;
}
return MRAA_SUCCESS;
}
int
mraa_beaglebone_mmap_read(mraa_gpio_context dev)
{
uint32_t value = *(volatile uint32_t*) (mmap_gpio[dev->pin / 32] + AM335X_IN);
if (value & (uint32_t)(1 << (dev->pin % 32))) {
return 1;
}
return 0;
}
mraa_result_t
mraa_beaglebone_mmap_setup(mraa_gpio_context dev, mraa_boolean_t en)
{
if (dev == NULL) {
syslog(LOG_ERR, "beaglebone mmap: context not valid");
return MRAA_ERROR_INVALID_HANDLE;
}
if (en == 0) {
if (dev->mmap_write == NULL && dev->mmap_read == NULL) {
syslog(LOG_ERR, "beaglebone mmap: can't disable disabled mmap gpio");
return MRAA_ERROR_INVALID_PARAMETER;
}
dev->mmap_write = NULL;
dev->mmap_read = NULL;
mmap_count--;
if (mmap_count == 0) {
return mraa_beaglebone_mmap_unsetup();
}
return MRAA_SUCCESS;
}
if (dev->mmap_write != NULL && dev->mmap_read != NULL) {
syslog(LOG_ERR, "beaglebone mmap: can't enable enabled mmap gpio");
return MRAA_ERROR_INVALID_PARAMETER;
}
// Might need to make some elements of this thread safe.
// For example only allow one thread to enter the following block
// to prevent mmap'ing twice.
if (mmap_gpio[0] == NULL) {
if ((mmap_fd = open(MMAP_PATH, O_RDWR)) < 0) {
syslog(LOG_ERR, "beaglebone map: unable to open resource0 file");
return MRAA_ERROR_INVALID_HANDLE;
}
mmap_gpio[0] = (uint8_t*) mmap(NULL, AM335X_GPIO_SIZE, PROT_READ | PROT_WRITE,
MAP_FILE | MAP_SHARED, mmap_fd, AM335X_GPIO0_BASE);
if (mmap_gpio[0] == MAP_FAILED) {
syslog(LOG_ERR, "beaglebone mmap: failed to mmap");
mmap_gpio[0] = NULL;
close(mmap_fd);
return MRAA_ERROR_NO_RESOURCES;
}
mmap_gpio[1] = (uint8_t*) mmap(NULL, AM335X_GPIO_SIZE, PROT_READ | PROT_WRITE,
MAP_FILE | MAP_SHARED, mmap_fd, AM335X_GPIO1_BASE);
if (mmap_gpio[1] == MAP_FAILED) {
syslog(LOG_ERR, "beaglebone mmap: failed to mmap");
mmap_gpio[1] = NULL;
close(mmap_fd);
return MRAA_ERROR_NO_RESOURCES;
}
mmap_gpio[2] = (uint8_t*) mmap(NULL, AM335X_GPIO_SIZE, PROT_READ | PROT_WRITE,
MAP_FILE | MAP_SHARED, mmap_fd, AM335X_GPIO2_BASE);
if (mmap_gpio[2] == MAP_FAILED) {
syslog(LOG_ERR, "beaglebone mmap: failed to mmap");
mmap_gpio[2] = NULL;
close(mmap_fd);
return MRAA_ERROR_NO_RESOURCES;
}
mmap_gpio[3] = (uint8_t*) mmap(NULL, AM335X_GPIO_SIZE, PROT_READ | PROT_WRITE,
MAP_FILE | MAP_SHARED, mmap_fd, AM335X_GPIO3_BASE);
if (mmap_gpio[3] == MAP_FAILED) {
syslog(LOG_ERR, "beaglebone mmap: failed to mmap");
mmap_gpio[3] = NULL;
close(mmap_fd);
return MRAA_ERROR_NO_RESOURCES;
}
}
dev->mmap_write = &mraa_beaglebone_mmap_write;
dev->mmap_read = &mraa_beaglebone_mmap_read;
mmap_count++;
return MRAA_SUCCESS;
}
mraa_result_t
mraa_beaglebone_uart_init_pre(int index)

688
src/arm/phyboard.c Normal file
View File

@@ -0,0 +1,688 @@
/*
* Author: Norbert Wesp <nwesp@phytec.de>
* Author: Stefan Müller-Klieser <S.Mueller-Klieser@phytec.de>
* Copyright (c) 2016 Phytec Messtechnik GmbH.
*
* Based on src/arm/beaglebone.c
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include <stdlib.h>
#include <string.h>
#include <sys/mman.h>
#include <mraa/types.h>
#include "common.h"
#include "arm/phyboard.h"
#include "arm/am335x.h"
#define PLATFORM_NAME_PHYBOARD_WEGA "phyBOARD-Wega"
mraa_result_t
mraa_phyboard_uart_init_pre(int index)
{
char devpath[MAX_SIZE];
snprintf(devpath, MAX_SIZE, "/dev/ttyO%u", index);
if (!mraa_file_exist(devpath)) {
syslog(LOG_ERR, "uart: Device not initialized");
} else {
plat->uart_dev[index].device_path = devpath;
return MRAA_SUCCESS;
}
return MRAA_ERROR_INVALID_PARAMETER;
}
mraa_result_t
mraa_phyboard_spi_init_pre(int index)
{
mraa_result_t ret = MRAA_ERROR_INVALID_PARAMETER;
char devpath[MAX_SIZE];
int deviceindex = 0;
if ((index == 0) && mraa_link_targets("/sys/class/spidev/spidev1.0", "48030000")) {
deviceindex = 1;
}
if (deviceindex == 0) {
deviceindex = 1;
}
snprintf(devpath, MAX_SIZE, "/dev/spidev%u.0", deviceindex);
if (mraa_file_exist(devpath)) {
plat->spi_bus[index].bus_id = deviceindex;
ret = MRAA_SUCCESS;
} else {
syslog(LOG_NOTICE, "spi: Device not initialized");
}
return ret;
}
/* NOT DONE / TESTED YET */
mraa_result_t
mraa_phyboard_i2c_init_pre(unsigned int bus)
{
mraa_result_t ret = MRAA_ERROR_INVALID_PARAMETER;
char devpath[MAX_SIZE];
snprintf(devpath, MAX_SIZE, "/dev/i2c-%u", plat->i2c_bus[bus].bus_id);
if (!mraa_file_exist(devpath)) {
syslog(LOG_ERR, "i2c: %s doesn't exist ", devpath);
syslog(LOG_ERR, "i2c: Device not initialized");
return ret;
}
return MRAA_SUCCESS;
}
/* NOT DONE / TESTED YET */
mraa_pwm_context
mraa_phyboard_pwm_init_replace(int pin)
{
char devpath[MAX_SIZE];
int length = strlen(SYSFS_CLASS_PWM) + 5;
if (plat == NULL) {
syslog(LOG_ERR, "pwm: Platform Not Initialised");
return NULL;
}
if (plat->pins[pin].capabilities.pwm != 1) {
syslog(LOG_ERR, "pwm: pin not capable of pwm");
return NULL;
}
if (!mraa_file_exist(SYSFS_CLASS_PWM "pwmchip0")) {
syslog(LOG_ERR, "pwm: pwmchip0 not found");
return NULL;
}
snprintf(devpath, MAX_SIZE, SYSFS_CLASS_PWM "pwm%u", plat->pins[pin].pwm.pinmap);
if (!mraa_file_exist(devpath)) {
FILE* fh;
fh = fopen(SYSFS_CLASS_PWM "export", "w");
if (fh == NULL) {
syslog(LOG_ERR, "pwm: Failed to open %s for writing, check access "
"rights for user", SYSFS_CLASS_PWM "export");
return NULL;
}
if (fprintf(fh, "%d", plat->pins[pin].pwm.pinmap) < 0) {
syslog(LOG_ERR, "pwm: Failed to write to %s", SYSFS_CLASS_PWM "export");
}
fclose(fh);
}
if (mraa_file_exist(devpath)) {
mraa_pwm_context dev = (mraa_pwm_context) calloc(1, sizeof(struct _pwm));
if (dev == NULL) {
return NULL;
}
dev->duty_fp = -1;
dev->chipid = -1;
dev->pin = plat->pins[pin].pwm.pinmap;
dev->period = -1;
return dev;
} else {
syslog(LOG_ERR, "pwm: pin not initialized");
}
return NULL;
}
mraa_board_t*
mraa_phyboard()
{
unsigned int uart2_enabled = 0;
unsigned int uart3_enabled = 0;
if (mraa_file_exist("/sys/class/tty/ttyO2")) {
uart2_enabled = 1;
} else {
uart2_enabled = 0;
}
if (mraa_file_exist("/sys/class/tty/ttyO3")) {
uart3_enabled = 1;
} else {
uart3_enabled = 0;
}
mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
if (b == NULL) {
return NULL;
}
b->platform_name = PLATFORM_NAME_PHYBOARD_WEGA;
b->phy_pin_count = MRAA_PHYBOARD_WEGA_PINCOUNT;
if (b->platform_name == NULL) {
goto error;
}
b->aio_count = 4;
b->adc_raw = 12;
b->adc_supported = 12;
b->pwm_default_period = 500;
b->pwm_max_period = 2147483;
b->pwm_min_period = 1;
b->pins = (mraa_pininfo_t*) calloc(b->phy_pin_count,sizeof(mraa_pininfo_t));
if (b->pins == NULL) {
goto error;
}
b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t));
if (b->adv_func == NULL) {
free(b->pins);
goto error;
}
b->adv_func->uart_init_pre = &mraa_phyboard_uart_init_pre;
b->adv_func->spi_init_pre = &mraa_phyboard_spi_init_pre;
b->adv_func->i2c_init_pre = &mraa_phyboard_i2c_init_pre;
b->adv_func->pwm_init_replace = &mraa_phyboard_pwm_init_replace;
strncpy(b->pins[0].name, "INVALID", MRAA_PIN_NAME_SIZE);
b->pins[0].capabilities = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 };
// X69 connector
strncpy(b->pins[1].name, "VCC3V3", MRAA_PIN_NAME_SIZE);
b->pins[1].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[2].name, "VCC5V", MRAA_PIN_NAME_SIZE);
b->pins[2].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[3].name, "VDIG1_1P8V", MRAA_PIN_NAME_SIZE);
b->pins[3].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[4].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[4].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[5].name, "X_SPIO_CS0", MRAA_PIN_NAME_SIZE);
b->pins[5].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 };
b->pins[5].spi.mux_total = 0;
strncpy(b->pins[6].name, "X_SPIO_MOSI", MRAA_PIN_NAME_SIZE);
b->pins[6].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 };
b->pins[6].spi.mux_total = 0;
strncpy(b->pins[7].name, "X_SPIO_MISO", MRAA_PIN_NAME_SIZE);
b->pins[7].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 };
b->pins[7].spi.mux_total = 0;
strncpy(b->pins[8].name, "X_SPIO_CLK", MRAA_PIN_NAME_SIZE);
b->pins[8].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 };
b->pins[8].spi.mux_total = 0;
strncpy(b->pins[9].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[9].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[10].name, "X_UART0_RXD", MRAA_PIN_NAME_SIZE);
b->pins[10].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 };
b->pins[10].uart.mux_total = 0;
strncpy(b->pins[11].name, "X_I2C0_SDA", MRAA_PIN_NAME_SIZE);
b->pins[11].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 };
b->pins[11].i2c.mux_total = 0;
strncpy(b->pins[12].name, "X_UART0_TXD", MRAA_PIN_NAME_SIZE);
b->pins[12].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 };
b->pins[12].uart.mux_total = 0;
strncpy(b->pins[13].name, "X_I2C0_SCL", MRAA_PIN_NAME_SIZE);
b->pins[13].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 };
b->pins[13].i2c.mux_total = 0;
strncpy(b->pins[14].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[14].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[15].name, "X_JTAG_TMS", MRAA_PIN_NAME_SIZE);
b->pins[15].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
/* changed name "X_nJTAG_TRST" to "X_JTAG_TRST" for fitting in b->pins[16].name*/
strncpy(b->pins[16].name, "X_JTAG_TRST", MRAA_PIN_NAME_SIZE);
b->pins[16].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[17].name, "X_JTAG_TDI", MRAA_PIN_NAME_SIZE);
b->pins[17].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[18].name, "X_JTAG_TDO", MRAA_PIN_NAME_SIZE);
b->pins[18].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[19].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[19].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[20].name, "X_JTAG_TCK", MRAA_PIN_NAME_SIZE);
b->pins[20].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
/* changed name "X_USB_DP_EXP" to "X_USB_DP" for fitting in b->pins[21].name*/
strncpy(b->pins[21].name, "X_USB_DP", MRAA_PIN_NAME_SIZE);
b->pins[21].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
/* changed name "X_USB_DM_EXP" to "X_USB_DM" for fitting in b->pins[22].name*/
strncpy(b->pins[22].name, "X_USB_DM", MRAA_PIN_NAME_SIZE);
b->pins[22].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[23].name, "nRESET_OUT", MRAA_PIN_NAME_SIZE);
b->pins[32].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[24].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[24].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[25].name, "X_MMC2_CMD", MRAA_PIN_NAME_SIZE);
b->pins[25].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[26].name, "X_MMC2_DATO", MRAA_PIN_NAME_SIZE);
b->pins[26].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[27].name, "X_MMC2_CLK", MRAA_PIN_NAME_SIZE);
b->pins[27].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[28].name, "X_MMC2_DAT1", MRAA_PIN_NAME_SIZE);
b->pins[28].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[29].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[29].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[30].name, "X_MMC2_DAT2", MRAA_PIN_NAME_SIZE);
b->pins[30].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
/* PIN-Number "31" with name "X_UART2_RX_GPIO3_9" */
if (uart2_enabled == 1) {
strncpy(b->pins[31].name, "X_UART2_RX", MRAA_PIN_NAME_SIZE);
b->pins[31].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
} else {
strncpy(b->pins[31].name, "X_GPIO3_9", MRAA_PIN_NAME_SIZE);
b->pins[31].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
}
b->pins[31].gpio.pinmap = (3*32 + 9);
b->pins[31].gpio.parent_id = 0;
b->pins[31].gpio.mux_total = 0;
b->pins[31].uart.mux_total = 0;
strncpy(b->pins[32].name, "X_MMC2_DAT3", MRAA_PIN_NAME_SIZE);
b->pins[32].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
/* PIN-Number "33" with name "X_UART2_TX_GPIO3_10" */
if (uart2_enabled == 1) {
strncpy(b->pins[33].name, "X_UART2_TX", MRAA_PIN_NAME_SIZE);
b->pins[33].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
} else {
strncpy(b->pins[33].name, "X_GPIO3_10", MRAA_PIN_NAME_SIZE);
b->pins[33].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
}
b->pins[33].gpio.pinmap = (3*32 + 10);
b->pins[33].gpio.parent_id = 0;
b->pins[33].gpio.mux_total = 0;
b->pins[33].uart.mux_total = 0;
strncpy(b->pins[34].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[34].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
/* PIN-Number "35" with name "X_UART3_RX_GPIO2_18" */
if (uart3_enabled == 1) {
strncpy(b->pins[35].name, "X_UART3_RX", MRAA_PIN_NAME_SIZE);
b->pins[35].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
} else {
strncpy(b->pins[35].name, "X_GPIO2_18", MRAA_PIN_NAME_SIZE);
b->pins[35].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
}
b->pins[35].gpio.pinmap = (2*32 + 18);
b->pins[35].gpio.parent_id = 0;
b->pins[35].gpio.mux_total = 0;
b->pins[35].uart.mux_total = 0;
/* PIN-Number "36" with name "X_UART3_TX_GPIO2_19" */
if (uart3_enabled == 1) {
strncpy(b->pins[36].name, "X_UART3_TX", MRAA_PIN_NAME_SIZE);
b->pins[36].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
} else {
strncpy(b->pins[36].name, "X_GPIO2_19", MRAA_PIN_NAME_SIZE);
b->pins[36].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
}
b->pins[36].gpio.pinmap = (2*32 + 19);
b->pins[36].gpio.parent_id = 0;
b->pins[36].gpio.mux_total = 0;
b->pins[36].uart.mux_total = 0;
/* PIN-Number "37" with name "X_INTR1_GPIO0_20" */
strncpy(b->pins[37].name, "X_GPIO0_20", MRAA_PIN_NAME_SIZE);
b->pins[37].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[37].gpio.pinmap = (0*32 + 20);
b->pins[37].gpio.parent_id = 0;
b->pins[37].gpio.mux_total = 0;
strncpy(b->pins[38].name, "X_GPIO0_7", MRAA_PIN_NAME_SIZE);
b->pins[38].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[38].gpio.pinmap = (0*32 + 7);
b->pins[38].gpio.parent_id = 0;
b->pins[38].gpio.mux_total = 0;
/* changed name "X_AM335_EXT_WAKEUP" to "X_AM335_WUP" for fitting in b->pins[39].name*/
strncpy(b->pins[39].name, "X_AM335_WUP", MRAA_PIN_NAME_SIZE);
b->pins[39].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[40].name, "X_INT_RTCn", MRAA_PIN_NAME_SIZE);
b->pins[40].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[41].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[41].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
/* PIN-Number "42" with name "X_GPIO3_7_nPMOD_PW RFAIL" */
strncpy(b->pins[42].name, "X_GPIO3_7", MRAA_PIN_NAME_SIZE);
b->pins[42].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[42].gpio.pinmap = (3*32 + 7);
b->pins[42].gpio.parent_id = 0;
b->pins[42].gpio.mux_total = 0;
strncpy(b->pins[43].name, "nRESET_IN", MRAA_PIN_NAME_SIZE);
b->pins[43].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[44].name, "X_GPIO1_31", MRAA_PIN_NAME_SIZE);
b->pins[44].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[44].gpio.pinmap = (1*32 + 31);
b->pins[44].gpio.parent_id = 0;
b->pins[44].gpio.mux_total = 0;
/* changed name "X_AM335_NMIn" to "X_AM335_NMI" for fitting in b->pins[45].name*/
strncpy(b->pins[45].name, "X_AM335_NMI", MRAA_PIN_NAME_SIZE);
b->pins[45].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[46].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[46].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
// NOT DONE / TESTED YET
strncpy(b->pins[47].name, "X_AIN4", MRAA_PIN_NAME_SIZE);
b->pins[47].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 1, 0 };
// NOT DONE / TESTED YET
strncpy(b->pins[48].name, "X_AIN5", MRAA_PIN_NAME_SIZE);
b->pins[48].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 1, 0 };
// NOT DONE / TESTED YET
strncpy(b->pins[49].name, "X_AIN6", MRAA_PIN_NAME_SIZE);
b->pins[49].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 1, 0 };
// NOT DONE / TESTED YET
strncpy(b->pins[50].name, "X_AIN7", MRAA_PIN_NAME_SIZE);
b->pins[50].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 1, 0 };
strncpy(b->pins[51].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[51].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
/* to CHECK X_GPIO_CKSYNC */
/* changed name "X_GPIO_CKSYNC" to "X_GPIO_CSYN" for fitting in b->pins[52].name*/
strncpy(b->pins[52].name, "X_GPIO_CSYN", MRAA_PIN_NAME_SIZE);
b->pins[52].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
/* changed name "X_USB_ID_EXP" to "X_USB_ID" for fitting in b->pins[53].name*/
strncpy(b->pins[53].name, "X_USB_ID", MRAA_PIN_NAME_SIZE);
b->pins[53].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
/* changed name "USB_VBUS_EXP" to "USB_VBUS" for fitting in b->pins[54].name*/
strncpy(b->pins[54].name, "USB_VBUS", MRAA_PIN_NAME_SIZE);
b->pins[54].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[55].name, "X_USB1_CE", MRAA_PIN_NAME_SIZE);
b->pins[55].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[56].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[56].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[57].name, "VCC_BL", MRAA_PIN_NAME_SIZE);
b->pins[57].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[58].name, "X_BP_POWER", MRAA_PIN_NAME_SIZE);
b->pins[58].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[59].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[59].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60].name, "VCC5V_IN", MRAA_PIN_NAME_SIZE);
b->pins[60].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
// X70 connector
strncpy(b->pins[60+1].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[60+1].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+2].name, "X_LCD_D21", MRAA_PIN_NAME_SIZE);
b->pins[60+2].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+3].name, "X_LCD_D18", MRAA_PIN_NAME_SIZE);
b->pins[60+3].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+4].name, "X_LCD_D16", MRAA_PIN_NAME_SIZE);
b->pins[60+4].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+5].name, "X_LCD_D0", MRAA_PIN_NAME_SIZE);
b->pins[60+5].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+6].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[60+6].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+7].name, "X_LCD_D1", MRAA_PIN_NAME_SIZE);
b->pins[60+7].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+8].name, "X_LCD_D2", MRAA_PIN_NAME_SIZE);
b->pins[60+8].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+9].name, "X_LCD_D3", MRAA_PIN_NAME_SIZE);
b->pins[60+9].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+10].name, "X_LCD_D4", MRAA_PIN_NAME_SIZE);
b->pins[60+10].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+11].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[60+11].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+12].name, "X_LCD_D22", MRAA_PIN_NAME_SIZE);
b->pins[60+12].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+13].name, "X_LCD_D19", MRAA_PIN_NAME_SIZE);
b->pins[60+13].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+14].name, "X_LCD_D5", MRAA_PIN_NAME_SIZE);
b->pins[60+14].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+15].name, "X_LCD_D6", MRAA_PIN_NAME_SIZE);
b->pins[60+15].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+16].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[60+16].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+17].name, "X_LCD_D7", MRAA_PIN_NAME_SIZE);
b->pins[60+17].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+18].name, "X_LCD_D8", MRAA_PIN_NAME_SIZE);
b->pins[60+18].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+19].name, "X_LCD_D9", MRAA_PIN_NAME_SIZE);
b->pins[60+19].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+20].name, "X_LCD_D10", MRAA_PIN_NAME_SIZE);
b->pins[60+20].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+21].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[60+21].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+22].name, "X_LCD_D23", MRAA_PIN_NAME_SIZE);
b->pins[60+22].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+23].name, "X_LCD_D20", MRAA_PIN_NAME_SIZE);
b->pins[60+23].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+24].name, "X_LCD_D17", MRAA_PIN_NAME_SIZE);
b->pins[60+24].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+25].name, "X_LCD_D11", MRAA_PIN_NAME_SIZE);
b->pins[60+25].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+26].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[60+26].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+27].name, "X_LCD_D12", MRAA_PIN_NAME_SIZE);
b->pins[60+27].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+28].name, "X_LCD_D13", MRAA_PIN_NAME_SIZE);
b->pins[60+28].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+29].name, "X_LCD_D14", MRAA_PIN_NAME_SIZE);
b->pins[60+29].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+30].name, "X_LCD_D15", MRAA_PIN_NAME_SIZE);
b->pins[60+30].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+31].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[60+31].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+32].name, "X_LCD_PCLK", MRAA_PIN_NAME_SIZE);
b->pins[60+32].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
/* changed name "X_LCD_BIAS_EN" to "X_LCD_BIAS" for fitting in b->pins[60+33].name*/
strncpy(b->pins[60+33].name, "X_LCD_BIAS", MRAA_PIN_NAME_SIZE);
b->pins[60+33].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+34].name, "X_LCD_HSYNC", MRAA_PIN_NAME_SIZE);
b->pins[60+34].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+35].name, "X_LCD_VSYNC", MRAA_PIN_NAME_SIZE);
b->pins[60+35].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+36].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[60+36].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+37].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[60+37].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+38].name, "X_PWM1_OUT", MRAA_PIN_NAME_SIZE);
b->pins[60+38].capabilities = (mraa_pincapabilities_t){ 1, 0, 1, 0, 0, 0, 0, 0 };
b->pins[60+38].pwm.pinmap = 0;
b->pins[60+38].pwm.mux_total = 0;
strncpy(b->pins[60+39].name, "VCC_BL", MRAA_PIN_NAME_SIZE);
b->pins[60+39].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+40].name, "VCC5V", MRAA_PIN_NAME_SIZE);
b->pins[60+40].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
// X71 connector
strncpy(b->pins[60+40+1].name, "X_I2S_CLK", MRAA_PIN_NAME_SIZE);
b->pins[60+40+1].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+40+2].name, "X_I2S_FRM", MRAA_PIN_NAME_SIZE);
b->pins[60+40+2].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+40+3].name, "X_I2S_ADC", MRAA_PIN_NAME_SIZE);
b->pins[60+40+3].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+40+4].name, "X_I2S_DAC", MRAA_PIN_NAME_SIZE);
b->pins[60+40+4].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
/* PIN-Number "60+40+5" with name "X_AV_INT_GPIO1_30" */
strncpy(b->pins[60+40+5].name, "X_GPIO1_30", MRAA_PIN_NAME_SIZE);
b->pins[60+40+5].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[60+40+5].gpio.pinmap = (1*32 + 30);
b->pins[60+40+5].gpio.parent_id = 0;
b->pins[60+40+5].gpio.mux_total = 0;
/* PIN-Number "60+40+6" with name "nUSB1_OC_GPIO3_19" or "X_MCASP0_AHCLKX_GPIO3_21" */
// TODO -> Check settings of Jumper J77
strncpy(b->pins[60+40+6].name, "X_GPIO3_19", MRAA_PIN_NAME_SIZE);
b->pins[60+40+6].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[60+40+6].gpio.pinmap = (3*32 + 19);
b->pins[60+40+6].gpio.parent_id = 0;
b->pins[60+40+6].gpio.mux_total = 0;
strncpy(b->pins[60+40+7].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[60+40+7].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+40+8].name, "nRESET_OUT", MRAA_PIN_NAME_SIZE);
b->pins[60+40+8].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+40+9].name, "TS_X+", MRAA_PIN_NAME_SIZE);
b->pins[60+40+9].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+40+10].name, "TS_X-", MRAA_PIN_NAME_SIZE);
b->pins[60+40+10].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+40+11].name, "TS_Y+", MRAA_PIN_NAME_SIZE);
b->pins[60+40+11].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+40+12].name, "TS_Y-", MRAA_PIN_NAME_SIZE);
b->pins[60+40+12].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+40+13].name, "VCC3V3", MRAA_PIN_NAME_SIZE);
b->pins[60+40+13].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+40+14].name, "GND", MRAA_PIN_NAME_SIZE);
b->pins[60+40+14].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
strncpy(b->pins[60+40+15].name, "X_I2C0_SCL", MRAA_PIN_NAME_SIZE);
b->pins[60+40+15].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 };
b->pins[60+40+15].i2c.mux_total = 0;
strncpy(b->pins[60+40+16].name, "X_I2C0_SDA", MRAA_PIN_NAME_SIZE);
b->pins[60+40+16].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 };
b->pins[60+40+16].i2c.mux_total = 0;
// BUS DEFINITIONS
b->i2c_bus_count = 2;
b->def_i2c_bus = 0;
b->i2c_bus[0].bus_id = 0;
b->i2c_bus[0].sda = 11;
b->i2c_bus[0].scl = 13;
b->i2c_bus[1].bus_id = 0;
b->i2c_bus[1].sda = (60+40+16);
b->i2c_bus[1].scl = (60+40+15);
b->spi_bus_count = 1;
b->def_spi_bus = 0;
b->spi_bus[0].bus_id = 0;
b->spi_bus[0].slave_s = 0;
b->spi_bus[0].cs = 5;
b->spi_bus[0].mosi = 6;
b->spi_bus[0].miso = 7;
b->spi_bus[0].sclk = 8;
b->uart_dev_count = 4;
b->def_uart_dev = 0;
b->uart_dev[0].rx = 10;
b->uart_dev[0].tx = 12;
/* TODO UART1 */
b->uart_dev[1].rx = 0;
b->uart_dev[1].tx = 0;
/* TODO UART1 */
b->uart_dev[2].rx = 31;
b->uart_dev[2].tx = 33;
b->uart_dev[3].rx = 35;
b->uart_dev[3].tx = 36;
b->gpio_count = 0;
int i;
for (i = 0; i < b->phy_pin_count; i++) {
if (b->pins[i].capabilities.gpio) {
b->gpio_count++;
}
}
return b;
error:
syslog(LOG_CRIT, "phyboard: failed to initialize");
free(b);
return NULL;
};

View File

@@ -38,6 +38,7 @@
#define PLATFORM_NAME_RASPBERRY_PI_COMPUTE_MODULE_REV_1 "Raspberry Pi Compute Module Rev 1"
#define PLATFORM_NAME_RASPBERRY_PI_A_PLUS_REV_1 "Raspberry Pi Model A+ Rev 1"
#define PLATFORM_NAME_RASPBERRY_PI2_B_REV_1 "Raspberry Pi 2 Model B Rev 1"
#define PLATFORM_NAME_RASPBERRY_PI_ZERO "Raspberry Pi Zero"
#define PLATFORM_RASPBERRY_PI_B_REV_1 1
#define PLATFORM_RASPBERRY_PI_A_REV_2 2
#define PLATFORM_RASPBERRY_PI_B_REV_2 3
@@ -45,6 +46,7 @@
#define PLATFORM_RASPBERRY_PI_COMPUTE_MODULE_REV_1 5
#define PLATFORM_RASPBERRY_PI_A_PLUS_REV_1 6
#define PLATFORM_RASPBERRY_PI2_B_REV_1 7
#define PLATFORM_RASPBERRY_PI_ZERO "Raspberry Pi Zero"
#define MMAP_PATH "/dev/mem"
#define BCM2835_PERI_BASE 0x20000000
#define BCM2835_GPIO_BASE (BCM2835_PERI_BASE + 0x200000)
@@ -230,6 +232,10 @@ mraa_raspberry_pi()
b->platform_name = PLATFORM_NAME_RASPBERRY_PI_B_REV_2;
platform_detected = PLATFORM_RASPBERRY_PI_B_REV_2;
b->phy_pin_count = MRAA_RASPBERRY_PI_AB_REV_2_PINCOUNT;
} else if (strstr(line, "900092")) {
b->platform_name = PLATFORM_NAME_RASPBERRY_PI_ZERO;
platform_detected = PLATFORM_RASPBERRY_PI_ZERO;
b->phy_pin_count = MRAA_RASPBERRY_PI_ZERO_PINCOUNT;
} else if (strstr(line, "0007") || strstr(line, "0008") || strstr(line, "0009")) {
b->platform_name = PLATFORM_NAME_RASPBERRY_PI_A_REV_2;
platform_detected = PLATFORM_RASPBERRY_PI_A_REV_2;
@@ -490,7 +496,8 @@ mraa_raspberry_pi()
if ((platform_detected == PLATFORM_RASPBERRY_PI_A_PLUS_REV_1) ||
(platform_detected == PLATFORM_RASPBERRY_PI_B_PLUS_REV_1) ||
(platform_detected == PLATFORM_RASPBERRY_PI2_B_REV_1)) {
(platform_detected == PLATFORM_RASPBERRY_PI2_B_REV_1) ||
(platform_detected == PLATFORM_RASPBERRY_PI_ZERO)) {
strncpy(b->pins[27].name, "ID_SD", MRAA_PIN_NAME_SIZE);
b->pins[27].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };

View File

@@ -33,13 +33,19 @@ t_firmata*
firmata_new(const char* name)
{
t_firmata* res;
mraa_result_t uart_res = MRAA_ERROR_UNSPECIFIED;
res = calloc(1, sizeof(t_firmata));
if (!res) {
return NULL;
}
int ret = pthread_spin_init(&res->lock, PTHREAD_PROCESS_SHARED);
if (ret != 0) {
syslog(LOG_ERR, "firmata; could not init locking");
free(res);
return NULL;
}
res->uart = mraa_uart_init_raw(name);
if (res->uart == NULL) {
syslog(LOG_ERR, "firmata: UART failed to setup");
@@ -69,7 +75,7 @@ firmata_close(t_firmata* firmata)
int
firmata_pull(t_firmata* firmata)
{
uint8_t buff[FIRMATA_MSG_LEN];
char buff[FIRMATA_MSG_LEN];
int r;
r = mraa_uart_data_available(firmata->uart, 40);
@@ -79,7 +85,7 @@ firmata_pull(t_firmata* firmata)
return 0;
}
if (r > 0) {
firmata_parse(firmata, buff, r);
firmata_parse(firmata, (uint8_t*) buff, r);
return r;
}
}
@@ -134,7 +140,9 @@ firmata_endParse(t_firmata* firmata)
int analog_val = firmata->parse_buff[1] | (firmata->parse_buff[2] << 7);
for (pin = 0; pin < 128; pin++) {
if (firmata->pins[pin].analog_channel == analog_ch) {
if (pthread_spin_lock(&firmata->lock) != 0) return;
firmata->pins[pin].value = analog_val;
if (pthread_spin_unlock(&firmata->lock) != 0) syslog(LOG_ERR, "firmata: Fatal spinlock deadlock");
return;
}
}
@@ -148,7 +156,9 @@ firmata_endParse(t_firmata* firmata)
for (mask = 1; mask & 0xFF; mask <<= 1, pin++) {
if (firmata->pins[pin].mode == MODE_INPUT) {
uint32_t val = (port_val & mask) ? 1 : 0;
if (pthread_spin_lock(&firmata->lock)) return;
firmata->pins[pin].value = val;
if (pthread_spin_unlock(&firmata->lock) != 0) syslog(LOG_ERR, "firmata: Fatal spinlock deadlock");
}
}
return;
@@ -174,7 +184,7 @@ firmata_endParse(t_firmata* firmata)
// not ready to communicate for some time, so the only
// way to reliably query their capabilities is to wait
// until the REPORT_FIRMWARE message is heard.
uint8_t buf[80];
char buf[80];
len = 0;
buf[len++] = FIRMATA_START_SYSEX;
buf[len++] = FIRMATA_ANALOG_MAPPING_QUERY; // read analog to pin # info
@@ -209,7 +219,7 @@ firmata_endParse(t_firmata* firmata)
}
// send a state query for for every pin with any modes
for (pin = 0; pin < 128; pin++) {
uint8_t buf[512];
char buf[512];
int len = 0;
if (firmata->pins[pin].supported_modes) {
buf[len++] = FIRMATA_START_SYSEX;
@@ -241,15 +251,17 @@ firmata_endParse(t_firmata* firmata)
int reg = (firmata->parse_buff[4] & 0x7f) | ((firmata->parse_buff[5] & 0x7f) << 7);
int i = 6;
int ii = 0;
for (ii; ii < (firmata->parse_count - 7) / 2; ii++) {
if (pthread_spin_lock(&firmata->lock) != 0) syslog(LOG_ERR, "firmata: Fatal spinlock deadlock, skipping i2c msg");
for (; ii < (firmata->parse_count - 7) / 2; ii++) {
firmata->i2cmsg[addr][reg+ii] = (firmata->parse_buff[i] & 0x7f) | ((firmata->parse_buff[i+1] & 0x7f) << 7);
i = i+2;
}
if (pthread_spin_unlock(&firmata->lock) != 0) syslog(LOG_ERR, "firmata: Fatal spinlock deadlock");
} else {
if (firmata->devs != NULL) {
struct _firmata* devs = firmata->devs[0];
int i = 0;
for (i; i < firmata->dev_count; i++, devs++) {
for (; i < firmata->dev_count; i++, devs++) {
if (devs != NULL) {
if (firmata->parse_buff[1] == devs->feature) {
// call func
@@ -284,7 +296,7 @@ firmata_initPins(t_firmata* firmata)
int
firmata_askFirmware(t_firmata* firmata)
{
uint8_t buf[3];
char buf[3];
int res;
buf[0] = FIRMATA_START_SYSEX;
@@ -298,7 +310,7 @@ int
firmata_pinMode(t_firmata* firmata, int pin, int mode)
{
int res;
uint8_t buff[4];
char buff[4];
firmata->pins[pin].mode = mode;
buff[0] = FIRMATA_SET_PIN_MODE;
@@ -313,7 +325,7 @@ firmata_analogWrite(t_firmata* firmata, int pin, int value)
{
int res;
uint8_t buff[3];
char buff[3];
buff[0] = 0xE0 | pin;
buff[1] = value & 0x7F;
buff[2] = (value >> 7) & 0x7F;
@@ -326,7 +338,7 @@ firmata_analogRead(t_firmata *firmata, int pin)
{
int res;
int value = 1;
uint8_t buff[2];
char buff[2];
buff[0] = FIRMATA_REPORT_ANALOG | pin;
buff[1] = value;
res = mraa_uart_write(firmata->uart, buff, 2);
@@ -338,7 +350,7 @@ firmata_digitalWrite(t_firmata* firmata, int pin, int value)
{
int i;
int res;
uint8_t buff[4];
char buff[4];
if (pin < 0 || pin > 127)
return (0);

View File

@@ -84,6 +84,7 @@ mraa_result_t
mraa_firmata_close(mraa_firmata_context dev)
{
mraa_firmata_response_stop(dev);
pthread_spin_destroy(&firmata_dev->lock);
free(dev);
return MRAA_SUCCESS;
}
@@ -92,7 +93,7 @@ static mraa_result_t
mraa_firmata_i2c_init_bus_replace(mraa_i2c_context dev)
{
int delay = 1; // this should be either 1 or 0, I don't know :)
uint8_t buff[4];
char buff[4];
buff[0] = FIRMATA_START_SYSEX;
buff[1] = FIRMATA_I2C_CONFIG;
buff[2] = delay & 0xFF, (delay >> 8) & 0xFF;
@@ -120,7 +121,7 @@ mraa_firmata_i2c_frequency(mraa_i2c_context dev, mraa_i2c_mode_t mode)
static mraa_result_t
mraa_firmata_send_i2c_read_req(mraa_i2c_context dev, int length)
{
uint8_t* buffer = calloc(7, 0);
char* buffer = calloc(7, 0);
if (buffer == NULL) {
return MRAA_ERROR_NO_RESOURCES;
}
@@ -149,7 +150,7 @@ mraa_firmata_send_i2c_read_req(mraa_i2c_context dev, int length)
static mraa_result_t
mraa_firmata_send_i2c_read_reg_req(mraa_i2c_context dev, uint8_t command, int length)
{
uint8_t* buffer = calloc(9, 0);
char* buffer = calloc(9, 0);
if (buffer == NULL) {
return MRAA_ERROR_NO_RESOURCES;
}
@@ -182,11 +183,17 @@ static mraa_result_t
mraa_firmata_i2c_wait(int addr, int reg)
{
int i = 0;
for (i = 0; firmata_dev->i2cmsg[addr][reg] == -1; i++) {
if (i > 50) {
if (pthread_spin_lock(&firmata_dev->lock) != 0) return MRAA_ERROR_UNSPECIFIED;
int res = firmata_dev->i2cmsg[addr][reg];
if (pthread_spin_unlock(&firmata_dev->lock) != 0) return MRAA_ERROR_UNSPECIFIED;
for (; res == -1; i++) {
if (i > 1000) {
return MRAA_ERROR_UNSPECIFIED;
}
usleep(500);
usleep(50);
if (pthread_spin_lock(&firmata_dev->lock) != 0) return MRAA_ERROR_UNSPECIFIED;
res = firmata_dev->i2cmsg[addr][reg];
if (pthread_spin_unlock(&firmata_dev->lock) != 0) return MRAA_ERROR_UNSPECIFIED;
}
return MRAA_SUCCESS;
}
@@ -224,9 +231,16 @@ mraa_firmata_i2c_read_word_data(mraa_i2c_context dev, uint8_t command)
static int
mraa_firmata_i2c_read_bytes_data(mraa_i2c_context dev, uint8_t command, uint8_t* data, int length)
{
uint32_t *local_storage = (uint32_t*) calloc(length, sizeof(int));
if (mraa_firmata_send_i2c_read_reg_req(dev, command, length) == MRAA_SUCCESS) {
if (mraa_firmata_i2c_wait(dev->addr, command) == MRAA_SUCCESS) {
memcpy(data, &firmata_dev->i2cmsg[dev->addr][command], sizeof(int)*length);
memcpy(local_storage, &firmata_dev->i2cmsg[dev->addr][command], sizeof(int)*length);
int x = 0;
for(; x<length; x++){
data[x] = (uint8_t) local_storage[x];
}
free(local_storage);
return length;
}
}
@@ -239,7 +253,7 @@ mraa_firmata_i2c_read(mraa_i2c_context dev, uint8_t* data, int length)
if (mraa_firmata_send_i2c_read_req(dev, length) == MRAA_SUCCESS) {
if (mraa_firmata_i2c_wait(dev->addr, 0) == MRAA_SUCCESS) {
int i = 0;
for (i = 0; i < length; i++) {
for (; i < length; i++) {
data[i] = firmata_dev->i2cmsg[dev->addr][i];
}
return length;
@@ -266,7 +280,7 @@ mraa_firmata_i2c_write(mraa_i2c_context dev, const uint8_t* data, int bytesToWri
{
// buffer needs 5 bytes for firmata, and 2 bytes for every byte of data
int buffer_size = (bytesToWrite*2) + 5;
uint8_t* buffer = calloc(buffer_size, 0);
char* buffer = calloc(buffer_size, 0);
if (buffer == NULL) {
return MRAA_ERROR_NO_RESOURCES;
}
@@ -277,7 +291,7 @@ mraa_firmata_i2c_write(mraa_i2c_context dev, const uint8_t* data, int bytesToWri
buffer[2] = dev->addr;
buffer[3] = I2C_MODE_WRITE << 3;
// we need to write until FIRMATA_END_SYSEX
for (i; i < (buffer_size-1); i++) {
for (; i < (buffer_size-1); i++) {
buffer[ii] = data[i] & 0x7F;
buffer[ii+1] = (data[i] >> 7) & 0x7f;
ii = ii+2;
@@ -291,7 +305,7 @@ mraa_firmata_i2c_write(mraa_i2c_context dev, const uint8_t* data, int bytesToWri
static mraa_result_t
mraa_firmata_i2c_write_byte(mraa_i2c_context dev, uint8_t data)
{
uint8_t* buffer = calloc(7, 0);
char* buffer = calloc(7, 0);
if (buffer == NULL) {
return MRAA_ERROR_NO_RESOURCES;
}
@@ -310,7 +324,7 @@ mraa_firmata_i2c_write_byte(mraa_i2c_context dev, uint8_t data)
static mraa_result_t
mraa_firmata_i2c_write_byte_data(mraa_i2c_context dev, const uint8_t data, const uint8_t command)
{
uint8_t* buffer = calloc(9, 0);
char* buffer = calloc(9, 0);
if (buffer == NULL) {
return MRAA_ERROR_NO_RESOURCES;
}
@@ -345,7 +359,10 @@ mraa_firmata_aio_read(mraa_aio_context dev)
{
// careful, whilst you need to enable '0' for A0 you then need to read 14
// in t_firmata because well that makes sense doesn't it...
return (int) firmata_dev->pins[dev->channel].value;
if (pthread_spin_lock(&firmata_dev->lock) != 0) return -1;
int ret = (int) firmata_dev->pins[dev->channel].value;
if (pthread_spin_unlock(&firmata_dev->lock) != 0) return -1;
return ret;
}
static mraa_result_t
@@ -380,7 +397,10 @@ mraa_firmata_gpio_mode_replace(mraa_gpio_context dev, mraa_gpio_mode_t mode)
static int
mraa_firmata_gpio_read_replace(mraa_gpio_context dev)
{
return firmata_dev->pins[dev->pin].value;
if (pthread_spin_lock(&firmata_dev->lock) != 0) return -1;
int res = firmata_dev->pins[dev->pin].value;
if (pthread_spin_unlock(&firmata_dev->lock) != 0) return -1;
return res;
}
static mraa_result_t
@@ -517,6 +537,8 @@ mraa_firmata_pull_handler(void* vp)
isr_prev = isr_now;
usleep(100);
}
return NULL;
}
mraa_board_t*
@@ -537,7 +559,7 @@ mraa_firmata_plat_init(const char* uart_dev)
// if this isn't working then we have an issue with our uart
int retry = 20;
while (!firmata_dev->isReady && retry--) {
while (!firmata_dev->isReady && --retry) {
firmata_pull(firmata_dev);
}

View File

@@ -44,7 +44,7 @@ static mraa_result_t
mraa_gpio_get_valfp(mraa_gpio_context dev)
{
char bu[MAX_SIZE];
sprintf(bu, SYSFS_CLASS_GPIO "/gpio%d/value", dev->pin);
snprintf(bu, MAX_SIZE, SYSFS_CLASS_GPIO "/gpio%d/value", dev->pin);
dev->value_fp = open(bu, O_RDWR);
if (dev->value_fp == -1) {
syslog(LOG_ERR, "gpio%i: Failed to open 'value': %s", dev->pin, strerror(errno));

View File

@@ -167,7 +167,7 @@ mraa_i2c_init(int bus)
}
if (!board->no_bus_mux) {
int pos = board->i2c_bus[bus].sda;
if (board->pins[pos].i2c.mux_total > 0) {
if (pos >=0 && board->pins[pos].i2c.mux_total > 0) {
if (mraa_setup_mux_mapped(board->pins[pos].i2c) != MRAA_SUCCESS) {
syslog(LOG_ERR, "i2c%i_init: Failed to set-up i2c sda multiplexer", bus);
return NULL;
@@ -175,7 +175,7 @@ mraa_i2c_init(int bus)
}
pos = board->i2c_bus[bus].scl;
if (board->pins[pos].i2c.mux_total > 0) {
if (pos >=0 && board->pins[pos].i2c.mux_total > 0) {
if (mraa_setup_mux_mapped(board->pins[pos].i2c) != MRAA_SUCCESS) {
syslog(LOG_ERR, "i2c%i_init: Failed to set-up i2c scl multiplexer", bus);
return NULL;
@@ -441,6 +441,7 @@ mraa_i2c_stop(mraa_i2c_context dev)
return dev->advance_func->i2c_stop_replace(dev);
}
close(dev->fh);
free(dev);
return MRAA_SUCCESS;
}

View File

@@ -309,7 +309,7 @@ mraa_iio_wait_event(int fd, char* data, int* read_size)
// Wait for it forever or until pthread_cancel
// poll is a cancelable point like sleep()
int x = poll(&pfd, 1, -1);
poll(&pfd, 1, -1);
memset(data, 0, 100);
*read_size = read(fd, data, 100);
@@ -376,10 +376,7 @@ mraa_iio_get_event_data(mraa_iio_context dev)
char buf[MAX_SIZE];
char readbuf[32];
int fd;
int ret = 0;
int padint = 0;
int curr_bytes = 0;
char shortbuf, signchar;
memset(buf, 0, MAX_SIZE);
memset(readbuf, 0, 32);
snprintf(buf, MAX_SIZE, IIO_SYSFS_DEVICE "%d/" IIO_EVENTS, dev->num);
@@ -441,7 +438,7 @@ mraa_iio_event_poll_nonblock(int fd, struct iio_event_data* data)
// Wait for it forever or until pthread_cancel
// poll is a cancelable point like sleep()
int x = poll(&pfd, 1, -1);
poll(&pfd, 1, -1);
read(fd, data, sizeof(struct iio_event_data));
@@ -573,9 +570,7 @@ mraa_result_t
mraa_iio_create_trigger(mraa_iio_context dev, const char* trigger)
{
struct stat configfs_status;
struct stat trigger_status;
char buf[MAX_SIZE];
int ret;
if (stat(IIO_CONFIGFS_TRIGGER, &configfs_status) == 0) {
memset(buf, 0, MAX_SIZE);

38
src/java/pom.xml.in Normal file
View File

@@ -0,0 +1,38 @@
<?xml version="1.0" encoding="UTF-8"?>
<project xmlns="http://maven.apache.org/POM/4.0.0"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://maven.apache.org/POM/4.0.0 http://maven.apache.org/maven-v4_0_0.xsd">
<modelVersion>4.0.0</modelVersion>
<groupId>io.mraa</groupId>
<artifactId>mraa</artifactId>
<version>@VERSION_SHORT@</version>
<packaging>jar</packaging>
<name>mraa</name>
<description>Low Level Skeleton Library for IO Communication on GNU/Linux platforms</description>
<url>http://mraa.io</url>
<licenses>
<license>
<name>MIT License</name>
<url>https://github.com/intel-iot-devkit/mraa/blob/master/COPYING</url>
</license>
</licenses>
<developers>
<developer>
<name>Mraa contributors https://github.com/intel-iot-devkit/mraa/graphs/contributors</name>
<email>mraa@lists.01.org</email>
<organization>Intel IoT Developer kit</organization>
<organizationUrl>https://github.com/intel-iot-devkit</organizationUrl>
</developer>
</developers>
<scm>
<connection>scm:git:git://github.com/intel-iot-devkit/mraa.git</connection>
<developerConnection>scm:git:ssh://github.com:intel-iot-devkit/mraa.git</developerConnection>
<url>https://github.com/intel-iot-devkit/mraa/tree/master</url>
</scm>
</project>

View File

@@ -120,5 +120,5 @@ if (BUILDDOC)
endif ()
endif ()
install (FILES ${CMAKE_CURRENT_BINARY_DIR}/mraa.node
install (TARGETS ${SWIG_MODULE_mraajs_REAL_NAME}
DESTINATION ${NODE_MODULE_INSTALL_PATH})

View File

@@ -11,8 +11,8 @@
@mraa_LIB_INCLUDE_DIRS_GYP@
],
'variables': {
"v8_version%": "<!(node -e 'console.log(process.versions.v8)' | sed 's/\.//g' | cut -c 1-5)",
"arch%": "<!(node -e 'console.log(process.arch)')"
"v8_version%": "<!(`command -v nodejs 2> /dev/null || echo node` -e 'console.log(process.versions.v8)' | sed 's/\.//g' | cut -c 1-5)",
"arch%": "<!(`command -v nodejs 2> /dev/null || echo node` -e 'console.log(process.arch)')"
},
'cflags_cc!': [ '-fno-rtti', '-fno-exceptions' ],
'cflags!': [ '-fno-exceptions' ],

View File

@@ -80,9 +80,9 @@ mraa_init_json_platform_platform(json_object* jobj_platform, mraa_board_t* board
{
json_object* jobj_temp = NULL;
const char* temp_string = NULL;
int temp_count = 0;
int length = 0;
mraa_result_t ret = MRAA_SUCCESS;
int i;
// Set the platform name
if (json_object_object_get_ex(jobj_platform, NAME_KEY, &jobj_temp)) {
@@ -139,22 +139,27 @@ mraa_init_json_platform_platform(json_object* jobj_platform, mraa_board_t* board
// Check to see if they've provided a UART count
ret = mraa_init_json_platform_get_index(jobj_platform, PLATFORM_KEY, UART_COUNT_KEY, index,
&(board->uart_dev_count), 6);
&(board->uart_dev_count), MAX_UART_COUNT);
if (ret != MRAA_SUCCESS && ret != MRAA_ERROR_NO_DATA_AVAILABLE) {
return ret;
}
// Check to see if they've provided a I2C count
ret = mraa_init_json_platform_get_index(jobj_platform, PLATFORM_KEY, I2C_COUNT_KEY, index,
&(board->i2c_bus_count), 12);
&(board->i2c_bus_count), MAX_I2C_BUS_COUNT);
if (ret != MRAA_SUCCESS && ret != MRAA_ERROR_NO_DATA_AVAILABLE) {
return ret;
}
for (i = 0; i < board->i2c_bus_count; ++i)
board->i2c_bus[i].bus_id = -1;
// Check to see if they've provided a SPI count
ret = mraa_init_json_platform_get_index(jobj_platform, PLATFORM_KEY, SPI_COUNT_KEY, index,
&(board->spi_bus_count), 12);
&(board->spi_bus_count), MAX_SPI_BUS_COUNT);
if (ret != MRAA_SUCCESS && ret != MRAA_ERROR_NO_DATA_AVAILABLE) {
return ret;
}
for (i = 0; i < board->spi_bus_count; ++i)
board->spi_bus[i].bus_id = -1;
// Set the PWM default numbers
board->pwm_default_period = -1;
@@ -279,20 +284,22 @@ mraa_init_json_platform_i2c(json_object* jobj_i2c, mraa_board_t* board, int inde
{
int pos = 0;
int pin = 0;
int sysfs_pin = 0;
int bus = 0;
// int sysfs_pin = 0;
mraa_result_t ret = MRAA_SUCCESS;
json_object* jobj_temp = NULL;
// Default to no mux pins defined
board->pins[pin].i2c.mux_total = 0;
// Get the I2C bus array index
ret = mraa_init_json_platform_get_index(jobj_i2c, I2C_KEY, INDEX_KEY, index, &pos, board->i2c_bus_count - 1);
if (ret != MRAA_SUCCESS) {
return ret;
}
// Get the sysfs pin
ret = mraa_init_json_platform_get_pin(jobj_i2c, I2C_KEY, RAW_PIN_KEY, index, &sysfs_pin);
if (ret != MRAA_SUCCESS) {
return ret;
}
// Get the bus number (e.g. 2 for /dev/i2c-2). If it doesn't exist, default to bus = pos
bus = pos;
ret = mraa_init_json_platform_get_pin(jobj_i2c, I2C_KEY, BUS_KEY, index, &bus);
// Setup the sda pin
ret = mraa_init_json_platform_get_index(jobj_i2c, I2C_KEY, SDAPIN_KEY, index, &pin,
board->phy_pin_count - 1);
@@ -300,7 +307,6 @@ mraa_init_json_platform_i2c(json_object* jobj_i2c, mraa_board_t* board, int inde
board->i2c_bus[pos].sda = -1;
} else if (ret == MRAA_SUCCESS) {
board->pins[pin].capabilities.i2c = 1;
board->pins[pin].i2c.pinmap = sysfs_pin;
board->i2c_bus[pos].sda = pin;
} else {
return ret;
@@ -312,13 +318,12 @@ mraa_init_json_platform_i2c(json_object* jobj_i2c, mraa_board_t* board, int inde
board->i2c_bus[pos].scl = -1;
} else if (ret == MRAA_SUCCESS) {
board->pins[pin].capabilities.i2c = 1;
board->pins[pin].i2c.pinmap = sysfs_pin;
board->i2c_bus[pos].scl = pin;
} else {
return ret;
}
board->i2c_bus[pos].bus_id = pos;
board->i2c_bus[pos].bus_id = bus;
// check to see if this i2c is the default one
if (json_object_object_get_ex(jobj_i2c, DEFAULT_KEY, &jobj_temp)) {
@@ -367,8 +372,9 @@ mraa_result_t
mraa_init_json_platform_spi(json_object* jobj_spi, mraa_board_t* board, int index)
{
int pos = 0;
int bus = 0;
int ss = 0;
int pin = 0;
int parent_id = 0;
json_object* jobj_temp = NULL;
mraa_result_t ret = MRAA_SUCCESS;
@@ -378,19 +384,27 @@ mraa_init_json_platform_spi(json_object* jobj_spi, mraa_board_t* board, int inde
return ret;
}
// Get the parent id
ret = mraa_init_json_platform_get_pin(jobj_spi, SPI_KEY, CHIP_ID_KEY, index, &parent_id);
// Get the bus
ret = mraa_init_json_platform_get_pin(jobj_spi, SPI_KEY, BUS_KEY, index, &bus);
if (ret != MRAA_SUCCESS) {
return ret;
}
// Get slave select
ret = mraa_init_json_platform_get_pin(jobj_spi, SPI_KEY, SS_KEY, index, &ss);
if (ret != MRAA_SUCCESS) {
return ret;
}
board->spi_bus[pos].bus_id = bus;
board->spi_bus[pos].slave_s = ss;
// Setup the clock pin
ret = mraa_init_json_platform_get_index(jobj_spi, SPI_KEY, CLOCK_KEY, index, &pin, board->phy_pin_count - 1);
if (ret == MRAA_ERROR_NO_DATA_AVAILABLE) {
board->spi_bus[pos].sclk = -1;
} else if (ret == MRAA_SUCCESS) {
board->pins[pin].capabilities.spi = 1;
board->pins[pin].spi.parent_id = parent_id;
board->spi_bus[pos].sclk = pin;
} else {
return ret;
@@ -401,7 +415,6 @@ mraa_init_json_platform_spi(json_object* jobj_spi, mraa_board_t* board, int inde
board->spi_bus[pos].miso = -1;
} else if (ret == MRAA_SUCCESS) {
board->pins[pin].capabilities.spi = 1;
board->pins[pin].spi.parent_id = parent_id;
board->spi_bus[pos].miso = pin;
} else {
return ret;
@@ -412,7 +425,6 @@ mraa_init_json_platform_spi(json_object* jobj_spi, mraa_board_t* board, int inde
board->spi_bus[pos].mosi = -1;
} else if (ret == MRAA_SUCCESS) {
board->pins[pin].capabilities.spi = 1;
board->pins[pin].spi.parent_id = parent_id;
board->spi_bus[pos].mosi = pin;
} else {
return ret;
@@ -423,7 +435,6 @@ mraa_init_json_platform_spi(json_object* jobj_spi, mraa_board_t* board, int inde
board->spi_bus[pos].cs = -1;
} else if (ret == MRAA_SUCCESS) {
board->pins[pin].capabilities.spi = 1;
board->pins[pin].spi.parent_id = parent_id;
board->spi_bus[pos].cs = pin;
} else {
return ret;
@@ -600,8 +611,8 @@ mraa_init_json_platform(const char* platform_json)
mraa_result_t ret = MRAA_SUCCESS;
char* buffer = NULL;
struct stat st;
int file_lock = 0, array_length = 0, i = 0;
json_object *jobj_platform = NULL, *jobj_temp = NULL;
int file_lock = 0, i = 0;
json_object *jobj_platform = NULL;
mraa_board_t* board = NULL;
// Try to lock the file for use

View File

@@ -30,8 +30,11 @@
#include "mock/mock_board_gpio.h"
#include "mock/mock_board_aio.h"
#include "mock/mock_board_i2c.h"
#include "mock/mock_board_spi.h"
#include "mock/mock_board_uart.h"
#define PLATFORM_NAME "MRAA mock platform"
#define UART_DEV_PATH "dummy"
mraa_board_t*
mraa_mock_board()
@@ -55,12 +58,25 @@ mraa_mock_board()
b->i2c_bus[0].scl = 3;
b->def_i2c_bus = b->i2c_bus[0].bus_id;
b->spi_bus_count = 0;
b->spi_bus_count = 1;
b->def_spi_bus = 0;
b->spi_bus[0].bus_id = 0;
b->spi_bus[0].slave_s = 0;
b->spi_bus[0].cs = 4;
b->spi_bus[0].mosi = 5;
b->spi_bus[0].miso = 6;
b->spi_bus[0].sclk = 7;
b->pwm_default_period = 0;
b->pwm_max_period = 0;
b->pwm_min_period = 0;
b->uart_dev_count = 1;
b->def_uart_dev = 0;
b->uart_dev[0].rx = 8;
b->uart_dev[0].tx = 9;
b->uart_dev[0].device_path = UART_DEV_PATH;
b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * MRAA_MOCK_PINCOUNT);
if (b->pins == NULL) {
goto error;
@@ -99,6 +115,26 @@ mraa_mock_board()
b->adv_func->i2c_write_byte_replace = &mraa_mock_i2c_write_byte_replace;
b->adv_func->i2c_write_byte_data_replace = &mraa_mock_i2c_write_byte_data_replace;
b->adv_func->i2c_write_word_data_replace = &mraa_mock_i2c_write_word_data_replace;
b->adv_func->spi_init_raw_replace = &mraa_mock_spi_init_raw_replace;
b->adv_func->spi_stop_replace = &mraa_mock_spi_stop_replace;
b->adv_func->spi_bit_per_word_replace = &mraa_mock_spi_bit_per_word_replace;
b->adv_func->spi_lsbmode_replace = &mraa_mock_spi_lsbmode_replace;
b->adv_func->spi_mode_replace = &mraa_mock_spi_mode_replace;
b->adv_func->spi_frequency_replace = &mraa_mock_spi_frequency_replace;
b->adv_func->spi_write_replace = &mraa_mock_spi_write_replace;
b->adv_func->spi_write_word_replace = &mraa_mock_spi_write_word_replace;
b->adv_func->spi_transfer_buf_replace = &mraa_mock_spi_transfer_buf_replace;
b->adv_func->spi_transfer_buf_word_replace = &mraa_mock_spi_transfer_buf_word_replace;
b->adv_func->uart_init_raw_replace = &mraa_mock_uart_init_raw_replace;
b->adv_func->uart_set_baudrate_replace = &mraa_mock_uart_set_baudrate_replace;
b->adv_func->uart_flush_replace = &mraa_mock_uart_flush_replace;
b->adv_func->uart_set_flowcontrol_replace = &mraa_mock_uart_set_flowcontrol_replace;
b->adv_func->uart_set_mode_replace = &mraa_mock_uart_set_mode_replace;
b->adv_func->uart_set_non_blocking_replace = &mraa_mock_uart_set_non_blocking_replace;
b->adv_func->uart_set_timeout_replace = &mraa_mock_uart_set_timeout_replace;
b->adv_func->uart_data_available_replace = &mraa_mock_uart_data_available_replace;
b->adv_func->uart_write_replace = &mraa_mock_uart_write_replace;
b->adv_func->uart_read_replace = &mraa_mock_uart_read_replace;
// Pin definitions
int pos = 0;
@@ -127,6 +163,44 @@ mraa_mock_board()
b->pins[pos].i2c.pinmap = 0;
pos++;
strncpy(b->pins[pos].name, "SPI0CS", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 };
b->pins[pos].spi.mux_total = 0;
b->pins[pos].spi.pinmap = 0;
pos++;
strncpy(b->pins[pos].name, "SPI0MOSI", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 };
b->pins[pos].spi.mux_total = 0;
b->pins[pos].spi.pinmap = 0;
pos++;
strncpy(b->pins[pos].name, "SPI0MISO", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 };
b->pins[pos].spi.mux_total = 0;
b->pins[pos].spi.pinmap = 0;
pos++;
strncpy(b->pins[pos].name, "SPI0SCLK", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 };
b->pins[pos].spi.mux_total = 0;
b->pins[pos].spi.pinmap = 0;
pos++;
strncpy(b->pins[pos].name, "UART0RX", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 };
b->pins[pos].uart.pinmap = 0;
b->pins[pos].uart.parent_id = 0;
b->pins[pos].uart.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "UART0TX", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 };
b->pins[pos].uart.pinmap = 0;
b->pins[pos].uart.parent_id = 0;
b->pins[pos].uart.mux_total = 0;
pos++;
return b;
error:

View File

@@ -26,9 +26,6 @@
#include <string.h>
#include "common.h"
#include "mock/mock_board.h"
#include "mock/mock_board_gpio.h"
#include "mock/mock_board_aio.h"
#include "mock/mock_board_i2c.h"
mraa_result_t

179
src/mock/mock_board_spi.c Normal file
View File

@@ -0,0 +1,179 @@
/*
* Author: Alex Tereschenko <alext.mkrs@gmail.com>
* Copyright (c) 2016 Alex Tereschenko.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include <stdlib.h>
#include <string.h>
#if defined(MSYS)
#define __USE_LINUX_IOCTL_DEFS
#endif
#include <sys/ioctl.h>
#if defined(MSYS)
// There's no spidev.h on MSYS, so we need to provide our own,
// and only *after* including ioctl.h as that one contains prerequisites.
#include "linux/spi_kernel_headers.h"
#else
#include <linux/spi/spidev.h>
#endif
#include "common.h"
#include "mock/mock_board_spi.h"
mraa_result_t
mraa_mock_spi_init_raw_replace(mraa_spi_context dev, unsigned int bus, unsigned int cs)
{
dev->clock = MOCK_SPI_DEFAULT_FREQ;
if ((mraa_spi_mode(dev, MOCK_SPI_DEFAULT_MODE) != MRAA_SUCCESS) ||
(mraa_spi_lsbmode(dev, MOCK_SPI_DEFAULT_LSBMODE) != MRAA_SUCCESS) ||
(mraa_spi_bit_per_word(dev, MOCK_SPI_DEFAULT_BIT_PER_WORD) != MRAA_SUCCESS)) {
return MRAA_ERROR_INVALID_RESOURCE;
}
return MRAA_SUCCESS;
}
mraa_result_t
mraa_mock_spi_stop_replace(mraa_spi_context dev)
{
free(dev);
return MRAA_SUCCESS;
}
mraa_result_t
mraa_mock_spi_bit_per_word_replace(mraa_spi_context dev, unsigned int bits)
{
if (bits == 0) {
syslog(LOG_ERR, "spi: bit_per_word: Cannot set to zero");
return MRAA_ERROR_INVALID_PARAMETER;
}
dev->bpw = bits;
return MRAA_SUCCESS;
}
mraa_result_t
mraa_mock_spi_lsbmode_replace(mraa_spi_context dev, mraa_boolean_t lsb)
{
dev->lsb = lsb;
return MRAA_SUCCESS;
}
mraa_result_t
mraa_mock_spi_mode_replace(mraa_spi_context dev, mraa_spi_mode_t mode)
{
uint8_t spi_mode = 0;
switch (mode) {
case MRAA_SPI_MODE0:
spi_mode = SPI_MODE_0;
break;
case MRAA_SPI_MODE1:
spi_mode = SPI_MODE_1;
break;
case MRAA_SPI_MODE2:
spi_mode = SPI_MODE_2;
break;
case MRAA_SPI_MODE3:
spi_mode = SPI_MODE_3;
break;
default:
syslog(LOG_ERR, "spi: mode: Invalid SPI mode %d selected", mode);
return MRAA_ERROR_INVALID_PARAMETER;
}
dev->mode = spi_mode;
return MRAA_SUCCESS;
}
mraa_result_t
mraa_mock_spi_frequency_replace(mraa_spi_context dev, int hz)
{
if (hz <= 0) {
syslog(LOG_ERR, "spi: frequency: Cannot set to zero or negative");
return MRAA_ERROR_INVALID_PARAMETER;
}
dev->clock = hz;
return MRAA_SUCCESS;
}
int
mraa_mock_spi_write_replace(mraa_spi_context dev, uint8_t data)
{
return (int) (data ^ MOCK_SPI_REPLY_DATA_MODIFIER_BYTE);
}
int
mraa_mock_spi_write_word_replace(mraa_spi_context dev, uint16_t data)
{
return (int) (data ^ MOCK_SPI_REPLY_DATA_MODIFIER_WORD);
}
mraa_result_t
mraa_mock_spi_transfer_buf_replace(mraa_spi_context dev, uint8_t* data, uint8_t* rxbuf, int length)
{
if (data == NULL) {
syslog(LOG_ERR, "spi: transfer_buf: Incoming data is null, cannot proceed");
return MRAA_ERROR_INVALID_PARAMETER;
}
if (length <= 0) {
syslog(LOG_ERR, "spi: transfer_buf: Length given is equal to or less than zero, cannot proceed");
return MRAA_ERROR_INVALID_PARAMETER;
}
if (rxbuf != NULL) {
int i;
for (i = 0; i < length; ++i) {
rxbuf[i] = data[i] ^ MOCK_SPI_REPLY_DATA_MODIFIER_BYTE;
}
}
return MRAA_SUCCESS;
}
mraa_result_t
mraa_mock_spi_transfer_buf_word_replace(mraa_spi_context dev, uint16_t* data, uint16_t* rxbuf, int length)
{
if (data == NULL) {
syslog(LOG_ERR, "spi: transfer_buf_word: Incoming data is null, cannot proceed");
return MRAA_ERROR_INVALID_PARAMETER;
}
if (length <= 0) {
syslog(LOG_ERR, "spi: transfer_buf_word: Length given is equal to or less than zero, cannot proceed");
return MRAA_ERROR_INVALID_PARAMETER;
}
if (rxbuf != NULL) {
// length is given in bytes, but arrays are comprised of words
int i;
for (i = 0; i < (length / 2); ++i) {
rxbuf[i] = data[i] ^ MOCK_SPI_REPLY_DATA_MODIFIER_WORD;
}
}
return MRAA_SUCCESS;
}

100
src/mock/mock_board_uart.c Normal file
View File

@@ -0,0 +1,100 @@
/*
* Author: Alex Tereschenko <alext.mkrs@gmail.com>
* Copyright (c) 2016 Alex Tereschenko.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include <stdlib.h>
#include <string.h>
#include "common.h"
#include "mock/mock_board_uart.h"
mraa_result_t
mraa_mock_uart_set_baudrate_replace(mraa_uart_context dev, unsigned int baud)
{
// Limits are taken from uart.c::uint2speed(), they don't matter much anyway
if ((baud < 0) || (baud > 4000000)) {
syslog(LOG_ERR, "uart%i: set_baudrate: invalid baudrate: %i", dev->index, baud);
return MRAA_ERROR_INVALID_PARAMETER;
}
return MRAA_SUCCESS;
}
mraa_result_t
mraa_mock_uart_init_raw_replace(mraa_uart_context dev, const char* path)
{
// The only thing we have to do from the original uart_init_raw()
return mraa_uart_set_baudrate(dev, 9600);
}
mraa_result_t
mraa_mock_uart_flush_replace(mraa_uart_context dev)
{
return MRAA_SUCCESS;
}
mraa_result_t
mraa_mock_uart_set_flowcontrol_replace(mraa_uart_context dev, mraa_boolean_t xonxoff, mraa_boolean_t rtscts)
{
return MRAA_SUCCESS;
}
mraa_result_t
mraa_mock_uart_set_mode_replace(mraa_uart_context dev, int bytesize, mraa_uart_parity_t parity, int stopbits)
{
return MRAA_SUCCESS;
}
mraa_result_t
mraa_mock_uart_set_non_blocking_replace(mraa_uart_context dev, mraa_boolean_t nonblock)
{
return MRAA_SUCCESS;
}
mraa_result_t
mraa_mock_uart_set_timeout_replace(mraa_uart_context dev, int read, int write, int interchar)
{
return MRAA_SUCCESS;
}
mraa_boolean_t
mraa_mock_uart_data_available_replace(mraa_uart_context dev, unsigned int millis)
{
// Our mock implementation will always have "incoming" data
return 1;
}
int
mraa_mock_uart_write_replace(mraa_uart_context dev, const char* buf, size_t len)
{
// Our mock implementation always succeeds when sending data
return len;
}
int
mraa_mock_uart_read_replace(mraa_uart_context dev, char* buf, size_t len)
{
// We'll return MOCK_UART_DATA_BYTE, len times
memset(buf, MOCK_UART_DATA_BYTE, len);
return len;
}

View File

@@ -69,7 +69,6 @@ mraa_iio_info_t* plat_iio = NULL;
mraa_lang_func_t* lang_func = NULL;
char* platform_name = NULL;
static char* platform_long_name = NULL;
static int num_i2c_devices = 0;
static int num_iio_devices = 0;
@@ -929,6 +928,63 @@ mraa_count_i2c_files(const char* path, const struct stat* sb, int flag, struct F
return 0;
}
int
mraa_find_i2c_bus_pci(const char* pci_device, const char *pci_id, const char* adapter_name)
{
/**
* For example we'd get something like:
* pci0000:00/0000:00:16.3/i2c_desiignware.3
*/
char path[1024];
snprintf(path, 1024-1, "/sys/devices/pci%s/%s/%s/", pci_device, pci_id, adapter_name);
if (mraa_file_exist(path)) {
struct dirent **namelist;
int n;
n = scandir(path, &namelist, NULL, alphasort);
if (n < 0) {
syslog(LOG_ERR, "Failed to get information on i2c");
return -1;
}
else {
while (n--) {
char* dup = strdup(namelist[n]->d_name);
if (dup == NULL) {
syslog(LOG_ERR, "Ran out of memory!");
break;
}
const char delim = '-';
char* token;
token = strsep(&dup, &delim);
if (token != NULL) {
if (strncmp("i2c", token, 3) == 0) {
token = strsep(&dup, &delim);
if (token != NULL) {
int ret = -1;
if (mraa_atoi(token, &ret) == MRAA_SUCCESS) {
free(dup);
free(namelist[n]);
free(namelist);
syslog(LOG_NOTICE, "Adding i2c bus found on i2c-%d on adapter %s", ret, adapter_name);
return ret;
}
free(dup);
free(namelist[n]);
free(namelist);
return -1;
}
}
free(token);
} else {
free(dup);
}
free(namelist[n]);
}
free(namelist);
}
}
return -1;
}
int
mraa_find_i2c_bus(const char* devname, int startfrom)
{
@@ -953,7 +1009,7 @@ mraa_find_i2c_bus(const char* devname, int startfrom)
// i2c devices are numbered numerically so 0 must exist otherwise there is
// no i2c-dev loaded
if (mraa_file_exist("/sys/class/i2c-dev/i2c-0")) {
for (i; i < num_i2c_devices; i++) {
for (;i < num_i2c_devices; i++) {
off_t size, err;
snprintf(path, 64, "/sys/class/i2c-dev/i2c-%u/name", i);
fd = open(path, O_RDONLY);
@@ -1028,13 +1084,21 @@ mraa_add_subplatform(mraa_platform_t subplatformtype, const char* uart_dev)
#if defined(FIRMATA)
if (subplatformtype == MRAA_GENERIC_FIRMATA) {
if (plat->sub_platform != NULL) {
return MRAA_ERROR_INVALID_PARAMETER;
if (plat->sub_platform->platform_type == subplatformtype) {
syslog(LOG_NOTICE, "mraa: Firmata subplatform already present");
return MRAA_SUCCESS;
}
syslog(LOG_NOTICE, "mraa: We don't support multiple firmata subplatforms!");
return MRAA_ERROR_FEATURE_NOT_SUPPORTED;
}
if (mraa_firmata_platform(plat, uart_dev) == MRAA_GENERIC_FIRMATA) {
syslog(LOG_NOTICE, "mraa: Added firmata subplatform");
return MRAA_SUCCESS;
}
syslog(LOG_NOTICE, "mraa: Failed to add firmata subplatform");
}
#else
if (subplatformtype == MRAA_GENERIC_FIRMATA) {
syslog(LOG_NOTICE, "mraa: Cannot add Firmata platform as support not compiled in");
}
#endif
@@ -1052,6 +1116,7 @@ mraa_remove_subplatform(mraa_platform_t subplatformtype)
free(plat->sub_platform->adv_func);
free(plat->sub_platform->pins);
free(plat->sub_platform);
return MRAA_SUCCESS;
}
#endif
return MRAA_ERROR_INVALID_PARAMETER;
@@ -1062,9 +1127,7 @@ mraa_result_t
mraa_add_from_lockfile(const char* imraa_lock_file)
{
mraa_result_t ret = MRAA_SUCCESS;
mraa_platform_t type = plat->platform_type;
char* buffer = NULL;
off_t file_size;
struct stat st;
int i = 0;
uint32_t subplat_num = 0;
@@ -1095,7 +1158,9 @@ mraa_add_from_lockfile(const char* imraa_lock_file)
struct json_object *ioobj = json_object_array_get_idx(ioarray, i);
json_object_object_foreach(ioobj, key, val) {
if (strcmp(key, "id") == 0) {
id = atoi(json_object_get_string(val));
if (mraa_atoi(json_object_get_string(val), &id) != MRAA_SUCCESS) {
id = -1;
}
} else if (strcmp(key, "uart") == 0) {
uartdev = json_object_get_string(val);
}
@@ -1110,7 +1175,15 @@ mraa_add_from_lockfile(const char* imraa_lock_file)
uartdev = NULL;
}
}
} else {
if (json_object_object_get_ex(jobj_lock, "IO", &ioarray) == true &&
json_object_is_type(ioarray, json_type_array)) {
/* assume we have declared IO so we are preinitialised and wipe the
* advance func array
*/
memset(plat->adv_func, 0, sizeof(mraa_adv_func_t));
}
}
else {
ret = MRAA_ERROR_INVALID_RESOURCE;
}
json_object_put(jobj_lock);
@@ -1210,7 +1283,7 @@ mraa_init_io(const char* desc)
return NULL;
}
if (strncmp(type, "GPIO", 4) == 0) {
if (strncmp(type, GPIO_KEY, strlen(GPIO_KEY)) == 0) {
if (raw) {
if (mraa_init_io_helper(&str, &pin, delim) == MRAA_SUCCESS) {
return (void*) mraa_gpio_init_raw(pin);
@@ -1219,7 +1292,7 @@ mraa_init_io(const char* desc)
return NULL;
}
return (void*) mraa_gpio_init(pin);
} else if (strncmp(type, "I2C", 3) == 0) {
} else if (strncmp(type, I2C_KEY, strlen(I2C_KEY)) == 0) {
if (raw) {
if (mraa_init_io_helper(&str, &pin, delim) == MRAA_SUCCESS) {
return (void*) mraa_i2c_init_raw(pin);
@@ -1228,13 +1301,13 @@ mraa_init_io(const char* desc)
return NULL;
}
return (void*) mraa_i2c_init(pin);
} else if (strncmp(type, "AIO", 3) == 0) {
} else if (strncmp(type, AIO_KEY, strlen(AIO_KEY)) == 0) {
if (raw) {
syslog(LOG_ERR, "mraa_init_io: Aio doesn't have a RAW mode");
return NULL;
}
return (void*) mraa_aio_init(pin);
} else if (strncmp(type, "PWM", 3) == 0) {
} else if (strncmp(type, PWM_KEY, strlen(PWM_KEY)) == 0) {
if (raw) {
if (mraa_init_io_helper(&str, &id, delim) != MRAA_SUCCESS) {
syslog(LOG_ERR, "mraa_init_io: Pwm, unable to convert the chip id string into a useable Int");
@@ -1247,7 +1320,7 @@ mraa_init_io(const char* desc)
return (void*) mraa_pwm_init_raw(id, pin);
}
return (void*) mraa_pwm_init(pin);
} else if (strncmp(type, "SPI", 3) == 0) {
} else if (strncmp(type, SPI_KEY, strlen(SPI_KEY)) == 0) {
if (raw) {
if (mraa_init_io_helper(&str, &id, delim) != MRAA_SUCCESS) {
syslog(LOG_ERR, "mraa_init_io: Spi, unable to convert the bus string into a useable Int");
@@ -1260,7 +1333,7 @@ mraa_init_io(const char* desc)
return (void*) mraa_spi_init_raw(id, pin);
}
return (void*) mraa_spi_init(pin);
} else if (strncmp(type, "UART", 4) == 0) {
} else if (strncmp(type, UART_KEY, strlen(UART_KEY)) == 0) {
if (raw) {
return (void*) mraa_uart_init_raw(str);
}

View File

@@ -6,7 +6,7 @@
#ifdef DOXYGEN
//and doesn't seem to work correctly in SWIG's preprocessor
#ifdef SWIGPYTHON
#ifdef SWIGPYTHON2
%include common_hpp_doc.i
%include gpio_class_doc.i
%include i2c_class_doc.i

View File

@@ -18,22 +18,20 @@ if (PYTHON2_LIBRARY)
add_dependencies (${SWIG_MODULE_python2-mraa_REAL_NAME} ${_file}class_doc_i)
endforeach ()
add_dependencies (${SWIG_MODULE_python2-mraa_REAL_NAME} common_hpp_doc_i)
add_custom_target (pydoc
pydoc -w ${CMAKE_CURRENT_BINARY_DIR}/mraa.py ${CMAKE_CURRENT_BINARY_DIR}/
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
COMMENT "Generating API documentation with pydoc" VERBATIM
)
endif ()
set_target_properties (${SWIG_MODULE_python2-mraa_REAL_NAME} PROPERTIES
OUTPUT_NAME _mraa
COMPILE_FLAGS "${CMAKE_C_FLAGS} -DSWIGPYTHON=${SWIG_FOUND}"
COMPILE_FLAGS "${CMAKE_C_FLAGS} -DSWIGPYTHON=${SWIG_FOUND} -DSWIGPYTHON2=${SWIG_FOUND}"
)
install (FILES ${CMAKE_CURRENT_BINARY_DIR}/_mraa${CMAKE_SHARED_LIBRARY_SUFFIX}
${CMAKE_CURRENT_BINARY_DIR}/mraa.py
DESTINATION ${CMAKE_INSTALL_PREFIX}/${PYTHON2_PACKAGES_PATH})
install (TARGETS ${SWIG_MODULE_python2-mraa_REAL_NAME}
DESTINATION ${CMAKE_INSTALL_PREFIX}/${PYTHON2_PACKAGES_PATH}
)
install (FILES ${CMAKE_CURRENT_BINARY_DIR}/mraa.py
DESTINATION ${CMAKE_INSTALL_PREFIX}/${PYTHON2_PACKAGES_PATH}
)
endif()
add_subdirectory (docs)

View File

@@ -27,6 +27,7 @@ Supported Platforms
* `Raspberry Pi <../rasppi.html>`_
* `Banana Pi/Pro <../bananapi.html>`_
* `Beaglebone Black <../beaglebone.html>`_
* `phyBOARD-Wega <../phyboard-wega.html>`_
* `Intel NUC NUC5i5MYBE <../nuc5.html>`_
* `UP <../up.html>`_
* `FTDI FT4222H <../ft4222.html>`_

View File

@@ -15,10 +15,14 @@ if (PYTHON3_LIBRARY)
set_target_properties (${SWIG_MODULE_python3-mraa_REAL_NAME} PROPERTIES
OUTPUT_NAME _mraa
COMPILE_FLAGS "${CMAKE_C_FLAGS} -DSWIGPYTHON=${SWIG_FOUND}"
COMPILE_FLAGS "${CMAKE_C_FLAGS} -DSWIGPYTHON=${SWIG_FOUND} -DDSWIGPYTHON3=${SWIG_FOUND}"
)
install (FILES ${CMAKE_CURRENT_BINARY_DIR}/_mraa${CMAKE_SHARED_LIBRARY_SUFFIX}
${CMAKE_CURRENT_BINARY_DIR}/mraa.py
DESTINATION ${CMAKE_INSTALL_PREFIX}/${PYTHON3_PACKAGES_PATH})
install (TARGETS ${SWIG_MODULE_python3-mraa_REAL_NAME}
DESTINATION ${CMAKE_INSTALL_PREFIX}/${PYTHON3_PACKAGES_PATH}
)
install (FILES ${CMAKE_CURRENT_BINARY_DIR}/mraa.py
DESTINATION ${CMAKE_INSTALL_PREFIX}/${PYTHON3_PACKAGES_PATH}
)
endif ()

View File

@@ -39,6 +39,7 @@
#include <stdio.h>
#include <fcntl.h>
#include <unistd.h>
#include <errno.h>
#include "spi.h"
#include "mraa_internal.h"
@@ -88,7 +89,7 @@ mraa_spi_init(int bus)
if (!plat->no_bus_mux) {
int pos = plat->spi_bus[bus].sclk;
if (plat->pins[pos].spi.mux_total > 0) {
if (pos >= 0 && plat->pins[pos].spi.mux_total > 0) {
if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) {
syslog(LOG_ERR, "spi: failed to set-up spi sclk multiplexer");
return NULL;
@@ -96,7 +97,7 @@ mraa_spi_init(int bus)
}
pos = plat->spi_bus[bus].mosi;
if (plat->pins[pos].spi.mux_total > 0) {
if (pos >= 0 && plat->pins[pos].spi.mux_total > 0) {
if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) {
syslog(LOG_ERR, "spi: failed to set-up spi mosi multiplexer");
return NULL;
@@ -104,7 +105,7 @@ mraa_spi_init(int bus)
}
pos = plat->spi_bus[bus].miso;
if (plat->pins[pos].spi.mux_total > 0) {
if (pos >= 0 && plat->pins[pos].spi.mux_total > 0) {
if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) {
syslog(LOG_ERR, "spi: failed to set-up spi miso multiplexer");
return NULL;
@@ -112,7 +113,7 @@ mraa_spi_init(int bus)
}
pos = plat->spi_bus[bus].cs;
if (plat->pins[pos].spi.mux_total > 0) {
if (pos >= 0 && plat->pins[pos].spi.mux_total > 0) {
if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) {
syslog(LOG_ERR, "spi: failed to set-up spi cs multiplexer");
return NULL;
@@ -135,10 +136,22 @@ mraa_spi_init(int bus)
mraa_spi_context
mraa_spi_init_raw(unsigned int bus, unsigned int cs)
{
mraa_result_t status = MRAA_SUCCESS;
mraa_spi_context dev = mraa_spi_init_internal(plat == NULL ? NULL : plat->adv_func);
if (dev == NULL) {
syslog(LOG_CRIT, "spi: Failed to allocate memory for context");
return NULL;
status = MRAA_ERROR_NO_RESOURCES;
goto init_raw_cleanup;
}
if (IS_FUNC_DEFINED(dev, spi_init_raw_replace)) {
status = dev->advance_func->spi_init_raw_replace(dev, bus, cs);
if (status == MRAA_SUCCESS) {
return dev;
} else {
goto init_raw_cleanup;
}
}
char path[MAX_SIZE];
@@ -146,9 +159,9 @@ mraa_spi_init_raw(unsigned int bus, unsigned int cs)
dev->devfd = open(path, O_RDWR);
if (dev->devfd < 0) {
syslog(LOG_ERR, "spi: Failed opening SPI Device. bus:%s", path);
free(dev);
return NULL;
syslog(LOG_ERR, "spi: Failed opening SPI Device. bus:%s. Error %d %s", path, errno, strerror(errno));
status = MRAA_ERROR_INVALID_RESOURCE;
goto init_raw_cleanup;
}
int speed = 0;
@@ -160,18 +173,26 @@ mraa_spi_init_raw(unsigned int bus, unsigned int cs)
syslog(LOG_WARNING, "spi: Max speed query failed, setting %d", dev->clock);
}
if (mraa_spi_mode(dev, MRAA_SPI_MODE0) != MRAA_SUCCESS) {
free(dev);
return NULL;
status = mraa_spi_mode(dev, MRAA_SPI_MODE0);
if (status != MRAA_SUCCESS) {
goto init_raw_cleanup;
}
if (mraa_spi_lsbmode(dev, 0) != MRAA_SUCCESS) {
free(dev);
return NULL;
status = mraa_spi_lsbmode(dev, 0);
if (status != MRAA_SUCCESS) {
goto init_raw_cleanup;
}
if (mraa_spi_bit_per_word(dev, 8) != MRAA_SUCCESS) {
free(dev);
status = mraa_spi_bit_per_word(dev, 8);
if (status != MRAA_SUCCESS) {
goto init_raw_cleanup;
}
init_raw_cleanup:
if (status != MRAA_SUCCESS) {
if (dev != NULL) {
free(dev);
}
return NULL;
}
@@ -181,6 +202,15 @@ mraa_spi_init_raw(unsigned int bus, unsigned int cs)
mraa_result_t
mraa_spi_mode(mraa_spi_context dev, mraa_spi_mode_t mode)
{
if (dev == NULL) {
syslog(LOG_ERR, "spi: mode: context is invalid");
return MRAA_ERROR_INVALID_HANDLE;
}
if (IS_FUNC_DEFINED(dev, spi_mode_replace)) {
return dev->advance_func->spi_mode_replace(dev, mode);
}
uint8_t spi_mode = 0;
switch (mode) {
case MRAA_SPI_MODE0:
@@ -212,6 +242,15 @@ mraa_spi_mode(mraa_spi_context dev, mraa_spi_mode_t mode)
mraa_result_t
mraa_spi_frequency(mraa_spi_context dev, int hz)
{
if (dev == NULL) {
syslog(LOG_ERR, "spi: frequency: context is invalid");
return MRAA_ERROR_INVALID_HANDLE;
}
if (IS_FUNC_DEFINED(dev, spi_frequency_replace)) {
return dev->advance_func->spi_frequency_replace(dev, hz);
}
int speed = 0;
dev->clock = hz;
if (ioctl(dev->devfd, SPI_IOC_RD_MAX_SPEED_HZ, &speed) != -1) {
@@ -226,6 +265,11 @@ mraa_spi_frequency(mraa_spi_context dev, int hz)
mraa_result_t
mraa_spi_lsbmode(mraa_spi_context dev, mraa_boolean_t lsb)
{
if (dev == NULL) {
syslog(LOG_ERR, "spi: lsbmode: context is invalid");
return MRAA_ERROR_INVALID_HANDLE;
}
if (IS_FUNC_DEFINED(dev, spi_lsbmode_replace)) {
return dev->advance_func->spi_lsbmode_replace(dev, lsb);
}
@@ -246,6 +290,15 @@ mraa_spi_lsbmode(mraa_spi_context dev, mraa_boolean_t lsb)
mraa_result_t
mraa_spi_bit_per_word(mraa_spi_context dev, unsigned int bits)
{
if (dev == NULL) {
syslog(LOG_ERR, "spi: bit_per_word: context is invalid");
return MRAA_ERROR_INVALID_HANDLE;
}
if (IS_FUNC_DEFINED(dev, spi_bit_per_word_replace)) {
return dev->advance_func->spi_bit_per_word_replace(dev, bits);
}
if (ioctl(dev->devfd, SPI_IOC_WR_BITS_PER_WORD, &bits) < 0) {
syslog(LOG_ERR, "spi: Failed to set bit per word");
return MRAA_ERROR_INVALID_RESOURCE;
@@ -257,6 +310,15 @@ mraa_spi_bit_per_word(mraa_spi_context dev, unsigned int bits)
int
mraa_spi_write(mraa_spi_context dev, uint8_t data)
{
if (dev == NULL) {
syslog(LOG_ERR, "spi: write: context is invalid");
return -1;
}
if (IS_FUNC_DEFINED(dev, spi_write_replace)) {
return dev->advance_func->spi_write_replace(dev, data);
}
struct spi_ioc_transfer msg;
memset(&msg, 0, sizeof(msg));
@@ -279,6 +341,15 @@ mraa_spi_write(mraa_spi_context dev, uint8_t data)
int
mraa_spi_write_word(mraa_spi_context dev, uint16_t data)
{
if (dev == NULL) {
syslog(LOG_ERR, "spi: write_word: context is invalid");
return -1;
}
if (IS_FUNC_DEFINED(dev, spi_write_word_replace)) {
return dev->advance_func->spi_write_word_replace(dev, data);
}
struct spi_ioc_transfer msg;
memset(&msg, 0, sizeof(msg));
@@ -301,6 +372,15 @@ mraa_spi_write_word(mraa_spi_context dev, uint16_t data)
mraa_result_t
mraa_spi_transfer_buf(mraa_spi_context dev, uint8_t* data, uint8_t* rxbuf, int length)
{
if (dev == NULL) {
syslog(LOG_ERR, "spi: transfer_buf: context is invalid");
return MRAA_ERROR_INVALID_HANDLE;
}
if (IS_FUNC_DEFINED(dev, spi_transfer_buf_replace)) {
return dev->advance_func->spi_transfer_buf_replace(dev, data, rxbuf, length);
}
struct spi_ioc_transfer msg;
memset(&msg, 0, sizeof(msg));
@@ -320,6 +400,15 @@ mraa_spi_transfer_buf(mraa_spi_context dev, uint8_t* data, uint8_t* rxbuf, int l
mraa_result_t
mraa_spi_transfer_buf_word(mraa_spi_context dev, uint16_t* data, uint16_t* rxbuf, int length)
{
if (dev == NULL) {
syslog(LOG_ERR, "spi: transfer_buf_word: context is invalid");
return MRAA_ERROR_INVALID_HANDLE;
}
if (IS_FUNC_DEFINED(dev, spi_transfer_buf_word_replace)) {
return dev->advance_func->spi_transfer_buf_word_replace(dev, data, rxbuf, length);
}
struct spi_ioc_transfer msg;
memset(&msg, 0, sizeof(msg));
@@ -339,6 +428,11 @@ mraa_spi_transfer_buf_word(mraa_spi_context dev, uint16_t* data, uint16_t* rxbuf
uint8_t*
mraa_spi_write_buf(mraa_spi_context dev, uint8_t* data, int length)
{
if (dev == NULL) {
syslog(LOG_ERR, "spi: write_buf: context is invalid");
return NULL;
}
uint8_t* recv = malloc(sizeof(uint8_t) * length);
if (mraa_spi_transfer_buf(dev, data, recv, length) != MRAA_SUCCESS) {
@@ -351,6 +445,11 @@ mraa_spi_write_buf(mraa_spi_context dev, uint8_t* data, int length)
uint16_t*
mraa_spi_write_buf_word(mraa_spi_context dev, uint16_t* data, int length)
{
if (dev == NULL) {
syslog(LOG_ERR, "spi: write_buf_word: context is invalid");
return NULL;
}
uint16_t* recv = malloc(sizeof(uint16_t) * length);
if (mraa_spi_transfer_buf_word(dev, data, recv, length) != MRAA_SUCCESS) {
@@ -363,6 +462,15 @@ mraa_spi_write_buf_word(mraa_spi_context dev, uint16_t* data, int length)
mraa_result_t
mraa_spi_stop(mraa_spi_context dev)
{
if (dev == NULL) {
syslog(LOG_ERR, "spi: stop: context is invalid");
return MRAA_ERROR_INVALID_HANDLE;
}
if (IS_FUNC_DEFINED(dev, spi_stop_replace)) {
return dev->advance_func->spi_stop_replace(dev);
}
close(dev->devfd);
free(dev);
return MRAA_SUCCESS;

View File

@@ -201,23 +201,42 @@ mraa_uart_init(int index)
mraa_uart_context
mraa_uart_init_raw(const char* path)
{
mraa_result_t status = MRAA_SUCCESS;
if (!path) {
syslog(LOG_ERR, "uart: device path undefined");
return NULL;
status = MRAA_ERROR_INVALID_PARAMETER;
goto init_raw_cleanup;
}
mraa_uart_context dev = mraa_uart_init_internal(plat == NULL ? NULL : plat->adv_func);
if (dev == NULL) {
syslog(LOG_ERR, "uart: Failed to allocate memory for context");
return NULL;
status = MRAA_ERROR_NO_RESOURCES;
goto init_raw_cleanup;
}
dev->path = (char*) calloc(strlen(path)+1, sizeof(char));
if (dev->path == NULL) {
syslog(LOG_ERR, "uart: Failed to allocate memory for path");
status = MRAA_ERROR_NO_RESOURCES;
goto init_raw_cleanup;
}
strncpy((char *) dev->path, path, strlen(path));
if (IS_FUNC_DEFINED(dev, uart_init_raw_replace)) {
status = dev->advance_func->uart_init_raw_replace(dev, path);
if (status == MRAA_SUCCESS) {
return dev;
} else {
goto init_raw_cleanup;
}
}
dev->path = path;
// now open the device
if ((dev->fd = open(dev->path, O_RDWR)) == -1) {
syslog(LOG_ERR, "uart: open(%s) failed: %s", path, strerror(errno));
free(dev);
return NULL;
status = MRAA_ERROR_INVALID_RESOURCE;
goto init_raw_cleanup;
}
// now setup the tty and the selected baud rate
@@ -226,9 +245,8 @@ mraa_uart_init_raw(const char* path)
// get current modes
if (tcgetattr(dev->fd, &termio)) {
syslog(LOG_ERR, "uart: tcgetattr(%s) failed: %s", path, strerror(errno));
close(dev->fd);
free(dev);
return NULL;
status = MRAA_ERROR_INVALID_RESOURCE;
goto init_raw_cleanup;
}
// setup for a 'raw' mode. 8N1, no echo or special character
@@ -237,14 +255,26 @@ mraa_uart_init_raw(const char* path)
cfmakeraw(&termio);
if (tcsetattr(dev->fd, TCSAFLUSH, &termio) < 0) {
syslog(LOG_ERR, "uart: tcsetattr(%s) failed after cfmakeraw(): %s", path, strerror(errno));
close(dev->fd);
free(dev);
return NULL;
status = MRAA_ERROR_INVALID_RESOURCE;
goto init_raw_cleanup;
}
if (mraa_uart_set_baudrate(dev, 9600) != MRAA_SUCCESS) {
close(dev->fd);
free(dev);
status = MRAA_ERROR_INVALID_RESOURCE;
goto init_raw_cleanup;
}
init_raw_cleanup:
if (status != MRAA_SUCCESS) {
if (dev != NULL) {
if (dev->fd >= 0) {
close(dev->fd);
}
if (dev->path != NULL) {
free((void *) dev->path);
}
free(dev);
}
return NULL;
}
@@ -263,6 +293,9 @@ mraa_uart_stop(mraa_uart_context dev)
if (dev->fd >= 0) {
close(dev->fd);
}
if (dev->path != NULL) {
free((void *) dev->path);
}
free(dev);
@@ -277,6 +310,10 @@ mraa_uart_flush(mraa_uart_context dev)
return MRAA_ERROR_INVALID_HANDLE;
}
if (IS_FUNC_DEFINED(dev, uart_flush_replace)) {
return dev->advance_func->uart_flush_replace(dev);
}
if (tcdrain(dev->fd) == -1) {
return MRAA_ERROR_FEATURE_NOT_SUPPORTED;
}
@@ -292,6 +329,10 @@ mraa_uart_set_baudrate(mraa_uart_context dev, unsigned int baud)
return MRAA_ERROR_INVALID_HANDLE;
}
if (IS_FUNC_DEFINED(dev, uart_set_baudrate_replace)) {
return dev->advance_func->uart_set_baudrate_replace(dev, baud);
}
struct termios termio;
if (tcgetattr(dev->fd, &termio)) {
syslog(LOG_ERR, "uart%i: set_baudrate: tcgetattr() failed: %s", dev->index, strerror(errno));
@@ -324,6 +365,10 @@ mraa_uart_set_mode(mraa_uart_context dev, int bytesize, mraa_uart_parity_t parit
return MRAA_ERROR_INVALID_HANDLE;
}
if (IS_FUNC_DEFINED(dev, uart_set_mode_replace)) {
return dev->advance_func->uart_set_mode_replace(dev, bytesize, parity, stopbits);
}
struct termios termio;
if (tcgetattr(dev->fd, &termio)) {
syslog(LOG_ERR, "uart%i: set_mode: tcgetattr() failed: %s", dev->index, strerror(errno));
@@ -396,6 +441,10 @@ mraa_uart_set_flowcontrol(mraa_uart_context dev, mraa_boolean_t xonxoff, mraa_bo
return MRAA_ERROR_INVALID_HANDLE;
}
if (IS_FUNC_DEFINED(dev, uart_set_flowcontrol_replace)) {
return dev->advance_func->uart_set_flowcontrol_replace(dev, xonxoff, rtscts);
}
// hardware flow control
int action = TCIOFF;
if (xonxoff) {
@@ -436,6 +485,10 @@ mraa_uart_set_timeout(mraa_uart_context dev, int read, int write, int interchar)
return MRAA_ERROR_INVALID_HANDLE;
}
if (IS_FUNC_DEFINED(dev, uart_set_timeout_replace)) {
return dev->advance_func->uart_set_timeout_replace(dev, read, write, interchar);
}
struct termios termio;
// get current modes
if (tcgetattr(dev->fd, &termio)) {
@@ -465,6 +518,10 @@ mraa_uart_set_non_blocking(mraa_uart_context dev, mraa_boolean_t nonblock)
return MRAA_ERROR_INVALID_HANDLE;
}
if (IS_FUNC_DEFINED(dev, uart_set_non_blocking_replace)) {
return dev->advance_func->uart_set_non_blocking_replace(dev, nonblock);
}
// get current flags
int flags = fcntl(dev->fd, F_GETFL);
@@ -505,6 +562,10 @@ mraa_uart_read(mraa_uart_context dev, char* buf, size_t len)
return MRAA_ERROR_INVALID_HANDLE;
}
if (IS_FUNC_DEFINED(dev, uart_read_replace)) {
return dev->advance_func->uart_read_replace(dev, buf, len);
}
if (dev->fd < 0) {
syslog(LOG_ERR, "uart%i: read: port is not open", dev->index);
return MRAA_ERROR_INVALID_RESOURCE;
@@ -521,6 +582,10 @@ mraa_uart_write(mraa_uart_context dev, const char* buf, size_t len)
return MRAA_ERROR_INVALID_HANDLE;
}
if (IS_FUNC_DEFINED(dev, uart_write_replace)) {
return dev->advance_func->uart_write_replace(dev, buf, len);
}
if (dev->fd < 0) {
syslog(LOG_ERR, "uart%i: write: port is not open", dev->index);
return MRAA_ERROR_INVALID_RESOURCE;
@@ -537,6 +602,10 @@ mraa_uart_data_available(mraa_uart_context dev, unsigned int millis)
return 0;
}
if (IS_FUNC_DEFINED(dev, uart_data_available_replace)) {
return dev->advance_func->uart_data_available_replace(dev, millis);
}
if (dev->fd < 0) {
syslog(LOG_ERR, "uart%i: data_available: port is not open", dev->index);
return 0;

View File

@@ -320,7 +320,7 @@ mraa_uart_ow_bit(mraa_uart_ow_context dev, uint8_t bit)
/* return the bit present on the bus (0xff is a '1', anything else
* (typically 0xfc or 0x00) is a 0
*/
if (_ow_read_byte(dev, &ch) == -1 || ret == -1) {
if (_ow_read_byte(dev, &ch) != MRAA_SUCCESS || ret == -1) {
return -1;
}
return (ch == 0xff);

View File

@@ -30,6 +30,7 @@
#include <sys/ioctl.h>
#include <linux/spi/spidev.h>
#include <errno.h>
#include <time.h>
#include "common.h"
#include "x86/intel_edison_fab_c.h"
@@ -76,8 +77,13 @@ static int mmap_fd = 0;
static int mmap_size;
static unsigned int mmap_count = 0;
// PWM 0% duty workaround state array
static int pwm_disabled[4] = { 0 };
// Pin state for PWM 0% duty and enable/disable bug workaround
typedef struct {
float duty_cycle;
int pwm_disabled;
} mraa_edison_pwm_wa_pinstate_t;
static mraa_edison_pwm_wa_pinstate_t pwm_wa_state[4] = {{.duty_cycle = 0, .pwm_disabled = 0}};
mraa_result_t
mraa_intel_edison_spi_lsbmode_replace(mraa_spi_context dev, mraa_boolean_t lsb)
@@ -208,11 +214,14 @@ mraa_intel_edison_gpio_init_post(mraa_gpio_context dev)
mraa_result_t
mraa_intel_edison_gpio_close_pre(mraa_gpio_context dev)
{
if (dev->phy_pin >= 0) {
int pin = dev->phy_pin;
if (agpioOutputen[pin]) {
mraa_gpio_close(agpioOutputen[pin]);
agpioOutputen[pin] = NULL;
// check if we own it
if (dev->owner != 0) {
if (dev->phy_pin >= 0) {
int pin = dev->phy_pin;
if (agpioOutputen[pin]) {
mraa_gpio_close(agpioOutputen[pin]);
agpioOutputen[pin] = NULL;
}
}
}
return MRAA_SUCCESS;
@@ -374,7 +383,25 @@ mraa_result_t
mraa_intel_edison_pwm_enable_pre(mraa_pwm_context dev, int enable) {
// PWM 0% duty workaround: update state array
// if someone first ran write(0) and then enable(1).
if ((pwm_disabled[dev->pin] == 1) && (enable == 1)) { pwm_disabled[dev->pin] = 0; }
if ((pwm_wa_state[dev->pin].pwm_disabled == 1) && (enable == 1)) {
pwm_wa_state[dev->pin].pwm_disabled = 0;
return MRAA_SUCCESS;
}
if (enable == 0) {
// Set duty cycle to 0 before disabling PWM, but save it first
pwm_wa_state[dev->pin].duty_cycle = mraa_pwm_read(dev);
// Edison PWM output stuck at high if disabled during ON period
mraa_pwm_pulsewidth_us(dev, 0);
// Sleep for 2 periods to allow the change to take effect
usleep(dev->period / 500);
} else if (enable == 1) {
// Restore the duty before re-enabling, but not if it's 0, to avoid recursion
if (pwm_wa_state[dev->pin].duty_cycle != 0) {
mraa_pwm_write(dev, pwm_wa_state[dev->pin].duty_cycle);
}
}
return MRAA_SUCCESS;
}
@@ -383,11 +410,11 @@ mraa_intel_edison_pwm_write_pre(mraa_pwm_context dev, float percentage) {
// PWM 0% duty workaround: set the state array and enable/disable pin accordingly
if (percentage == 0.0f) {
syslog(LOG_INFO, "edison_pwm_write_pre (pwm%i): requested zero duty cycle, disabling PWM on the pin", dev->pin);
pwm_disabled[dev->pin] = 1;
pwm_wa_state[dev->pin].pwm_disabled = 1;
return mraa_pwm_enable(dev, 0);
} else if (pwm_disabled[dev->pin] == 1) {
} else if (pwm_wa_state[dev->pin].pwm_disabled == 1) {
syslog(LOG_INFO, "edison_pwm_write_pre (pwm%i): Re-enabling the pin after setting non-zero duty", dev->pin);
pwm_disabled[dev->pin] = 0;
pwm_wa_state[dev->pin].pwm_disabled = 0;
return mraa_pwm_enable(dev, 1);
}
@@ -441,7 +468,8 @@ mraa_intel_edison_pwm_init_pre(int pin)
mraa_result_t
mraa_intel_edison_pwm_init_post(mraa_pwm_context pwm)
{
pwm_disabled[pwm->pin] = 0;
pwm_wa_state[pwm->pin].pwm_disabled = 0;
pwm_wa_state[pwm->pin].duty_cycle = 0.0f;
return mraa_gpio_write(tristate, 1);
}

View File

@@ -808,9 +808,9 @@ mraa_intel_galileo_gen2()
b->pins[18].aio.mux[0].pincmd = PINCMD_SET_DIRECTION;
b->pins[18].aio.mux[0].pin = 57;
b->pins[18].aio.mux[0].value = MRAA_GPIO_IN;
b->pins[18].aio.mux[1].pincmd = PINCMD_SET_OUT_VALUE;
b->pins[18].aio.mux[1].pincmd = PINCMD_SET_DIRECTION;
b->pins[18].aio.mux[1].pin = 60;
b->pins[18].aio.mux[1].value = 1;
b->pins[18].aio.mux[1].value = MRAA_GPIO_OUT_HIGH;
b->pins[18].aio.mux[2].pincmd = PINCMD_SET_VALUE;
b->pins[18].aio.mux[2].pin = 78;
b->pins[18].aio.mux[2].value = 0;
@@ -819,9 +819,9 @@ mraa_intel_galileo_gen2()
b->pins[18].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
b->pins[18].gpio.mux[0].pin = 57;
b->pins[18].gpio.mux[0].value = MRAA_GPIO_IN;
b->pins[18].gpio.mux[1].pincmd = PINCMD_SET_OUT_VALUE;
b->pins[18].gpio.mux[1].pincmd = PINCMD_SET_DIRECTION;
b->pins[18].gpio.mux[1].pin = 60;
b->pins[18].gpio.mux[1].value = 1;
b->pins[18].gpio.mux[1].value = MRAA_GPIO_OUT_HIGH;
b->pins[18].gpio.mux[2].pincmd = PINCMD_SET_VALUE;
b->pins[18].gpio.mux[2].pin = 78;
b->pins[18].gpio.mux[2].value = 1;
@@ -845,9 +845,9 @@ mraa_intel_galileo_gen2()
b->pins[19].aio.mux[0].pincmd = PINCMD_SET_DIRECTION;
b->pins[19].aio.mux[0].pin = 59;
b->pins[19].aio.mux[0].value = MRAA_GPIO_IN;
b->pins[19].aio.mux[1].pincmd = PINCMD_SET_OUT_VALUE;
b->pins[19].aio.mux[1].pincmd = PINCMD_SET_DIRECTION;
b->pins[19].aio.mux[1].pin = 60;
b->pins[19].aio.mux[1].value = 1;
b->pins[19].aio.mux[1].value = MRAA_GPIO_OUT_HIGH;
b->pins[19].aio.mux[2].pincmd = PINCMD_SET_VALUE;
b->pins[19].aio.mux[2].pin = 79;
b->pins[19].aio.mux[2].value = 0;
@@ -856,9 +856,9 @@ mraa_intel_galileo_gen2()
b->pins[19].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
b->pins[19].gpio.mux[0].pin = 59;
b->pins[19].gpio.mux[0].value = MRAA_GPIO_IN;
b->pins[19].gpio.mux[1].pincmd = PINCMD_SET_OUT_VALUE;
b->pins[19].gpio.mux[1].pincmd = PINCMD_SET_DIRECTION;
b->pins[19].gpio.mux[1].pin = 60;
b->pins[19].gpio.mux[1].value = 1;
b->pins[19].gpio.mux[1].value = MRAA_GPIO_OUT_HIGH;
b->pins[19].gpio.mux[2].pincmd = PINCMD_SET_VALUE;
b->pins[19].gpio.mux[2].pin = 79;
b->pins[19].gpio.mux[2].value = 1;

View File

@@ -29,12 +29,12 @@
#include <fcntl.h>
#include "common.h"
#include "x86/intel_gt_tuchuck.h"
#include "x86/intel_joule_expansion.h"
#define PLATFORM_NAME "Intel GT Tuchuck"
#define PLATFORM_NAME "INTEL JOULE EXPANSION"
mraa_board_t*
mraa_gt_tuchuck_board()
mraa_joule_expansion_board()
{
mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
if (b == NULL) {
@@ -42,12 +42,12 @@ mraa_gt_tuchuck_board()
}
b->platform_name = PLATFORM_NAME;
b->phy_pin_count = MRAA_INTEL_GT_TUCHUCK_PINCOUNT;
b->phy_pin_count = MRAA_INTEL_JOULE_EXPANSION_PINCOUNT;
b->aio_count = 0;
b->adc_raw = 0;
b->adc_supported = 0;
b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * MRAA_INTEL_GT_TUCHUCK_PINCOUNT);
b->pins = (mraa_pininfo_t*) calloc(MRAA_INTEL_JOULE_EXPANSION_PINCOUNT, sizeof(mraa_pininfo_t));
if (b->pins == NULL) {
goto error;
}
@@ -62,41 +62,88 @@ mraa_gt_tuchuck_board()
b->pwm_max_period = 218453;
b->pwm_min_period = 1;
b->i2c_bus_count = 3;
b->i2c_bus[0].bus_id = 0;
b->i2c_bus[0].sda = 11;
b->i2c_bus[0].scl = 13;
b->i2c_bus_count = 0;
if (mraa_find_i2c_bus("designware", 5) != 5) {
b->i2c_bus[1].bus_id = 9;
b->i2c_bus[2].bus_id = 10;
} else {
b->i2c_bus[1].bus_id = 5;
b->i2c_bus[2].bus_id = 6;
int i2c_bus_num = -1;
i2c_bus_num = mraa_find_i2c_bus_pci("0000:00", "0000:00:16.0", "i2c_designware.0");
if (i2c_bus_num != -1) {
b->i2c_bus[0].bus_id = i2c_bus_num;
b->i2c_bus[0].sda = 11;
b->i2c_bus[0].scl = 13;
b->i2c_bus_count++;
}
i2c_bus_num = mraa_find_i2c_bus_pci("0000:00", "0000:00:17.1", "i2c_designware.5");
if (i2c_bus_num != -1) {
b->i2c_bus[b->i2c_bus_count].bus_id = i2c_bus_num;
b->i2c_bus[b->i2c_bus_count].sda = 15;
b->i2c_bus[b->i2c_bus_count].scl = 17;
b->i2c_bus_count++;
}
i2c_bus_num = mraa_find_i2c_bus_pci("0000:00", "0000:00:17.2", "i2c_designware.6");
if (i2c_bus_num != -1) {
b->i2c_bus[b->i2c_bus_count].bus_id = i2c_bus_num;
b->i2c_bus[b->i2c_bus_count].sda = 19;
b->i2c_bus[b->i2c_bus_count].scl = 21;
b->i2c_bus_count++;
}
i2c_bus_num = mraa_find_i2c_bus_pci("0000:00", "0000:00:16.1", "i2c_designware.1");
if (i2c_bus_num != -1) {
b->i2c_bus[b->i2c_bus_count].bus_id = i2c_bus_num;
b->i2c_bus[b->i2c_bus_count].sda = 71;
b->i2c_bus[b->i2c_bus_count].scl = 73;
b->i2c_bus_count++;
}
i2c_bus_num = mraa_find_i2c_bus_pci("0000:00", "0000:00:16.2", "i2c_designware.2");
if (i2c_bus_num != -1) {
b->i2c_bus[b->i2c_bus_count].bus_id = i2c_bus_num;
b->i2c_bus[b->i2c_bus_count].sda = 75;
b->i2c_bus[b->i2c_bus_count].scl = 77;
b->i2c_bus_count++;
}
/**
* Old i2c detection method, very poor, avoid, but keep as fallback if
* above failed We check for /dev/i2c-0 because we can assume i2c-dev is
* not loaded if we haven't enumerated a single i2c-dev node
*/
if (b->i2c_bus_count == 0) {
if (mraa_file_exist("/dev/i2c-0")) {
syslog(LOG_WARNING, "joule: Failed to detect i2c buses, making wild assumptions!");
b->i2c_bus_count = 3;
b->i2c_bus[0].bus_id = 0;
b->i2c_bus[0].sda = 11;
b->i2c_bus[0].scl = 13;
if (mraa_find_i2c_bus("designware", 5) != 5) {
b->i2c_bus[1].bus_id = 9;
b->i2c_bus[2].bus_id = 10;
} else {
b->i2c_bus[1].bus_id = 5;
b->i2c_bus[2].bus_id = 6;
}
b->i2c_bus[1].sda = 15;
b->i2c_bus[1].scl = 17;
b->i2c_bus[2].sda = 19;
b->i2c_bus[2].scl = 21;
} else {
syslog(LOG_WARNING, "joule: Failed to detect any i2c buses, is i2c-dev loaded?");
}
}
b->i2c_bus[1].sda = 15;
b->i2c_bus[1].scl = 17;
b->i2c_bus[2].sda = 19;
b->i2c_bus[2].scl = 21;
b->def_i2c_bus = b->i2c_bus[0].bus_id;
#if 0
b->spi_bus_count = 6;
b->spi_bus_count = 3;
b->def_spi_bus = 0;
b->spi_bus[0].bus_id = 32764;
b->spi_bus[0].slave_s = 1;
b->spi_bus[1].bus_id = 32764;
b->spi_bus[1].slave_s = 2;
b->spi_bus[2].bus_id = 32765;
b->spi_bus[2].slave_s = 0;
b->spi_bus[3].bus_id = 32765;
b->spi_bus[3].slave_s = 1;
b->spi_bus[4].bus_id = 32766;
b->spi_bus[4].slave_s = 0;
b->spi_bus[5].bus_id = 32766;
b->spi_bus[5].slave_s = 1;
#endif
b->spi_bus[0].bus_id = 32765;
b->spi_bus[0].slave_s = 0;
b->spi_bus[1].bus_id = 32766;
b->spi_bus[1].slave_s = 0;
b->spi_bus[2].bus_id = 32766;
b->spi_bus[2].slave_s = 1;
int pos = 0;
@@ -104,14 +151,14 @@ mraa_gt_tuchuck_board()
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 };
pos++;
strncpy(b->pins[pos].name, "GPIO", 8);
strncpy(b->pins[pos].name, "GPIO22", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 446;
b->pins[pos].gpio.pinmap = 451;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "SPP1RX", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 421;
b->pins[pos].gpio.mux_total = 0;
pos++;
@@ -124,7 +171,7 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "SPP1TX", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 422;
b->pins[pos].gpio.mux_total = 0;
pos++;
@@ -136,13 +183,13 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "SPP1FS0", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 417;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "UART0TX", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
// not configured as GPIO
//b->pins[pos].gpio.pinmap = 462;
//b->pins[pos].gpio.mux_total = 0;
@@ -152,7 +199,7 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "SPP1FS2", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 419;
b->pins[pos].gpio.mux_total = 0;
pos++;
@@ -165,7 +212,7 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "SPP1CLK", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 416;
b->pins[pos].gpio.mux_total = 0;
pos++;
@@ -241,6 +288,7 @@ mraa_gt_tuchuck_board()
b->pins[pos].gpio.mux_total = 0;
pos++;
// pin 21
strncpy(b->pins[pos].name, "I2C2SCL", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 };
b->pins[pos].gpio.pinmap = 334;
@@ -250,7 +298,7 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "UART1TX", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
//b->pins[pos].gpio.pinmap = 472;
//b->pins[pos].gpio.mux_total = 0;
b->pins[pos].uart.pinmap = 0;
@@ -258,15 +306,14 @@ mraa_gt_tuchuck_board()
b->pins[pos].uart.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "I2S4SDO", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
// doesn't work so disable
//b->pins[pos].gpio.pinmap = 396;
//b->pins[pos].gpio.mux_total = 0;
strncpy(b->pins[pos].name, "ISH_IO6", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 343;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "UART1RX", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
//b->pins[pos].gpio.pinmap = 471;
//b->pins[pos].gpio.mux_total = 0;
b->pins[pos].uart.pinmap = 0;
@@ -274,11 +321,10 @@ mraa_gt_tuchuck_board()
b->pins[pos].uart.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "I2S4SDI", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
// doesnt work
//b->pins[pos].gpio.pinmap = 395;
//b->pins[pos].gpio.mux_total = 0;
strncpy(b->pins[pos].name, "ISH_IO5", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 342;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "PWM0", 8);
@@ -290,10 +336,9 @@ mraa_gt_tuchuck_board()
b->pins[pos].pwm.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "I2S4BLK", 8);
strncpy(b->pins[pos].name, "ISH_IO4", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
// this pin has a voltage of 0.34V in 'low' mode - beware!
b->pins[pos].gpio.pinmap = 397;
b->pins[pos].gpio.pinmap = 341;
b->pins[pos].gpio.mux_total = 0;
pos++;
@@ -306,11 +351,11 @@ mraa_gt_tuchuck_board()
b->pins[pos].pwm.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "I2S4WS", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
// not working
//b->pins[pos].gpio.pinmap = 398;
//b->pins[pos].gpio.mux_total = 0;
strncpy(b->pins[pos].name, "ISH_IO3", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
// High level will be V1P8 - VBE on MBT3904D
b->pins[pos].gpio.pinmap = 340;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "PWM2", 8);
@@ -322,10 +367,12 @@ mraa_gt_tuchuck_board()
b->pins[pos].pwm.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "I2S3SDO", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
//b->pins[pos].gpio.pinmap = 400;
//b->pins[pos].gpio.mux_total = 0;
// pin 31
strncpy(b->pins[pos].name, "ISH_IO2", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
// High level will be V1P8 - VBE on MBT3904D
b->pins[pos].gpio.pinmap = 339;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "PWM3", 8);
@@ -337,19 +384,21 @@ mraa_gt_tuchuck_board()
b->pins[pos].pwm.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "I2S3SDI", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
//b->pins[pos].gpio.pinmap = 399;
//b->pins[pos].gpio.mux_total = 0;
strncpy(b->pins[pos].name, "ISH_IO1", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
// High level will be V1P8 - VBE on MBT3904D
b->pins[pos].gpio.pinmap = 338;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "1.8V", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
pos++;
strncpy(b->pins[pos].name, "I2S4BLK", 8);
strncpy(b->pins[pos].name, "ISH_IO0", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 393;
// High level will be V1P8 - VBE on MBT3904D
b->pins[pos].gpio.pinmap = 337;
b->pins[pos].gpio.mux_total = 0;
pos++;
@@ -455,7 +504,7 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "SPP0FS0", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 411;
b->pins[pos].gpio.mux_total = 0;
pos++;
@@ -465,49 +514,49 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "SPP0FS1", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 412;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "SPI_DAT", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 385;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "SPP0FS2", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 411;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "SPICLKB", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 384;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "SPP0FS3", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 410;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "SPICLKA", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 383;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "SPP0TX", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 414;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "UART0RX", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 467;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].uart.pinmap = 0;
@@ -516,13 +565,13 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "SPP0RX", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 415;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "UART0RT", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 469;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].uart.pinmap = 0;
@@ -539,7 +588,7 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "UART0CT", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 412;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].uart.pinmap = 0;
@@ -556,8 +605,9 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "UART1TX", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 484;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].uart.pinmap = 0;
b->pins[pos].uart.parent_id = 0;
b->pins[pos].uart.mux_total = 0;
@@ -572,8 +622,9 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "UART1RX", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 483;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].uart.pinmap = 0;
b->pins[pos].uart.parent_id = 0;
b->pins[pos].uart.mux_total = 0;
@@ -588,8 +639,9 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "UART1RT", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 485;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].uart.pinmap = 0;
b->pins[pos].uart.parent_id = 0;
b->pins[pos].uart.mux_total = 0;
@@ -598,10 +650,11 @@ mraa_gt_tuchuck_board()
strncpy(b->pins[pos].name, "RTC_CLK", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 367;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "UART1CT", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 486;
b->pins[pos].uart.pinmap = 0;
b->pins[pos].uart.parent_id = 0;
@@ -616,38 +669,43 @@ mraa_gt_tuchuck_board()
strncpy(b->pins[pos].name, "LED100", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 337;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "LED101", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
// if BIOS is pre-L then this is 338
b->pins[pos].gpio.pinmap = 395;
b->pins[pos].gpio.pinmap = 338;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "LED102", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 339;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "LED103", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 340;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "LEDWIFI", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 438;
b->pins[pos].gpio.mux_total = 0;
pos++;
strncpy(b->pins[pos].name, "LEDBT", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 439;
b->pins[pos].gpio.mux_total = 0;
pos++;
return b;
error:
syslog(LOG_CRIT, "GT Tuchuck: Platform failed to initialise");
syslog(LOG_CRIT, "Intel Joule Expansion: Platform failed to initialise");
free(b);
return NULL;
}

View File

@@ -32,14 +32,13 @@
#include "x86/intel_minnow_byt_compatible.h"
#define PLATFORM_NAME "MinnowBoard MAX"
#define I2C_BUS_DEFAULT 7
#define MAX_LENGTH 8
#define I2CNAME "designware"
int arch_nr_gpios_adjust = 0x100;
mraa_result_t
mraa_set_pininfo(mraa_board_t* board, int mraa_index, char* name, mraa_pincapabilities_t caps, int sysfs_pin)
mraa_intel_minnowboard_set_pininfo(mraa_board_t* board, int mraa_index, char* name, mraa_pincapabilities_t caps, int sysfs_pin)
{
if (mraa_index < board->phy_pin_count) {
// adjust mraa_index for ARCH_NR_GPIOS value
@@ -58,7 +57,7 @@ mraa_set_pininfo(mraa_board_t* board, int mraa_index, char* name, mraa_pincapabi
int controller = 0;
if (strncmp(name, "PWM", 3) == 0 && strlen(name) > 3 && isdigit(name[3]))
controller = name[3] - '0';
pin_info->pwm.parent_id = controller;
pin_info->pwm.parent_id = (unsigned int) controller;
pin_info->pwm.pinmap = 0;
pin_info->pwm.mux_total = 0;
}
@@ -71,7 +70,7 @@ mraa_set_pininfo(mraa_board_t* board, int mraa_index, char* name, mraa_pincapabi
}
mraa_result_t
mraa_get_pin_index(mraa_board_t* board, char* name, int* pin_index)
mraa_intel_minnowboard_get_pin_index(mraa_board_t* board, char* name, int* pin_index)
{
int i;
for (i = 0; i < board->phy_pin_count; ++i) {
@@ -89,7 +88,7 @@ mraa_intel_minnowboard_byt_compatible(mraa_boolean_t turbot)
mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
struct utsname running_uname;
int uname_major, uname_minor, max_pins[28];
int uname_major, uname_minor;
if (b == NULL) {
return NULL;
@@ -104,7 +103,7 @@ mraa_intel_minnowboard_byt_compatible(mraa_boolean_t turbot)
b->gpio_count = b->phy_pin_count = MRAA_INTEL_MINNOW_MAX_PINCOUNT;
}
b->pins = (mraa_pininfo_t*) calloc(b->phy_pin_count, sizeof(mraa_pininfo_t));
b->pins = (mraa_pininfo_t*) calloc((size_t) b->phy_pin_count, sizeof(mraa_pininfo_t));
if (b->pins == NULL) {
goto error;
}
@@ -132,39 +131,39 @@ mraa_intel_minnowboard_byt_compatible(mraa_boolean_t turbot)
arch_nr_gpios_adjust = 0;
}
mraa_set_pininfo(b, 0, "INVALID", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_set_pininfo(b, 1, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_set_pininfo(b, 2, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_set_pininfo(b, 3, "5v", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_set_pininfo(b, 4, "3.3v", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_set_pininfo(b, 5, "SPI_CS", (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 }, 220);
mraa_set_pininfo(b, 6, "UART1TX", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 }, 225);
mraa_set_pininfo(b, 7, "SPIMISO", (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 }, 221);
mraa_set_pininfo(b, 8, "UART1RX", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 }, 224);
mraa_set_pininfo(b, 9, "SPIMOSI", (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 }, 222);
mraa_set_pininfo(b, 10, "UART1CT", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 227);
mraa_set_pininfo(b, 11, "SPI_CLK", (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 }, 223);
mraa_set_pininfo(b, 12, "UART1RT", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 226);
mraa_set_pininfo(b, 13, "I2C_SCL", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }, 243);
mraa_set_pininfo(b, 14, "I2S_CLK", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 216);
mraa_set_pininfo(b, 15, "I2C_SDA", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }, 242);
mraa_set_pininfo(b, 16, "I2S_FRM", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 217);
mraa_set_pininfo(b, 17, "UART2TX", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 }, 229);
mraa_set_pininfo(b, 18, "I2S_DO", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 219);
mraa_set_pininfo(b, 19, "UART2RX", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 }, 228);
mraa_set_pininfo(b, 20, "I2S_DI", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 218);
mraa_set_pininfo(b, 21, "S5_0", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 82);
mraa_set_pininfo(b, 22, "PWM0", (mraa_pincapabilities_t){ 1, 0, 1, 0, 0, 0, 0, 0 },
mraa_intel_minnowboard_set_pininfo(b, 0, "INVALID", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_intel_minnowboard_set_pininfo(b, 1, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_intel_minnowboard_set_pininfo(b, 2, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_intel_minnowboard_set_pininfo(b, 3, "5v", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_intel_minnowboard_set_pininfo(b, 4, "3.3v", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_intel_minnowboard_set_pininfo(b, 5, "SPI_CS", (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 }, 220);
mraa_intel_minnowboard_set_pininfo(b, 6, "UART1TX", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 }, 225);
mraa_intel_minnowboard_set_pininfo(b, 7, "SPIMISO", (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 }, 221);
mraa_intel_minnowboard_set_pininfo(b, 8, "UART1RX", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 }, 224);
mraa_intel_minnowboard_set_pininfo(b, 9, "SPIMOSI", (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 }, 222);
mraa_intel_minnowboard_set_pininfo(b, 10, "UART1CT", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 227);
mraa_intel_minnowboard_set_pininfo(b, 11, "SPI_CLK", (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 }, 223);
mraa_intel_minnowboard_set_pininfo(b, 12, "UART1RT", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 226);
mraa_intel_minnowboard_set_pininfo(b, 13, "I2C_SCL", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }, 243);
mraa_intel_minnowboard_set_pininfo(b, 14, "I2S_CLK", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 216);
mraa_intel_minnowboard_set_pininfo(b, 15, "I2C_SDA", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }, 242);
mraa_intel_minnowboard_set_pininfo(b, 16, "I2S_FRM", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 217);
mraa_intel_minnowboard_set_pininfo(b, 17, "UART2TX", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 }, 229);
mraa_intel_minnowboard_set_pininfo(b, 18, "I2S_DO", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 219);
mraa_intel_minnowboard_set_pininfo(b, 19, "UART2RX", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 }, 228);
mraa_intel_minnowboard_set_pininfo(b, 20, "I2S_DI", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 218);
mraa_intel_minnowboard_set_pininfo(b, 21, "S5_0", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 82);
mraa_intel_minnowboard_set_pininfo(b, 22, "PWM0", (mraa_pincapabilities_t){ 1, 0, 1, 0, 0, 0, 0, 0 },
248); // Assume BIOS configured for PWM
mraa_set_pininfo(b, 23, "S5_1", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 83);
mraa_set_pininfo(b, 24, "PWM1", (mraa_pincapabilities_t){ 1, 0, 1, 0, 0, 0, 0, 0 },
mraa_intel_minnowboard_set_pininfo(b, 23, "S5_1", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 83);
mraa_intel_minnowboard_set_pininfo(b, 24, "PWM1", (mraa_pincapabilities_t){ 1, 0, 1, 0, 0, 0, 0, 0 },
249); // Assume BIOS configured for PWM
mraa_set_pininfo(b, 25, "S5_4", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 84);
mraa_intel_minnowboard_set_pininfo(b, 25, "S5_4", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 84);
if (turbot) {
mraa_set_pininfo(b, 26, "I2S_MCLK", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 253);
mraa_set_pininfo(b, 27, "S5_22", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 104);
mraa_intel_minnowboard_set_pininfo(b, 26, "I2S_MCLK", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 253);
mraa_intel_minnowboard_set_pininfo(b, 27, "S5_22", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 104);
} else {
mraa_set_pininfo(b, 26, "IBL8254", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 208);
mraa_intel_minnowboard_set_pininfo(b, 26, "IBL8254", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 208);
}
// Set number of i2c adaptors usable from userspace
@@ -172,13 +171,13 @@ mraa_intel_minnowboard_byt_compatible(mraa_boolean_t turbot)
// Configure i2c adaptor #7 and make it the default
int pin_index_sda, pin_index_scl;
if (mraa_get_pin_index(b, "I2C_SDA", &pin_index_sda) == MRAA_SUCCESS &&
mraa_get_pin_index(b, "I2C_SCL", &pin_index_scl) == MRAA_SUCCESS) {
if (mraa_intel_minnowboard_get_pin_index(b, "I2C_SDA", &pin_index_sda) == MRAA_SUCCESS &&
mraa_intel_minnowboard_get_pin_index(b, "I2C_SCL", &pin_index_scl) == MRAA_SUCCESS) {
int bus = mraa_find_i2c_bus(I2CNAME, 0);
if (bus == -1) {
b->i2c_bus_count = 0;
} else {
b->def_i2c_bus = bus;
b->def_i2c_bus = (unsigned int) bus;
b->i2c_bus[0].bus_id = b->def_i2c_bus;
b->i2c_bus[0].sda = pin_index_sda;
b->i2c_bus[0].scl = pin_index_scl;

View File

@@ -32,12 +32,10 @@
#include "x86/up.h"
#define PLATFORM_NAME "UP"
#define I2C_BUS_DEFAULT 1
#define MAX_LENGTH 8
#define I2CNAME "designware"
static mraa_result_t
set_pininfo(mraa_board_t* board, int mraa_index, char* name, mraa_pincapabilities_t caps, int sysfs_pin)
mraa_up_set_pininfo(mraa_board_t* board, int mraa_index, char* name, mraa_pincapabilities_t caps, int sysfs_pin)
{
if (mraa_index < board->phy_pin_count) {
mraa_pininfo_t* pin_info = &board->pins[mraa_index];
@@ -55,20 +53,27 @@ set_pininfo(mraa_board_t* board, int mraa_index, char* name, mraa_pincapabilitie
int controller = 0;
if (strncmp(name, "PWM", 3) == 0 && strlen(name) > 3 && isdigit(name[3]))
controller = name[3] - '0';
pin_info->pwm.parent_id = controller;
pin_info->pwm.parent_id = (unsigned int) controller;
pin_info->pwm.pinmap = 0;
pin_info->pwm.mux_total = 0;
}
if (caps.spi) {
pin_info->spi.mux_total = 0;
}
if (caps.aio) {
pin_info->aio.mux_total = 0;
pin_info->aio.pinmap = 0;
}
if (caps.uart) {
pin_info->uart.mux_total = 0;
}
return MRAA_SUCCESS;
}
return MRAA_ERROR_INVALID_RESOURCE;
}
static mraa_result_t
get_pin_index(mraa_board_t* board, char* name, int* pin_index)
mraa_up_get_pin_index(mraa_board_t* board, char* name, int* pin_index)
{
int i;
for (i = 0; i < board->phy_pin_count; ++i) {
@@ -80,13 +85,35 @@ get_pin_index(mraa_board_t* board, char* name, int* pin_index)
return MRAA_ERROR_INVALID_RESOURCE;
}
static mraa_result_t
mraa_up_aio_get_valid_fp(mraa_aio_context dev)
{
char file_path[64] = "";
/*
* Open file Analog device input channel raw voltage file for reading.
*
* The UP ADC has only 1 channel, so the channel number is not included
* in the filename
*/
snprintf(file_path, 64, "/sys/bus/iio/devices/iio:device0/in_voltage_raw");
dev->adc_in_fp = open(file_path, O_RDONLY);
if (dev->adc_in_fp == -1) {
syslog(LOG_ERR, "aio: Failed to open input raw file %s for reading!", file_path);
return MRAA_ERROR_INVALID_RESOURCE;
}
return MRAA_SUCCESS;
}
mraa_board_t*
mraa_up_board()
{
mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
struct utsname running_uname;
int uname_major, uname_minor, max_pins[27];
int uname_major, uname_minor;
if (b == NULL) {
return NULL;
@@ -107,6 +134,8 @@ mraa_up_board()
goto error;
}
b->adv_func->aio_get_valid_fp = &mraa_up_aio_get_valid_fp;
if (uname(&running_uname) != 0) {
free(b->pins);
free(b->adv_func);
@@ -115,47 +144,47 @@ mraa_up_board()
sscanf(running_uname.release, "%d.%d", &uname_major, &uname_minor);
set_pininfo(b, 0, "INVALID", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
set_pininfo(b, 1, "3.3v", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
set_pininfo(b, 2, "5v", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
set_pininfo(b, 3, "I2C1_SDA", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }, 2);
set_pininfo(b, 4, "5v", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
set_pininfo(b, 5, "I2C1_SCL", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }, 3);
set_pininfo(b, 6, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
set_pininfo(b, 7, "GPIO4", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 4);
set_pininfo(b, 8, "UART1_TX", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }, 14);
set_pininfo(b, 9, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
set_pininfo(b, 10, "UART1_RX", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }, 15);
set_pininfo(b, 11, "GPIO17", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 17);
set_pininfo(b, 12, "I2S_CLK", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 18);
set_pininfo(b, 13, "UART2_RX", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 1 }, 27);
set_pininfo(b, 14, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
set_pininfo(b, 15, "GPIO22", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }, 22);
set_pininfo(b, 16, "GPIO23", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 23);
set_pininfo(b, 17, "3.3v", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
set_pininfo(b, 18, "GPIO24", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 24);
set_pininfo(b, 19, "SPI_MOSI", (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }, 10);
set_pininfo(b, 20, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
set_pininfo(b, 21, "SPI_MISO", (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }, 9);
set_pininfo(b, 22, "UART2_TX", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }, 25);
set_pininfo(b, 23, "SPI_CLK", (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }, 11);
set_pininfo(b, 24, "SPI_CS0", (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }, 8);
set_pininfo(b, 25, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
set_pininfo(b, 26, "SPI_CS1", (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }, 7);
set_pininfo(b, 27, "ID_SD", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }, 0);
set_pininfo(b, 28, "ID_SC", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }, 1);
set_pininfo(b, 29, "GPIO5", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 5);
set_pininfo(b, 30, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
set_pininfo(b, 31, "GPIO6", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 6);
set_pininfo(b, 32, "PWM0", (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 }, 12);
set_pininfo(b, 33, "PWM1", (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 }, 13);
set_pininfo(b, 34, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
set_pininfo(b, 35, "I2S_FRM", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 19);
set_pininfo(b, 36, "GPIO16", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 16);
set_pininfo(b, 37, "GPIO26", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 26);
set_pininfo(b, 38, "I2S_DIN", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 20);
set_pininfo(b, 39, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
set_pininfo(b, 40, "I2S_DOUT", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 21);
mraa_up_set_pininfo(b, 0, "INVALID", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_up_set_pininfo(b, 1, "3.3v", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_up_set_pininfo(b, 2, "5v", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_up_set_pininfo(b, 3, "I2C1_SDA", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }, 2);
mraa_up_set_pininfo(b, 4, "5v", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_up_set_pininfo(b, 5, "I2C1_SCL", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }, 3);
mraa_up_set_pininfo(b, 6, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_up_set_pininfo(b, 7, "ADC0", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 }, 4);
mraa_up_set_pininfo(b, 8, "UART1_TX", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }, 14);
mraa_up_set_pininfo(b, 9, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_up_set_pininfo(b, 10, "UART1_RX", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }, 15);
mraa_up_set_pininfo(b, 11, "GPIO17", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 17);
mraa_up_set_pininfo(b, 12, "I2S_CLK", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 18);
mraa_up_set_pininfo(b, 13, "GPIO27", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 27);
mraa_up_set_pininfo(b, 14, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_up_set_pininfo(b, 15, "GPIO22", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }, 22);
mraa_up_set_pininfo(b, 16, "GPIO23", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 23);
mraa_up_set_pininfo(b, 17, "3.3v", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_up_set_pininfo(b, 18, "GPIO24", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 24);
mraa_up_set_pininfo(b, 19, "SPI_MOSI", (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }, 10);
mraa_up_set_pininfo(b, 20, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_up_set_pininfo(b, 21, "SPI_MISO", (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }, 9);
mraa_up_set_pininfo(b, 22, "GPIO25", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 25);
mraa_up_set_pininfo(b, 23, "SPI_CLK", (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }, 11);
mraa_up_set_pininfo(b, 24, "SPI_CS0", (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }, 8);
mraa_up_set_pininfo(b, 25, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_up_set_pininfo(b, 26, "SPI_CS1", (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }, 7);
mraa_up_set_pininfo(b, 27, "ID_SD", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }, 0);
mraa_up_set_pininfo(b, 28, "ID_SC", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }, 1);
mraa_up_set_pininfo(b, 29, "GPIO5", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 5);
mraa_up_set_pininfo(b, 30, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_up_set_pininfo(b, 31, "GPIO6", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 6);
mraa_up_set_pininfo(b, 32, "PWM0", (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 }, 12);
mraa_up_set_pininfo(b, 33, "PWM1", (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 }, 13);
mraa_up_set_pininfo(b, 34, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_up_set_pininfo(b, 35, "I2S_FRM", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 19);
mraa_up_set_pininfo(b, 36, "GPIO16", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 16);
mraa_up_set_pininfo(b, 37, "GPIO26", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 26);
mraa_up_set_pininfo(b, 38, "I2S_DIN", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 20);
mraa_up_set_pininfo(b, 39, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
mraa_up_set_pininfo(b, 40, "I2S_DOUT", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 21);
// Set number of i2c adaptors usable from userspace
b->i2c_bus_count = 2;
@@ -163,14 +192,14 @@ mraa_up_board()
// Configure i2c adaptor #0 (default)
// (For consistency with Raspberry Pi 2, use I2C1 as our primary I2C bus)
b->i2c_bus[0].bus_id = 1;
get_pin_index(b, "I2C1_SDA", (int*) &(b->i2c_bus[0].sda));
get_pin_index(b, "I2C1_SCL", (int*) &(b->i2c_bus[0].scl));
mraa_up_get_pin_index(b, "I2C1_SDA", (int*) &(b->i2c_bus[0].sda));
mraa_up_get_pin_index(b, "I2C1_SCL", (int*) &(b->i2c_bus[0].scl));
// Configure i2c adaptor #1
// (normally reserved for accessing HAT EEPROM)
b->i2c_bus[1].bus_id = 0;
get_pin_index(b, "I2C0_SDA", (int*) &(b->i2c_bus[1].sda));
get_pin_index(b, "I2C0_SCL", (int*) &(b->i2c_bus[1].scl));
mraa_up_get_pin_index(b, "I2C0_SDA", (int*) &(b->i2c_bus[1].sda));
mraa_up_get_pin_index(b, "I2C0_SCL", (int*) &(b->i2c_bus[1].scl));
b->def_i2c_bus = 0;
// Configure PWM
@@ -182,29 +211,30 @@ mraa_up_board()
b->spi_bus_count = 2;
b->spi_bus[0].bus_id = 2;
b->spi_bus[0].slave_s = 0;
get_pin_index(b, "SPI_CS0", (int*) &(b->spi_bus[0].cs));
get_pin_index(b, "SPI_MOSI", (int*) &(b->spi_bus[0].mosi));
get_pin_index(b, "SPI_MISO", (int*) &(b->spi_bus[0].miso));
get_pin_index(b, "SPI_CLK", (int*) &(b->spi_bus[0].sclk));
mraa_up_get_pin_index(b, "SPI_CS0", (int*) &(b->spi_bus[0].cs));
mraa_up_get_pin_index(b, "SPI_MOSI", (int*) &(b->spi_bus[0].mosi));
mraa_up_get_pin_index(b, "SPI_MISO", (int*) &(b->spi_bus[0].miso));
mraa_up_get_pin_index(b, "SPI_CLK", (int*) &(b->spi_bus[0].sclk));
b->def_spi_bus = 0;
// Configure SPI #0 CS1
b->spi_bus[1].bus_id = 2;
b->spi_bus[1].slave_s = 1;
get_pin_index(b, "SPI_CS1", (int*) &(b->spi_bus[1].cs));
get_pin_index(b, "SPI_MOSI", (int*) &(b->spi_bus[1].mosi));
get_pin_index(b, "SPI_MISO", (int*) &(b->spi_bus[1].miso));
get_pin_index(b, "SPI_CLK", (int*) &(b->spi_bus[1].sclk));
mraa_up_get_pin_index(b, "SPI_CS1", (int*) &(b->spi_bus[1].cs));
mraa_up_get_pin_index(b, "SPI_MOSI", (int*) &(b->spi_bus[1].mosi));
mraa_up_get_pin_index(b, "SPI_MISO", (int*) &(b->spi_bus[1].miso));
mraa_up_get_pin_index(b, "SPI_CLK", (int*) &(b->spi_bus[1].sclk));
// Configure UART #1 (default)
b->uart_dev_count = 2;
get_pin_index(b, "UART1_RX", &(b->uart_dev[0].rx));
get_pin_index(b, "UART1_TX", &(b->uart_dev[0].tx));
b->uart_dev_count = 1;
mraa_up_get_pin_index(b, "UART1_RX", &(b->uart_dev[0].rx));
mraa_up_get_pin_index(b, "UART1_TX", &(b->uart_dev[0].tx));
b->uart_dev[0].device_path = "/dev/ttyS1";
b->def_uart_dev = 0;
// Configure UART #2
get_pin_index(b, "UART2_RX", &(b->uart_dev[1].rx));
get_pin_index(b, "UART2_TX", &(b->uart_dev[1].tx));
b->uart_dev[1].device_path = "/dev/ttyS2";
// Configure ADC #0
b->aio_count = 1;
b->adc_raw = 8;
b->adc_supported = 8;
return b;
error:

View File

@@ -37,7 +37,7 @@
#include "x86/intel_sofia_3gr.h"
#include "x86/intel_cherryhills.h"
#include "x86/up.h"
#include "x86/intel_gt_tuchuck.h"
#include "x86/intel_joule_expansion.h"
mraa_platform_t
mraa_x86_platform()
@@ -51,7 +51,7 @@ mraa_x86_platform()
FILE* fh = fopen("/sys/devices/virtual/dmi/id/board_name", "r");
if (fh != NULL) {
if (getline(&line, &len, fh) != -1) {
if (strncmp(line, "GalileoGen2", 11) == 0) {
if (strncmp(line, "GalileoGen2", 11) == 0 || strncmp(line, "SIMATIC IOT2000", 15) == 0) {
platform_type = MRAA_INTEL_GALILEO_GEN2;
plat = mraa_intel_galileo_gen2();
} else if (strncmp(line, "BODEGA BAY", 10) == 0) {
@@ -88,11 +88,11 @@ mraa_x86_platform()
platform_type = MRAA_UP;
plat = mraa_up_board();
} else if (strncasecmp(line, "RVP", 3) == 0) {
platform_type = MRAA_INTEL_GT_TUCHUCK;
plat = mraa_gt_tuchuck_board();
platform_type = MRAA_INTEL_JOULE_EXPANSION;
plat = mraa_joule_expansion_board();
} else if (strncasecmp(line, "SDS", 3) == 0) {
platform_type = MRAA_INTEL_GT_TUCHUCK;
plat = mraa_gt_tuchuck_board();
platform_type = MRAA_INTEL_JOULE_EXPANSION;
plat = mraa_joule_expansion_board();
} else {
syslog(LOG_ERR, "Platform not supported, not initialising");
platform_type = MRAA_UNKNOWN_PLATFORM;
@@ -133,8 +133,8 @@ mraa_x86_platform()
plat = mraa_intel_cherryhills();
#elif defined(xMRAA_UP)
plat = mraa_up_board();
#elif defined(xMRAA_INTEL_GT_TUCHUCK)
plat = mraa_gt_tuchuck_board();
#elif defined(xMRAA_INTEL_JOULE_EXPANSION)
plat = mraa_joule_expansion_board();
#else
#error "Not using a valid platform value from mraa_platform_t - cannot compile"
#endif

View File

@@ -22,6 +22,24 @@ add_test (NAME py_i2c_read_bytes_data COMMAND ${PYTHON_DEFAULT_EXECUTABLE} ${CMA
add_test (NAME py_i2c_read_word_data COMMAND ${PYTHON_DEFAULT_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/i2c_checks_read_word_data.py)
add_test (NAME py_i2c_write_word_data COMMAND ${PYTHON_DEFAULT_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/i2c_checks_write_word_data.py)
add_test (NAME py_spi_bit_per_word COMMAND ${PYTHON_DEFAULT_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/spi_checks_bit_per_word.py)
add_test (NAME py_spi_checks_lsbmode COMMAND ${PYTHON_DEFAULT_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/spi_checks_lsbmode.py)
add_test (NAME py_spi_checks_mode COMMAND ${PYTHON_DEFAULT_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/spi_checks_mode.py)
add_test (NAME py_spi_checks_freq COMMAND ${PYTHON_DEFAULT_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/spi_checks_freq.py)
add_test (NAME py_spi_checks_write_byte COMMAND ${PYTHON_DEFAULT_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/spi_checks_write_byte.py)
add_test (NAME py_spi_checks_write_word COMMAND ${PYTHON_DEFAULT_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/spi_checks_write_word.py)
add_test (NAME py_spi_checks_write COMMAND ${PYTHON_DEFAULT_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/spi_checks_write.py)
add_test (NAME py_uart_checks_set_baudrate COMMAND ${PYTHON_DEFAULT_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/uart_checks_set_baudrate.py)
add_test (NAME py_uart_checks_flush COMMAND ${PYTHON_DEFAULT_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/uart_checks_flush.py)
add_test (NAME py_uart_checks_set_flowcontrol COMMAND ${PYTHON_DEFAULT_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/uart_checks_set_flowcontrol.py)
add_test (NAME py_uart_checks_set_mode COMMAND ${PYTHON_DEFAULT_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/uart_checks_set_mode.py)
add_test (NAME py_uart_checks_set_nonblocking COMMAND ${PYTHON_DEFAULT_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/uart_checks_set_nonblocking.py)
add_test (NAME py_uart_checks_set_timeout COMMAND ${PYTHON_DEFAULT_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/uart_checks_set_timeout.py)
add_test (NAME py_uart_checks_data_available COMMAND ${PYTHON_DEFAULT_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/uart_checks_data_available.py)
add_test (NAME py_uart_checks_write COMMAND ${PYTHON_DEFAULT_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/uart_checks_write.py)
add_test (NAME py_uart_checks_read COMMAND ${PYTHON_DEFAULT_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/uart_checks_read.py)
set_tests_properties(py_general
py_platform
py_gpio_basic
@@ -42,4 +60,20 @@ set_tests_properties(py_general
py_i2c_read_bytes_data
py_i2c_read_word_data
py_i2c_write_word_data
py_spi_bit_per_word
py_spi_checks_lsbmode
py_spi_checks_mode
py_spi_checks_freq
py_spi_checks_write_byte
py_spi_checks_write_word
py_spi_checks_write
py_uart_checks_set_baudrate
py_uart_checks_flush
py_uart_checks_set_flowcontrol
py_uart_checks_set_mode
py_uart_checks_set_nonblocking
py_uart_checks_set_timeout
py_uart_checks_data_available
py_uart_checks_write
py_uart_checks_read
PROPERTIES ENVIRONMENT "PYTHONPATH=${PYTHON_DEFAULT_PYTHONPATH}")

View File

@@ -27,7 +27,7 @@
import mraa as m
import unittest as u
PLATFORM_PINCOUNT = 4
PLATFORM_PINCOUNT = 10
PLATFORM_STD_ADC_RES_BITS = 10
PLATFORM_MAX_ADC_RES_BITS = 12

View File

@@ -0,0 +1,48 @@
#!/usr/bin/env python
# Author: Alex Tereschenko <alext.mkrs@gmail.com>
# Copyright (c) 2016 Alex Tereschenko.
#
# Permission is hereby granted, free of charge, to any person obtaining
# a copy of this software and associated documentation files (the
# "Software"), to deal in the Software without restriction, including
# without limitation the rights to use, copy, modify, merge, publish,
# distribute, sublicense, and/or sell copies of the Software, and to
# permit persons to whom the Software is furnished to do so, subject to
# the following conditions:
#
# The above copyright notice and this permission notice shall be
# included in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
# LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
# OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
# WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
import mraa as m
import unittest as u
from spi_checks_shared import *
class SpiChecksBitPerWord(u.TestCase):
def setUp(self):
self.spi = m.Spi(MRAA_SPI_BUS_NUM)
def tearDown(self):
del self.spi
def test_spi_bit_per_word(self):
TEST_BIT_PER_WORD = 16
self.assertEqual(self.spi.bitPerWord(TEST_BIT_PER_WORD),
m.SUCCESS,
"Setting bit per word to %d did not return success" %TEST_BIT_PER_WORD)
def test_i2c_frequency_invalid_smaller_than_min(self):
TEST_BIT_PER_WORD = -100
self.assertRaises(OverflowError, self.spi.bitPerWord, TEST_BIT_PER_WORD)
if __name__ == "__main__":
u.main()

View File

@@ -0,0 +1,56 @@
#!/usr/bin/env python
# Author: Alex Tereschenko <alext.mkrs@gmail.com>
# Copyright (c) 2016 Alex Tereschenko.
#
# Permission is hereby granted, free of charge, to any person obtaining
# a copy of this software and associated documentation files (the
# "Software"), to deal in the Software without restriction, including
# without limitation the rights to use, copy, modify, merge, publish,
# distribute, sublicense, and/or sell copies of the Software, and to
# permit persons to whom the Software is furnished to do so, subject to
# the following conditions:
#
# The above copyright notice and this permission notice shall be
# included in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
# LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
# OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
# WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
import mraa as m
import unittest as u
from spi_checks_shared import *
class SpiChecksFreq(u.TestCase):
def setUp(self):
self.spi = m.Spi(MRAA_SPI_BUS_NUM)
def tearDown(self):
del self.spi
def test_spi_set_freq(self):
TEST_FREQ = 20000000
self.assertEqual(self.spi.frequency(TEST_FREQ),
m.SUCCESS,
"Setting SPI frequency to %d did not return success" %TEST_FREQ)
def test_spi_set_freq_invalid_smaller_than_min_zero(self):
TEST_FREQ = 0
self.assertEqual(self.spi.frequency(TEST_FREQ),
m.ERROR_INVALID_PARAMETER,
"Setting SPI frequency to %d did not return error" %TEST_FREQ)
def test_spi_set_freq_invalid_smaller_than_min_negative(self):
TEST_FREQ = -10
self.assertEqual(self.spi.frequency(TEST_FREQ),
m.ERROR_INVALID_PARAMETER,
"Setting SPI frequency to %d did not return error" %TEST_FREQ)
if __name__ == "__main__":
u.main()

View File

@@ -0,0 +1,55 @@
#!/usr/bin/env python
# Author: Alex Tereschenko <alext.mkrs@gmail.com>
# Copyright (c) 2016 Alex Tereschenko.
#
# Permission is hereby granted, free of charge, to any person obtaining
# a copy of this software and associated documentation files (the
# "Software"), to deal in the Software without restriction, including
# without limitation the rights to use, copy, modify, merge, publish,
# distribute, sublicense, and/or sell copies of the Software, and to
# permit persons to whom the Software is furnished to do so, subject to
# the following conditions:
#
# The above copyright notice and this permission notice shall be
# included in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
# LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
# OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
# WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
import mraa as m
import unittest as u
from spi_checks_shared import *
class SpiChecksLsbmode(u.TestCase):
def setUp(self):
self.spi = m.Spi(MRAA_SPI_BUS_NUM)
def tearDown(self):
del self.spi
def test_spi_set_lsbmode_false(self):
TEST_LSBMODE = False
self.assertEqual(self.spi.lsbmode(TEST_LSBMODE),
m.SUCCESS,
"Setting LSB mode to %s did not return success" %TEST_LSBMODE)
def test_spi_set_lsbmode_true(self):
TEST_LSBMODE = True
self.assertEqual(self.spi.lsbmode(TEST_LSBMODE),
m.SUCCESS,
"Setting LSB mode to %s did not return success" %TEST_LSBMODE)
def test_spi_set_lsbmode_invalid(self):
TEST_LSBMODE = 10
self.assertRaises(TypeError, self.spi.lsbmode, TEST_LSBMODE)
if __name__ == "__main__":
u.main()

View File

@@ -0,0 +1,74 @@
#!/usr/bin/env python
# Author: Alex Tereschenko <alext.mkrs@gmail.com>
# Copyright (c) 2016 Alex Tereschenko.
#
# Permission is hereby granted, free of charge, to any person obtaining
# a copy of this software and associated documentation files (the
# "Software"), to deal in the Software without restriction, including
# without limitation the rights to use, copy, modify, merge, publish,
# distribute, sublicense, and/or sell copies of the Software, and to
# permit persons to whom the Software is furnished to do so, subject to
# the following conditions:
#
# The above copyright notice and this permission notice shall be
# included in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
# LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
# OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
# WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
import mraa as m
import unittest as u
from spi_checks_shared import *
class SpiChecksMode(u.TestCase):
def setUp(self):
self.spi = m.Spi(MRAA_SPI_BUS_NUM)
def tearDown(self):
del self.spi
def test_spi_set_mode_MODE0(self):
TEST_MODE = m.SPI_MODE0
self.assertEqual(self.spi.mode(TEST_MODE),
m.SUCCESS,
"Setting SPI mode to %d did not return success" %TEST_MODE)
def test_spi_set_mode_MODE1(self):
TEST_MODE = m.SPI_MODE1
self.assertEqual(self.spi.mode(TEST_MODE),
m.SUCCESS,
"Setting SPI mode to %d did not return success" %TEST_MODE)
def test_spi_set_mode_MODE2(self):
TEST_MODE = m.SPI_MODE2
self.assertEqual(self.spi.mode(TEST_MODE),
m.SUCCESS,
"Setting SPI mode to %d did not return success" %TEST_MODE)
def test_spi_set_mode_MODE3(self):
TEST_MODE = m.SPI_MODE3
self.assertEqual(self.spi.mode(TEST_MODE),
m.SUCCESS,
"Setting SPI mode to %d did not return success" %TEST_MODE)
def test_spi_set_mode_invalid_smaller_than_min(self):
TEST_MODE = -10
self.assertEqual(self.spi.mode(TEST_MODE),
m.ERROR_INVALID_PARAMETER,
"Setting SPI mode to %d did not return error" %TEST_MODE)
def test_spi_set_mode_invalid_bigger_than_max(self):
TEST_MODE = 150
self.assertEqual(self.spi.mode(TEST_MODE),
m.ERROR_INVALID_PARAMETER,
"Setting SPI mode to %d did not return error" %TEST_MODE)
if __name__ == "__main__":
u.main()

View File

@@ -0,0 +1,28 @@
#!/usr/bin/env python
# Author: Alex Tereschenko <alext.mkrs@gmail.com>
# Copyright (c) 2016 Alex Tereschenko.
#
# Permission is hereby granted, free of charge, to any person obtaining
# a copy of this software and associated documentation files (the
# "Software"), to deal in the Software without restriction, including
# without limitation the rights to use, copy, modify, merge, publish,
# distribute, sublicense, and/or sell copies of the Software, and to
# permit persons to whom the Software is furnished to do so, subject to
# the following conditions:
#
# The above copyright notice and this permission notice shall be
# included in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
# LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
# OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
# WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
MRAA_SPI_BUS_NUM = 0
MOCK_SPI_REPLY_DATA_MODIFIER_BYTE = 0xAB
MOCK_SPI_REPLY_DATA_MODIFIER_WORD = 0xABBA
MOCK_SPI_TEST_DATA_LEN = 5

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