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modify a small bug on tbs6104

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This commit is contained in:
tbslucy
2019-09-03 09:45:44 +08:00
parent 9e6dedfd6a
commit eed3e87f94
4 changed files with 98 additions and 62 deletions
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44
drivers/media/pci/tbsci/tbsci.c
View File

@@ -39,8 +39,8 @@ static void start_outdma_transfer(struct ca_channel *pchannel)
speedctrl =div_u64(1000000000ULL * WRITE_TOTAL_SIZE,(pchannel->w_bitrate )*1024*1024 );
TBS_PCIE_WRITE(dmaout_adapter0+pchannel->channel_index*0x1000, DMA_SPEED_CTRL, (speedctrl));
TBS_PCIE_WRITE(dmaout_adapter0+pchannel->channel_index*0x1000, DMA_INT_MONITOR, (2*speedctrl));
speedctrl = div_u64(speedctrl*9 , WRITE_BLOCK_CEEL*10);
speedctrl = div_u64(speedctrl , WRITE_BLOCK_CEEL);
//speedctrl = div_u64(speedctrl*9 , WRITE_BLOCK_CEEL*10);
TBS_PCIE_WRITE(dmaout_adapter0+pchannel->channel_index*0x1000, DMA_FRAME_CNT, (speedctrl));
}
@@ -224,7 +224,8 @@ static long tbsci_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
struct dtv_properties props ;
struct dtv_property prop;
int ret = 0;
u32 clk_freq;
u32 clk_data;
switch (cmd)
{
case FE_SET_PROPERTY:
@@ -236,7 +237,32 @@ static long tbsci_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
case MODULATOR_INPUT_BITRATE:
printk("%s ca%d:INPUT_BITRATE:%d\n", __func__,chan->channel_index,prop.u.data);
chan->w_bitrate = prop.u.data -5;
chan->w_bitrate = prop.u.data;
//set clock preset
if(chan->w_bitrate<=76)
clk_data = (125*188*8)/(204*chan->w_bitrate*2)-1;
else if((chan->w_bitrate>76)&&(chan->w_bitrate<84))
clk_data = 0x10;
else if((chan->w_bitrate>=84)&&(chan->w_bitrate<88))
clk_data = 5; //10freq
else if((chan->w_bitrate>=88)&&(chan->w_bitrate<102))
clk_data = 0x20;
else if((chan->w_bitrate>=102)&&(chan->w_bitrate<110))
clk_data = 4;//8freq
else if((chan->w_bitrate>=110)&&(chan->w_bitrate<119))
clk_data = 0x30;
else if((chan->w_bitrate>=119)&&(chan->w_bitrate<128))
clk_data = 0x40;
else if((chan->w_bitrate>=128)&&(chan->w_bitrate<142))
clk_data = 0x50;
else
clk_data = 3 ;
printk(" clk preset val : %d\n",clk_data);
TBS_PCIE_WRITE(pcmcia_adapter0+chan->channel_index*0x1000, 0x10, clk_data);
clk_data=TBS_PCIE_READ(pcmcia_adapter0+chan->channel_index*0x1000, 0x10);
printk(" read clk preset val : %d\n",clk_data);
break;
default:
ret = -EINVAL;
@@ -286,6 +312,8 @@ static void write_dma_work(struct work_struct *p_work)
int count = 0;
int ret;
u32 delay;
spin_lock(&pchannel->writelock);
TBS_PCIE_READ(dmaout_adapter0+pchannel->channel_index*0x1000, 0x00);
//TBS_PCIE_WRITE(int_adapter, 0x00, (0x40<<index) );
count = kfifo_len(&pchannel->w_fifo);
@@ -303,6 +331,7 @@ static void write_dma_work(struct work_struct *p_work)
TBS_PCIE_WRITE(dmaout_adapter0+pchannel->channel_index*0x1000, DMA_DELAYSHORT, (delay));
//TBS_PCIE_WRITE(int_adapter, 0x04, 0x00000001);
}
spin_unlock(&pchannel->writelock);
}
@@ -316,7 +345,7 @@ static void read_dma_work(struct work_struct *p_work)
u8 * data;
int i;
mutex_lock(&pchannel->readlock);
spin_lock(&pchannel->readlock);
if (pchannel->cnt < 2){
next_buffer = (TBS_PCIE_READ(dma_wr_adapter0+pchannel->channel_index*0x1000, 0x00) +READ_CELLS-1) & (READ_CELLS-1);
@@ -366,7 +395,7 @@ static void read_dma_work(struct work_struct *p_work)
}
pchannel->next_buffer = (u8)next_buffer;
}
mutex_unlock(&pchannel->readlock);
spin_unlock(&pchannel->readlock);
}
@@ -876,7 +905,8 @@ static int tbs_adapters_init(struct tbs_pcie_dev *dev)
INIT_WORK(&tbsca->write_work,write_dma_work);
init_waitqueue_head(&tbsca->write_wq);
init_waitqueue_head(&tbsca->read_wq);
mutex_init(&tbsca->readlock);
spin_lock_init(&tbsca->readlock);
spin_lock_init(&tbsca->writelock);
}
ret = dvb_register_adapter(&dev->adapter, "tbsci",THIS_MODULE,&dev->pdev->dev,adapter_nr);

67
drivers/media/pci/tbsci/tbsci.h
View File

@@ -11,7 +11,7 @@
#define TS_PACKET_SIZE 188
#define WRITE_TOTAL_SIZE (TS_PACKET_SIZE*96)
#define WRITE_BLOCK_CEEL (96)
#define WRITE_BLOCK_CEEL (96)
#define READ_PKTS (256)
#define READ_CELLS (16)
@@ -22,54 +22,55 @@
struct ca_channel
{
struct tbs_pcie_dev *dev;
u8 dma_offset;
u8 next_buffer;
u8 cnt;
struct work_struct read_work;
struct work_struct write_work;
wait_queue_head_t write_wq;
wait_queue_head_t read_wq;
u8 write_ready;
u8 read_ready;
struct mutex readlock;
u8 dma_offset;
u8 next_buffer;
u8 cnt;
struct work_struct read_work;
struct work_struct write_work;
wait_queue_head_t write_wq;
wait_queue_head_t read_wq;
u8 write_ready;
u8 read_ready;
spinlock_t readlock;
spinlock_t writelock;
__le32 *w_dmavirt;
dma_addr_t w_dmaphy;
__le32 *r_dmavirt;
dma_addr_t r_dmaphy;
struct kfifo w_fifo;
struct kfifo r_fifo;
u8 channel_index;
u8 is_open;
__le32 *w_dmavirt;
dma_addr_t w_dmaphy;
__le32 *r_dmavirt;
dma_addr_t r_dmaphy;
struct kfifo w_fifo;
struct kfifo r_fifo;
u8 channel_index;
u8 is_open;
//struct tasklet_struct tasklet;
/*ca */
struct dvb_ca_en50221 ca;
struct mutex lock;
int status;
struct mutex lock;
int status;
struct dvb_device *ci_dev;
struct dvb_device *ci_dev;
/* dvb */
struct dvb_frontend fe;
struct dmxdev dmxdev;
struct dvb_demux demux;
struct dvb_net dvbnet;
struct dmx_frontend fe_hw;
struct dmx_frontend fe_mem;
struct dtv_frontend_properties dvt_properties;
struct dmxdev dmxdev;
struct dvb_demux demux;
struct dvb_net dvbnet;
struct dmx_frontend fe_hw;
struct dmx_frontend fe_mem;
struct dtv_frontend_properties dvt_properties;
int feeds;
u32 w_bitrate;
u32 w_bitrate;
};
struct tbs_pcie_dev {
struct pci_dev *pdev;
void __iomem *mmio;
struct dvb_adapter adapter;
struct ca_channel channnel[CHANNELS];
struct pci_dev *pdev;
void __iomem *mmio;
struct dvb_adapter adapter;
struct ca_channel channnel[CHANNELS];
};

9
drivers/media/pci/tbsmod/tbsmod.c
View File

@@ -896,6 +896,11 @@ static BOOL ad9789_setFre_dvbt (struct tbs_pcie_dev *dev, unsigned long bandwidt
buff[0] = 0x80;
ad9789_wt_nBytes(dev, 1, AD9789_FRE_UPDATE, buff);
buff[0] = 0x00;
ad9789_wt_nBytes(dev, 1, AD9789_PARAMETER_UPDATE, buff);
buff[0] = 0x80;
ad9789_wt_nBytes(dev, 1, AD9789_PARAMETER_UPDATE, buff);
return TRUE;
}
@@ -1001,7 +1006,7 @@ static void AD9789_Configration_dvbt(struct tbs_pcie_dev *dev)
buff[0] = 0x00;
ad9789_wt_nBytes(dev, 1, AD9789_PARAMETER_UPDATE, buff);
buff[0] = 0x0; // disable default four channels
buff[0] = 0x00; // disable default four channels
ad9789_wt_nBytes(dev, 1, AD9789_CHANNEL_ENABLE, buff);
return;
@@ -1341,9 +1346,9 @@ static long tbsmod_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
dev->frequency = params.frequency_khz *1000;
dev->bw = params.bandwidth_hz/1000;
AD4351_Configration_dvbt(dev);
set_Modulation_dvbt(dev,&params);
ad9789_setFre_dvbt(dev, dev->bw, dev->frequency);
set_Modulation_dvbt(dev,&params);
break;
}

40
drivers/media/pci/tbsmod/tbsmod.h
View File

@@ -10,39 +10,39 @@
#define FIFOSIZE (2048 * 1024)
#define DMASIZE (32 * 1024)
#define BLOCKSIZE (188*96)
#define BLOCKCEEL (96)
#define BLOCKSIZE (188*96)
#define BLOCKCEEL (96)
struct mod_channel
{
struct tbs_pcie_dev *dev;
__le32 *dmavirt;
dma_addr_t dmaphy;
dev_t devno;
u8 dma_start_flag;
struct kfifo fifo;
u8 channel_index;
u32 input_bitrate;
__le32 *dmavirt;
dma_addr_t dmaphy;
dev_t devno;
u8 dma_start_flag;
struct kfifo fifo;
u8 channel_index;
u32 input_bitrate;
spinlock_t adap_lock; // dma lock
};
struct tbs_pcie_dev {
struct pci_dev *pdev;
void __iomem *mmio;
struct mutex spi_mutex; // lock spi access
struct mutex ioctl_mutex; // lock ioctls access
struct pci_dev *pdev;
void __iomem *mmio;
struct mutex spi_mutex; // lock spi access
struct mutex ioctl_mutex; // lock ioctls access
spinlock_t chip_lock; // lock chip access
u8 modulation;
u32 frequency;
u32 srate;
struct mod_channel channel[CHANNELS];
u8 mod_index;
u32 cardid;
u8 modulation;
u32 frequency;
u32 srate;
struct mod_channel channel[CHANNELS];
u8 mod_index;
u32 cardid;
u8 bw; //dvbt
u8 bw; //dvbt
};