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Merge tag 'tegra-for-6.5-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

Browse Source 
arm64: tegra: Device tree changes for v6.5-rc1

This introduces support for the IGX Orin and Jetson Orin Nano devices
and enables various additional features on the Jetson AGX Orin and
Jetson Orin NX. This also enables some basic thermal support to prevent
the devices from overheating.

Support for the GPU on the Google Pixel C is enabled and various minor
issues are fixed and cleaned up.

* tag 'tegra-for-6.5-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Enable thermal support on Jetson Orin Nano
  arm64: tegra: Enable thermal support on Jetson Orin NX
  arm64: tegra: Enable thermal support on Jetson AGX Orin
  arm64: tegra: Add Tegra234 thermal support
  arm64: tegra: Add a few blank lines for better readability
  arm64: tegra: Sort properties more logically
  arm64: tegra: Enable GPU on Smaug
  arm64: tegra: Add GPU power rail regulator on Smaug
  arm64: tegra: Update USB phy-name for Jetson Orin NX
  arm64: tegra: Enable USB device for Jetson AGX Orin
  arm64: tegra: Add Tegra234 pin controllers
  arm64: tegra: Support Jetson Orin Nano Developer Kit
  arm64: tegra: Add missing cache properties on Tegra210
  arm64: tegra: Fix PCIe regulator for Orin Jetson AGX
  arm64: tegra: Add CPU OPP tables and interconnects property
  arm64: tegra: Add support for IGX Orin

Link: https://lore.kernel.org/r/20230609193620.2275240-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2023-06-20 22:34:46 +02:00
parent 79e4760720 6312e57b32
commit a9c7f8d0cf
16 changed files with 928 additions and 73 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm64/boot/dts/nvidia/Makefile
View File

@@ -9,7 +9,9 @@ DTC_FLAGS_tegra194-p2972-0000 := -@
DTC_FLAGS_tegra194-p3509-0000+p3668-0000 := -@
DTC_FLAGS_tegra194-p3509-0000+p3668-0001 := -@
DTC_FLAGS_tegra234-p3737-0000+p3701-0000 := -@
DTC_FLAGS_tegra234-p3740-0002+p3701-0008 := -@
DTC_FLAGS_tegra234-p3768-0000+p3767-0000 := -@
DTC_FLAGS_tegra234-p3768-0000+p3767-0005 := -@
dtb-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra132-norrin.dtb
dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2371-0000.dtb
@@ -25,4 +27,6 @@ dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb
dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0001.dtb
dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb
dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3737-0000+p3701-0000.dtb
dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3740-0002+p3701-0008.dtb
dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3768-0000+p3767-0000.dtb
dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3768-0000+p3767-0005.dtb

23
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
View File

@@ -36,6 +36,11 @@
};
};
gpu@57000000 {
vdd-supply = <&max77621_gpu>;
status = "okay";
};
pinmux: pinmux@700008d4 {
pinctrl-names = "boot";
pinctrl-0 = <&state_boot>;
@@ -1370,11 +1375,27 @@
maxim,dvs-default-state = <1>;
maxim,enable-active-discharge;
maxim,enable-bias-control;
maxim,enable-etr;
maxim,enable-gpio = <&pmic 5 0>;
maxim,externally-enable;
};
max77621_gpu: regulator@1c {
compatible = "maxim,max77621";
reg = <0x1c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(A, 6) IRQ_TYPE_LEVEL_LOW>;
regulator-min-microvolt = <840000>;
regulator-max-microvolt = <1150000>;
regulator-name = "PPVAR_GPU";
regulator-ramp-delay = <12500>;
maxim,dvs-default-state = <1>;
maxim,enable-active-discharge;
maxim,enable-bias-control;
maxim,disable-etr;
maxim,enable-gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
maxim,externally-enable;
};
pmic: pmic@3c {
compatible = "maxim,max77620";
reg = <0x3c>;

1
arch/arm64/boot/dts/nvidia/tegra210.dtsi
View File

@@ -2000,6 +2000,7 @@
L2: l2-cache {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};

24
arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi
View File

@@ -126,7 +126,7 @@
regulator-name = "VDD_3V3_PCIE";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio TEGRA234_MAIN_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
gpio = <&gpio TEGRA234_MAIN_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
regulator-boot-on;
enable-active-high;
};
@@ -139,4 +139,26 @@
gpio = <&gpio TEGRA234_MAIN_GPIO(A, 1) GPIO_ACTIVE_LOW>;
regulator-boot-on;
};
thermal-zones {
tj-thermal {
polling-delay = <1000>;
polling-delay-passive = <1000>;
status = "okay";
trips {
tj_trip_active0: active-0 {
temperature = <75000>;
hysteresis = <4000>;
type = "active";
};
tj_trip_active1: active-1 {
temperature = <95000>;
hysteresis = <4000>;
type = "active";
};
};
};
};
};

111
arch/arm64/boot/dts/nvidia/tegra234-p3701-0008.dtsi Normal file
View File

@@ -0,0 +1,111 @@
// SPDX-License-Identifier: GPL-2.0
#include "tegra234.dtsi"
/ {
compatible = "nvidia,p3701-0008", "nvidia,tegra234";
bus@0 {
i2c@3160000 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
label = "module";
vcc-supply = <&vdd_1v8_hs>;
address-width = <8>;
pagesize = <8>;
size = <256>;
read-only;
};
};
spi@3270000 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <102000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
};
};
mmc@3460000 {
status = "okay";
bus-width = <8>;
non-removable;
};
i2c@c240000 {
status = "okay";
};
rtc@c2a0000 {
status = "okay";
};
pmc@c360000 {
nvidia,invert-interrupt;
};
};
bpmp {
i2c {
status = "okay";
thermal-sensor@4c {
status = "okay";
reg = <0x4c>;
vcc-supply = <&vdd_1v8_ao>;
};
};
thermal {
status = "okay";
};
};
vdd_1v8_ao: regulator-vdd-1v8-ao {
compatible = "regulator-fixed";
regulator-name = "VDD_1V8_AO";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vdd_1v8_hs: regulator-vdd-1v8-hs {
compatible = "regulator-fixed";
regulator-name = "VDD_1V8_HS";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vdd_1v8_ls: regulator-vdd-1v8-ls {
compatible = "regulator-fixed";
regulator-name = "VDD_1V8_LS";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vdd_3v3_ao: regulator-vdd-3v3-ao {
compatible = "regulator-fixed";
regulator-name = "vdd-AO-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdd_5v0_sys: regulator-vdd-5v0-sys {
compatible = "regulator-fixed";
regulator-name = "VIN_SYS_5V0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
};

46
arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
View File

@@ -2096,7 +2096,8 @@
ports {
usb2-0 {
mode = "host";
mode = "otg";
usb-role-switch;
status = "okay";
port {
hs_typec_p1: endpoint {
@@ -2152,6 +2153,14 @@
};
};
usb@3550000 {
status = "okay";
phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
<&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}>;
phy-names = "usb2-0", "usb3-0";
};
usb@3610000 {
status = "okay";
@@ -2238,6 +2247,7 @@
i2c@c240000 {
status = "okay";
typec@8 {
compatible = "cypress,cypd4226";
reg = <0x08>;
@@ -2245,22 +2255,27 @@
interrupts = <TEGRA234_MAIN_GPIO(Y, 4) IRQ_TYPE_LEVEL_LOW>;
firmware-name = "nvidia,jetson-agx-xavier";
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
ccg_typec_con0: connector@0 {
compatible = "usb-c-connector";
reg = <0>;
label = "USB-C";
data-role = "host";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
hs_ucsi_ccg_p0: endpoint {
remote-endpoint = <&hs_typec_p0>;
};
};
port@1 {
reg = <1>;
ss_ucsi_ccg_p0: endpoint {
@@ -2269,20 +2284,24 @@
};
};
};
ccg_typec_con1: connector@1 {
compatible = "usb-c-connector";
reg = <1>;
label = "USB-C";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
hs_ucsi_ccg_p1: endpoint {
remote-endpoint = <&hs_typec_p1>;
};
};
port@1 {
reg = <1>;
ss_ucsi_ccg_p1: endpoint {
@@ -2324,11 +2343,7 @@
};
pwm-fan {
compatible = "pwm-fan";
pwms = <&pwm3 0 45334>;
cooling-levels = <0 95 178 255>;
#cooling-cells = <2>;
cooling-levels = <66 215 255>;
};
serial {
@@ -2336,9 +2351,8 @@
};
sound {
status = "okay";
compatible = "nvidia,tegra186-audio-graph-card";
status = "okay";
dais = /* ADMAIF (FE) Ports */
<&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
@@ -2415,4 +2429,20 @@
"CVB-RT DMIC1", "CVB-RT MIC",
"CVB-RT DMIC2", "CVB-RT MIC";
};
thermal-zones {
tj-thermal {
cooling-maps {
map-active-0 {
cooling-device = <&fan 0 1>;
trip = <&tj_trip_active0>;
};
map-active-1 {
cooling-device = <&fan 1 2>;
trip = <&tj_trip_active1>;
};
};
};
};
};

6
arch/arm64/boot/dts/nvidia/tegra234-p3737-0000.dtsi
View File

@@ -33,6 +33,12 @@
};
};
fan: pwm-fan {
compatible = "pwm-fan";
pwms = <&pwm3 0 45334>;
#cooling-cells = <2>;
};
vdd_1v8_sys: regulator-vdd-1v8-sys {
compatible = "regulator-fixed";
regulator-name = "VDD_1V8_SYS";

154
arch/arm64/boot/dts/nvidia/tegra234-p3740-0002+p3701-0008.dts Normal file
View File

@@ -0,0 +1,154 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/input/gpio-keys.h>
#include "tegra234-p3701-0008.dtsi"
#include "tegra234-p3740-0002.dtsi"
/ {
model = "NVIDIA IGX Orin Development Kit";
compatible = "nvidia,p3740-0002+p3701-0008", "nvidia,p3701-0008", "nvidia,tegra234";
aliases {
serial0 = &tcu;
};
chosen {
stdout-path = "serial0:115200n8";
};
bus@0 {
host1x@13e00000 {
nvdec@15480000 {
status = "okay";
};
};
pcie@140e0000 {
status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8_ls>;
phys = <&p2u_gbe_4>, <&p2u_gbe_5>;
phy-names = "p2u-0", "p2u-1";
};
pcie@14100000 {
status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
phys = <&p2u_hsio_3>;
phy-names = "p2u-0";
};
pcie@14160000 {
status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
phys = <&p2u_hsio_7>, <&p2u_hsio_6>, <&p2u_hsio_5>,
<&p2u_hsio_4>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
};
pcie@141a0000 {
status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8_ls>;
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
"p2u-5", "p2u-6", "p2u-7";
};
pcie@141e0000 {
status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8_ls>;
phys = <&p2u_gbe_0>, <&p2u_gbe_1>;
phy-names = "p2u-0", "p2u-1";
};
aconnect@2900000 {
status = "okay";
};
serial@3100000 {
compatible = "nvidia,tegra194-hsuart";
status = "okay";
};
i2c@3160000 {
status = "okay";
};
i2c@3180000 {
status = "okay";
};
i2c@3190000 {
status = "okay";
};
i2c@31b0000 {
status = "okay";
};
i2c@31c0000 {
status = "okay";
};
i2c@31e0000 {
status = "okay";
};
spi@3270000 {
status = "okay";
};
hda@3510000 {
nvidia,model = "NVIDIA IGX HDA";
status = "okay";
};
fuse@3810000 {
status = "okay";
};
i2c@c240000 {
status = "okay";
};
i2c@c250000 {
status = "okay";
};
};
gpio-keys {
compatible = "gpio-keys";
status = "okay";
key-force-recovery {
label = "Force Recovery";
gpios = <&gpio TEGRA234_MAIN_GPIO(G, 0) GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <BTN_1>;
};
key-power {
label = "Power";
gpios = <&gpio_aon TEGRA234_AON_GPIO(EE, 4) GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <KEY_POWER>;
wakeup-event-action = <EV_ACT_ASSERTED>;
wakeup-source;
};
key-suspend {
label = "Suspend";
gpios = <&gpio TEGRA234_MAIN_GPIO(G, 2) GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <KEY_SLEEP>;
};
};
serial {
status = "okay";
};
};

137
arch/arm64/boot/dts/nvidia/tegra234-p3740-0002.dtsi Normal file
View File

@@ -0,0 +1,137 @@
// SPDX-License-Identifier: GPL-2.0
/ {
compatible = "nvidia,p3740-0002";
bus@0 {
i2c@31c0000 {
/* carrier board ID EEPROM */
eeprom@55 {
compatible = "atmel,24c02";
reg = <0x55>;
label = "system";
vcc-supply = <&vdd_1v8_ls>;
address-width = <8>;
pagesize = <8>;
size = <256>;
read-only;
};
};
padctl@3520000 {
vclamp-usb-supply = <&vdd_1v8_ao>;
avdd-usb-supply = <&vdd_3v3_ao>;
status = "okay";
pads {
usb2 {
lanes {
usb2-0 {
nvidia,function = "xusb";
status = "okay";
};
usb2-1 {
nvidia,function = "xusb";
status = "okay";
};
usb2-2 {
nvidia,function = "xusb";
status = "okay";
};
usb2-3 {
nvidia,function = "xusb";
status = "okay";
};
};
};
usb3 {
lanes {
usb3-0 {
nvidia,function = "xusb";
status = "okay";
};
usb3-1 {
nvidia,function = "xusb";
status = "okay";
};
usb3-2 {
nvidia,function = "xusb";
status = "okay";
};
};
};
};
ports {
usb2-0 {
mode = "otg";
usb-role-switch;
status = "okay";
vbus-supply = <&vdd_5v0_sys>;
};
usb2-1 {
mode = "host";
status = "okay";
vbus-supply = <&vdd_5v0_sys>;
};
usb2-2 {
mode = "host";
status = "okay";
vbus-supply = <&vdd_5v0_sys>;
};
usb2-3 {
mode = "host";
status = "okay";
vbus-supply = <&vdd_5v0_sys>;
};
usb3-0 {
nvidia,usb2-companion = <2>;
status = "okay";
};
usb3-1 {
nvidia,usb2-companion = <0>;
status = "okay";
};
usb3-2 {
nvidia,usb2-companion = <1>;
status = "okay";
};
};
};
usb@3550000 {
status = "okay";
phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
<&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}>;
phy-names = "usb2-0", "usb3-0";
};
usb@3610000 {
status = "okay";
phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
<&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
<&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-2}>,
<&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-3}>,
<&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-0}>,
<&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}>,
<&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>;
phy-names = "usb2-0", "usb2-1", "usb2-2", "usb2-3",
"usb3-0", "usb3-1", "usb3-2";
};
};
};

14
arch/arm64/boot/dts/nvidia/tegra234-p3767-0005.dtsi Normal file
View File

@@ -0,0 +1,14 @@
// SPDX-License-Identifier: GPL-2.0
#include "tegra234-p3767.dtsi"
/ {
compatible = "nvidia,p3767-0005", "nvidia,tegra234";
model = "NVIDIA Jetson Orin Nano";
bus@0 {
hda@3510000 {
nvidia,model = "NVIDIA Jetson Orin Nano HDA";
};
};
};

62
arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi
View File

@@ -99,73 +99,23 @@
};
thermal-zones {
/*
* This monitoring is far from optimal, but it's good enough
* at this stage.
*/
cpu-thermal {
tj-thermal {
polling-delay = <1000>;
polling-delay-passive = <1000>;
status = "okay";
trips {
critical {
temperature = <104500>;
hysteresis = <0>;
type = "critical";
tj_trip_active0: active-0 {
temperature = <74000>;
hysteresis = <4000>;
type = "active";
};
hot {
temperature = <99000>;
hysteresis = <1000>;
type = "hot";
};
board_trip_passive: passive {
tj_trip_active1: active-1 {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
board_trip_active2: active-2 {
temperature = <80000>;
hysteresis = <4000>;
type = "active";
};
board_trip_active1: active-1 {
temperature = <65000>;
hysteresis = <4000>;
type = "active";
};
board_trip_active0: active-0 {
temperature = <50000>;
hysteresis = <4000>;
type = "active";
};
};
cooling-maps {
passive {
cooling-device = <&fan 3 3>;
trip = <&board_trip_passive>;
};
active2 {
cooling-device = <&fan 2 3>;
trip = <&board_trip_active2>;
};
active1 {
cooling-device = <&fan 1 2>;
trip = <&board_trip_active1>;
};
active0 {
cooling-device = <&fan 0 1>;
trip = <&board_trip_active0>;
};
};
};
};

23
arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767-0000.dts
View File

@@ -112,11 +112,8 @@
};
};
fan: pwm-fan {
compatible = "pwm-fan";
pwms = <&pwm3 0 45334>;
cooling-levels = <0 95 178 255>;
#cooling-cells = <2>;
pwm-fan {
cooling-levels = <0 187 255>;
};
vdd_3v3_pcie: regulator-vdd-3v3-pcie {
@@ -131,4 +128,20 @@
serial {
status = "okay";
};
thermal-zones {
tj-thermal {
cooling-maps {
map-active-0 {
cooling-device = <&fan 0 1>;
trip = <&tj_trip_active0>;
};
map-active-1 {
cooling-device = <&fan 1 2>;
trip = <&tj_trip_active1>;
};
};
};
};
};

33
arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767-0005.dts Normal file
View File

@@ -0,0 +1,33 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/input/gpio-keys.h>
#include "tegra234-p3767-0005.dtsi"
#include "tegra234-p3768-0000.dtsi"
/ {
compatible = "nvidia,p3768-0000+p3767-0005", "nvidia,p3767-0005", "nvidia,tegra234";
model = "NVIDIA Jetson Orin Nano Developer Kit";
pwm-fan {
cooling-levels = <0 187 255>;
};
thermal-zones {
tj-thermal {
cooling-maps {
map-active-0 {
cooling-device = <&fan 0 1>;
trip = <&tj_trip_active0>;
};
map-active-1 {
cooling-device = <&fan 1 2>;
trip = <&tj_trip_active1>;
};
};
};
};
};

3
arch/arm64/boot/dts/nvidia/tegra234-p3768-0000.dtsi
View File

@@ -119,7 +119,7 @@
phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
<&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}>;
phy-names = "usb2-0", "usb3-1";
phy-names = "usb2-0", "usb3-0";
};
usb@3610000 {
@@ -209,7 +209,6 @@
fan: pwm-fan {
compatible = "pwm-fan";
pwms = <&pwm3 0 45334>;
cooling-levels = <0 95 178 255>;
#cooling-cells = <2>;
};

341
arch/arm64/boot/dts/nvidia/tegra234.dtsi
View File

@@ -8,6 +8,7 @@
#include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
#include <dt-bindings/power/tegra234-powergate.h>
#include <dt-bindings/reset/tegra234-reset.h>
#include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
/ {
compatible = "nvidia,tegra234";
@@ -108,6 +109,12 @@
interrupt-controller;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pinmux 0 0 164>;
};
pinmux: pinmux@2430000 {
compatible = "nvidia,tegra234-pinmux";
reg = <0x0 0x2430000 0x0 0x19100>;
};
gpcdma: dma-controller@2600000 {
@@ -1749,6 +1756,12 @@
interrupt-controller;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pinmux_aon 0 0 32>;
};
pinmux_aon: pinmux@c300000 {
compatible = "nvidia,tegra234-pinmux-aon";
reg = <0x0 0xc300000 0x0 0x4000>;
};
pwm4: pwm@c340000 {
@@ -3015,6 +3028,11 @@
#address-cells = <1>;
#size-cells = <0>;
};
bpmp_thermal: thermal {
compatible = "nvidia,tegra186-bpmp-thermal";
#thermal-sensor-cells = <1>;
};
};
cpus {
@@ -3028,6 +3046,9 @@
enable-method = "psci";
operating-points-v2 = <&cl0_opp_tbl>;
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER0 &emc>;
i-cache-size = <65536>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@@ -3044,6 +3065,9 @@
enable-method = "psci";
operating-points-v2 = <&cl0_opp_tbl>;
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER0 &emc>;
i-cache-size = <65536>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@@ -3060,6 +3084,9 @@
enable-method = "psci";
operating-points-v2 = <&cl0_opp_tbl>;
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER0 &emc>;
i-cache-size = <65536>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@@ -3076,6 +3103,9 @@
enable-method = "psci";
operating-points-v2 = <&cl0_opp_tbl>;
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER0 &emc>;
i-cache-size = <65536>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@@ -3092,6 +3122,9 @@
enable-method = "psci";
operating-points-v2 = <&cl1_opp_tbl>;
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER1 &emc>;
i-cache-size = <65536>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@@ -3108,6 +3141,9 @@
enable-method = "psci";
operating-points-v2 = <&cl1_opp_tbl>;
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER1 &emc>;
i-cache-size = <65536>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@@ -3124,6 +3160,9 @@
enable-method = "psci";
operating-points-v2 = <&cl1_opp_tbl>;
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER1 &emc>;
i-cache-size = <65536>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@@ -3140,6 +3179,9 @@
enable-method = "psci";
operating-points-v2 = <&cl1_opp_tbl>;
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER1 &emc>;
i-cache-size = <65536>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@@ -3156,6 +3198,9 @@
enable-method = "psci";
operating-points-v2 = <&cl2_opp_tbl>;
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER2 &emc>;
i-cache-size = <65536>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@@ -3172,6 +3217,9 @@
enable-method = "psci";
operating-points-v2 = <&cl2_opp_tbl>;
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER2 &emc>;
i-cache-size = <65536>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@@ -3188,6 +3236,9 @@
enable-method = "psci";
operating-points-v2 = <&cl2_opp_tbl>;
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER2 &emc>;
i-cache-size = <65536>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@@ -3204,6 +3255,9 @@
enable-method = "psci";
operating-points-v2 = <&cl2_opp_tbl>;
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER2 &emc>;
i-cache-size = <65536>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@@ -3469,6 +3523,53 @@
<&bpmp TEGRA234_CLK_PLLA_OUT0>;
};
thermal-zones {
cpu-thermal {
thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CPU>;
status = "disabled";
};
gpu-thermal {
thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_GPU>;
status = "disabled";
};
cv0-thermal {
thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV0>;
status = "disabled";
};
cv1-thermal {
thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV1>;
status = "disabled";
};
cv2-thermal {
thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV2>;
status = "disabled";
};
soc0-thermal {
thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC0>;
status = "disabled";
};
soc1-thermal {
thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC1>;
status = "disabled";
};
soc2-thermal {
thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC2>;
status = "disabled";
};
tj-thermal {
thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_TJ_MAX>;
status = "disabled";
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
@@ -3478,4 +3579,244 @@
interrupt-parent = <&gic>;
always-on;
};
cl0_opp_tbl: opp-table-cluster0 {
compatible = "operating-points-v2";
opp-shared;
cl0_ch1_opp1: opp-115200000 {
opp-hz = /bits/ 64 <115200000>;
opp-peak-kBps = <816000>;
};
cl0_ch1_opp2: opp-268800000 {
opp-hz = /bits/ 64 <268800000>;
opp-peak-kBps = <816000>;
};
cl0_ch1_opp3: opp-422400000 {
opp-hz = /bits/ 64 <422400000>;
opp-peak-kBps = <816000>;
};
cl0_ch1_opp4: opp-576000000 {
opp-hz = /bits/ 64 <576000000>;
opp-peak-kBps = <816000>;
};
cl0_ch1_opp5: opp-729600000 {
opp-hz = /bits/ 64 <729600000>;
opp-peak-kBps = <816000>;
};
cl0_ch1_opp6: opp-883200000 {
opp-hz = /bits/ 64 <883200000>;
opp-peak-kBps = <816000>;
};
cl0_ch1_opp7: opp-1036800000 {
opp-hz = /bits/ 64 <1036800000>;
opp-peak-kBps = <816000>;
};
cl0_ch1_opp8: opp-1190400000 {
opp-hz = /bits/ 64 <1190400000>;
opp-peak-kBps = <816000>;
};
cl0_ch1_opp9: opp-1344000000 {
opp-hz = /bits/ 64 <1344000000>;
opp-peak-kBps = <1632000>;
};
cl0_ch1_opp10: opp-1497600000 {
opp-hz = /bits/ 64 <1497600000>;
opp-peak-kBps = <1632000>;
};
cl0_ch1_opp11: opp-1651200000 {
opp-hz = /bits/ 64 <1651200000>;
opp-peak-kBps = <2660000>;
};
cl0_ch1_opp12: opp-1804800000 {
opp-hz = /bits/ 64 <1804800000>;
opp-peak-kBps = <2660000>;
};
cl0_ch1_opp13: opp-1958400000 {
opp-hz = /bits/ 64 <1958400000>;
opp-peak-kBps = <3200000>;
};
cl0_ch1_opp14: opp-2112000000 {
opp-hz = /bits/ 64 <2112000000>;
opp-peak-kBps = <6400000>;
};
cl0_ch1_opp15: opp-2201600000 {
opp-hz = /bits/ 64 <2201600000>;
opp-peak-kBps = <6400000>;
};
};
cl1_opp_tbl: opp-table-cluster1 {
compatible = "operating-points-v2";
opp-shared;
cl1_ch1_opp1: opp-115200000 {
opp-hz = /bits/ 64 <115200000>;
opp-peak-kBps = <816000>;
};
cl1_ch1_opp2: opp-268800000 {
opp-hz = /bits/ 64 <268800000>;
opp-peak-kBps = <816000>;
};
cl1_ch1_opp3: opp-422400000 {
opp-hz = /bits/ 64 <422400000>;
opp-peak-kBps = <816000>;
};
cl1_ch1_opp4: opp-576000000 {
opp-hz = /bits/ 64 <576000000>;
opp-peak-kBps = <816000>;
};
cl1_ch1_opp5: opp-729600000 {
opp-hz = /bits/ 64 <729600000>;
opp-peak-kBps = <816000>;
};
cl1_ch1_opp6: opp-883200000 {
opp-hz = /bits/ 64 <883200000>;
opp-peak-kBps = <816000>;
};
cl1_ch1_opp7: opp-1036800000 {
opp-hz = /bits/ 64 <1036800000>;
opp-peak-kBps = <816000>;
};
cl1_ch1_opp8: opp-1190400000 {
opp-hz = /bits/ 64 <1190400000>;
opp-peak-kBps = <816000>;
};
cl1_ch1_opp9: opp-1344000000 {
opp-hz = /bits/ 64 <1344000000>;
opp-peak-kBps = <1632000>;
};
cl1_ch1_opp10: opp-1497600000 {
opp-hz = /bits/ 64 <1497600000>;
opp-peak-kBps = <1632000>;
};
cl1_ch1_opp11: opp-1651200000 {
opp-hz = /bits/ 64 <1651200000>;
opp-peak-kBps = <2660000>;
};
cl1_ch1_opp12: opp-1804800000 {
opp-hz = /bits/ 64 <1804800000>;
opp-peak-kBps = <2660000>;
};
cl1_ch1_opp13: opp-1958400000 {
opp-hz = /bits/ 64 <1958400000>;
opp-peak-kBps = <3200000>;
};
cl1_ch1_opp14: opp-2112000000 {
opp-hz = /bits/ 64 <2112000000>;
opp-peak-kBps = <6400000>;
};
cl1_ch1_opp15: opp-2201600000 {
opp-hz = /bits/ 64 <2201600000>;
opp-peak-kBps = <6400000>;
};
};
cl2_opp_tbl: opp-table-cluster2 {
compatible = "operating-points-v2";
opp-shared;
cl2_ch1_opp1: opp-115200000 {
opp-hz = /bits/ 64 <115200000>;
opp-peak-kBps = <816000>;
};
cl2_ch1_opp2: opp-268800000 {
opp-hz = /bits/ 64 <268800000>;
opp-peak-kBps = <816000>;
};
cl2_ch1_opp3: opp-422400000 {
opp-hz = /bits/ 64 <422400000>;
opp-peak-kBps = <816000>;
};
cl2_ch1_opp4: opp-576000000 {
opp-hz = /bits/ 64 <576000000>;
opp-peak-kBps = <816000>;
};
cl2_ch1_opp5: opp-729600000 {
opp-hz = /bits/ 64 <729600000>;
opp-peak-kBps = <816000>;
};
cl2_ch1_opp6: opp-883200000 {
opp-hz = /bits/ 64 <883200000>;
opp-peak-kBps = <816000>;
};
cl2_ch1_opp7: opp-1036800000 {
opp-hz = /bits/ 64 <1036800000>;
opp-peak-kBps = <816000>;
};
cl2_ch1_opp8: opp-1190400000 {
opp-hz = /bits/ 64 <1190400000>;
opp-peak-kBps = <816000>;
};
cl2_ch1_opp9: opp-1344000000 {
opp-hz = /bits/ 64 <1344000000>;
opp-peak-kBps = <1632000>;
};
cl2_ch1_opp10: opp-1497600000 {
opp-hz = /bits/ 64 <1497600000>;
opp-peak-kBps = <1632000>;
};
cl2_ch1_opp11: opp-1651200000 {
opp-hz = /bits/ 64 <1651200000>;
opp-peak-kBps = <2660000>;
};
cl2_ch1_opp12: opp-1804800000 {
opp-hz = /bits/ 64 <1804800000>;
opp-peak-kBps = <2660000>;
};
cl2_ch1_opp13: opp-1958400000 {
opp-hz = /bits/ 64 <1958400000>;
opp-peak-kBps = <3200000>;
};
cl2_ch1_opp14: opp-2112000000 {
opp-hz = /bits/ 64 <2112000000>;
opp-peak-kBps = <6400000>;
};
cl2_ch1_opp15: opp-2201600000 {
opp-hz = /bits/ 64 <2201600000>;
opp-peak-kBps = <6400000>;
};
};
};

19
include/dt-bindings/thermal/tegra234-bpmp-thermal.h Normal file
View File

@@ -0,0 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* This header provides constants for binding nvidia,tegra234-bpmp-thermal.
*/
#ifndef _DT_BINDINGS_THERMAL_TEGRA234_BPMP_THERMAL_H
#define _DT_BINDINGS_THERMAL_TEGRA234_BPMP_THERMAL_H
#define TEGRA234_BPMP_THERMAL_ZONE_CPU 0
#define TEGRA234_BPMP_THERMAL_ZONE_GPU 1
#define TEGRA234_BPMP_THERMAL_ZONE_CV0 2
#define TEGRA234_BPMP_THERMAL_ZONE_CV1 3
#define TEGRA234_BPMP_THERMAL_ZONE_CV2 4
#define TEGRA234_BPMP_THERMAL_ZONE_SOC0 5
#define TEGRA234_BPMP_THERMAL_ZONE_SOC1 6
#define TEGRA234_BPMP_THERMAL_ZONE_SOC2 7
#define TEGRA234_BPMP_THERMAL_ZONE_TJ_MAX 8
#endif