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perf vendor events intel: Update sapphirerapids to 1.14

Browse Source 
Updates were released in:
a84850f1fe
Adds a large number of CXL events like
UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_CXL_ACC,
UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_CXL_ACC,
UNC_CHA_TOR_INSERTS.IA_MISS_DRD_CXL_ACC,
UNC_CHA_TOR_INSERTS.IA_MISS_RFO_CXL_ACC,
UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO_CXL_ACC,
UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_CXL_ACC,
UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_CXL_ACC,
UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA_CXL_ACC,
UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_CXL_ACC,
UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFDATA_CXL_ACC,
UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFRFO_CXL_ACC,
UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_CXL_ACC,
UNC_CHA_TOR_INSERTS.IA_MISS_CXL_ACC,
UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC,
UNC_CHA_TOR_OCCUPANCY.IA_MISS_CXL_ACC,
UNC_CHA_TOR_OCCUPANCY.IA_HIT_CXL_ACC.

Signed-off-by: Ian Rogers <irogers@google.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Eduard Zingerman <eddyz87@gmail.com>
Cc: Sohom Datta <sohomdatta1@gmail.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Caleb Biggers <caleb.biggers@intel.com>
Cc: Edward Baker <edward.baker@intel.com>
Cc: Perry Taylor <perry.taylor@intel.com>
Cc: Samantha Alt <samantha.alt@intel.com>
Cc: Weilin Wang <weilin.wang@intel.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Andrii Nakryiko <andrii@kernel.org>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Jing Zhang <renyu.zj@linux.alibaba.com>
Cc: Kajol Jain <kjain@linux.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Zhengjun Xing <zhengjun.xing@linux.intel.com>
Cc: John Garry <john.g.garry@oracle.com>
Cc: Ingo Molnar <mingo@redhat.com>
Link: https://lore.kernel.org/r/20230623151016.4193660-10-irogers@google.com
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
This commit is contained in:
Ian Rogers
2023-06-23 08:10:13 -07:00
committed by Namhyung Kim
parent 663655c91c
commit 938e4ad310
4 changed files with 311 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
tools/perf/pmu-events/arch/x86/mapfile.csv
View File

@@ -24,7 +24,7 @@ GenuineIntel-6-1[AEF],v3,nehalemep,core
GenuineIntel-6-2E,v3,nehalemex,core
GenuineIntel-6-A7,v1.01,rocketlake,core
GenuineIntel-6-2A,v19,sandybridge,core
GenuineIntel-6-(8F|CF),v1.13,sapphirerapids,core
GenuineIntel-6-(8F|CF),v1.14,sapphirerapids,core
GenuineIntel-6-AF,v1.00,sierraforest,core
GenuineIntel-6-(37|4A|4C|4D|5A),v15,silvermont,core
GenuineIntel-6-(4E|5E|8E|9E|A5|A6),v56,skylake,core
1 Family-model Version Filename EventType
24 GenuineIntel-6-2E v3 nehalemex core
25 GenuineIntel-6-A7 v1.01 rocketlake core
26 GenuineIntel-6-2A v19 sandybridge core
27 GenuineIntel-6-(8F|CF) v1.13 v1.14 sapphirerapids core
28 GenuineIntel-6-AF v1.00 sierraforest core
29 GenuineIntel-6-(37|4A|4C|4D|5A) v15 silvermont core
30 GenuineIntel-6-(4E|5E|8E|9E|A5|A6) v56 skylake core

2
tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json
View File

@@ -706,7 +706,7 @@
"BriefDescription": "TMA slots wasted due to incorrect speculation by branch mispredictions",
"EventCode": "0xa4",
"EventName": "TOPDOWN.BR_MISPREDICT_SLOTS",
"PublicDescription": "Number of TMA slots that were wasted due to incorrect speculation by (any type of) branch mispredictions. This event estimates number of specualtive operations that were issued but not retired as well as the out-of-order engine recovery past a branch misprediction.",
"PublicDescription": "Number of TMA slots that were wasted due to incorrect speculation by (any type of) branch mispredictions. This event estimates number of speculative operations that were issued but not retired as well as the out-of-order engine recovery past a branch misprediction.",
"SampleAfterValue": "10000003",
"UMask": "0x8"
},

308
tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json
View File

@@ -3156,6 +3156,23 @@
"UMask": "0xc88ffd01",
"Unit": "CHA"
},
{
"BriefDescription": "All requests issued from IA cores to CXL accelerator memory regions that hit the LLC.",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC",
"PerPkg": "1",
"UMask": "0x10c0018101",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10c0008101",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Inserts; DRd hits from local IA",
"EventCode": "0x35",
@@ -3371,6 +3388,23 @@
"UMask": "0xc80f7e01",
"Unit": "CHA"
},
{
"BriefDescription": "All requests issued from IA cores to CXL accelerator memory regions that miss the LLC.",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CXL_ACC",
"PerPkg": "1",
"UMask": "0x10c0018201",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10c0008201",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Inserts for DRd misses from local IA",
"EventCode": "0x35",
@@ -3397,6 +3431,23 @@
"UMask": "0xc837fe01",
"Unit": "CHA"
},
{
"BriefDescription": "DRds issued from an IA core which miss the L3 and target memory in a CXL type 2 memory expander card.",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_CXL_ACC",
"PerPkg": "1",
"UMask": "0x10c8178201",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10c8168201",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Inserts for DRds issued by IA Cores targeting DDR Mem that Missed the LLC",
"EventCode": "0x35",
@@ -3442,6 +3493,15 @@
"UMask": "0xc827fe01",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10c8268201",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Inserts; DRd Opt Pref misses from local IA",
"EventCode": "0x35",
@@ -3451,6 +3511,15 @@
"UMask": "0xc8a7fe01",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10c8a68201",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Inserts for DRds issued by iA Cores targeting PMM Mem that Missed the LLC",
"EventCode": "0x35",
@@ -3469,6 +3538,23 @@
"UMask": "0xc897fe01",
"Unit": "CHA"
},
{
"BriefDescription": "L2 data prefetches issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_CXL_ACC",
"PerPkg": "1",
"UMask": "0x10c8978201",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10c8968201",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC",
"EventCode": "0x35",
@@ -3603,6 +3689,23 @@
"UMask": "0xccd7fe01",
"Unit": "CHA"
},
{
"BriefDescription": "LLC data prefetches issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA_CXL_ACC",
"PerPkg": "1",
"UMask": "0x10ccd78201",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10ccd68201",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Inserts; LLCPrefRFO misses from local IA",
"EventCode": "0x35",
@@ -3612,6 +3715,23 @@
"UMask": "0xccc7fe01",
"Unit": "CHA"
},
{
"BriefDescription": "L2 RFO prefetches issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO_CXL_ACC",
"PerPkg": "1",
"UMask": "0x10c8878201",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10c8868201",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting DDR that missed the LLC - HOMed locally",
"EventCode": "0x35",
@@ -3701,6 +3821,23 @@
"UMask": "0x10c8038201",
"Unit": "CHA"
},
{
"BriefDescription": "RFOs issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_CXL_ACC",
"PerPkg": "1",
"UMask": "0x10c8078201",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10c8068201",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Inserts RFO misses from local IA",
"EventCode": "0x35",
@@ -3719,6 +3856,23 @@
"UMask": "0xc887fe01",
"Unit": "CHA"
},
{
"BriefDescription": "LLC RFO prefetches issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_CXL_ACC",
"PerPkg": "1",
"UMask": "0x10ccc78201",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10ccc68201",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Inserts; RFO prefetch misses from local IA",
"EventCode": "0x35",
@@ -4427,6 +4581,23 @@
"UMask": "0xc88ffd01",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Occupancy for All requests issued from IA cores to CXL accelerator memory regions that hit the LLC.",
"EventCode": "0x36",
"EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CXL_ACC",
"PerPkg": "1",
"UMask": "0x10c0018101",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10c0008101",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Occupancy; DRd hits from local IA",
"EventCode": "0x36",
@@ -4644,6 +4815,23 @@
"UMask": "0xc80f7e01",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Occupancy for All requests issued from IA cores to CXL accelerator memory regions that miss the LLC.",
"EventCode": "0x36",
"EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CXL_ACC",
"PerPkg": "1",
"UMask": "0x10c0018201",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10c0008201",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Occupancy for DRd misses from local IA",
"EventCode": "0x36",
@@ -4672,6 +4860,23 @@
"UMask": "0xc837fe01",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Occupancy for DRds and equivalent opcodes issued from an IA core which miss the L3 and target memory in a CXL type 2 memory expander card.",
"EventCode": "0x36",
"EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_CXL_ACC",
"PerPkg": "1",
"UMask": "0x10c8178201",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10c8168201",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Occupancy for DRds issued by iA Cores targeting DDR Mem that Missed the LLC",
"EventCode": "0x36",
@@ -4717,6 +4922,15 @@
"UMask": "0xc827fe01",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10c8268201",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Occupancy; DRd Opt Pref misses from local IA",
"EventCode": "0x36",
@@ -4726,6 +4940,15 @@
"UMask": "0xc8a7fe01",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT_PREF_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT_PREF_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10c8a68201",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Occupancy for DRds issued by iA Cores targeting PMM Mem that Missed the LLC",
"EventCode": "0x36",
@@ -4744,6 +4967,23 @@
"UMask": "0xc897fe01",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Occupancy for L2 data prefetches issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
"EventCode": "0x36",
"EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_CXL_ACC",
"PerPkg": "1",
"UMask": "0x10c8978201",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10c8968201",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC",
"EventCode": "0x36",
@@ -4878,6 +5118,23 @@
"UMask": "0xccd7fe01",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Occupancy for LLC data prefetches issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
"EventCode": "0x36",
"EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFDATA_CXL_ACC",
"PerPkg": "1",
"UMask": "0x10ccd78201",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFDATA_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFDATA_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10ccd68201",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Occupancy; LLCPrefRFO misses from local IA",
"EventCode": "0x36",
@@ -4887,6 +5144,23 @@
"UMask": "0xccc7fe01",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Occupancy for L2 RFO prefetches issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
"EventCode": "0x36",
"EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFRFO_CXL_ACC",
"PerPkg": "1",
"UMask": "0x10c8878201",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFRFO_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFRFO_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10c8868201",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores targeting DDR that missed the LLC - HOMed locally",
"EventCode": "0x36",
@@ -4976,6 +5250,23 @@
"UMask": "0x10c8038201",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Occupancy for RFOs issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
"EventCode": "0x36",
"EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_CXL_ACC",
"PerPkg": "1",
"UMask": "0x10c8078201",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10c8068201",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Occupancy; RFO misses from local IA",
"EventCode": "0x36",
@@ -4994,6 +5285,23 @@
"UMask": "0xc887fe01",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Occupancy for LLC RFO prefetches issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
"EventCode": "0x36",
"EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_CXL_ACC",
"PerPkg": "1",
"UMask": "0x10ccc78201",
"Unit": "CHA"
},
{
"BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_CXL_ACC_LOCAL",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_CXL_ACC_LOCAL",
"PerPkg": "1",
"PortMask": "0x000",
"UMask": "0x10ccc68201",
"Unit": "CHA"
},
{
"BriefDescription": "TOR Occupancy; RFO prefetch misses from local IA",
"EventCode": "0x36",

2
tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-interconnect.json
View File

@@ -3326,7 +3326,7 @@
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_SUCCESS",
"PerPkg": "1",
"PublicDescription": "Message Held : Parallel Success : ad and bl messages were actually slotted into the same flit in paralle",
"PublicDescription": "Message Held : Parallel Success : ad and bl messages were actually slotted into the same flit in parallel",
"UMask": "0x8",
"Unit": "M3UPI"
},