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Merge branch 'tbsdtv_linux_media/latest' into tbsdtv_linux_media/gse

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This commit is contained in:
CrazyCat
2023-09-21 17:26:28 +03:00
parent 2a34822394 0a3fbba551
commit 85550b4ab8
4 changed files with 69 additions and 67 deletions
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1
drivers/media/dvb-frontends/Makefile
View File

@@ -57,6 +57,7 @@ obj-$(CONFIG_DVB_HELENE) += helene.o
obj-$(CONFIG_DVB_HORUS3A) += horus3a.o
obj-$(CONFIG_DVB_ISL6405) += isl6405.o
obj-$(CONFIG_DVB_ISL6421) += isl6421.o
obj-$(CONFIG_DVB_ISL6422) += isl6422.o
obj-$(CONFIG_DVB_ISL6423) += isl6423.o
obj-$(CONFIG_DVB_IX2505V) += ix2505v.o
obj-$(CONFIG_DVB_L64781) += l64781.o

36
drivers/media/dvb-frontends/mn88436.c
View File

@@ -2248,7 +2248,7 @@ MXL_STATUS MxLWare603_API_ReqTunerAGCLock(struct dvb_frontend *fe, MXL_BOOL* agc
*agcLockStatusPtr = lockStatus;
printk(" Agc lock = %d", (UINT8)*agcLockStatusPtr);
//printk(" Agc lock = %d", (UINT8)*agcLockStatusPtr);
}
else
status = MXL_INVALID_PARAMETER;
@@ -2492,15 +2492,15 @@ MXL_STATUS Mxl603SetFreqBw(struct dvb_frontend *fe,UINT32 freq)
// Read back Tuner lock status
status = MxLWare603_API_ReqTunerLockStatus(fe, &rfLockPtr, &refLockPtr);
if (status == MXL_TRUE)
{
if (MXL_LOCKED == rfLockPtr && MXL_LOCKED == refLockPtr)
{
printk("Tuner locked\n"); //If system runs into here, it mean that Tuner locked and output IF OK!!
}
else
printk("Tuner unlocked\n");
}
// if (status == MXL_TRUE)
// {
// if (MXL_LOCKED == rfLockPtr && MXL_LOCKED == refLockPtr)
// {
// printk("Tuner locked\n"); //If system runs into here, it mean that Tuner locked and output IF OK!!
// }
// else
// printk("Tuner unlocked\n");
// }
return status;
}
@@ -2799,7 +2799,7 @@ DMD_ERROR_t DMD_scan_vq(struct dvb_frontend* fe, DMD_PARAMETER_t *param )
break;
}
for(i=0;i<160;i++)
for(i=0;i<230;i++)
{
DMD_I2C_Read(fe, DMD_BANK_MAIN(param->devid) ,DMD_MAIN_STSMON1 , &rd );
//VQ LOCK
@@ -2807,7 +2807,7 @@ DMD_ERROR_t DMD_scan_vq(struct dvb_frontend* fe, DMD_PARAMETER_t *param )
{
param->info[DMD_E_INFO_LOCK] = DMD_E_LOCKED;
ret = DMD_E_OK;
printk("Singal LOCK.");
//printk("Singal LOCK.");
break;
}
msleep(2); //wait 1ms
@@ -2973,14 +2973,14 @@ static int DMD_set_parameters(struct dvb_frontend* fe)
return -EINVAL;
}
DMD_set_system(fe,&param);
msleep(20);
Mxl603SetFreqBw(fe, c->frequency);
msleep(2);
msleep(20);
DMD_device_post_tune(fe, &param );
msleep(100);
/* Call Lock/SYNC Status Judgement */
DMD_device_scan(fe, &param );
msleep(100);
return 0;
}
@@ -3013,7 +3013,7 @@ static int DMD_read_status(struct dvb_frontend *fe, enum fe_status *status)
MxLWare603_API_ReqTunerRxPower(fe,&rfpower);
msleep(2);
c->strength.len = 2;
c->strength.stat[0].scale = FE_SCALE_DECIBEL;
c->strength.stat[0].svalue = rfpower*10;
@@ -3044,7 +3044,7 @@ static int DMD_read_status(struct dvb_frontend *fe, enum fe_status *status)
val = 0;
}
printk("cnr = %d",val);
//printk("cnr = %d",val);
c->cnr.len = 2;
c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
c->cnr.stat[0].uvalue = val*10;

7
drivers/media/dvb-frontends/stid135/stid135-fe.c
View File

@@ -373,14 +373,11 @@ static int stid135_set_parameters(struct dvb_frontend *fe)
/* Set PLS before search */
dev_dbg(&state->base->i2c->dev, "%s: set pls_mode %d, pls_code %d !\n", __func__, pls_mode, pls_code);
if((p->stream_id != NO_STREAM_ID_FILTER)||(p->scrambling_sequence_index)){
err |= fe_stid135_set_pls(state->base->handle, state->nr + 1, pls_mode, pls_code);
err |= fe_stid135_set_pls(state->base->handle, state->nr + 1, pls_mode, pls_code);
if (err != FE_LLA_NO_ERROR)
dev_err(&state->base->i2c->dev, "%s: fe_stid135_set_pls error %d !\n", __func__, err);
}
if(state->modcode_filter){
err |= fe_stid135_reset_modcodes_filter(state->base->handle, state->nr + 1);
if (err != FE_LLA_NO_ERROR)

92
drivers/media/dvb-frontends/stid135/stid135_drv.c
View File

@@ -11608,43 +11608,55 @@ fe_lla_error_t get_current_llr(fe_stid135_handle_t handle,enum fe_stid135_demod
s32 fld_value[2];
struct fe_stid135_internal_param *pParams;
pParams = (struct fe_stid135_internal_param *) handle;
// Bit rate = Mclk * tsfifo_bitrate / 16384
ChipGetField(pParams->handle_demod, FLD_FC8CODEW_DVBSX_HWARE_TSBITRATE1_TSFIFO_BITRATE(demod_path), &(fld_value[0]));
ChipGetField(pParams->handle_demod, FLD_FC8CODEW_DVBSX_HWARE_TSBITRATE0_TSFIFO_BITRATE(demod_path), &(fld_value[1]));
//printk("Symbol rate = %d\n", pParams->demod_results[demod_path-1].symbol_rate);
*current_llr = pParams->demod_results[demod_path-1].symbol_rate;
switch(pParams->demod_results[demod_path-1].modulation)
{
case FE_SAT_MOD_QPSK:
*current_llr *= 2;
break;
case FE_SAT_MOD_8PSK:
case FE_SAT_MOD_8PSK_L:
*current_llr *= 3;
break;
case FE_SAT_MOD_16APSK:
case FE_SAT_MOD_16APSK_L:
*current_llr *= 4;
break;
case FE_SAT_MOD_32APSK:
case FE_SAT_MOD_32APSK_L:
*current_llr *= 5;
break;
case FE_SAT_MOD_64APSK:
case FE_SAT_MOD_64APSK_L:
*current_llr *= 6;
break;
case FE_SAT_MOD_128APSK:
*current_llr *= 7;
break;
case FE_SAT_MOD_256APSK:
case FE_SAT_MOD_256APSK_L:
*current_llr *= 8;
break;
case FE_SAT_MOD_1024APSK:
*current_llr *= 10;
break;
}
raw_bit_rate = ((fld_value[0]) << 8) + (fld_value[1]);
FE_STiD135_GetMclkFreq(pParams, (u32*)&(fld_value[0]));
raw_bit_rate = (s32)(((fld_value[0])/16384)) * raw_bit_rate;
printk("\nBit rate = %d Mbits/s\n", raw_bit_rate/1000000);
// LLR = TS bitrate * 1 / PR
if(pParams->demod_results[demod_path-1].modcode != 0) {
if(pParams->demod_results[demod_path-1].standard == FE_SAT_DVBS2_STANDARD) {
if(pParams->demod_results[demod_path-1].modcode <= 131)
*current_llr = (raw_bit_rate / 100) * dvbs2_modcode_for_llr_x100[pParams->demod_results[demod_path-1].modcode];
}
if(pParams->demod_results[demod_path-1].standard == FE_SAT_DVBS1_STANDARD) {
if(pParams->demod_results[demod_path-1].puncture_rate <= 8)
*current_llr = (raw_bit_rate / 100) * dvbs1_modcode_for_llr_x100[pParams->demod_results[demod_path-1].puncture_rate];
}
if(*current_llr != 0)
printk("Current LLR = %d MLLR/s\n", *current_llr/1000000);
else
printk("LLR unknown\n");
if(*current_llr != 0)
printk("Current LLR = %d MLLR/s\n", *current_llr/1000000);
else
printk("LLR unknown\n");
if((*current_llr/1000)<80000)
fe_stid135_set_maxllr_rate(handle,demod_path,90);
else if(((*current_llr/1000)>80000)&&((*current_llr/1000)<113000))
fe_stid135_set_maxllr_rate(handle,demod_path,129);
else if(((*current_llr/1000)>113000)&&((*current_llr/1000)<162000))
fe_stid135_set_maxllr_rate(handle,demod_path,180);
else
fe_stid135_set_maxllr_rate(handle,demod_path,250);
} else printk("LLR cannot be computed because dummy PLF!!\n");
if((*current_llr/1000)<90000)
fe_stid135_set_maxllr_rate(handle,demod_path,90);
else if(((*current_llr/1000)>=90000)&&((*current_llr/1000)<129000))
fe_stid135_set_maxllr_rate(handle,demod_path,129);
else if(((*current_llr/1000)>=129000)&&((*current_llr/1000)<180000))
fe_stid135_set_maxllr_rate(handle,demod_path,180);
else
fe_stid135_set_maxllr_rate(handle,demod_path,250);
ChipGetField(pParams->handle_demod, FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG0_SDEMAP_MAXLLRRATE(demod_path), &max_llr_allowed);
@@ -11655,25 +11667,17 @@ fe_lla_error_t get_current_llr(fe_stid135_handle_t handle,enum fe_stid135_demod
break;
case 1:
printk("Max LLR allowed = 180 MLLR/s\n");
if(*current_llr > 162000000)
if(*current_llr > 180000000)
printk("Careful! LLR may reach max allowed LLR!\n");
break;
case 2:
FE_STiD135_GetMclkFreq(handle, (u32*)&(fld_value[0])) ;
printk("Max LLR allowed = %d MLLR/s\n", fld_value[0]);
FE_STiD135_GetMclkFreq(handle, (u32*)&(fld_value[0])) ;
printk("Max LLR allowed = %d MLLR/s\n", fld_value[0]/1000000);
if(*current_llr >fld_value[0]/10*9)
printk("Careful! LLR may reach max allowed LLR!\n");
break;
case 3:
printk("Max LLR allowed = 90 MLLR/s\n");
if(*current_llr > 81000000 )
printk("Careful! LLR may reach max allowed LLR!\n");
break;
default:
printk("Unknown max LLR\n");