dt-bindings: clock: Add LPASS AUDIOCC and reset controller for SC8280XP

The LPASS (Low Power Audio Subsystem) Audio clock controller provides reset
support when it is under the control of Q6DSP.

Add support for those resets and adds IDs for clients to request the reset.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230608125315.11454-3-srinivas.kandagatla@linaro.org
This commit is contained in:
Srinivas Kandagatla
2023-06-08 13:53:11 +01:00
committed by Bjorn Andersson
parent bfc43a9c0c
commit 83da70da40
2 changed files with 15 additions and 0 deletions

View File

@@ -19,6 +19,7 @@ description: |
properties:
compatible:
enum:
- qcom,sc8280xp-lpassaudiocc
- qcom,sc8280xp-lpasscc
reg:
@@ -39,6 +40,15 @@ required:
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
lpass_audiocc: clock-controller@32a9000 {
compatible = "qcom,sc8280xp-lpassaudiocc";
reg = <0x032a9000 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
};
- |
#include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
lpasscc: clock-controller@33e0000 {

View File

@@ -6,6 +6,11 @@
#ifndef _DT_BINDINGS_CLK_QCOM_LPASSCC_SC8280XP_H
#define _DT_BINDINGS_CLK_QCOM_LPASSCC_SC8280XP_H
/* LPASS AUDIO CC CSR */
#define LPASS_AUDIO_SWR_RX_CGCR 0
#define LPASS_AUDIO_SWR_WSA_CGCR 1
#define LPASS_AUDIO_SWR_WSA2_CGCR 2
/* LPASS TCSR */
#define LPASS_AUDIO_SWR_TX_CGCR 0