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[riscv64] Fill with the Machine Architecture ID Register marchid

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[ppc64] Added source comment
This commit is contained in:
CyrIng
2025-03-29 12:46:48 +01:00
parent c0942e22c6
commit f97a8b41e9
6 changed files with 8 additions and 9 deletions
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2
ppc64le/corefreqk.c
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@@ -742,8 +742,8 @@ static CLOCK BaseClock_GenericMachine(unsigned int ratio)
};
static void Cache_Topology(CORE_RO *Core)
{
/* Source: arch/powerpc/kernel/setup_64.c: ppc64_caches structure */
Core->T.Cache[0].Size = ppc64_caches.l1i.size;
Core->T.Cache[1].Size = ppc64_caches.l1d.size;
Core->T.Cache[2].Size = ppc64_caches.l2.size;

4
riscv64/corefreq-api.h
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@@ -186,9 +186,9 @@ typedef struct
CfgLock : 1-0, /* Core */
IORedir : 2-1, /* Core */
SCTLRX : 3-2, /* Thread */
Unused : 32-3,
Revision: 64-32;
Unused : 64-3;
};
unsigned long Revision;
unsigned short int CStateLimit;
unsigned short int CStateBaseAddr; /* Any I/O BAR */
} Query;

2
riscv64/corefreq-cli-rsc-en.h
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@@ -625,7 +625,7 @@
#define RSC_PROCESSOR_CODE_EN "Processor"
#define RSC_ARCHITECTURE_CODE_EN "Architecture"
#define RSC_VENDOR_ID_CODE_EN "Vendor ID"
#define RSC_REVISION_CODE_EN "Revision"
#define RSC_REVISION_CODE_EN "March ID"
#define RSC_SIGNATURE_CODE_EN "Signature"
#define RSC_STEPPING_CODE_EN "Stepping"
#define RSC_ONLINE_CPU_CODE_EN "Online CPU"

4
riscv64/corefreq-cli.c
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@@ -1415,8 +1415,8 @@ REASON_CODE SysInfoProc(Window *win,
hSpace, RO(Shm)->Proc.Features.Info.Vendor.ID );
PUT( SCANKEY_NULL, attrib[0], width, 2,
"%s""%.*s[0x%08x]", RSC(REVISION).CODE(),
width - 15 - RSZ(REVISION), hSpace,
"%s""%.*s[0x%016lx]", RSC(REVISION).CODE(),
width - 23 - RSZ(REVISION), hSpace,
RO(Shm)->Cpu[RO(Shm)->Proc.Service.Core].Query.Revision );
PUT( SCANKEY_NULL, attrib[2], width, 2,

2
riscv64/corefreq.h
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@@ -33,7 +33,7 @@ typedef struct
struct
{
unsigned int Revision;
unsigned long Revision;
struct {
unsigned short int CfgLock : 1-0,

3
riscv64/corefreqk.c
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@@ -510,7 +510,6 @@ static void Query_Features(void *pArg)
volatile unsigned long long timectr, instret, perfctr;
const unsigned long
mvendorid = riscv_cached_mvendorid(iArg->localProcessor);
/*TODO marchid = riscv_cached_marchid(iArg->localProcessor); */
iArg->Features->Info.Vendor.CRC = CRC_RESERVED;
iArg->SMT_Count = 1;
@@ -1481,7 +1480,7 @@ static void PerCore_GenericMachine(void *arg)
PUBLIC(RO(Proc))->Features.PerfMon.InstrRetired = 0;
}
Core->Query.Revision = 0;
Core->Query.Revision = riscv_cached_marchid(Core->Bind);
SystemRegisters(Core);