mirror of
https://github.com/cyring/CoreFreq.git
synced 2025-07-23 12:13:07 +02:00
Debug version w/ kthread issue.
This commit is contained in:
12
README.md
12
README.md
@@ -3,9 +3,9 @@
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CoreFreq is made for the Intel 64-bits Processor, architecture Nehalem and above.
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## Build & Run
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1- Download or clone the source code into a working directory
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1- Download or clone the source code into a working directory.
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2- Build the programs:
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2- Build the programs.
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```
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make
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```
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@@ -37,9 +37,7 @@ insmod intelfreq.ko
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### Stop
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5- Press [CTRL]+[C] to stop the daemon.
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```
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./XFreq/cli/bin/xfreq-cli
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```
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6- Unload the kernel module with command
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```
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rmmod intelfreq.ko
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@@ -48,8 +46,8 @@ rmmod intelfreq.ko
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## Screenshots
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* Use ```dmesg``` to check if the driver is started
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```
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[ ] IntelFreq [Intel(R) Core(TM) i7 CPU 920 @ 2.67GHz] [8 x CPU]
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[Clock @ 146 MHz] Ratio={12,20,0,0,0,0,21,21,21,22}
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IntelFreq [Intel(R) Core(TM) i7 CPU 920 @ 2.67GHz] [8 x CPU]
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[Clock @ 146 MHz] Ratio={12,20,0,0,0,0,21,21,21,22}
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```
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37
corefreqd.c
37
corefreqd.c
@@ -4,6 +4,7 @@
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*/
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#define _GNU_SOURCE
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#include <linux/types.h>
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#include <stdlib.h>
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#include <sys/mman.h>
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#include <sys/types.h>
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@@ -18,11 +19,13 @@
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#include "intelfreq.h"
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unsigned int Shutdown=0x0;
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__u32 Shutdown=0x0;
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double RelativeFreq[_MAX_CPU_];
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typedef struct {
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PROC *Proc;
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unsigned int Bind;
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__u32 Bind;
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pthread_t TID;
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} ARG;
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@@ -30,7 +33,7 @@ typedef struct {
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static void *Core_Temp(void *arg)
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{
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PROC *P=(PROC *) arg;
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unsigned int cpu;
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__u32 cpu;
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while(!Shutdown)
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{
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@@ -50,7 +53,7 @@ static void *Core_Cycle(void *arg)
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{
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ARG *A=(ARG *) arg;
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PROC *P=A->Proc;
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unsigned int cpu=A->Bind;
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__u32 cpu=A->Bind;
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cpu_set_t cpuset;
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CPU_ZERO(&cpuset);
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@@ -107,9 +110,7 @@ static void *Core_Cycle(void *arg)
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// Relative Frequency = Relative Ratio x Bus Clock Frequency
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double RelativeRatio=Turbo * C0 * (double) P->Boost[1];
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double RelativeFreq=RelativeRatio * P->Clock;
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printf("\tCore(%02d) @ %7.2f MHz\n", cpu, RelativeFreq);
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RelativeFreq[cpu]=RelativeRatio * P->Clock;
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}
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return(NULL);
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@@ -118,12 +119,12 @@ static void *Core_Cycle(void *arg)
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typedef struct {
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sigset_t Signal;
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pthread_t TID;
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int Started;
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__s32 Started;
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} SIG;
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static void *Emergency(void *arg)
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{
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int caught=0;
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__s32 caught=0;
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SIG *S=(SIG *) arg;
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pthread_setname_np(S->TID, "corefreqd-kill");
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@@ -146,9 +147,9 @@ void abstimespec(useconds_t usec, struct timespec *tsec)
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tsec->tv_nsec=(usec % 1000000L) * 1000;
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}
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int addtimespec(struct timespec *asec, const struct timespec *tsec)
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__s32 addtimespec(struct timespec *asec, const struct timespec *tsec)
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{
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int rc=0;
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__s32 rc=0;
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if((rc=clock_gettime(CLOCK_REALTIME, asec)) != -1)
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{
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if((asec->tv_nsec += tsec->tv_nsec) >= 1000000000L)
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@@ -164,7 +165,7 @@ int addtimespec(struct timespec *asec, const struct timespec *tsec)
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return(errno);
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}
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*/
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int main(void)
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__s32 main(void)
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{
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PROC *P=NULL;
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SIG S={.Signal={0}, .TID=0, .Started=0};
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@@ -172,7 +173,7 @@ int main(void)
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if(UID == 0)
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{
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int fd=open(SHM_FILENAME, O_RDWR);
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__s32 fd=open(SHM_FILENAME, O_RDWR);
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if(fd != -1)
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{
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P=mmap( NULL, sizeof(PROC),
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@@ -181,8 +182,9 @@ int main(void)
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if(P != NULL)
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{
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unsigned int cpu=0;
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__u32 cpu=0;
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ARG *A=calloc(P->CPU.Count, sizeof(ARG));
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const char CLS[6+1]={27,'[','H',27,'[','J',0};
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sigemptyset(&S.Signal);
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sigaddset(&S.Signal, SIGINT);
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@@ -204,7 +206,12 @@ int main(void)
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}
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while(!Shutdown)
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{
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usleep(10000);
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usleep(P->msleep * 100);
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printf("%s", CLS);
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for(cpu=0; cpu < P->CPU.Count; cpu++)
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printf( "\tCore(%02d) @ %7.2f MHz\n",
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cpu, RelativeFreq[cpu]);
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}
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// shutting down
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242
intelfreq.c
242
intelfreq.c
@@ -3,6 +3,7 @@
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* Licenses: GPL2
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*/
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/kthread.h>
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#include <linux/fs.h>
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@@ -22,7 +23,7 @@ MODULE_LICENSE ("GPL");
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static struct
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{
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int Major;
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s32 Major;
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struct cdev *kcdev;
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dev_t nmdev, mkdev;
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struct class *clsdev;
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@@ -30,9 +31,9 @@ static struct
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static PROC *Proc=NULL;
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unsigned int Core_Count(void)
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__u32 Core_Count(void)
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{
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unsigned int Count=0;
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__u32 Count=0;
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__asm__ volatile
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(
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@@ -50,7 +51,7 @@ unsigned int Core_Count(void)
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void Proc_Brand(void)
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{
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char tmpString[48+1]={0x20};
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int ix=0, jx=0, px=0;
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__u32 ix=0, jx=0, px=0;
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BRAND Brand;
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for(ix=0; ix<3; ix++)
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@@ -78,10 +79,10 @@ void Proc_Brand(void)
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Proc->Brand[ix++]=tmpString[jx];
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}
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unsigned int Proc_Clock(unsigned int ratio)
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__u32 Proc_Clock(__u32 ratio)
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{
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unsigned long long int TSC[2];
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unsigned int Lo, Hi, Clock;
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__u64 TSC[2];
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__u32 Lo, Hi, Clock;
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__asm__ volatile
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(
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@@ -89,8 +90,8 @@ unsigned int Proc_Clock(unsigned int ratio)
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:"=a" (Lo),
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"=d" (Hi)
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);
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TSC[0]=((unsigned long long int) Lo) \
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| (((unsigned long long int) Hi) << 32);
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TSC[0]=((__u64) Lo) \
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| (((__u64) Hi) << 32);
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ssleep(1);
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@@ -100,74 +101,59 @@ unsigned int Proc_Clock(unsigned int ratio)
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:"=a" (Lo),
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"=d" (Hi)
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);
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TSC[1]=((unsigned long long int) Lo) \
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| (((unsigned long long int) Hi) << 32);
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TSC[1]=((__u64) Lo) \
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| (((__u64) Hi) << 32);
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TSC[1]-=TSC[0];
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Clock=TSC[1] / (ratio * 1000000);
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return(Clock);
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}
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void Core_Nehalem(unsigned int cpu, int T)
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void Core_Nehalem(__u32 cpu, __u32 T)
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{
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register unsigned long long int Cx=0;
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register __u64 Cx=0;
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// Instructions Retired
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RDMSR( Proc->Core[cpu].Cycles.INST[T].Lo,
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Proc->Core[cpu].Cycles.INST[T].Hi,
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MSR_CORE_PERF_FIXED_CTR0);
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RDMSR(Proc->Core[cpu].Cycles.INST[T], MSR_CORE_PERF_FIXED_CTR0);
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// Unhalted Core & Reference Cycles.
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RDMSR( Proc->Core[cpu].Cycles.C0[T].UCC.Lo,
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Proc->Core[cpu].Cycles.C0[T].UCC.Hi,
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MSR_CORE_PERF_FIXED_CTR1);
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RDMSR( Proc->Core[cpu].Cycles.C0[T].URC.Lo,
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Proc->Core[cpu].Cycles.C0[T].URC.Hi,
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MSR_CORE_PERF_FIXED_CTR2);
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RDMSR(Proc->Core[cpu].Cycles.C0[T].UCC, MSR_CORE_PERF_FIXED_CTR1);
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RDMSR(Proc->Core[cpu].Cycles.C0[T].URC, MSR_CORE_PERF_FIXED_CTR2);
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// TSC in relation to the Logical Core.
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RDMSR( Proc->Core[cpu].Cycles.TSC[T].Lo,
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Proc->Core[cpu].Cycles.TSC[T].Hi,
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MSR_IA32_TSC);
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RDMSR(Proc->Core[cpu].Cycles.TSC[T], MSR_IA32_TSC);
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// C-States.
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RDMSR( Proc->Core[cpu].Cycles.C3[T].Lo,
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Proc->Core[cpu].Cycles.C3[T].Hi,
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MSR_CORE_C3_RESIDENCY);
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RDMSR( Proc->Core[cpu].Cycles.C6[T].Lo,
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Proc->Core[cpu].Cycles.C6[T].Hi,
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MSR_CORE_C6_RESIDENCY);
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RDMSR(Proc->Core[cpu].Cycles.C3[T], MSR_CORE_C3_RESIDENCY);
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RDMSR(Proc->Core[cpu].Cycles.C6[T], MSR_CORE_C6_RESIDENCY);
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// Derive C1
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Cx= Proc->Core[cpu].Cycles.C6[T].r64 \
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+ Proc->Core[cpu].Cycles.C3[T].r64 \
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+ Proc->Core[cpu].Cycles.C0[T].URC.r64;
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Cx= Proc->Core[cpu].Cycles.C6[T].qword \
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+ Proc->Core[cpu].Cycles.C3[T].qword \
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+ Proc->Core[cpu].Cycles.C0[T].URC.qword;
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Proc->Core[cpu].Cycles.C1[T]= \
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(Proc->Core[cpu].Cycles.TSC[T].r64 > Cx) ? \
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Proc->Core[cpu].Cycles.TSC[T].r64 - Cx \
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Proc->Core[cpu].Cycles.C1[T]= \
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(Proc->Core[cpu].Cycles.TSC[T].qword > Cx) ? \
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Proc->Core[cpu].Cycles.TSC[T].qword - Cx \
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: 0;
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}
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/*
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void Core_Temp(unsigned int cpu)
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void Core_Temp(__u32 cpu)
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{
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RDMSR( Proc->Core[cpu].TjMax.Lo,
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Proc->Core[cpu].TjMax.Hi,
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MSR_IA32_TEMPERATURE_TARGET)
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RDMSR( Proc->Core[cpu].ThermStat.Lo,
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Proc->Core[cpu].ThermStat.Hi,
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MSR_IA32_THERM_STATUS)
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RDMSR(Proc->Core[cpu].TjMax, MSR_IA32_TEMPERATURE_TARGET)
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RDMSR(Proc->Core[cpu].ThermStat, MSR_IA32_THERM_STATUS)
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}
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*/
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int Core_Cycle(void *arg)
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s32 Core_Cycle(void *arg)
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{
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if(arg != NULL)
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{
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CORE *Core=(CORE *) arg;
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unsigned int cpu=Core->Bind;
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__u32 cpu=Core->Bind;
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Core_Nehalem(cpu, 0);
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printk(">>> Core_Cycle(%u)\n", cpu);
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while(!kthread_should_stop())
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{
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msleep(Proc->msleep);
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@@ -176,35 +162,35 @@ int Core_Cycle(void *arg)
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// Delta of Instructions Retired
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Proc->Core[cpu].Delta.INST= \
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Proc->Core[cpu].Cycles.INST[1].r64 \
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- Proc->Core[cpu].Cycles.INST[0].r64;
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Proc->Core[cpu].Cycles.INST[1].qword \
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- Proc->Core[cpu].Cycles.INST[0].qword;
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// Absolute Delta of Unhalted (Core & Ref) C0 Cycles.
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Proc->Core[cpu].Delta.C0.UCC= \
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(Proc->Core[cpu].Cycles.C0[0].UCC.r64 > \
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Proc->Core[cpu].Cycles.C0[1].UCC.r64) ? \
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Proc->Core[cpu].Cycles.C0[0].UCC.r64 \
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- Proc->Core[cpu].Cycles.C0[1].UCC.r64\
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: Proc->Core[cpu].Cycles.C0[1].UCC.r64\
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- Proc->Core[cpu].Cycles.C0[0].UCC.r64;
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Proc->Core[cpu].Delta.C0.UCC= \
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(Proc->Core[cpu].Cycles.C0[0].UCC.qword > \
|
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Proc->Core[cpu].Cycles.C0[1].UCC.qword) ? \
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Proc->Core[cpu].Cycles.C0[0].UCC.qword \
|
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- Proc->Core[cpu].Cycles.C0[1].UCC.qword\
|
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: Proc->Core[cpu].Cycles.C0[1].UCC.qword\
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- Proc->Core[cpu].Cycles.C0[0].UCC.qword;
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Proc->Core[cpu].Delta.C0.URC= \
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Proc->Core[cpu].Cycles.C0[1].URC.r64 \
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- Proc->Core[cpu].Cycles.C0[0].URC.r64;
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Proc->Core[cpu].Cycles.C0[1].URC.qword \
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- Proc->Core[cpu].Cycles.C0[0].URC.qword;
|
||||
|
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Proc->Core[cpu].Delta.C3= \
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Proc->Core[cpu].Cycles.C3[1].r64 \
|
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- Proc->Core[cpu].Cycles.C3[0].r64;
|
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Proc->Core[cpu].Cycles.C3[1].qword \
|
||||
- Proc->Core[cpu].Cycles.C3[0].qword;
|
||||
Proc->Core[cpu].Delta.C6= \
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Proc->Core[cpu].Cycles.C6[1].r64 \
|
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- Proc->Core[cpu].Cycles.C6[0].r64;
|
||||
Proc->Core[cpu].Cycles.C6[1].qword \
|
||||
- Proc->Core[cpu].Cycles.C6[0].qword;
|
||||
Proc->Core[cpu].Delta.C7= \
|
||||
Proc->Core[cpu].Cycles.C7[1].r64 \
|
||||
- Proc->Core[cpu].Cycles.C7[0].r64;
|
||||
Proc->Core[cpu].Cycles.C7[1].qword \
|
||||
- Proc->Core[cpu].Cycles.C7[0].qword;
|
||||
|
||||
Proc->Core[cpu].Delta.TSC= \
|
||||
Proc->Core[cpu].Cycles.TSC[1].r64 \
|
||||
- Proc->Core[cpu].Cycles.TSC[0].r64;
|
||||
Proc->Core[cpu].Cycles.TSC[1].qword \
|
||||
- Proc->Core[cpu].Cycles.TSC[0].qword;
|
||||
|
||||
Proc->Core[cpu].Delta.C1= \
|
||||
(Proc->Core[cpu].Cycles.C1[0] > \
|
||||
@@ -241,24 +227,27 @@ int Core_Cycle(void *arg)
|
||||
|
||||
atomic_store(&Proc->Core[cpu].Sync, 0x1);
|
||||
}
|
||||
printk("<<< Core_Cycle(%u)\n", cpu);
|
||||
}
|
||||
return(0);
|
||||
}
|
||||
|
||||
int Counter_Start(void *arg)
|
||||
s32 Counter_Set(void *arg)
|
||||
{
|
||||
if(arg != NULL)
|
||||
{
|
||||
CORE *Core=(CORE *) arg;
|
||||
unsigned int cpu=Core->Bind;
|
||||
__u32 cpu=Core->Bind;
|
||||
|
||||
GLOBAL_PERF_COUNTER GlobalPerfCounter={0};
|
||||
FIXED_PERF_COUNTER FixedPerfCounter={0};
|
||||
GLOBAL_PERF_STATUS Overflow={0};
|
||||
GLOBAL_PERF_OVF_CTRL OvfControl={0};
|
||||
|
||||
RDMSR( GlobalPerfCounter.Lo, GlobalPerfCounter.Hi,
|
||||
MSR_CORE_PERF_GLOBAL_CTRL);
|
||||
printk("Counter_Set(%u)\n", cpu);
|
||||
while(!kthread_should_stop()) msleep(250);
|
||||
|
||||
RDMSR(GlobalPerfCounter, MSR_CORE_PERF_GLOBAL_CTRL);
|
||||
|
||||
Proc->Core[cpu].SaveArea.GlobalPerfCounter= \
|
||||
GlobalPerfCounter;
|
||||
@@ -266,11 +255,9 @@ int Counter_Start(void *arg)
|
||||
GlobalPerfCounter.EN_FIXED_CTR1=1;
|
||||
GlobalPerfCounter.EN_FIXED_CTR2=1;
|
||||
|
||||
WRMSR( GlobalPerfCounter.Lo, GlobalPerfCounter.Hi,
|
||||
MSR_CORE_PERF_GLOBAL_CTRL);
|
||||
WRMSR(GlobalPerfCounter, MSR_CORE_PERF_GLOBAL_CTRL);
|
||||
|
||||
RDMSR( FixedPerfCounter.Lo, FixedPerfCounter.Hi,
|
||||
MSR_CORE_PERF_FIXED_CTR_CTRL);
|
||||
RDMSR(FixedPerfCounter, MSR_CORE_PERF_FIXED_CTR_CTRL);
|
||||
|
||||
Proc->Core[cpu].SaveArea.FixedPerfCounter= \
|
||||
FixedPerfCounter;
|
||||
@@ -292,76 +279,75 @@ int Counter_Start(void *arg)
|
||||
FixedPerfCounter.AnyThread_EN1=0;
|
||||
FixedPerfCounter.AnyThread_EN2=0;
|
||||
}
|
||||
WRMSR( FixedPerfCounter.Lo, FixedPerfCounter.Hi,
|
||||
MSR_CORE_PERF_FIXED_CTR_CTRL);
|
||||
WRMSR(FixedPerfCounter, MSR_CORE_PERF_FIXED_CTR_CTRL);
|
||||
|
||||
RDMSR( Overflow.Lo, Overflow.Hi,
|
||||
MSR_CORE_PERF_GLOBAL_STATUS);
|
||||
RDMSR(Overflow, MSR_CORE_PERF_GLOBAL_STATUS);
|
||||
if(Overflow.Overflow_CTR0)
|
||||
OvfControl.Clear_Ovf_CTR0=1;
|
||||
if(Overflow.Overflow_CTR1)
|
||||
OvfControl.Clear_Ovf_CTR1=1;
|
||||
if(Overflow.Overflow_CTR2)
|
||||
OvfControl.Clear_Ovf_CTR2=1;
|
||||
if(Overflow.Overflow_CTR0 \
|
||||
if(Overflow.Overflow_CTR0 \
|
||||
| Overflow.Overflow_CTR1 \
|
||||
| Overflow.Overflow_CTR2)
|
||||
WRMSR( OvfControl.Lo, OvfControl.Hi,
|
||||
WRMSR( OvfControl,
|
||||
MSR_CORE_PERF_GLOBAL_OVF_CTRL);
|
||||
}
|
||||
return(0);
|
||||
}
|
||||
|
||||
int Counter_Stop(void *arg)
|
||||
s32 Counter_Clear(void *arg)
|
||||
{
|
||||
if(arg != NULL)
|
||||
{
|
||||
CORE *Core=(CORE *) arg;
|
||||
unsigned int cpu=Core->Bind;
|
||||
__u32 cpu=Core->Bind;
|
||||
|
||||
WRMSR( Proc->Core[cpu].SaveArea.FixedPerfCounter.Lo,
|
||||
Proc->Core[cpu].SaveArea.FixedPerfCounter.Hi,
|
||||
printk("Counter_Clear(%u)\n", cpu);
|
||||
while(!kthread_should_stop()) msleep(250);
|
||||
|
||||
WRMSR( Proc->Core[cpu].SaveArea.FixedPerfCounter,
|
||||
MSR_CORE_PERF_FIXED_CTR_CTRL);
|
||||
|
||||
WRMSR( Proc->Core[cpu].SaveArea.GlobalPerfCounter.Lo,
|
||||
Proc->Core[cpu].SaveArea.GlobalPerfCounter.Hi,
|
||||
WRMSR( Proc->Core[cpu].SaveArea.GlobalPerfCounter,
|
||||
MSR_CORE_PERF_GLOBAL_CTRL);
|
||||
}
|
||||
return(0);
|
||||
}
|
||||
|
||||
void Arch_Nehalem(unsigned int stage)
|
||||
void Arch_Nehalem(__u32 stage)
|
||||
{
|
||||
unsigned int cpu=0;
|
||||
__u32 cpu=0;
|
||||
|
||||
switch(stage)
|
||||
{
|
||||
case END:
|
||||
{
|
||||
for(cpu=0; cpu < Proc->CPU.Count; cpu++)
|
||||
{
|
||||
Proc->Core[cpu].TID[COUNTER]= \
|
||||
kthread_create( Counter_Stop,
|
||||
&Proc->Core[cpu],
|
||||
"kintelstop%02d",
|
||||
Proc->Core[cpu].Bind);
|
||||
kthread_bind(Proc->Core[cpu].TID[COUNTER], cpu);
|
||||
wake_up_process(Proc->Core[cpu].TID[COUNTER]);
|
||||
}
|
||||
if((Proc->Core[cpu].TID[END]= \
|
||||
kthread_create( Counter_Clear,
|
||||
&Proc->Core[cpu],
|
||||
"kintelstop%02d",
|
||||
Proc->Core[cpu].Bind)) !=0)
|
||||
kthread_bind(Proc->Core[cpu].TID[END], cpu);
|
||||
|
||||
for(cpu=0; cpu < Proc->CPU.Count; cpu++)
|
||||
if(Proc->Core[cpu].TID[COUNTER])
|
||||
kthread_stop(Proc->Core[cpu].TID[COUNTER]);
|
||||
if(Proc->Core[cpu].TID[END])
|
||||
wake_up_process(Proc->Core[cpu].TID[END]);
|
||||
|
||||
for(cpu=0; cpu < Proc->CPU.Count; cpu++)
|
||||
if(Proc->Core[cpu].TID[END])
|
||||
kthread_stop(Proc->Core[cpu].TID[END]);
|
||||
}
|
||||
break;
|
||||
case INIT:
|
||||
{
|
||||
PLATFORM_INFO Platform={0};
|
||||
TURBO_RATIO Turbo={0};
|
||||
// TURBO_RATIO_64 Turbo={0};
|
||||
|
||||
RDMSR(Platform.Lo, Platform.Hi, MSR_NHM_PLATFORM_INFO);
|
||||
RDMSR(Turbo.Lo, Turbo.Hi, MSR_NHM_TURBO_RATIO_LIMIT);
|
||||
// RDMSR64(Turbo, MSR_NHM_TURBO_RATIO_LIMIT);
|
||||
RDMSR(Platform, MSR_NHM_PLATFORM_INFO);
|
||||
RDMSR(Turbo, MSR_NHM_TURBO_RATIO_LIMIT);
|
||||
|
||||
Proc->Boost[0]=Platform.MinimumRatio;
|
||||
Proc->Boost[1]=Platform.MaxNonTurboRatio;
|
||||
@@ -375,20 +361,20 @@ void Arch_Nehalem(unsigned int stage)
|
||||
Proc->Boost[9]=Turbo.MaxRatio_1C;
|
||||
|
||||
for(cpu=0; cpu < Proc->CPU.Count; cpu++)
|
||||
{
|
||||
Proc->Core[cpu].Bind=cpu;
|
||||
Proc->Core[cpu].TID[COUNTER]= \
|
||||
kthread_create( Counter_Start,
|
||||
&Proc->Core[cpu],
|
||||
"kintelstart%02d",
|
||||
Proc->Core[cpu].Bind);
|
||||
if((Proc->Core[cpu].TID[INIT]= \
|
||||
kthread_create( Counter_Set,
|
||||
&Proc->Core[cpu],
|
||||
"kintelstart%02d",
|
||||
Proc->Core[cpu].Bind)) != 0)
|
||||
kthread_bind(Proc->Core[cpu].TID[INIT], cpu);
|
||||
|
||||
kthread_bind(Proc->Core[cpu].TID[COUNTER], cpu);
|
||||
wake_up_process(Proc->Core[cpu].TID[COUNTER]);
|
||||
}
|
||||
for(cpu=0; cpu < Proc->CPU.Count; cpu++)
|
||||
if(Proc->Core[cpu].TID[COUNTER])
|
||||
kthread_stop(Proc->Core[cpu].TID[COUNTER]);
|
||||
if(Proc->Core[cpu].TID[INIT])
|
||||
wake_up_process(Proc->Core[cpu].TID[INIT]);
|
||||
|
||||
for(cpu=0; cpu < Proc->CPU.Count; cpu++)
|
||||
if(Proc->Core[cpu].TID[INIT])
|
||||
kthread_stop(Proc->Core[cpu].TID[INIT]);
|
||||
}
|
||||
break;
|
||||
case STOP:
|
||||
@@ -401,24 +387,22 @@ void Arch_Nehalem(unsigned int stage)
|
||||
case START:
|
||||
{
|
||||
for(cpu=0; cpu < Proc->CPU.Count; cpu++)
|
||||
{
|
||||
Proc->Core[cpu].TID[CYCLE]= \
|
||||
kthread_create(
|
||||
Core_Cycle,
|
||||
if((Proc->Core[cpu].TID[CYCLE]= \
|
||||
kthread_create( Core_Cycle,
|
||||
&Proc->Core[cpu],
|
||||
"kintelfreq%02d",
|
||||
Proc->Core[cpu].Bind);
|
||||
Proc->Core[cpu].Bind)) !=0)
|
||||
kthread_bind(Proc->Core[cpu].TID[CYCLE], cpu);
|
||||
}
|
||||
|
||||
for(cpu=0; cpu < Proc->CPU.Count; cpu++)
|
||||
if(Proc->Core[cpu].TID[CYCLE])
|
||||
wake_up_process(Proc->Core[cpu].TID[CYCLE]);
|
||||
if(Proc->Core[cpu].TID[CYCLE])
|
||||
wake_up_process(Proc->Core[cpu].TID[CYCLE]);
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static int IntelFreq_mmap(struct file *filp, struct vm_area_struct *vma)
|
||||
static s32 IntelFreq_mmap(struct file *filp, struct vm_area_struct *vma)
|
||||
{
|
||||
if(Proc)
|
||||
{
|
||||
@@ -427,7 +411,7 @@ static int IntelFreq_mmap(struct file *filp, struct vm_area_struct *vma)
|
||||
return(0);
|
||||
}
|
||||
|
||||
static int IntelFreq_release(struct inode *inode, struct file *file)
|
||||
static s32 IntelFreq_release(struct inode *inode, struct file *file)
|
||||
{
|
||||
if(Proc)
|
||||
Proc->msleep=LOOP_DEF_MS;
|
||||
@@ -441,7 +425,7 @@ static struct file_operations IntelFreq_fops=
|
||||
.release= IntelFreq_release
|
||||
};
|
||||
|
||||
static int __init IntelFreq_init(void)
|
||||
static s32 __init IntelFreq_init(void)
|
||||
{
|
||||
Proc=vmalloc_user(sizeof(PROC));
|
||||
Proc->msleep=LOOP_DEF_MS;
|
||||
@@ -466,15 +450,17 @@ static int __init IntelFreq_init(void)
|
||||
IntelFreq.mkdev, NULL,
|
||||
SHM_DEVNAME)) != NULL)
|
||||
{
|
||||
unsigned int count=0;
|
||||
__u32 count=0;
|
||||
|
||||
count=Core_Count();
|
||||
Proc->CPU.Count=(!count) ? 1 : count;
|
||||
Proc->CPU.OnLine=Proc->CPU.Count;
|
||||
|
||||
for(count=0; count < Proc->CPU.Count; count++)
|
||||
{
|
||||
Proc->Core[count].Bind=count;
|
||||
atomic_init(&Proc->Core[count].Sync, 0x0);
|
||||
|
||||
}
|
||||
Proc_Brand();
|
||||
|
||||
Arch_Nehalem(INIT);
|
||||
@@ -530,7 +516,7 @@ static void __exit IntelFreq_cleanup(void)
|
||||
{
|
||||
Arch_Nehalem(STOP);
|
||||
Arch_Nehalem(END);
|
||||
|
||||
msleep(250);
|
||||
vfree(Proc);
|
||||
}
|
||||
}
|
||||
|
371
intelfreq.h
371
intelfreq.h
@@ -12,7 +12,7 @@
|
||||
#define LOOP_MIN_MS 100
|
||||
#define LOOP_MAX_MS 5000
|
||||
#define LOOP_DEF_MS 1000
|
||||
|
||||
/*
|
||||
#define RDMSR(_lo, _hi, _reg) \
|
||||
__asm__ volatile \
|
||||
( \
|
||||
@@ -31,11 +31,10 @@
|
||||
"a" (_lo), \
|
||||
"d" (_hi) \
|
||||
);
|
||||
|
||||
#define RDMSR64(_val, _reg) \
|
||||
*/
|
||||
#define RDMSR(_val, _reg) \
|
||||
({ \
|
||||
unsigned int _lo=(unsigned int) _val; \
|
||||
unsigned int _hi=_val >> 32; \
|
||||
__u32 _lo, _hi; \
|
||||
\
|
||||
__asm__ volatile \
|
||||
( \
|
||||
@@ -44,20 +43,30 @@
|
||||
"=d" (_hi) \
|
||||
: "c" (_reg) \
|
||||
); \
|
||||
_val.qword=_lo | ((__u64) _hi << 32); \
|
||||
})
|
||||
#define WRMSR(_val, _reg) \
|
||||
__asm__ volatile \
|
||||
( \
|
||||
"wrmsr ;" \
|
||||
: \
|
||||
: "c" (_reg), \
|
||||
"a" ((__u32) _val.qword & 0xFFFFFFFF), \
|
||||
"d" ((__u32) (_val.qword >> 32)) \
|
||||
);
|
||||
|
||||
typedef struct
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned char Chr[4];
|
||||
__u8 Chr[4];
|
||||
} AX, BX, CX, DX;
|
||||
} BRAND;
|
||||
|
||||
/*
|
||||
typedef struct
|
||||
{
|
||||
unsigned long long int
|
||||
__u64
|
||||
ReservedBits1 : 8-0,
|
||||
MaxBusRatio : 13-8,
|
||||
ReservedBits2 : 50-13,
|
||||
@@ -67,14 +76,14 @@ typedef struct
|
||||
|
||||
typedef struct
|
||||
{
|
||||
unsigned long long int
|
||||
__u64
|
||||
Bus_Speed : 3-0,
|
||||
ReservedBits : 64-3;
|
||||
} FSB_FREQ;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
unsigned long long int
|
||||
__u64
|
||||
CurrentRatio : 16-0,
|
||||
ReservedBits1 : 31-16,
|
||||
XE : 32-31,
|
||||
@@ -87,48 +96,37 @@ typedef struct
|
||||
|
||||
typedef struct
|
||||
{
|
||||
unsigned long long int
|
||||
__u64
|
||||
EIST_Target : 16-0,
|
||||
ReservedBits1 : 32-16,
|
||||
Turbo_IDA : 33-32,
|
||||
ReservedBits2 : 64-33;
|
||||
} PERF_CONTROL;
|
||||
*/
|
||||
typedef struct
|
||||
typedef union
|
||||
{
|
||||
union
|
||||
__u64 qword;
|
||||
struct
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned int
|
||||
ReservedBits1 : 8-0,
|
||||
MaxNonTurboRatio: 16-8,
|
||||
ReservedBits2 : 28-16,
|
||||
Ratio_Limited : 29-28,
|
||||
TDC_TDP_Limited : 30-29,
|
||||
ReservedBits3 : 32-30;
|
||||
};
|
||||
unsigned int Lo : 32-0;
|
||||
};
|
||||
union
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned int
|
||||
LowPowerMode : 33-32,
|
||||
ConfigTDPlevels : 35-33,
|
||||
ReservedBits4 : 40-35,
|
||||
MinimumRatio : 48-40,
|
||||
MinOpeRatio : 56-48,
|
||||
ReservedBits5 : 64-56;
|
||||
};
|
||||
unsigned int Hi : 32-0;
|
||||
__u64
|
||||
ReservedBits1 : 8-0,
|
||||
MaxNonTurboRatio: 16-8,
|
||||
ReservedBits2 : 28-16,
|
||||
Ratio_Limited : 29-28,
|
||||
TDC_TDP_Limited : 30-29,
|
||||
ReservedBits3 : 32-30,
|
||||
LowPowerMode : 33-32,
|
||||
ConfigTDPlevels : 35-33,
|
||||
ReservedBits4 : 40-35,
|
||||
MinimumRatio : 48-40,
|
||||
MinOpeRatio : 56-48,
|
||||
ReservedBits5 : 64-56;
|
||||
};
|
||||
} PLATFORM_INFO;
|
||||
/*
|
||||
typedef struct
|
||||
{
|
||||
unsigned long long int
|
||||
__u64
|
||||
Pkg_CST_Limit : 3-0,
|
||||
ReservedBits1 : 10-3,
|
||||
IO_MWAIT_Redir : 11-10,
|
||||
@@ -143,36 +141,12 @@ typedef struct
|
||||
ReservedBits4 : 64-29;
|
||||
} CSTATE_CONFIG;
|
||||
*/
|
||||
typedef struct
|
||||
typedef union
|
||||
{
|
||||
union
|
||||
__u64 qword;
|
||||
struct
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned int
|
||||
MaxRatio_1C : 8-0,
|
||||
MaxRatio_2C : 16-8,
|
||||
MaxRatio_3C : 24-16,
|
||||
MaxRatio_4C : 32-24;
|
||||
};
|
||||
unsigned int Lo : 32-0;
|
||||
};
|
||||
union
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned int
|
||||
MaxRatio_5C : 40-32,
|
||||
MaxRatio_6C : 48-40,
|
||||
MaxRatio_7C : 56-48,
|
||||
MaxRatio_8C : 64-56;
|
||||
};
|
||||
unsigned int Hi : 32-0;
|
||||
};
|
||||
} TURBO_RATIO;
|
||||
typedef struct
|
||||
{
|
||||
unsigned long long int
|
||||
__u64
|
||||
MaxRatio_1C : 8-0,
|
||||
MaxRatio_2C : 16-8,
|
||||
MaxRatio_3C : 24-16,
|
||||
@@ -181,11 +155,13 @@ typedef struct
|
||||
MaxRatio_6C : 48-40,
|
||||
MaxRatio_7C : 56-48,
|
||||
MaxRatio_8C : 64-56;
|
||||
} TURBO_RATIO_64;
|
||||
};
|
||||
} TURBO_RATIO;
|
||||
|
||||
/*
|
||||
typedef struct
|
||||
{
|
||||
unsigned long long int
|
||||
__u64
|
||||
FastStrings : 1-0,
|
||||
ReservedBits1 : 3-1,
|
||||
TCC : 4-3,
|
||||
@@ -213,7 +189,7 @@ typedef struct
|
||||
|
||||
typedef struct
|
||||
{
|
||||
unsigned long long int
|
||||
__u64
|
||||
Type : 8-0,
|
||||
ReservedBits1 : 10-8,
|
||||
FixeRange : 11-10,
|
||||
@@ -221,180 +197,136 @@ typedef struct
|
||||
ReservedBits2 : 64-12;
|
||||
} MTRR_DEF_TYPE;
|
||||
*/
|
||||
typedef struct
|
||||
typedef union
|
||||
{
|
||||
union
|
||||
__u64 qword;
|
||||
struct
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned int
|
||||
EN_PMC0 : 1-0,
|
||||
EN_PMC1 : 2-1,
|
||||
EN_PMC2 : 3-2,
|
||||
EN_PMC3 : 4-3,
|
||||
EN_PMCn : 32-4;
|
||||
};
|
||||
unsigned int Lo : 32-0;
|
||||
};
|
||||
union
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned int
|
||||
EN_FIXED_CTR0 : 33-32,
|
||||
EN_FIXED_CTR1 : 34-33,
|
||||
EN_FIXED_CTR2 : 35-34,
|
||||
ReservedBits2 : 64-35;
|
||||
};
|
||||
unsigned int Hi : 32-0;
|
||||
__u64
|
||||
EN_PMC0 : 1-0,
|
||||
EN_PMC1 : 2-1,
|
||||
EN_PMC2 : 3-2,
|
||||
EN_PMC3 : 4-3,
|
||||
EN_PMCn : 32-4,
|
||||
EN_FIXED_CTR0 : 33-32,
|
||||
EN_FIXED_CTR1 : 34-33,
|
||||
EN_FIXED_CTR2 : 35-34,
|
||||
ReservedBits2 : 64-35;
|
||||
};
|
||||
} GLOBAL_PERF_COUNTER;
|
||||
|
||||
typedef struct
|
||||
typedef union
|
||||
{
|
||||
union
|
||||
__u64 qword;
|
||||
struct
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned int
|
||||
EN0_OS : 1-0,
|
||||
EN0_Usr : 2-1,
|
||||
AnyThread_EN0 : 3-2,
|
||||
EN0_PMI : 4-3,
|
||||
EN1_OS : 5-4,
|
||||
EN1_Usr : 6-5,
|
||||
AnyThread_EN1 : 7-6,
|
||||
EN1_PMI : 8-7,
|
||||
EN2_OS : 9-8,
|
||||
EN2_Usr : 10-9,
|
||||
AnyThread_EN2 : 11-10,
|
||||
EN2_PMI : 12-11,
|
||||
ReservedBits : 32-12;
|
||||
};
|
||||
unsigned int Lo : 32-0;
|
||||
__u64
|
||||
EN0_OS : 1-0,
|
||||
EN0_Usr : 2-1,
|
||||
AnyThread_EN0 : 3-2,
|
||||
EN0_PMI : 4-3,
|
||||
EN1_OS : 5-4,
|
||||
EN1_Usr : 6-5,
|
||||
AnyThread_EN1 : 7-6,
|
||||
EN1_PMI : 8-7,
|
||||
EN2_OS : 9-8,
|
||||
EN2_Usr : 10-9,
|
||||
AnyThread_EN2 : 11-10,
|
||||
EN2_PMI : 12-11,
|
||||
ReservedBits : 64-12;
|
||||
};
|
||||
unsigned int Hi : 32-0;
|
||||
} FIXED_PERF_COUNTER;
|
||||
|
||||
typedef struct
|
||||
typedef union
|
||||
{
|
||||
union
|
||||
__u64 qword;
|
||||
struct
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned int
|
||||
Overflow_PMC0 : 1-0,
|
||||
Overflow_PMC1 : 2-1,
|
||||
Overflow_PMC2 : 3-2,
|
||||
Overflow_PMC3 : 4-3,
|
||||
Overflow_PMCn : 32-4;
|
||||
};
|
||||
unsigned int Lo : 32-0;
|
||||
};
|
||||
union
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned int
|
||||
Overflow_CTR0 : 33-32,
|
||||
Overflow_CTR1 : 34-33,
|
||||
Overflow_CTR2 : 35-34,
|
||||
ReservedBits2 : 61-35,
|
||||
Overflow_UNC : 62-61,
|
||||
Overflow_Buf : 63-62,
|
||||
Ovf_CondChg : 64-63;
|
||||
};
|
||||
unsigned int Hi : 32-0;
|
||||
__u64
|
||||
Overflow_PMC0 : 1-0,
|
||||
Overflow_PMC1 : 2-1,
|
||||
Overflow_PMC2 : 3-2,
|
||||
Overflow_PMC3 : 4-3,
|
||||
Overflow_PMCn : 32-4,
|
||||
Overflow_CTR0 : 33-32,
|
||||
Overflow_CTR1 : 34-33,
|
||||
Overflow_CTR2 : 35-34,
|
||||
ReservedBits2 : 61-35,
|
||||
Overflow_UNC : 62-61,
|
||||
Overflow_Buf : 63-62,
|
||||
Ovf_CondChg : 64-63;
|
||||
};
|
||||
} GLOBAL_PERF_STATUS;
|
||||
|
||||
typedef struct
|
||||
typedef union
|
||||
{
|
||||
union
|
||||
__u64 qword;
|
||||
struct
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned int
|
||||
Clear_Ovf_PMC0 : 1-0,
|
||||
Clear_Ovf_PMC1 : 2-1,
|
||||
Clear_Ovf_PMC2 : 3-2,
|
||||
Clear_Ovf_PMC3 : 4-3,
|
||||
Clear_Ovf_PMCn : 32-2;
|
||||
};
|
||||
unsigned int Lo : 32-0;
|
||||
};
|
||||
union
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned int
|
||||
Clear_Ovf_CTR0 : 33-32,
|
||||
Clear_Ovf_CTR1 : 34-33,
|
||||
Clear_Ovf_CTR2 : 35-34,
|
||||
ReservedBits2 : 61-35,
|
||||
Clear_Ovf_UNC : 62-61,
|
||||
Clear_Ovf_Buf : 63-62,
|
||||
Clear_CondChg : 64-63;
|
||||
};
|
||||
unsigned int Hi : 32-0;
|
||||
__u64
|
||||
Clear_Ovf_PMC0 : 1-0,
|
||||
Clear_Ovf_PMC1 : 2-1,
|
||||
Clear_Ovf_PMC2 : 3-2,
|
||||
Clear_Ovf_PMC3 : 4-3,
|
||||
Clear_Ovf_PMCn : 32-2,
|
||||
Clear_Ovf_CTR0 : 33-32,
|
||||
Clear_Ovf_CTR1 : 34-33,
|
||||
Clear_Ovf_CTR2 : 35-34,
|
||||
ReservedBits2 : 61-35,
|
||||
Clear_Ovf_UNC : 62-61,
|
||||
Clear_Ovf_Buf : 63-62,
|
||||
Clear_CondChg : 64-63;
|
||||
};
|
||||
} GLOBAL_PERF_OVF_CTRL;
|
||||
|
||||
typedef struct
|
||||
typedef union
|
||||
{
|
||||
union
|
||||
__u64 qword;
|
||||
struct
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned int
|
||||
StatusBit : 1-0,
|
||||
StatusLog : 2-1,
|
||||
PROCHOT : 3-2,
|
||||
PROCHOTLog : 4-3,
|
||||
CriticalTemp : 5-4,
|
||||
CriticalTempLog : 6-5,
|
||||
Threshold1 : 7-6,
|
||||
Threshold1Log : 8-7,
|
||||
Threshold2 : 9-8,
|
||||
Threshold2Log : 10-9,
|
||||
PowerLimit : 11-10,
|
||||
PowerLimitLog : 12-11,
|
||||
ReservedBits1 : 16-12,
|
||||
DTS : 23-16,
|
||||
ReservedBits2 : 27-23,
|
||||
Resolution : 31-27,
|
||||
ReadingValid : 32-31;
|
||||
};
|
||||
unsigned int Lo : 32-0;
|
||||
__u64
|
||||
StatusBit : 1-0,
|
||||
StatusLog : 2-1,
|
||||
PROCHOT : 3-2,
|
||||
PROCHOTLog : 4-3,
|
||||
CriticalTemp : 5-4,
|
||||
CriticalTempLog : 6-5,
|
||||
Threshold1 : 7-6,
|
||||
Threshold1Log : 8-7,
|
||||
Threshold2 : 9-8,
|
||||
Threshold2Log : 10-9,
|
||||
PowerLimit : 11-10,
|
||||
PowerLimitLog : 12-11,
|
||||
ReservedBits1 : 16-12,
|
||||
DTS : 23-16,
|
||||
ReservedBits2 : 27-23,
|
||||
Resolution : 31-27,
|
||||
ReadingValid : 32-31,
|
||||
ReservedBits3 : 64-32;
|
||||
};
|
||||
unsigned int Hi : 32-0;
|
||||
} THERM_STATUS;
|
||||
|
||||
|
||||
typedef struct
|
||||
typedef union
|
||||
{
|
||||
union
|
||||
__u64 qword;
|
||||
struct
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned int
|
||||
ReservedBits1 : 16-0,
|
||||
Target : 24-16,
|
||||
ReservedBits2 : 32-24;
|
||||
};
|
||||
unsigned int Lo : 32-0;
|
||||
__u64
|
||||
ReservedBits1 : 16-0,
|
||||
Target : 24-16,
|
||||
ReservedBits2 : 64-24;
|
||||
};
|
||||
unsigned int Hi : 32-0;
|
||||
} TJMAX;
|
||||
|
||||
enum { CYCLE=0, COUNTER=1 };
|
||||
enum { INIT=0, END=1, CYCLE=2, START=2, STOP=3 };
|
||||
|
||||
typedef struct
|
||||
{
|
||||
atomic_ullong Sync;
|
||||
|
||||
unsigned int Bind;
|
||||
struct task_struct *TID[2];
|
||||
__u32 Bind;
|
||||
struct task_struct *TID[STOP];
|
||||
|
||||
struct SAVEAREA
|
||||
{
|
||||
@@ -406,44 +338,41 @@ typedef struct
|
||||
{
|
||||
union
|
||||
{
|
||||
struct { unsigned int Lo, Hi; };
|
||||
unsigned long long r64;
|
||||
__u64 qword;
|
||||
}
|
||||
INST[2];
|
||||
struct
|
||||
{
|
||||
union
|
||||
{
|
||||
struct { unsigned int Lo, Hi; };
|
||||
unsigned long long int r64;
|
||||
__u64 qword;
|
||||
}
|
||||
UCC,
|
||||
URC;
|
||||
} C0[2];
|
||||
union
|
||||
{
|
||||
struct { unsigned int Lo, Hi; };
|
||||
unsigned long long int r64;
|
||||
__u64 qword;
|
||||
}
|
||||
C3[2],
|
||||
C6[2],
|
||||
C7[2],
|
||||
TSC[2];
|
||||
|
||||
unsigned long long int C1[2];
|
||||
__u64 C1[2];
|
||||
} Cycles;
|
||||
|
||||
struct
|
||||
{
|
||||
unsigned long long int
|
||||
__u64
|
||||
INST;
|
||||
struct
|
||||
{
|
||||
unsigned long long int
|
||||
__u64
|
||||
UCC,
|
||||
URC;
|
||||
} C0;
|
||||
unsigned long long int
|
||||
__u64
|
||||
C3,
|
||||
C6,
|
||||
C7,
|
||||
@@ -459,19 +388,17 @@ typedef struct
|
||||
|
||||
typedef struct
|
||||
{
|
||||
unsigned int msleep;
|
||||
__u32 msleep;
|
||||
|
||||
struct {
|
||||
unsigned int Count,
|
||||
__u32 Count,
|
||||
OnLine;
|
||||
} CPU;
|
||||
|
||||
char Brand[48+1];
|
||||
unsigned int Boost[1+1+8],
|
||||
__u32 Boost[1+1+8],
|
||||
PerCore,
|
||||
Clock;
|
||||
|
||||
CORE Core[_MAX_CPU_];
|
||||
} PROC;
|
||||
|
||||
enum { END=0, INIT=1, STOP=2, START=3 };
|
||||
|
Reference in New Issue
Block a user