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Documentation updated.

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CyrIng
2021-11-28 20:47:01 +01:00
parent 2bf881ebef
commit c06cc705bc
2 changed files with 4 additions and 9 deletions
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3
Makefile
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@@ -176,9 +176,8 @@ help:
"| where <N> is 64, 128, 256, 512 or 1024 builtin CPU |\n"\
"| |\n"\
"| LEGACY=<L> |\n"\
"| where level <L> is 1 or 2 |\n"\
"| where level <L> |\n"\
"| 1: assembly level restriction such as CMPXCHG16 |\n"\
"| 2: kernel level restriction like amd_smn_read() |\n"\
"| |\n"\
"| UBENCH=<N> |\n"\
"| where <N> is 0 to disable or 1 to enable micro-benchmark |\n"\

10
README.md
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@@ -306,12 +306,9 @@ CPU IPS IPC CPI
4. Switch the current system clock source to `corefreq`
`echo "corefreq" > /sys/devices/system/clocksource/clocksource0/current_clocksource`
A2: `[AMD][Zen]` CCD temperatures:
_CoreFreq_ driver can be forced to use the Kernel function `amd_smn_read()`
`make LEGACY=2`
However `amd_smn_read()` serializes the SMU access through a mutex.
A2: `[AMD][Zen]` SMU:
_CoreFreq_ CPU monitoring loops are executed in an interrupt context where any blocking call like Mutex will freeze the kernel.
As a recommendation, don't use this option and **make sure no other SMU driver is running**.
As a recommendation, **make sure no other SMU driver is running**.
A3: This Processor is not or partially implemented in _CoreFreq_.
Please open an issue in the [CPU support](https://github.com/cyring/CoreFreq/wiki/CPU-support) Wiki page.
@@ -372,9 +369,8 @@ o---------------------------------------------------------------o
| where <N> is 64, 128, 256, 512 or 1024 builtin CPU |
| |
| LEGACY=<L> |
| where level <L> is 1 or 2 |
| where level <L> |
| 1: assembly level restriction such as CMPXCHG16 |
| 2: kernel level restriction like amd_smn_read() |
| |
| UBENCH=<N> |
| where <N> is 0 to disable or 1 to enable micro-benchmark |