[aarch64] Query Cache Coherent Network|Interconnect via DT

2025-07-23 04:12:59 +02:00 · 2025-06-11 14:56:46 +02:00
parent cf4269f0fe
commit 92e070b098
12 changed files with 117 additions and 40 deletions
--- a/aarch64/corefreq-api.h
+++ b/aarch64/corefreq-api.h
@@ -320,6 +320,8 @@ typedef struct
 		CLUSTERIDR	ClusterRev;
 		enum DSU_TYPE	DSU_Type;
 		enum CMN_TYPE	CMN_Type;
+		enum CCN_TYPE	CCN_Type;
+		enum CCI_TYPE	CCI_Type;

 		unsigned int	Boost[UNCORE_BOOST(SIZE)];
 		BUS_REGISTERS	Bus;
--- a/aarch64/corefreq-cli-json.c
+++ b/aarch64/corefreq-cli-json.c
@@ -925,10 +925,10 @@ void JsonSysInfo(RO(SHM_STRUCT) *RO(Shm))
 			json_literal(&s, "%llu", RO(Shm)->Proc.Technology.DSU);
 			json_key(&s, "CMN");
 			json_literal(&s, "%llu", RO(Shm)->Proc.Technology.CMN);
-			json_key(&s, "CCI");
-			json_literal(&s, "%llu", RO(Shm)->Proc.Technology.CCI);
 			json_key(&s, "CCN");
 			json_literal(&s, "%llu", RO(Shm)->Proc.Technology.CCN);
+			json_key(&s, "CCI");
+			json_literal(&s, "%llu", RO(Shm)->Proc.Technology.CCI);
 			json_key(&s, "Hybrid");
 			json_literal(&s, "%llu", RO(Shm)->Proc.Features.Hybrid);
 			json_key(&s, "VM");
--- a/aarch64/corefreq-cli-rsc-en.h
+++ b/aarch64/corefreq-cli-rsc-en.h
@@ -542,7 +542,7 @@
 {									\
 	'T','e','c','h',' ','[',' ',' ','T','S','C',' ',' ',',',	\
 	'S','M','T',',','b','i','g','.','L','I','T','T','L','E',',',	\
-	'D','S','U',',','C','M','N',']' 			 	\
+	'D','S','U',',','C','M','N',',','C','C','N',',','C','C','I',']' 			 	\
 }

 #define RSC_LAYOUT_FOOTER_VOLT_TEMP_CODE_EN				\
--- a/aarch64/corefreq-cli-rsc-theme-dflt.h
+++ b/aarch64/corefreq-cli-rsc-theme-dflt.h
@@ -5,7 +5,7 @@
 */

 #define RSC_THEME_DFLT_CODE		/* 72 chars */			\
-"           Default theme by CyrIng.  Since 2015; updated May 2025       "
+"           Default theme by CyrIng.  Since 2015; updated June 2025      "

 #define RSC_UI_THM_DFLT_ATTR						\
 {									\
@@ -1202,7 +1202,7 @@
 {									\
 	LWK,LWK,LWK,LWK,LWK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,LWK,	\
 	HDK,HDK,HDK,LWK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,LWK,	\
-	HDK,HDK,HDK,LWK,HDK,HDK,HDK,HDK 			 	\
+	HDK,HDK,HDK,LWK,HDK,HDK,HDK,LWK,HDK,HDK,HDK,LWK,HDK,HDK,HDK,HDK \
 }

 #define RSC_LAYOUT_FOOTER_VOLT_TEMP_THM_DFLT_ATTR			\
--- a/aarch64/corefreq-cli-rsc-theme-usr1.h
+++ b/aarch64/corefreq-cli-rsc-theme-usr1.h
@@ -5,7 +5,7 @@
 */

 #define RSC_THEME_USR1_CODE		/* 72 chars */			\
-"        Strawberry theme by CyrIng.  Updated by CyrIng - May 2025       "
+"        Strawberry theme by CyrIng.  Updated by CyrIng - June 2025      "

 #define RSC_UI_THM_USR1_ATTR						\
 {									\
@@ -1202,7 +1202,7 @@
 {									\
 	HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,	\
 	HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,	\
-	HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW 				\
+	HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW \
 }

 #define RSC_LAYOUT_FOOTER_VOLT_TEMP_THM_USR1_ATTR			\
--- a/aarch64/corefreq-cli-rsc-theme-usr2.h
+++ b/aarch64/corefreq-cli-rsc-theme-usr2.h
@@ -5,7 +5,7 @@
 */

 #define RSC_THEME_USR2_CODE		/* 72 chars */			\
-"        Transparent theme by leaty.  Updated by CyrIng - May 2025       "
+"        Transparent theme by leaty.  Updated by CyrIng - June 2025      "

 #define RSC_UI_THM_USR2_ATTR						\
 {									\
@@ -1202,7 +1202,7 @@
 {									\
 	LWK,LWK,LWK,LWK,LWK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,LWK,	\
 	HDK,HDK,HDK,LWK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,LWK,	\
-	HDK,HDK,HDK,LWK,HDK,HDK,HDK,HDK 				\
+	HDK,HDK,HDK,LWK,HDK,HDK,HDK,LWK,HDK,HDK,HDK,LWK,HDK,HDK,HDK,HDK \
 }

 #define RSC_LAYOUT_FOOTER_VOLT_TEMP_THM_USR2_ATTR			\
--- a/aarch64/corefreq-cli.c
+++ b/aarch64/corefreq-cli.c
@@ -14269,6 +14269,12 @@ void Layout_Footer(Layer *layer, CUINT row)
 	/*	C		M		N			*/
 	hTech0.attr[33] = hTech0.attr[34] = hTech0.attr[35] = \
 					EN[RO(Shm)->Proc.Technology.CMN];
+	/*	C		C		N			*/
+	hTech0.attr[37] = hTech0.attr[38] = hTech0.attr[39] = \
+					EN[RO(Shm)->Proc.Technology.CCN];
+	/*	C		C		I			*/
+	hTech0.attr[41] = hTech0.attr[42] = hTech0.attr[43] = \
+					EN[RO(Shm)->Proc.Technology.CCI];

 	LayerCopyAt(	layer, hTech0.origin.col, hTech0.origin.row,
 			hTech0.length, hTech0.attr, hTech0.code );
--- a/aarch64/corefreq.h
+++ b/aarch64/corefreq.h
@@ -243,8 +243,8 @@ typedef struct
 		unsigned long long
 				DSU		:  1-0,
 				CMN		:  2-1,
-				CCI		:  3-2,
-				CCN		:  4-3,
+				CCN		:  3-2,
+				CCI		:  4-3,
 				_Unused1_	: 13-4,
 				VM		: 14-13,
 				IOMMU		: 15-14,
--- a/aarch64/corefreqd.c
+++ b/aarch64/corefreqd.c
@@ -689,6 +689,12 @@ void Technology_Update( RO(SHM_STRUCT) *RO(Shm),
 	if (RO(Proc)->Uncore.CMN_Type != CMN_NONE) {
 		RO(Shm)->Proc.Technology.CMN = 1;
 	}
+	if (RO(Proc)->Uncore.CCN_Type != CCN_NONE) {
+		RO(Shm)->Proc.Technology.CCN = 1;
+	}
+	if (RO(Proc)->Uncore.CCI_Type != CCI_NONE) {
+		RO(Shm)->Proc.Technology.CCI = 1;
+	}
 }

 void Mitigation_Stage(	RO(SHM_STRUCT) *RO(Shm),
--- a/aarch64/corefreqk.c
+++ b/aarch64/corefreqk.c
@@ -2867,10 +2867,8 @@ static acpi_status DSU_Compare( acpi_handle handle,
 }
 #endif /* CONFIG_ACPI */

-static void Query_DynamIQ(unsigned int cpu)
+static void Query_DSU(unsigned int cpu)
 {
-	Query_GenericMachine(cpu);
-
  if (PUBLIC(RO(Proc))->HypervisorID == BARE_METAL) {
 	/* Query the Cluster Configuration on Bare Metal only		*/
 	PUBLIC(RO(Proc))->Uncore.ClusterCfg.value = SysRegRead(CLUSTERCFR_EL1);
@@ -2947,7 +2945,6 @@ static void Query_CMN(unsigned int cpu)
 {
 	enum CMN_TYPE CMN_Type[2] = {CMN_NONE, CMN_NONE};

-	Query_GenericMachine(cpu);
 #if defined(CONFIG_OF)
 	CMN_Type[0] = (enum CMN_TYPE) Match_From_DeviceTree(CMN_of_match);
 #endif
@@ -2958,9 +2955,57 @@ static void Query_CMN(unsigned int cpu)
 		CMN_Type[0] == CMN_NONE ? CMN_Type[1] : CMN_Type[0];
 }

+#if defined(CONFIG_OF)
+static const struct of_device_id CCN_of_match[] = CCN_DEVICE_TREE_LIST;
+#endif
+
+static void Query_CCN(unsigned int cpu)
+{
+	enum CCN_TYPE CCN_Type = CCN_NONE;
+
+#if defined(CONFIG_OF)
+	CCN_Type = (enum CCN_TYPE) Match_From_DeviceTree(CCN_of_match);
+#endif
+	PUBLIC(RO(Proc))->Uncore.CCN_Type = CCN_Type;
+}
+
+#if defined(CONFIG_OF)
+static const struct of_device_id CCI_of_match[] = CCI_DEVICE_TREE_LIST;
+#endif
+
+static void Query_CCI(unsigned int cpu)
+{
+	enum CCI_TYPE CCI_Type = CCI_NONE;
+
+#if defined(CONFIG_OF)
+	CCI_Type = (enum CCI_TYPE) Match_From_DeviceTree(CCI_of_match);
+#endif
+	PUBLIC(RO(Proc))->Uncore.CCI_Type = CCI_Type;
+}
+
+static void Query_DynamIQ(unsigned int cpu)
+{
+	Query_GenericMachine(cpu);
+	Query_DSU(cpu);
+}
+
+static void Query_CoherentMesh(unsigned int cpu)
+{
+	Query_GenericMachine(cpu);
+	Query_CMN(cpu);
+}
+
+static void Query_CacheCoherent(unsigned int cpu)
+{
+	Query_GenericMachine(cpu);
+	Query_CCN(cpu);
+	Query_CCI(cpu);
+}
+
 static void Query_DynamIQ_CMN(unsigned int cpu)
 {
-	Query_DynamIQ(cpu);
+	Query_GenericMachine(cpu);
+	Query_DSU(cpu);
 	Query_CMN(cpu);
 }

--- a/aarch64/corefreqk.h
+++ b/aarch64/corefreqk.h
@@ -18,14 +18,6 @@
 	{ "",		0		}				\
 }

-#define CCN_DEVICE_TREE_LIST						\
-{									\
-	{ .compatible = "arm,ccn-502",	.data = (void *) CCN_502 },	\
-	{ .compatible = "arm,ccn-504",	.data = (void *) CCN_504 },	\
-	{ .compatible = "arm,ccn-512",	.data = (void *) CCN_512 },	\
-	{ /* EOL */ }							\
-}
-
 #define CMN_DEVICE_TREE_LIST						\
 {									\
 	{ .compatible = "arm,cmn-600",	.data = (void *) CMN_600  },	\
@@ -46,6 +38,23 @@
 	{ "",		0		}				\
 }

+#define CCN_DEVICE_TREE_LIST						\
+{									\
+	{ .compatible = "arm,ccn-502",	.data = (void *) CCN_502 },	\
+	{ .compatible = "arm,ccn-504",	.data = (void *) CCN_504 },	\
+	{ .compatible = "arm,ccn-508",	.data = (void *) CCN_508 },	\
+	{ .compatible = "arm,ccn-512",	.data = (void *) CCN_512 },	\
+	{ /* EOL */ }							\
+}
+
+#define CCI_DEVICE_TREE_LIST						\
+{									\
+	{ .compatible = "arm,cci-400",	.data = (void *) CCI_400 },	\
+	{ .compatible = "arm,cci-500",	.data = (void *) CCI_500 },	\
+	{ .compatible = "arm,cci-550",	.data = (void *) CCI_550 },	\
+	{ /* EOL */ }							\
+}
+
 #if defined(CONFIG_OF) && LINUX_VERSION_CODE < KERNEL_VERSION(6, 4, 0)
 #define of_cpu_device_node_get(cpu)					\
 ({									\
@@ -543,14 +552,14 @@ typedef struct
 } ARCH;

 static CLOCK BaseClock_GenericMachine(unsigned int ratio) ;
-static void Query_CMN(unsigned int cpu) ;
-#define     Query_CCN Query_GenericMachine
 static void Query_GenericMachine(unsigned int cpu) ;
 static void PerCore_GenericMachine(void *arg) ;
 static void Start_GenericMachine(void *arg) ;
 static void Stop_GenericMachine(void *arg) ;
 static void InitTimer_GenericMachine(unsigned int cpu) ;
 static void Query_DynamIQ(unsigned int cpu) ;
+static void Query_CoherentMesh(unsigned int cpu) ;
+static void Query_CacheCoherent(unsigned int cpu) ;
 static void Query_DynamIQ_CMN(unsigned int cpu) ;
 /*	[Void]								*/
 #define _Void_Signature {.ExtFamily=0x00, .Family=0x0, .ExtModel=0x0, .Model=0x0}
@@ -790,7 +799,7 @@ static ARCH Arch[ARCHITECTURES] = {
 	},
 [Cortex_A35] = {
 	.Signature = _Cortex_A35,
-	.Query = Query_GenericMachine,
+	.Query = Query_CacheCoherent,
 	.Update = PerCore_GenericMachine,
 	.Start = Start_GenericMachine,
 	.Stop = Stop_GenericMachine,
@@ -902,7 +911,7 @@ static ARCH Arch[ARCHITECTURES] = {
 	},
 [Cortex_A53] = {
 	.Signature = _Cortex_A53,
-	.Query = Query_GenericMachine,
+	.Query = Query_CacheCoherent,
 	.Update = PerCore_GenericMachine,
 	.Start = Start_GenericMachine,
 	.Stop = Stop_GenericMachine,
@@ -958,7 +967,7 @@ static ARCH Arch[ARCHITECTURES] = {
 	},
 [Cortex_A57] = {
 	.Signature = _Cortex_A57,
-	.Query = Query_GenericMachine,
+	.Query = Query_CacheCoherent,
 	.Update = PerCore_GenericMachine,
 	.Start = Start_GenericMachine,
 	.Stop = Stop_GenericMachine,
@@ -1098,7 +1107,7 @@ static ARCH Arch[ARCHITECTURES] = {
 	},
 [Cortex_A72] = {
 	.Signature = _Cortex_A72,
-	.Query = Query_CCN,
+	.Query = Query_CacheCoherent,
 	.Update = PerCore_GenericMachine,
 	.Start = Start_GenericMachine,
 	.Stop = Stop_GenericMachine,
@@ -1686,7 +1695,7 @@ static ARCH Arch[ARCHITECTURES] = {
 	},
 [Neoverse_E1] = {
 	.Signature = _Neoverse_E1,
-	.Query = Query_CMN,
+	.Query = Query_CoherentMesh,
 	.Update = PerCore_GenericMachine,
 	.Start = Start_GenericMachine,
 	.Stop = Stop_GenericMachine,
@@ -1714,7 +1723,7 @@ static ARCH Arch[ARCHITECTURES] = {
 	},
 [Neoverse_N1] = {
 	.Signature = _Neoverse_N1,
-	.Query = Query_CMN,
+	.Query = Query_CoherentMesh,
 	.Update = PerCore_GenericMachine,
 	.Start = Start_GenericMachine,
 	.Stop = Stop_GenericMachine,
@@ -1742,7 +1751,7 @@ static ARCH Arch[ARCHITECTURES] = {
 	},
 [Neoverse_N2] = {
 	.Signature = _Neoverse_N2,
-	.Query = Query_CMN,
+	.Query = Query_CoherentMesh,
 	.Update = PerCore_GenericMachine,
 	.Start = Start_GenericMachine,
 	.Stop = Stop_GenericMachine,
@@ -1826,7 +1835,7 @@ static ARCH Arch[ARCHITECTURES] = {
 	},
 [Neoverse_V2] = {
 	.Signature = _Neoverse_V2,
-	.Query = Query_CMN,
+	.Query = Query_CoherentMesh,
 	.Update = PerCore_GenericMachine,
 	.Start = Start_GenericMachine,
 	.Stop = Stop_GenericMachine,
--- a/aarch64/coretypes.h
+++ b/aarch64/coretypes.h
@@ -126,12 +126,6 @@ enum DSU_TYPE {
 	DSU_120AE		/* A720AE, A520AE			*/
 };

-enum CCN_TYPE {
-	CCN_502,		/* A72					*/
-	CCN_504,		/* A15 (32-bits), Freescale FSL-2080A	*/
-	CCN_512
-};
-
 enum CMN_TYPE {
 	CMN_NONE,
 	CMN_600,
@@ -141,6 +135,21 @@ enum CMN_TYPE {
 	CMN_CI700
 };

+enum CCN_TYPE {
+	CCN_NONE,
+	CCN_502,		/* A72					*/
+	CCN_504,		/* A15 (32-bits), Freescale FSL-2080A	*/
+	CCN_508,		/* A53, A57				*/
+	CCN_512 		/* A53, A57				*/
+};
+
+enum CCI_TYPE {
+	CCI_NONE,
+	CCI_400,		/* A53, A57				*/
+	CCI_500,		/* A53, A57, A72			*/
+	CCI_550 		/* A35, A53, A57, A72			*/
+};
+
 enum HYPERVISOR {
 	HYPERV_NONE,
 	BARE_METAL,