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[Intel][LNL] Added PCI ids to probe any IMC and SMBUS

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[Intel][ARL] Completed with SMBUS PCI id
This commit is contained in:
CyrIng
2024-10-20 11:23:08 +02:00
parent a8c0930c08
commit 722bc2ba7b
5 changed files with 41 additions and 1 deletions
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5
x86_64/corefreq-api.h
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@@ -1578,6 +1578,11 @@ typedef struct
#define DID_INTEL_ARROWLAKE_S_8_12_HB 0x7d1b
#define DID_INTEL_ARROWLAKE_S_6_8_HB 0x7d2a
#define DID_INTEL_ARROWLAKE_S_PCH 0xae0d
#define DID_INTEL_ARROWLAKE_S_SMBUS 0xae22
/* Source: Intel Core Ultra 200V Series Processors Datasheet, Vol 1 */
#define DID_INTEL_LUNARLAKE_V_4P_4E 0x6400
#define DID_INTEL_LUNARLAKE_V_PCH 0xa807
#define DID_INTEL_LUNARLAKE_V_SMBUS 0xa822
/* Source: /include/linux/pci_ids.h */
#define DID_AMD_K8_NB_MEMCTL 0x1102
#define DID_AMD_K8_NB 0x1100

1
x86_64/corefreq.h
View File

@@ -94,6 +94,7 @@ enum CHIPSET {
IC_MTL_U,
IC_MTL_UT4,
IC_ARL_S,
IC_LNL_V,
IC_K8,
IC_ZEN,
CHIPSETS

11
x86_64/corefreqd.c
View File

@@ -6379,6 +6379,9 @@ void MTL_IMC(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc))
#define ARL_CAP MTL_CAP
#define ARL_IMC MTL_IMC
#define LNL_CAP MTL_CAP
#define LNL_IMC MTL_IMC
void AMD_0Fh_MCH(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc))
{
struct {
@@ -7063,6 +7066,7 @@ static char *Chipset[CHIPSETS] = {
[IC_MTL_U] = "Intel MTL-U",
[IC_MTL_UT4] = "Intel MTL-U Type4",
[IC_ARL_S] = "Intel ARL-S",
[IC_LNL_V] = "Intel LNL-V",
[IC_K8] = "K8/HyperTransport",
[IC_ZEN] = "Zen UMC"
};
@@ -7666,6 +7670,13 @@ void PCI_Intel(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc), RO(CORE) *RO(Core),
case DID_INTEL_ARROWLAKE_S_PCH:
SET_CHIPSET(IC_ARL_S);
break;
case DID_INTEL_LUNARLAKE_V_4P_4E:
LNL_CAP(RO(Shm), RO(Proc), RO(Core));
LNL_IMC(RO(Shm), RO(Proc));
break;
case DID_INTEL_LUNARLAKE_V_PCH:
SET_CHIPSET(IC_LNL_V);
break;
}
}

8
x86_64/corefreqk.c
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@@ -10491,6 +10491,14 @@ static void Intel_Watchdog(CORE_RO *Core)
PCI_VDEVICE(INTEL, DID_INTEL_ARL_MTL_PCH_S_SMBUS),
.driver_data = (kernel_ulong_t) TCOBASE
},
{
PCI_VDEVICE(INTEL, DID_INTEL_ARROWLAKE_S_SMBUS),
.driver_data = (kernel_ulong_t) TCOBASE
},
{
PCI_VDEVICE(INTEL, DID_INTEL_LUNARLAKE_V_SMBUS),
.driver_data = (kernel_ulong_t) TCOBASE
},
{0, }
};
if (CoreFreqK_ProbePCI(PCI_WDT_ids, NULL, NULL) < RC_SUCCESS) {

17
x86_64/corefreqk.h
View File

@@ -2167,6 +2167,8 @@ static PCI_CALLBACK MTL_IMC(struct pci_dev *dev) ;
#define MTL_PCH CML_PCH
#define ARL_IMC MTL_IMC
#define ARL_PCH MTL_PCH
#define LNL_IMC MTL_IMC
#define LNL_PCH MTL_PCH
static PCI_CALLBACK AMD_0Fh_MCH(struct pci_dev *dev) ;
static PCI_CALLBACK AMD_0Fh_HTT(struct pci_dev *dev) ;
static PCI_CALLBACK AMD_Zen_IOMMU(struct pci_dev *dev) ;
@@ -3248,6 +3250,19 @@ static struct pci_device_id PCI_MTL_ids[] = {
{0, }
};
/* Lunar Lake */
static struct pci_device_id PCI_LNL_ids[] = {
{
PCI_VDEVICE(INTEL, DID_INTEL_LUNARLAKE_V_4P_4E),
.driver_data = (kernel_ulong_t) LNL_IMC
},
{
PCI_VDEVICE(INTEL, DID_INTEL_LUNARLAKE_V_PCH),
.driver_data = (kernel_ulong_t) LNL_PCH
},
{0, }
};
/* AMD Family 0Fh */
static struct pci_device_id PCI_AMD_0Fh_ids[] = {
{
@@ -12073,7 +12088,7 @@ static ARCH Arch[ARCHITECTURES] = {
.thermalFormula = THERMAL_FORMULA_INTEL,
.voltageFormula = VOLTAGE_FORMULA_INTEL_SAV,
.powerFormula = POWER_FORMULA_INTEL,
.PCI_ids = PCI_Void_ids,
.PCI_ids = PCI_LNL_ids,
.Uncore = {
.Start = Start_Uncore_Alderlake,
.Stop = Stop_Uncore_Alderlake,