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19 lines
242 B
Makefile
19 lines
242 B
Makefile
CC := gcc
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CFLAGS := -O2 -Wall
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TARGET := fwtool
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OBJS := fwtool.o tsv.o crc32.o
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all: $(TARGET)
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clean:
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rm -vf $(TARGET) $(OBJS)
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depend:
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$(CC) -MM $(OBJS:.o=.c) > Makefile.dep
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$(TARGET): $(OBJS)
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$(CC) -o $@ $(OBJS)
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-include Makefile.dep
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