mirror of
https://github.com/tbsdtv/linux_media.git
synced 2025-07-23 04:33:26 +02:00
msm-fixes for v6.4-rc3 Display Fixes: + Catalog fixes: - fix the programmable fetch lines and qos settings of msm8998 to match what is present downstream - fix the LM pairs for msm8998 to match what is present downstream. The current settings are not right as LMs with incompatible connected blocks are paired - remove unused INTF0 interrupt mask from SM6115/QCM2290 as there is no INTF0 present on those chipsets. There is only one DSI on index 1 - remove TE2 block from relevant chipsets because this is mainly used for ping-pong split feature which is not supported upstream and also for the chipsets where we are removing them in this change, that block is not present as the tear check has been moved to the intf block - relocate non-MDP_TOP INTF_INTR offsets from dpu_hwio.h to dpu_hw_interrupts.c to match where they belong - fix the indentation for REV_7xxx interrupt masks - fix the offset and version for dither blocks of SM8[34]50/SC8280XP chipsets as it was incorrect - make the ping-pong blk length 0 for appropriate chipsets as those chipsets only have a dither ping-pong dither block but no other functionality in the base ping-pong - remove some duplicate register defines from INTF + Fix the log mask for the writeback block so that it can be enabled correctly via debugfs + unregister the hdmi codec for dp during unbind otherwise it leaks audio codec devices + Yaml change to fix warnings related to 'qcom,master-dsi' and 'qcom,sync-dual-dsi' GPU Fixes: + fix submit error path leak + arm-smmu-qcom fix for regression that broke per-process page tables + fix no-iommu crash Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rob Clark <robdclark@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGvHEcJfp=k6qatmb_SvAeyvy3CBpaPfwLqtNthuEzA_7w@mail.gmail.com
443 lines
10 KiB
YAML
443 lines
10 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Qualcomm Display DSI controller
|
|
|
|
maintainers:
|
|
- Krishna Manikandan <quic_mkrishn@quicinc.com>
|
|
|
|
properties:
|
|
compatible:
|
|
oneOf:
|
|
- items:
|
|
- enum:
|
|
- qcom,apq8064-dsi-ctrl
|
|
- qcom,msm8916-dsi-ctrl
|
|
- qcom,msm8953-dsi-ctrl
|
|
- qcom,msm8974-dsi-ctrl
|
|
- qcom,msm8996-dsi-ctrl
|
|
- qcom,msm8998-dsi-ctrl
|
|
- qcom,qcm2290-dsi-ctrl
|
|
- qcom,sc7180-dsi-ctrl
|
|
- qcom,sc7280-dsi-ctrl
|
|
- qcom,sdm660-dsi-ctrl
|
|
- qcom,sdm845-dsi-ctrl
|
|
- qcom,sm6115-dsi-ctrl
|
|
- qcom,sm8150-dsi-ctrl
|
|
- qcom,sm8250-dsi-ctrl
|
|
- qcom,sm8350-dsi-ctrl
|
|
- qcom,sm8450-dsi-ctrl
|
|
- qcom,sm8550-dsi-ctrl
|
|
- const: qcom,mdss-dsi-ctrl
|
|
- enum:
|
|
- qcom,dsi-ctrl-6g-qcm2290
|
|
- qcom,mdss-dsi-ctrl # This should always come with an SoC-specific compatible
|
|
deprecated: true
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
reg-names:
|
|
const: dsi_ctrl
|
|
|
|
interrupts:
|
|
maxItems: 1
|
|
|
|
clocks:
|
|
description: |
|
|
Several clocks are used, depending on the variant. Typical ones are::
|
|
- bus:: Display AHB clock.
|
|
- byte:: Display byte clock.
|
|
- byte_intf:: Display byte interface clock.
|
|
- core:: Display core clock.
|
|
- core_mss:: Core MultiMedia SubSystem clock.
|
|
- iface:: Display AXI clock.
|
|
- mdp_core:: MDP Core clock.
|
|
- mnoc:: MNOC clock
|
|
- pixel:: Display pixel clock.
|
|
minItems: 3
|
|
maxItems: 9
|
|
|
|
clock-names:
|
|
minItems: 3
|
|
maxItems: 9
|
|
|
|
phys:
|
|
maxItems: 1
|
|
|
|
phy-names:
|
|
deprecated: true
|
|
const: dsi
|
|
|
|
syscon-sfpb:
|
|
description: A phandle to mmss_sfpb syscon node (only for DSIv2).
|
|
$ref: /schemas/types.yaml#/definitions/phandle
|
|
|
|
qcom,dual-dsi-mode:
|
|
type: boolean
|
|
description: |
|
|
Indicates if the DSI controller is driving a panel which needs
|
|
2 DSI links.
|
|
|
|
qcom,master-dsi:
|
|
type: boolean
|
|
description: |
|
|
Indicates if the DSI controller is the master DSI controller when
|
|
qcom,dual-dsi-mode enabled.
|
|
|
|
qcom,sync-dual-dsi:
|
|
type: boolean
|
|
description: |
|
|
Indicates if the DSI controller needs to sync the other DSI controller
|
|
with MIPI DCS commands when qcom,dual-dsi-mode enabled.
|
|
|
|
assigned-clocks:
|
|
minItems: 2
|
|
maxItems: 4
|
|
description: |
|
|
Parents of "byte" and "pixel" for the given platform.
|
|
For DSIv2 platforms this should contain "byte", "esc", "src" and
|
|
"pixel_src" clocks.
|
|
|
|
assigned-clock-parents:
|
|
minItems: 2
|
|
maxItems: 4
|
|
description: |
|
|
The Byte clock and Pixel clock PLL outputs provided by a DSI PHY block.
|
|
|
|
power-domains:
|
|
maxItems: 1
|
|
|
|
operating-points-v2: true
|
|
|
|
opp-table:
|
|
type: object
|
|
|
|
ports:
|
|
$ref: /schemas/graph.yaml#/properties/ports
|
|
description: |
|
|
Contains DSI controller input and output ports as children, each
|
|
containing one endpoint subnode.
|
|
|
|
properties:
|
|
port@0:
|
|
$ref: /schemas/graph.yaml#/$defs/port-base
|
|
unevaluatedProperties: false
|
|
description: |
|
|
Input endpoints of the controller.
|
|
properties:
|
|
endpoint:
|
|
$ref: /schemas/media/video-interfaces.yaml#
|
|
unevaluatedProperties: false
|
|
properties:
|
|
data-lanes:
|
|
maxItems: 4
|
|
minItems: 1
|
|
items:
|
|
enum: [ 0, 1, 2, 3 ]
|
|
|
|
port@1:
|
|
$ref: /schemas/graph.yaml#/$defs/port-base
|
|
unevaluatedProperties: false
|
|
description: |
|
|
Output endpoints of the controller.
|
|
properties:
|
|
endpoint:
|
|
$ref: /schemas/media/video-interfaces.yaml#
|
|
unevaluatedProperties: false
|
|
properties:
|
|
data-lanes:
|
|
maxItems: 4
|
|
minItems: 1
|
|
items:
|
|
enum: [ 0, 1, 2, 3 ]
|
|
|
|
required:
|
|
- port@0
|
|
- port@1
|
|
|
|
avdd-supply:
|
|
description:
|
|
Phandle to vdd regulator device node
|
|
|
|
vcca-supply:
|
|
description:
|
|
Phandle to vdd regulator device node
|
|
|
|
vdd-supply:
|
|
description:
|
|
VDD regulator
|
|
|
|
vddio-supply:
|
|
description:
|
|
VDD-IO regulator
|
|
|
|
vdda-supply:
|
|
description:
|
|
VDDA regulator
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- reg-names
|
|
- interrupts
|
|
- clocks
|
|
- clock-names
|
|
- phys
|
|
- assigned-clocks
|
|
- assigned-clock-parents
|
|
- ports
|
|
|
|
allOf:
|
|
- $ref: ../dsi-controller.yaml#
|
|
- if:
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
enum:
|
|
- qcom,apq8064-dsi-ctrl
|
|
then:
|
|
properties:
|
|
clocks:
|
|
maxItems: 7
|
|
clock-names:
|
|
items:
|
|
- const: iface
|
|
- const: bus
|
|
- const: core_mmss
|
|
- const: src
|
|
- const: byte
|
|
- const: pixel
|
|
- const: core
|
|
|
|
- if:
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
enum:
|
|
- qcom,msm8916-dsi-ctrl
|
|
then:
|
|
properties:
|
|
clocks:
|
|
maxItems: 6
|
|
clock-names:
|
|
items:
|
|
- const: mdp_core
|
|
- const: iface
|
|
- const: bus
|
|
- const: byte
|
|
- const: pixel
|
|
- const: core
|
|
|
|
- if:
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
enum:
|
|
- qcom,msm8953-dsi-ctrl
|
|
then:
|
|
properties:
|
|
clocks:
|
|
maxItems: 6
|
|
clock-names:
|
|
items:
|
|
- const: mdp_core
|
|
- const: iface
|
|
- const: bus
|
|
- const: byte
|
|
- const: pixel
|
|
- const: core
|
|
|
|
- if:
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
enum:
|
|
- qcom,msm8974-dsi-ctrl
|
|
then:
|
|
properties:
|
|
clocks:
|
|
maxItems: 7
|
|
clock-names:
|
|
items:
|
|
- const: mdp_core
|
|
- const: iface
|
|
- const: bus
|
|
- const: byte
|
|
- const: pixel
|
|
- const: core
|
|
- const: core_mmss
|
|
|
|
- if:
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
enum:
|
|
- qcom,msm8996-dsi-ctrl
|
|
then:
|
|
properties:
|
|
clocks:
|
|
maxItems: 7
|
|
clock-names:
|
|
items:
|
|
- const: mdp_core
|
|
- const: byte
|
|
- const: iface
|
|
- const: bus
|
|
- const: core_mmss
|
|
- const: pixel
|
|
- const: core
|
|
|
|
- if:
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
enum:
|
|
- qcom,msm8998-dsi-ctrl
|
|
then:
|
|
properties:
|
|
clocks:
|
|
maxItems: 6
|
|
clock-names:
|
|
items:
|
|
- const: byte
|
|
- const: byte_intf
|
|
- const: pixel
|
|
- const: core
|
|
- const: iface
|
|
- const: bus
|
|
|
|
- if:
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
enum:
|
|
- qcom,sc7180-dsi-ctrl
|
|
- qcom,sc7280-dsi-ctrl
|
|
- qcom,sm8150-dsi-ctrl
|
|
- qcom,sm8250-dsi-ctrl
|
|
- qcom,sm8350-dsi-ctrl
|
|
- qcom,sm8450-dsi-ctrl
|
|
- qcom,sm8550-dsi-ctrl
|
|
then:
|
|
properties:
|
|
clocks:
|
|
maxItems: 6
|
|
clock-names:
|
|
items:
|
|
- const: byte
|
|
- const: byte_intf
|
|
- const: pixel
|
|
- const: core
|
|
- const: iface
|
|
- const: bus
|
|
|
|
- if:
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
enum:
|
|
- qcom,sdm660-dsi-ctrl
|
|
then:
|
|
properties:
|
|
clocks:
|
|
maxItems: 9
|
|
clock-names:
|
|
items:
|
|
- const: mdp_core
|
|
- const: byte
|
|
- const: byte_intf
|
|
- const: mnoc
|
|
- const: iface
|
|
- const: bus
|
|
- const: core_mmss
|
|
- const: pixel
|
|
- const: core
|
|
|
|
- if:
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
enum:
|
|
- qcom,sdm845-dsi-ctrl
|
|
- qcom,sm6115-dsi-ctrl
|
|
then:
|
|
properties:
|
|
clocks:
|
|
maxItems: 6
|
|
clock-names:
|
|
items:
|
|
- const: byte
|
|
- const: byte_intf
|
|
- const: pixel
|
|
- const: core
|
|
- const: iface
|
|
- const: bus
|
|
|
|
unevaluatedProperties: false
|
|
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
#include <dt-bindings/clock/qcom,dispcc-sdm845.h>
|
|
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
|
|
#include <dt-bindings/power/qcom-rpmpd.h>
|
|
|
|
dsi@ae94000 {
|
|
compatible = "qcom,sc7180-dsi-ctrl", "qcom,mdss-dsi-ctrl";
|
|
reg = <0x0ae94000 0x400>;
|
|
reg-names = "dsi_ctrl";
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
interrupt-parent = <&mdss>;
|
|
interrupts = <4>;
|
|
|
|
clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
|
|
<&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
|
|
<&dispcc DISP_CC_MDSS_PCLK0_CLK>,
|
|
<&dispcc DISP_CC_MDSS_ESC0_CLK>,
|
|
<&dispcc DISP_CC_MDSS_AHB_CLK>,
|
|
<&dispcc DISP_CC_MDSS_AXI_CLK>;
|
|
clock-names = "byte",
|
|
"byte_intf",
|
|
"pixel",
|
|
"core",
|
|
"iface",
|
|
"bus";
|
|
|
|
phys = <&dsi0_phy>;
|
|
phy-names = "dsi";
|
|
|
|
assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
|
|
assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>;
|
|
|
|
power-domains = <&rpmhpd SC7180_CX>;
|
|
operating-points-v2 = <&dsi_opp_table>;
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
dsi0_in: endpoint {
|
|
remote-endpoint = <&dpu_intf1_out>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
dsi0_out: endpoint {
|
|
remote-endpoint = <&sn65dsi86_in>;
|
|
data-lanes = <0 1 2 3>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
...
|