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Pre 5.11 kernels don't support 'contextid1' and 'contextid2' so
validation would be skipped. By adding an additional check for
'contextid', old kernels will still have validation done even though
contextid would either be contextid1 or contextid2.
Additionally now that it's possible to override options, an existing bug
in the validation is revealed. 'val' is overwritten by the contextid1
validation, and re-used for contextid2 validation causing it to always
fail. '!val || val != 0x4' is the same as 'val != 0x4' because 0 is also
!= 4, so that expression can be simplified and the temp variable not
overwritten.
Fixes: 35c51f83dd
("perf cs-etm: Validate options after applying them")
Reviewed-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: James Clark <james.clark@arm.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@arm.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: John Garry <john.g.garry@oracle.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Suzuki Poulouse <suzuki.poulose@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: coresight@lists.linaro.org
Cc: linux-arm-kernel@lists.infradead.org
Link: https://lore.kernel.org/all/20230501073452.GA4660@leoy-yangtze.lan
Link: https://lore.kernel.org/r/20230504144822.1938717-1-james.clark@arm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
933 lines
27 KiB
C
933 lines
27 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright(C) 2015 Linaro Limited. All rights reserved.
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* Author: Mathieu Poirier <mathieu.poirier@linaro.org>
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*/
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#include <api/fs/fs.h>
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#include <linux/bits.h>
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#include <linux/bitops.h>
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#include <linux/compiler.h>
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#include <linux/coresight-pmu.h>
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#include <linux/kernel.h>
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#include <linux/log2.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/zalloc.h>
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#include "cs-etm.h"
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#include "../../../util/debug.h"
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#include "../../../util/record.h"
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#include "../../../util/auxtrace.h"
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#include "../../../util/cpumap.h"
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#include "../../../util/event.h"
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#include "../../../util/evlist.h"
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#include "../../../util/evsel.h"
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#include "../../../util/perf_api_probe.h"
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#include "../../../util/evsel_config.h"
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#include "../../../util/pmu.h"
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#include "../../../util/cs-etm.h"
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#include <internal/lib.h> // page_size
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#include "../../../util/session.h"
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#include <errno.h>
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#include <stdlib.h>
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#include <sys/stat.h>
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struct cs_etm_recording {
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struct auxtrace_record itr;
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struct perf_pmu *cs_etm_pmu;
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struct evlist *evlist;
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bool snapshot_mode;
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size_t snapshot_size;
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};
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static const char *metadata_etmv3_ro[CS_ETM_PRIV_MAX] = {
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[CS_ETM_ETMCCER] = "mgmt/etmccer",
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[CS_ETM_ETMIDR] = "mgmt/etmidr",
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};
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static const char * const metadata_etmv4_ro[] = {
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[CS_ETMV4_TRCIDR0] = "trcidr/trcidr0",
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[CS_ETMV4_TRCIDR1] = "trcidr/trcidr1",
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[CS_ETMV4_TRCIDR2] = "trcidr/trcidr2",
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[CS_ETMV4_TRCIDR8] = "trcidr/trcidr8",
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[CS_ETMV4_TRCAUTHSTATUS] = "mgmt/trcauthstatus",
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[CS_ETMV4_TS_SOURCE] = "ts_source",
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};
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static const char * const metadata_ete_ro[] = {
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[CS_ETE_TRCIDR0] = "trcidr/trcidr0",
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[CS_ETE_TRCIDR1] = "trcidr/trcidr1",
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[CS_ETE_TRCIDR2] = "trcidr/trcidr2",
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[CS_ETE_TRCIDR8] = "trcidr/trcidr8",
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[CS_ETE_TRCAUTHSTATUS] = "mgmt/trcauthstatus",
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[CS_ETE_TRCDEVARCH] = "mgmt/trcdevarch",
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[CS_ETE_TS_SOURCE] = "ts_source",
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};
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static bool cs_etm_is_etmv4(struct auxtrace_record *itr, int cpu);
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static bool cs_etm_is_ete(struct auxtrace_record *itr, int cpu);
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static int cs_etm_validate_context_id(struct auxtrace_record *itr,
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struct evsel *evsel, int cpu)
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{
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struct cs_etm_recording *ptr =
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container_of(itr, struct cs_etm_recording, itr);
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struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
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char path[PATH_MAX];
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int err;
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u32 val;
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u64 contextid = evsel->core.attr.config &
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(perf_pmu__format_bits(&cs_etm_pmu->format, "contextid") |
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perf_pmu__format_bits(&cs_etm_pmu->format, "contextid1") |
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perf_pmu__format_bits(&cs_etm_pmu->format, "contextid2"));
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if (!contextid)
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return 0;
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/* Not supported in etmv3 */
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if (!cs_etm_is_etmv4(itr, cpu)) {
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pr_err("%s: contextid not supported in ETMv3, disable with %s/contextid=0/\n",
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CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME);
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return -EINVAL;
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}
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/* Get a handle on TRCIDR2 */
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snprintf(path, PATH_MAX, "cpu%d/%s",
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cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR2]);
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err = perf_pmu__scan_file(cs_etm_pmu, path, "%x", &val);
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/* There was a problem reading the file, bailing out */
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if (err != 1) {
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pr_err("%s: can't read file %s\n", CORESIGHT_ETM_PMU_NAME,
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path);
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return err;
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}
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if (contextid &
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perf_pmu__format_bits(&cs_etm_pmu->format, "contextid1")) {
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/*
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* TRCIDR2.CIDSIZE, bit [9-5], indicates whether contextID
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* tracing is supported:
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* 0b00000 Context ID tracing is not supported.
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* 0b00100 Maximum of 32-bit Context ID size.
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* All other values are reserved.
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*/
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if (BMVAL(val, 5, 9) != 0x4) {
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pr_err("%s: CONTEXTIDR_EL1 isn't supported, disable with %s/contextid1=0/\n",
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CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME);
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return -EINVAL;
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}
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}
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if (contextid &
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perf_pmu__format_bits(&cs_etm_pmu->format, "contextid2")) {
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/*
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* TRCIDR2.VMIDOPT[30:29] != 0 and
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* TRCIDR2.VMIDSIZE[14:10] == 0b00100 (32bit virtual contextid)
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* We can't support CONTEXTIDR in VMID if the size of the
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* virtual context id is < 32bit.
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* Any value of VMIDSIZE >= 4 (i.e, > 32bit) is fine for us.
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*/
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if (!BMVAL(val, 29, 30) || BMVAL(val, 10, 14) < 4) {
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pr_err("%s: CONTEXTIDR_EL2 isn't supported, disable with %s/contextid2=0/\n",
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CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME);
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return -EINVAL;
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}
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}
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return 0;
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}
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static int cs_etm_validate_timestamp(struct auxtrace_record *itr,
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struct evsel *evsel, int cpu)
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{
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struct cs_etm_recording *ptr =
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container_of(itr, struct cs_etm_recording, itr);
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struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
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char path[PATH_MAX];
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int err;
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u32 val;
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if (!(evsel->core.attr.config &
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perf_pmu__format_bits(&cs_etm_pmu->format, "timestamp")))
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return 0;
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if (!cs_etm_is_etmv4(itr, cpu)) {
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pr_err("%s: timestamp not supported in ETMv3, disable with %s/timestamp=0/\n",
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CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME);
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return -EINVAL;
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}
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/* Get a handle on TRCIRD0 */
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snprintf(path, PATH_MAX, "cpu%d/%s",
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cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR0]);
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err = perf_pmu__scan_file(cs_etm_pmu, path, "%x", &val);
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/* There was a problem reading the file, bailing out */
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if (err != 1) {
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pr_err("%s: can't read file %s\n",
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CORESIGHT_ETM_PMU_NAME, path);
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return err;
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}
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/*
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* TRCIDR0.TSSIZE, bit [28-24], indicates whether global timestamping
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* is supported:
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* 0b00000 Global timestamping is not implemented
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* 0b00110 Implementation supports a maximum timestamp of 48bits.
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* 0b01000 Implementation supports a maximum timestamp of 64bits.
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*/
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val &= GENMASK(28, 24);
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if (!val) {
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return -EINVAL;
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}
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return 0;
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}
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/*
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* Check whether the requested timestamp and contextid options should be
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* available on all requested CPUs and if not, tell the user how to override.
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* The kernel will silently disable any unavailable options so a warning here
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* first is better. In theory the kernel could still disable the option for
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* some other reason so this is best effort only.
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*/
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static int cs_etm_validate_config(struct auxtrace_record *itr,
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struct evsel *evsel)
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{
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int i, err = -EINVAL;
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struct perf_cpu_map *event_cpus = evsel->evlist->core.user_requested_cpus;
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struct perf_cpu_map *online_cpus = perf_cpu_map__new(NULL);
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/* Set option of each CPU we have */
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for (i = 0; i < cpu__max_cpu().cpu; i++) {
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struct perf_cpu cpu = { .cpu = i, };
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if (!perf_cpu_map__has(event_cpus, cpu) ||
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!perf_cpu_map__has(online_cpus, cpu))
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continue;
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err = cs_etm_validate_context_id(itr, evsel, i);
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if (err)
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goto out;
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err = cs_etm_validate_timestamp(itr, evsel, i);
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if (err)
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goto out;
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}
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err = 0;
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out:
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perf_cpu_map__put(online_cpus);
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return err;
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}
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static int cs_etm_parse_snapshot_options(struct auxtrace_record *itr,
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struct record_opts *opts,
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const char *str)
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{
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struct cs_etm_recording *ptr =
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container_of(itr, struct cs_etm_recording, itr);
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unsigned long long snapshot_size = 0;
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char *endptr;
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if (str) {
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snapshot_size = strtoull(str, &endptr, 0);
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if (*endptr || snapshot_size > SIZE_MAX)
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return -1;
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}
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opts->auxtrace_snapshot_mode = true;
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opts->auxtrace_snapshot_size = snapshot_size;
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ptr->snapshot_size = snapshot_size;
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return 0;
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}
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static int cs_etm_set_sink_attr(struct perf_pmu *pmu,
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struct evsel *evsel)
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{
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char msg[BUFSIZ], path[PATH_MAX], *sink;
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struct evsel_config_term *term;
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int ret = -EINVAL;
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u32 hash;
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if (evsel->core.attr.config2 & GENMASK(31, 0))
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return 0;
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list_for_each_entry(term, &evsel->config_terms, list) {
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if (term->type != EVSEL__CONFIG_TERM_DRV_CFG)
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continue;
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sink = term->val.str;
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snprintf(path, PATH_MAX, "sinks/%s", sink);
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ret = perf_pmu__scan_file(pmu, path, "%x", &hash);
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if (ret != 1) {
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if (errno == ENOENT)
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pr_err("Couldn't find sink \"%s\" on event %s\n"
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"Missing kernel or device support?\n\n"
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"Hint: An appropriate sink will be picked automatically if one isn't specified.\n",
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sink, evsel__name(evsel));
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else
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pr_err("Failed to set sink \"%s\" on event %s with %d (%s)\n",
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sink, evsel__name(evsel), errno,
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str_error_r(errno, msg, sizeof(msg)));
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return ret;
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}
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evsel->core.attr.config2 |= hash;
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return 0;
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}
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/*
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* No sink was provided on the command line - allow the CoreSight
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* system to look for a default
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*/
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return 0;
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}
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static int cs_etm_recording_options(struct auxtrace_record *itr,
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struct evlist *evlist,
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struct record_opts *opts)
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{
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int ret;
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struct cs_etm_recording *ptr =
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container_of(itr, struct cs_etm_recording, itr);
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struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
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struct evsel *evsel, *cs_etm_evsel = NULL;
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struct perf_cpu_map *cpus = evlist->core.user_requested_cpus;
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bool privileged = perf_event_paranoid_check(-1);
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int err = 0;
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evlist__for_each_entry(evlist, evsel) {
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if (evsel->core.attr.type == cs_etm_pmu->type) {
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if (cs_etm_evsel) {
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pr_err("There may be only one %s event\n",
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CORESIGHT_ETM_PMU_NAME);
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return -EINVAL;
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}
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cs_etm_evsel = evsel;
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}
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}
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/* no need to continue if at least one event of interest was found */
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if (!cs_etm_evsel)
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return 0;
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ptr->evlist = evlist;
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ptr->snapshot_mode = opts->auxtrace_snapshot_mode;
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if (!record_opts__no_switch_events(opts) &&
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perf_can_record_switch_events())
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opts->record_switch_events = true;
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cs_etm_evsel->needs_auxtrace_mmap = true;
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opts->full_auxtrace = true;
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ret = cs_etm_set_sink_attr(cs_etm_pmu, cs_etm_evsel);
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if (ret)
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return ret;
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if (opts->use_clockid) {
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pr_err("Cannot use clockid (-k option) with %s\n",
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CORESIGHT_ETM_PMU_NAME);
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return -EINVAL;
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}
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/* we are in snapshot mode */
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if (opts->auxtrace_snapshot_mode) {
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/*
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* No size were given to '-S' or '-m,', so go with
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* the default
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*/
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if (!opts->auxtrace_snapshot_size &&
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!opts->auxtrace_mmap_pages) {
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if (privileged) {
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opts->auxtrace_mmap_pages = MiB(4) / page_size;
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} else {
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opts->auxtrace_mmap_pages =
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KiB(128) / page_size;
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if (opts->mmap_pages == UINT_MAX)
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opts->mmap_pages = KiB(256) / page_size;
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}
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} else if (!opts->auxtrace_mmap_pages && !privileged &&
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opts->mmap_pages == UINT_MAX) {
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opts->mmap_pages = KiB(256) / page_size;
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}
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/*
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* '-m,xyz' was specified but no snapshot size, so make the
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* snapshot size as big as the auxtrace mmap area.
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*/
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if (!opts->auxtrace_snapshot_size) {
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opts->auxtrace_snapshot_size =
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opts->auxtrace_mmap_pages * (size_t)page_size;
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}
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/*
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* -Sxyz was specified but no auxtrace mmap area, so make the
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* auxtrace mmap area big enough to fit the requested snapshot
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* size.
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*/
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if (!opts->auxtrace_mmap_pages) {
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size_t sz = opts->auxtrace_snapshot_size;
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sz = round_up(sz, page_size) / page_size;
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opts->auxtrace_mmap_pages = roundup_pow_of_two(sz);
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}
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/* Snapshot size can't be bigger than the auxtrace area */
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if (opts->auxtrace_snapshot_size >
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opts->auxtrace_mmap_pages * (size_t)page_size) {
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pr_err("Snapshot size %zu must not be greater than AUX area tracing mmap size %zu\n",
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opts->auxtrace_snapshot_size,
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opts->auxtrace_mmap_pages * (size_t)page_size);
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return -EINVAL;
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}
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/* Something went wrong somewhere - this shouldn't happen */
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if (!opts->auxtrace_snapshot_size ||
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!opts->auxtrace_mmap_pages) {
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pr_err("Failed to calculate default snapshot size and/or AUX area tracing mmap pages\n");
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return -EINVAL;
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}
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}
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/* Buffer sizes weren't specified with '-m,xyz' so give some defaults */
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if (!opts->auxtrace_mmap_pages) {
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if (privileged) {
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opts->auxtrace_mmap_pages = MiB(4) / page_size;
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} else {
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opts->auxtrace_mmap_pages = KiB(128) / page_size;
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if (opts->mmap_pages == UINT_MAX)
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opts->mmap_pages = KiB(256) / page_size;
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}
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}
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if (opts->auxtrace_snapshot_mode)
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pr_debug2("%s snapshot size: %zu\n", CORESIGHT_ETM_PMU_NAME,
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opts->auxtrace_snapshot_size);
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/*
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* To obtain the auxtrace buffer file descriptor, the auxtrace
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* event must come first.
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*/
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evlist__to_front(evlist, cs_etm_evsel);
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|
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/*
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* get the CPU on the sample - need it to associate trace ID in the
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* AUX_OUTPUT_HW_ID event, and the AUX event for per-cpu mmaps.
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*/
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evsel__set_sample_bit(cs_etm_evsel, CPU);
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|
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/*
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* Also the case of per-cpu mmaps, need the contextID in order to be notified
|
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* when a context switch happened.
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*/
|
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if (!perf_cpu_map__empty(cpus)) {
|
|
evsel__set_config_if_unset(cs_etm_pmu, cs_etm_evsel,
|
|
"timestamp", 1);
|
|
evsel__set_config_if_unset(cs_etm_pmu, cs_etm_evsel,
|
|
"contextid", 1);
|
|
}
|
|
|
|
/* Add dummy event to keep tracking */
|
|
err = parse_event(evlist, "dummy:u");
|
|
if (err)
|
|
goto out;
|
|
evsel = evlist__last(evlist);
|
|
evlist__set_tracking_event(evlist, evsel);
|
|
evsel->core.attr.freq = 0;
|
|
evsel->core.attr.sample_period = 1;
|
|
|
|
/* In per-cpu case, always need the time of mmap events etc */
|
|
if (!perf_cpu_map__empty(cpus))
|
|
evsel__set_sample_bit(evsel, TIME);
|
|
|
|
err = cs_etm_validate_config(itr, cs_etm_evsel);
|
|
out:
|
|
return err;
|
|
}
|
|
|
|
static u64 cs_etm_get_config(struct auxtrace_record *itr)
|
|
{
|
|
u64 config = 0;
|
|
struct cs_etm_recording *ptr =
|
|
container_of(itr, struct cs_etm_recording, itr);
|
|
struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
|
|
struct evlist *evlist = ptr->evlist;
|
|
struct evsel *evsel;
|
|
|
|
evlist__for_each_entry(evlist, evsel) {
|
|
if (evsel->core.attr.type == cs_etm_pmu->type) {
|
|
/*
|
|
* Variable perf_event_attr::config is assigned to
|
|
* ETMv3/PTM. The bit fields have been made to match
|
|
* the ETMv3.5 ETRMCR register specification. See the
|
|
* PMU_FORMAT_ATTR() declarations in
|
|
* drivers/hwtracing/coresight/coresight-perf.c for
|
|
* details.
|
|
*/
|
|
config = evsel->core.attr.config;
|
|
break;
|
|
}
|
|
}
|
|
|
|
return config;
|
|
}
|
|
|
|
#ifndef BIT
|
|
#define BIT(N) (1UL << (N))
|
|
#endif
|
|
|
|
static u64 cs_etmv4_get_config(struct auxtrace_record *itr)
|
|
{
|
|
u64 config = 0;
|
|
u64 config_opts = 0;
|
|
|
|
/*
|
|
* The perf event variable config bits represent both
|
|
* the command line options and register programming
|
|
* bits in ETMv3/PTM. For ETMv4 we must remap options
|
|
* to real bits
|
|
*/
|
|
config_opts = cs_etm_get_config(itr);
|
|
if (config_opts & BIT(ETM_OPT_CYCACC))
|
|
config |= BIT(ETM4_CFG_BIT_CYCACC);
|
|
if (config_opts & BIT(ETM_OPT_CTXTID))
|
|
config |= BIT(ETM4_CFG_BIT_CTXTID);
|
|
if (config_opts & BIT(ETM_OPT_TS))
|
|
config |= BIT(ETM4_CFG_BIT_TS);
|
|
if (config_opts & BIT(ETM_OPT_RETSTK))
|
|
config |= BIT(ETM4_CFG_BIT_RETSTK);
|
|
if (config_opts & BIT(ETM_OPT_CTXTID2))
|
|
config |= BIT(ETM4_CFG_BIT_VMID) |
|
|
BIT(ETM4_CFG_BIT_VMID_OPT);
|
|
if (config_opts & BIT(ETM_OPT_BRANCH_BROADCAST))
|
|
config |= BIT(ETM4_CFG_BIT_BB);
|
|
|
|
return config;
|
|
}
|
|
|
|
static size_t
|
|
cs_etm_info_priv_size(struct auxtrace_record *itr __maybe_unused,
|
|
struct evlist *evlist __maybe_unused)
|
|
{
|
|
int i;
|
|
int etmv3 = 0, etmv4 = 0, ete = 0;
|
|
struct perf_cpu_map *event_cpus = evlist->core.user_requested_cpus;
|
|
struct perf_cpu_map *online_cpus = perf_cpu_map__new(NULL);
|
|
|
|
/* cpu map is not empty, we have specific CPUs to work with */
|
|
if (!perf_cpu_map__empty(event_cpus)) {
|
|
for (i = 0; i < cpu__max_cpu().cpu; i++) {
|
|
struct perf_cpu cpu = { .cpu = i, };
|
|
|
|
if (!perf_cpu_map__has(event_cpus, cpu) ||
|
|
!perf_cpu_map__has(online_cpus, cpu))
|
|
continue;
|
|
|
|
if (cs_etm_is_ete(itr, i))
|
|
ete++;
|
|
else if (cs_etm_is_etmv4(itr, i))
|
|
etmv4++;
|
|
else
|
|
etmv3++;
|
|
}
|
|
} else {
|
|
/* get configuration for all CPUs in the system */
|
|
for (i = 0; i < cpu__max_cpu().cpu; i++) {
|
|
struct perf_cpu cpu = { .cpu = i, };
|
|
|
|
if (!perf_cpu_map__has(online_cpus, cpu))
|
|
continue;
|
|
|
|
if (cs_etm_is_ete(itr, i))
|
|
ete++;
|
|
else if (cs_etm_is_etmv4(itr, i))
|
|
etmv4++;
|
|
else
|
|
etmv3++;
|
|
}
|
|
}
|
|
|
|
perf_cpu_map__put(online_cpus);
|
|
|
|
return (CS_ETM_HEADER_SIZE +
|
|
(ete * CS_ETE_PRIV_SIZE) +
|
|
(etmv4 * CS_ETMV4_PRIV_SIZE) +
|
|
(etmv3 * CS_ETMV3_PRIV_SIZE));
|
|
}
|
|
|
|
static bool cs_etm_is_etmv4(struct auxtrace_record *itr, int cpu)
|
|
{
|
|
bool ret = false;
|
|
char path[PATH_MAX];
|
|
int scan;
|
|
unsigned int val;
|
|
struct cs_etm_recording *ptr =
|
|
container_of(itr, struct cs_etm_recording, itr);
|
|
struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
|
|
|
|
/* Take any of the RO files for ETMv4 and see if it present */
|
|
snprintf(path, PATH_MAX, "cpu%d/%s",
|
|
cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR0]);
|
|
scan = perf_pmu__scan_file(cs_etm_pmu, path, "%x", &val);
|
|
|
|
/* The file was read successfully, we have a winner */
|
|
if (scan == 1)
|
|
ret = true;
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int cs_etm_get_ro(struct perf_pmu *pmu, int cpu, const char *path)
|
|
{
|
|
char pmu_path[PATH_MAX];
|
|
int scan;
|
|
unsigned int val = 0;
|
|
|
|
/* Get RO metadata from sysfs */
|
|
snprintf(pmu_path, PATH_MAX, "cpu%d/%s", cpu, path);
|
|
|
|
scan = perf_pmu__scan_file(pmu, pmu_path, "%x", &val);
|
|
if (scan != 1)
|
|
pr_err("%s: error reading: %s\n", __func__, pmu_path);
|
|
|
|
return val;
|
|
}
|
|
|
|
static int cs_etm_get_ro_signed(struct perf_pmu *pmu, int cpu, const char *path)
|
|
{
|
|
char pmu_path[PATH_MAX];
|
|
int scan;
|
|
int val = 0;
|
|
|
|
/* Get RO metadata from sysfs */
|
|
snprintf(pmu_path, PATH_MAX, "cpu%d/%s", cpu, path);
|
|
|
|
scan = perf_pmu__scan_file(pmu, pmu_path, "%d", &val);
|
|
if (scan != 1)
|
|
pr_err("%s: error reading: %s\n", __func__, pmu_path);
|
|
|
|
return val;
|
|
}
|
|
|
|
static bool cs_etm_pmu_path_exists(struct perf_pmu *pmu, int cpu, const char *path)
|
|
{
|
|
char pmu_path[PATH_MAX];
|
|
|
|
/* Get RO metadata from sysfs */
|
|
snprintf(pmu_path, PATH_MAX, "cpu%d/%s", cpu, path);
|
|
|
|
return perf_pmu__file_exists(pmu, pmu_path);
|
|
}
|
|
|
|
#define TRCDEVARCH_ARCHPART_SHIFT 0
|
|
#define TRCDEVARCH_ARCHPART_MASK GENMASK(11, 0)
|
|
#define TRCDEVARCH_ARCHPART(x) (((x) & TRCDEVARCH_ARCHPART_MASK) >> TRCDEVARCH_ARCHPART_SHIFT)
|
|
|
|
#define TRCDEVARCH_ARCHVER_SHIFT 12
|
|
#define TRCDEVARCH_ARCHVER_MASK GENMASK(15, 12)
|
|
#define TRCDEVARCH_ARCHVER(x) (((x) & TRCDEVARCH_ARCHVER_MASK) >> TRCDEVARCH_ARCHVER_SHIFT)
|
|
|
|
static bool cs_etm_is_ete(struct auxtrace_record *itr, int cpu)
|
|
{
|
|
struct cs_etm_recording *ptr = container_of(itr, struct cs_etm_recording, itr);
|
|
struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
|
|
int trcdevarch;
|
|
|
|
if (!cs_etm_pmu_path_exists(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCDEVARCH]))
|
|
return false;
|
|
|
|
trcdevarch = cs_etm_get_ro(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCDEVARCH]);
|
|
/*
|
|
* ETE if ARCHVER is 5 (ARCHVER is 4 for ETM) and ARCHPART is 0xA13.
|
|
* See ETM_DEVARCH_ETE_ARCH in coresight-etm4x.h
|
|
*/
|
|
return TRCDEVARCH_ARCHVER(trcdevarch) == 5 && TRCDEVARCH_ARCHPART(trcdevarch) == 0xA13;
|
|
}
|
|
|
|
static void cs_etm_save_etmv4_header(__u64 data[], struct auxtrace_record *itr, int cpu)
|
|
{
|
|
struct cs_etm_recording *ptr = container_of(itr, struct cs_etm_recording, itr);
|
|
struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
|
|
|
|
/* Get trace configuration register */
|
|
data[CS_ETMV4_TRCCONFIGR] = cs_etmv4_get_config(itr);
|
|
/* traceID set to legacy version, in case new perf running on older system */
|
|
data[CS_ETMV4_TRCTRACEIDR] =
|
|
CORESIGHT_LEGACY_CPU_TRACE_ID(cpu) | CORESIGHT_TRACE_ID_UNUSED_FLAG;
|
|
|
|
/* Get read-only information from sysFS */
|
|
data[CS_ETMV4_TRCIDR0] = cs_etm_get_ro(cs_etm_pmu, cpu,
|
|
metadata_etmv4_ro[CS_ETMV4_TRCIDR0]);
|
|
data[CS_ETMV4_TRCIDR1] = cs_etm_get_ro(cs_etm_pmu, cpu,
|
|
metadata_etmv4_ro[CS_ETMV4_TRCIDR1]);
|
|
data[CS_ETMV4_TRCIDR2] = cs_etm_get_ro(cs_etm_pmu, cpu,
|
|
metadata_etmv4_ro[CS_ETMV4_TRCIDR2]);
|
|
data[CS_ETMV4_TRCIDR8] = cs_etm_get_ro(cs_etm_pmu, cpu,
|
|
metadata_etmv4_ro[CS_ETMV4_TRCIDR8]);
|
|
data[CS_ETMV4_TRCAUTHSTATUS] = cs_etm_get_ro(cs_etm_pmu, cpu,
|
|
metadata_etmv4_ro[CS_ETMV4_TRCAUTHSTATUS]);
|
|
|
|
/* Kernels older than 5.19 may not expose ts_source */
|
|
if (cs_etm_pmu_path_exists(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TS_SOURCE]))
|
|
data[CS_ETMV4_TS_SOURCE] = (__u64) cs_etm_get_ro_signed(cs_etm_pmu, cpu,
|
|
metadata_etmv4_ro[CS_ETMV4_TS_SOURCE]);
|
|
else {
|
|
pr_debug3("[%03d] pmu file 'ts_source' not found. Fallback to safe value (-1)\n",
|
|
cpu);
|
|
data[CS_ETMV4_TS_SOURCE] = (__u64) -1;
|
|
}
|
|
}
|
|
|
|
static void cs_etm_save_ete_header(__u64 data[], struct auxtrace_record *itr, int cpu)
|
|
{
|
|
struct cs_etm_recording *ptr = container_of(itr, struct cs_etm_recording, itr);
|
|
struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
|
|
|
|
/* Get trace configuration register */
|
|
data[CS_ETE_TRCCONFIGR] = cs_etmv4_get_config(itr);
|
|
/* traceID set to legacy version, in case new perf running on older system */
|
|
data[CS_ETE_TRCTRACEIDR] =
|
|
CORESIGHT_LEGACY_CPU_TRACE_ID(cpu) | CORESIGHT_TRACE_ID_UNUSED_FLAG;
|
|
|
|
/* Get read-only information from sysFS */
|
|
data[CS_ETE_TRCIDR0] = cs_etm_get_ro(cs_etm_pmu, cpu,
|
|
metadata_ete_ro[CS_ETE_TRCIDR0]);
|
|
data[CS_ETE_TRCIDR1] = cs_etm_get_ro(cs_etm_pmu, cpu,
|
|
metadata_ete_ro[CS_ETE_TRCIDR1]);
|
|
data[CS_ETE_TRCIDR2] = cs_etm_get_ro(cs_etm_pmu, cpu,
|
|
metadata_ete_ro[CS_ETE_TRCIDR2]);
|
|
data[CS_ETE_TRCIDR8] = cs_etm_get_ro(cs_etm_pmu, cpu,
|
|
metadata_ete_ro[CS_ETE_TRCIDR8]);
|
|
data[CS_ETE_TRCAUTHSTATUS] = cs_etm_get_ro(cs_etm_pmu, cpu,
|
|
metadata_ete_ro[CS_ETE_TRCAUTHSTATUS]);
|
|
/* ETE uses the same registers as ETMv4 plus TRCDEVARCH */
|
|
data[CS_ETE_TRCDEVARCH] = cs_etm_get_ro(cs_etm_pmu, cpu,
|
|
metadata_ete_ro[CS_ETE_TRCDEVARCH]);
|
|
|
|
/* Kernels older than 5.19 may not expose ts_source */
|
|
if (cs_etm_pmu_path_exists(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TS_SOURCE]))
|
|
data[CS_ETE_TS_SOURCE] = (__u64) cs_etm_get_ro_signed(cs_etm_pmu, cpu,
|
|
metadata_ete_ro[CS_ETE_TS_SOURCE]);
|
|
else {
|
|
pr_debug3("[%03d] pmu file 'ts_source' not found. Fallback to safe value (-1)\n",
|
|
cpu);
|
|
data[CS_ETE_TS_SOURCE] = (__u64) -1;
|
|
}
|
|
}
|
|
|
|
static void cs_etm_get_metadata(int cpu, u32 *offset,
|
|
struct auxtrace_record *itr,
|
|
struct perf_record_auxtrace_info *info)
|
|
{
|
|
u32 increment, nr_trc_params;
|
|
u64 magic;
|
|
struct cs_etm_recording *ptr =
|
|
container_of(itr, struct cs_etm_recording, itr);
|
|
struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
|
|
|
|
/* first see what kind of tracer this cpu is affined to */
|
|
if (cs_etm_is_ete(itr, cpu)) {
|
|
magic = __perf_cs_ete_magic;
|
|
cs_etm_save_ete_header(&info->priv[*offset], itr, cpu);
|
|
|
|
/* How much space was used */
|
|
increment = CS_ETE_PRIV_MAX;
|
|
nr_trc_params = CS_ETE_PRIV_MAX - CS_ETM_COMMON_BLK_MAX_V1;
|
|
} else if (cs_etm_is_etmv4(itr, cpu)) {
|
|
magic = __perf_cs_etmv4_magic;
|
|
cs_etm_save_etmv4_header(&info->priv[*offset], itr, cpu);
|
|
|
|
/* How much space was used */
|
|
increment = CS_ETMV4_PRIV_MAX;
|
|
nr_trc_params = CS_ETMV4_PRIV_MAX - CS_ETMV4_TRCCONFIGR;
|
|
} else {
|
|
magic = __perf_cs_etmv3_magic;
|
|
/* Get configuration register */
|
|
info->priv[*offset + CS_ETM_ETMCR] = cs_etm_get_config(itr);
|
|
/* traceID set to legacy value in case new perf running on old system */
|
|
info->priv[*offset + CS_ETM_ETMTRACEIDR] =
|
|
CORESIGHT_LEGACY_CPU_TRACE_ID(cpu) | CORESIGHT_TRACE_ID_UNUSED_FLAG;
|
|
/* Get read-only information from sysFS */
|
|
info->priv[*offset + CS_ETM_ETMCCER] =
|
|
cs_etm_get_ro(cs_etm_pmu, cpu,
|
|
metadata_etmv3_ro[CS_ETM_ETMCCER]);
|
|
info->priv[*offset + CS_ETM_ETMIDR] =
|
|
cs_etm_get_ro(cs_etm_pmu, cpu,
|
|
metadata_etmv3_ro[CS_ETM_ETMIDR]);
|
|
|
|
/* How much space was used */
|
|
increment = CS_ETM_PRIV_MAX;
|
|
nr_trc_params = CS_ETM_PRIV_MAX - CS_ETM_ETMCR;
|
|
}
|
|
|
|
/* Build generic header portion */
|
|
info->priv[*offset + CS_ETM_MAGIC] = magic;
|
|
info->priv[*offset + CS_ETM_CPU] = cpu;
|
|
info->priv[*offset + CS_ETM_NR_TRC_PARAMS] = nr_trc_params;
|
|
/* Where the next CPU entry should start from */
|
|
*offset += increment;
|
|
}
|
|
|
|
static int cs_etm_info_fill(struct auxtrace_record *itr,
|
|
struct perf_session *session,
|
|
struct perf_record_auxtrace_info *info,
|
|
size_t priv_size)
|
|
{
|
|
int i;
|
|
u32 offset;
|
|
u64 nr_cpu, type;
|
|
struct perf_cpu_map *cpu_map;
|
|
struct perf_cpu_map *event_cpus = session->evlist->core.user_requested_cpus;
|
|
struct perf_cpu_map *online_cpus = perf_cpu_map__new(NULL);
|
|
struct cs_etm_recording *ptr =
|
|
container_of(itr, struct cs_etm_recording, itr);
|
|
struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
|
|
|
|
if (priv_size != cs_etm_info_priv_size(itr, session->evlist))
|
|
return -EINVAL;
|
|
|
|
if (!session->evlist->core.nr_mmaps)
|
|
return -EINVAL;
|
|
|
|
/* If the cpu_map is empty all online CPUs are involved */
|
|
if (perf_cpu_map__empty(event_cpus)) {
|
|
cpu_map = online_cpus;
|
|
} else {
|
|
/* Make sure all specified CPUs are online */
|
|
for (i = 0; i < perf_cpu_map__nr(event_cpus); i++) {
|
|
struct perf_cpu cpu = { .cpu = i, };
|
|
|
|
if (perf_cpu_map__has(event_cpus, cpu) &&
|
|
!perf_cpu_map__has(online_cpus, cpu))
|
|
return -EINVAL;
|
|
}
|
|
|
|
cpu_map = event_cpus;
|
|
}
|
|
|
|
nr_cpu = perf_cpu_map__nr(cpu_map);
|
|
/* Get PMU type as dynamically assigned by the core */
|
|
type = cs_etm_pmu->type;
|
|
|
|
/* First fill out the session header */
|
|
info->type = PERF_AUXTRACE_CS_ETM;
|
|
info->priv[CS_HEADER_VERSION] = CS_HEADER_CURRENT_VERSION;
|
|
info->priv[CS_PMU_TYPE_CPUS] = type << 32;
|
|
info->priv[CS_PMU_TYPE_CPUS] |= nr_cpu;
|
|
info->priv[CS_ETM_SNAPSHOT] = ptr->snapshot_mode;
|
|
|
|
offset = CS_ETM_SNAPSHOT + 1;
|
|
|
|
for (i = 0; i < cpu__max_cpu().cpu && offset < priv_size; i++) {
|
|
struct perf_cpu cpu = { .cpu = i, };
|
|
|
|
if (perf_cpu_map__has(cpu_map, cpu))
|
|
cs_etm_get_metadata(i, &offset, itr, info);
|
|
}
|
|
|
|
perf_cpu_map__put(online_cpus);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int cs_etm_snapshot_start(struct auxtrace_record *itr)
|
|
{
|
|
struct cs_etm_recording *ptr =
|
|
container_of(itr, struct cs_etm_recording, itr);
|
|
struct evsel *evsel;
|
|
|
|
evlist__for_each_entry(ptr->evlist, evsel) {
|
|
if (evsel->core.attr.type == ptr->cs_etm_pmu->type)
|
|
return evsel__disable(evsel);
|
|
}
|
|
return -EINVAL;
|
|
}
|
|
|
|
static int cs_etm_snapshot_finish(struct auxtrace_record *itr)
|
|
{
|
|
struct cs_etm_recording *ptr =
|
|
container_of(itr, struct cs_etm_recording, itr);
|
|
struct evsel *evsel;
|
|
|
|
evlist__for_each_entry(ptr->evlist, evsel) {
|
|
if (evsel->core.attr.type == ptr->cs_etm_pmu->type)
|
|
return evsel__enable(evsel);
|
|
}
|
|
return -EINVAL;
|
|
}
|
|
|
|
static u64 cs_etm_reference(struct auxtrace_record *itr __maybe_unused)
|
|
{
|
|
return (((u64) rand() << 0) & 0x00000000FFFFFFFFull) |
|
|
(((u64) rand() << 32) & 0xFFFFFFFF00000000ull);
|
|
}
|
|
|
|
static void cs_etm_recording_free(struct auxtrace_record *itr)
|
|
{
|
|
struct cs_etm_recording *ptr =
|
|
container_of(itr, struct cs_etm_recording, itr);
|
|
|
|
free(ptr);
|
|
}
|
|
|
|
struct auxtrace_record *cs_etm_record_init(int *err)
|
|
{
|
|
struct perf_pmu *cs_etm_pmu;
|
|
struct cs_etm_recording *ptr;
|
|
|
|
cs_etm_pmu = perf_pmu__find(CORESIGHT_ETM_PMU_NAME);
|
|
|
|
if (!cs_etm_pmu) {
|
|
*err = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
ptr = zalloc(sizeof(struct cs_etm_recording));
|
|
if (!ptr) {
|
|
*err = -ENOMEM;
|
|
goto out;
|
|
}
|
|
|
|
ptr->cs_etm_pmu = cs_etm_pmu;
|
|
ptr->itr.pmu = cs_etm_pmu;
|
|
ptr->itr.parse_snapshot_options = cs_etm_parse_snapshot_options;
|
|
ptr->itr.recording_options = cs_etm_recording_options;
|
|
ptr->itr.info_priv_size = cs_etm_info_priv_size;
|
|
ptr->itr.info_fill = cs_etm_info_fill;
|
|
ptr->itr.snapshot_start = cs_etm_snapshot_start;
|
|
ptr->itr.snapshot_finish = cs_etm_snapshot_finish;
|
|
ptr->itr.reference = cs_etm_reference;
|
|
ptr->itr.free = cs_etm_recording_free;
|
|
ptr->itr.read_finish = auxtrace_record__read_finish;
|
|
|
|
*err = 0;
|
|
return &ptr->itr;
|
|
out:
|
|
return NULL;
|
|
}
|
|
|
|
/*
|
|
* Set a default config to enable the user changed config tracking mechanism
|
|
* (CFG_CHG and evsel__set_config_if_unset()). If no default is set then user
|
|
* changes aren't tracked.
|
|
*/
|
|
struct perf_event_attr *
|
|
cs_etm_get_default_config(struct perf_pmu *pmu __maybe_unused)
|
|
{
|
|
struct perf_event_attr *attr;
|
|
|
|
attr = zalloc(sizeof(struct perf_event_attr));
|
|
if (!attr)
|
|
return NULL;
|
|
|
|
attr->sample_period = 1;
|
|
|
|
return attr;
|
|
}
|