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c4b000c392
When panicking from the nVHE hyp and restoring the host context, x29 is
expected to hold a pointer to the host context. This wasn't being done
so fix it to make sure there's a valid pointer the host context being
used.
Rather than passing a boolean indicating whether or not the host context
should be restored, instead pass the pointer to the host context. NULL
is passed to indicate that no context should be restored.
Fixes: a2e102e20f ("KVM: arm64: nVHE: Handle hyp panics")
Cc: stable@vger.kernel.org
Signed-off-by: Andrew Scull <ascull@google.com>
[maz: partial rewrite to fit 5.12-rc1]
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210219122406.1337626-1-ascull@google.com
Message-Id: <20210305185254.3730990-4-maz@kernel.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
232 lines
6.3 KiB
ArmAsm
232 lines
6.3 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2020 - Google Inc
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* Author: Andrew Scull <ascull@google.com>
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/kvm_asm.h>
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#include <asm/kvm_mmu.h>
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.text
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SYM_FUNC_START(__host_exit)
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get_host_ctxt x0, x1
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/* Store the host regs x2 and x3 */
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stp x2, x3, [x0, #CPU_XREG_OFFSET(2)]
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/* Retrieve the host regs x0-x1 from the stack */
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ldp x2, x3, [sp], #16 // x0, x1
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/* Store the host regs x0-x1 and x4-x17 */
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stp x2, x3, [x0, #CPU_XREG_OFFSET(0)]
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stp x4, x5, [x0, #CPU_XREG_OFFSET(4)]
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stp x6, x7, [x0, #CPU_XREG_OFFSET(6)]
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stp x8, x9, [x0, #CPU_XREG_OFFSET(8)]
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stp x10, x11, [x0, #CPU_XREG_OFFSET(10)]
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stp x12, x13, [x0, #CPU_XREG_OFFSET(12)]
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stp x14, x15, [x0, #CPU_XREG_OFFSET(14)]
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stp x16, x17, [x0, #CPU_XREG_OFFSET(16)]
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/* Store the host regs x18-x29, lr */
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save_callee_saved_regs x0
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/* Save the host context pointer in x29 across the function call */
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mov x29, x0
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bl handle_trap
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/* Restore host regs x0-x17 */
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__host_enter_restore_full:
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ldp x0, x1, [x29, #CPU_XREG_OFFSET(0)]
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ldp x2, x3, [x29, #CPU_XREG_OFFSET(2)]
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ldp x4, x5, [x29, #CPU_XREG_OFFSET(4)]
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ldp x6, x7, [x29, #CPU_XREG_OFFSET(6)]
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/* x0-7 are use for panic arguments */
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__host_enter_for_panic:
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ldp x8, x9, [x29, #CPU_XREG_OFFSET(8)]
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ldp x10, x11, [x29, #CPU_XREG_OFFSET(10)]
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ldp x12, x13, [x29, #CPU_XREG_OFFSET(12)]
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ldp x14, x15, [x29, #CPU_XREG_OFFSET(14)]
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ldp x16, x17, [x29, #CPU_XREG_OFFSET(16)]
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/* Restore host regs x18-x29, lr */
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restore_callee_saved_regs x29
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/* Do not touch any register after this! */
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__host_enter_without_restoring:
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eret
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sb
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SYM_FUNC_END(__host_exit)
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/*
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* void __noreturn __host_enter(struct kvm_cpu_context *host_ctxt);
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*/
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SYM_FUNC_START(__host_enter)
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mov x29, x0
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b __host_enter_restore_full
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SYM_FUNC_END(__host_enter)
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/*
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* void __noreturn __hyp_do_panic(struct kvm_cpu_context *host_ctxt, u64 spsr,
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* u64 elr, u64 par);
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*/
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SYM_FUNC_START(__hyp_do_panic)
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/* Prepare and exit to the host's panic funciton. */
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mov lr, #(PSR_F_BIT | PSR_I_BIT | PSR_A_BIT | PSR_D_BIT |\
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PSR_MODE_EL1h)
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msr spsr_el2, lr
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ldr lr, =panic
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hyp_kimg_va lr, x6
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msr elr_el2, lr
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mov x29, x0
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/* Load the format string into x0 and arguments into x1-7 */
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ldr x0, =__hyp_panic_string
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hyp_kimg_va x0, x6
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/* Load the format arguments into x1-7. */
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mov x6, x3
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get_vcpu_ptr x7, x3
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mrs x3, esr_el2
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mrs x4, far_el2
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mrs x5, hpfar_el2
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/* Enter the host, conditionally restoring the host context. */
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cbz x29, __host_enter_without_restoring
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b __host_enter_for_panic
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SYM_FUNC_END(__hyp_do_panic)
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.macro host_el1_sync_vect
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.align 7
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.L__vect_start\@:
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stp x0, x1, [sp, #-16]!
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mrs x0, esr_el2
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lsr x0, x0, #ESR_ELx_EC_SHIFT
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cmp x0, #ESR_ELx_EC_HVC64
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b.ne __host_exit
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ldp x0, x1, [sp] // Don't fixup the stack yet
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/* Check for a stub HVC call */
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cmp x0, #HVC_STUB_HCALL_NR
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b.hs __host_exit
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add sp, sp, #16
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/*
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* Compute the idmap address of __kvm_handle_stub_hvc and
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* jump there. Since we use kimage_voffset, do not use the
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* HYP VA for __kvm_handle_stub_hvc, but the kernel VA instead
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* (by loading it from the constant pool).
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*
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* Preserve x0-x4, which may contain stub parameters.
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*/
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ldr x5, =__kvm_handle_stub_hvc
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hyp_pa x5, x6
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br x5
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.L__vect_end\@:
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.if ((.L__vect_end\@ - .L__vect_start\@) > 0x80)
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.error "host_el1_sync_vect larger than vector entry"
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.endif
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.endm
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.macro invalid_host_el2_vect
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.align 7
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/* If a guest is loaded, panic out of it. */
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stp x0, x1, [sp, #-16]!
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get_loaded_vcpu x0, x1
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cbnz x0, __guest_exit_panic
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add sp, sp, #16
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/*
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* The panic may not be clean if the exception is taken before the host
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* context has been saved by __host_exit or after the hyp context has
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* been partially clobbered by __host_enter.
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*/
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b hyp_panic
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.endm
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.macro invalid_host_el1_vect
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.align 7
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mov x0, xzr /* restore_host = false */
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mrs x1, spsr_el2
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mrs x2, elr_el2
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mrs x3, par_el1
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b __hyp_do_panic
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.endm
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/*
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* The host vector does not use an ESB instruction in order to avoid consuming
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* SErrors that should only be consumed by the host. Guest entry is deferred by
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* __guest_enter if there are any pending asynchronous exceptions so hyp will
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* always return to the host without having consumerd host SErrors.
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*
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* CONFIG_KVM_INDIRECT_VECTORS is not applied to the host vectors because the
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* host knows about the EL2 vectors already, and there is no point in hiding
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* them.
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*/
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.align 11
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SYM_CODE_START(__kvm_hyp_host_vector)
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invalid_host_el2_vect // Synchronous EL2t
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invalid_host_el2_vect // IRQ EL2t
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invalid_host_el2_vect // FIQ EL2t
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invalid_host_el2_vect // Error EL2t
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invalid_host_el2_vect // Synchronous EL2h
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invalid_host_el2_vect // IRQ EL2h
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invalid_host_el2_vect // FIQ EL2h
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invalid_host_el2_vect // Error EL2h
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host_el1_sync_vect // Synchronous 64-bit EL1
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invalid_host_el1_vect // IRQ 64-bit EL1
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invalid_host_el1_vect // FIQ 64-bit EL1
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invalid_host_el1_vect // Error 64-bit EL1
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invalid_host_el1_vect // Synchronous 32-bit EL1
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invalid_host_el1_vect // IRQ 32-bit EL1
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invalid_host_el1_vect // FIQ 32-bit EL1
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invalid_host_el1_vect // Error 32-bit EL1
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SYM_CODE_END(__kvm_hyp_host_vector)
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/*
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* Forward SMC with arguments in struct kvm_cpu_context, and
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* store the result into the same struct. Assumes SMCCC 1.2 or older.
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*
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* x0: struct kvm_cpu_context*
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*/
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SYM_CODE_START(__kvm_hyp_host_forward_smc)
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/*
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* Use x18 to keep the pointer to the host context because
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* x18 is callee-saved in SMCCC but not in AAPCS64.
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*/
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mov x18, x0
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ldp x0, x1, [x18, #CPU_XREG_OFFSET(0)]
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ldp x2, x3, [x18, #CPU_XREG_OFFSET(2)]
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ldp x4, x5, [x18, #CPU_XREG_OFFSET(4)]
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ldp x6, x7, [x18, #CPU_XREG_OFFSET(6)]
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ldp x8, x9, [x18, #CPU_XREG_OFFSET(8)]
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ldp x10, x11, [x18, #CPU_XREG_OFFSET(10)]
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ldp x12, x13, [x18, #CPU_XREG_OFFSET(12)]
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ldp x14, x15, [x18, #CPU_XREG_OFFSET(14)]
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ldp x16, x17, [x18, #CPU_XREG_OFFSET(16)]
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smc #0
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stp x0, x1, [x18, #CPU_XREG_OFFSET(0)]
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stp x2, x3, [x18, #CPU_XREG_OFFSET(2)]
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stp x4, x5, [x18, #CPU_XREG_OFFSET(4)]
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stp x6, x7, [x18, #CPU_XREG_OFFSET(6)]
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stp x8, x9, [x18, #CPU_XREG_OFFSET(8)]
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stp x10, x11, [x18, #CPU_XREG_OFFSET(10)]
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stp x12, x13, [x18, #CPU_XREG_OFFSET(12)]
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stp x14, x15, [x18, #CPU_XREG_OFFSET(14)]
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stp x16, x17, [x18, #CPU_XREG_OFFSET(16)]
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ret
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SYM_CODE_END(__kvm_hyp_host_forward_smc)
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