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https://github.com/tbsdtv/linux_media.git
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a4855a8c9b
On OcteonTX2/OctoenTX3 variants of silicon, Admin function (AF) handles resource allocation and configuration for PFs and their VFs. PFs request the AF directly, via mailboxes. Unlike PFs, VFs cannot send a mailbox request directly. A VF sends mailbox messages to its parent PF, with which it shares a mailbox region. The PF then forwards these messages to the AF. This patch adds code to configure inline-IPsec HW resources for CPT VFs as CPT VFs cannot send a mailbox request directly to AF. Signed-off-by: Srujana Challa <schalla@marvell.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
34 lines
1.0 KiB
C
34 lines
1.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only
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* Copyright (C) 2020 Marvell.
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*/
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#ifndef __OTX2_CPTVF_H
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#define __OTX2_CPTVF_H
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#include "mbox.h"
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#include "otx2_cptlf.h"
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struct otx2_cptvf_dev {
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void __iomem *reg_base; /* Register start address */
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void __iomem *pfvf_mbox_base; /* PF-VF mbox start address */
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struct pci_dev *pdev; /* PCI device handle */
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struct otx2_cptlfs_info lfs; /* CPT LFs attached to this VF */
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u8 vf_id; /* Virtual function index */
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/* PF <=> VF mbox */
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struct otx2_mbox pfvf_mbox;
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struct work_struct pfvf_mbox_work;
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struct workqueue_struct *pfvf_mbox_wq;
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int blkaddr;
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void *bbuf_base;
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unsigned long cap_flag;
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};
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irqreturn_t otx2_cptvf_pfvf_mbox_intr(int irq, void *arg);
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void otx2_cptvf_pfvf_mbox_handler(struct work_struct *work);
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int otx2_cptvf_send_eng_grp_num_msg(struct otx2_cptvf_dev *cptvf, int eng_type);
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int otx2_cptvf_send_kvf_limits_msg(struct otx2_cptvf_dev *cptvf);
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int otx2_cpt_mbox_bbuf_init(struct otx2_cptvf_dev *cptvf, struct pci_dev *pdev);
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#endif /* __OTX2_CPTVF_H */
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