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3d82904559
This patch introduces the main part of Cadence USBSSP DRD driver to Linux kernel. To reduce the patch size a little bit, the header file gadget.h was intentionally added as separate patch. The Cadence USBSSP DRD Controller is a highly configurable IP Core which can be instantiated as Dual-Role Device (DRD), Peripheral Only and Host Only (XHCI)configurations. The current driver has been validated with FPGA platform. We have support for PCIe bus, which is used on FPGA prototyping. The host side of USBSS DRD controller is compliant with XHCI. The architecture for device side is almost the same as for host side, and most of the XHCI specification can be used to understand how this controller operates. Signed-off-by: Pawel Laszczak <pawell@cadence.com> Signed-off-by: Peter Chen <peter.chen@nxp.com>
35 lines
684 B
C
35 lines
684 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Cadence USBSS and USBSSP DRD Driver - Host Export APIs
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*
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* Copyright (C) 2017-2018 NXP
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*
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* Authors: Peter Chen <peter.chen@nxp.com>
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*/
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#ifndef __LINUX_CDNS3_HOST_EXPORT
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#define __LINUX_CDNS3_HOST_EXPORT
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#if IS_ENABLED(CONFIG_USB_CDNS_HOST)
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struct usb_hcd;
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int cdns_host_init(struct cdns *cdns);
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int xhci_cdns3_suspend_quirk(struct usb_hcd *hcd);
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#else
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static inline int cdns_host_init(struct cdns *cdns)
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{
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return -ENXIO;
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}
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static inline void cdns_host_exit(struct cdns *cdns) { }
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static inline int xhci_cdns3_suspend_quirk(struct usb_hcd *hcd)
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{
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return 0;
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}
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#endif /* USB_CDNS_HOST */
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#endif /* __LINUX_CDNS3_HOST_EXPORT */
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