Add RPM based interconnect driver implements the set and aggregate
functionalities that translates bandwidth requests into RPM messages.
These modules provide a common set of functionalities for all
Qualcomm RPM based interconnect providers and should help reduce code
duplication when adding new providers.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Link: https://lore.kernel.org/r/20201204075345.5161-2-jun.nie@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
When CONFIG_COMPILE_TEST is set, it is possible to build some
of the interconnect drivers into the kernel while their dependencies
are loadable modules, which is bad:
arm-linux-gnueabi-ld: drivers/interconnect/qcom/bcm-voter.o: in function `qcom_icc_bcm_voter_commit':
(.text+0x1f8): undefined reference to `rpmh_invalidate'
arm-linux-gnueabi-ld: (.text+0x20c): undefined reference to `rpmh_write_batch'
arm-linux-gnueabi-ld: (.text+0x2b0): undefined reference to `rpmh_write_batch'
arm-linux-gnueabi-ld: (.text+0x2e8): undefined reference to `rpmh_write_batch'
arm-linux-gnueabi-ld: drivers/interconnect/qcom/icc-rpmh.o: in function `qcom_icc_bcm_init':
(.text+0x2ac): undefined reference to `cmd_db_read_addr'
arm-linux-gnueabi-ld: (.text+0x2c8): undefined reference to `cmd_db_read_aux_data'
The exact dependencies are a bit complicated, so split them out into a
hidden Kconfig symbol that all drivers can in turn depend on to get it
right.
Fixes: 976daac4a1 ("interconnect: qcom: Consolidate interconnect RPMh support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20201204165030.3747484-1-arnd@kernel.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Pull ARM device tree updates from Arnd Bergmann:
"Across all platforms, there is a continued move towards DT schema for
validating the dts files. As a result there are bug fixes for mistakes
that are found using these schema, in addition to warnings from the
dtc compiler.
As usual, many changes are for adding support for additional on-chip
and on-board components in the machines we already support.
The newly supported SoCs for this release are:
- MStar Infinity2M, a low-end IP camera chip based on a dual-core
Cortex-A7, otherwise similar to the Infinity chip we already
support. This is also known as the SigmaStar SSD202D, and we add
support for the Honestar ssd201htv2 development kit.
- Nuvoton NPCM730, a Cortex-A9 based Baseboard Management Controller
(BMC), in the same family as the NPCM750. This gets used in the
Ampere Altra based "Fii Kudo" server and the Quanta GSJ, both of
which are added as well.
- Broadcom BCM4908, a 64-bit home router chip based on Broadcom's own
Brahma-B53 CPU. Support is also added for the Asus ROG Rapture
GT-AC5300 high-end WiFi router based on this chip.
- Mediatek MT8192 is a new SoC based on eight Cortex-A76/A55 cores,
meant for faster Chromebooks and tablets. It gets added along with
its reference design.
- Mediatek MT6779 (Helio P90) is a high-end phone chip from last
year's generation, also added along with its reference board. This
one is still based on Cortex-A75/A55.
- Mediatek MT8167 is a version of the already supported MT8516 chip,
both based on Cortex-A35. It gets added along with the "Pumpkin"
single board computer, but is likely to also make its way into
low-end tablets in the future.
For the already supported chips, there are a number of new boards.
Interestingly there are more 32-bit machines added this time than
64-bit. Here is a brief list of the new boards:
- Three new Mikrotik router variants based on Marvell Prestera
98DX3236, a close relative of the more common Armada XP
- A reference board for the Marvell Armada 382
- Three new servers using ASpeed baseboard management controllers,
the actual machines being from Bytedance, Facebook and IBM, and one
machine using the Nuvoton NPCM750 BMC.
- The Galaxy Note 10.1 (P4) tablet, using an Exynos 4412.
- The usual set of 32-bit i.MX industrial/embedded hardware:
* Protonic WD3 (tractor e-cockpit)
* Kamstrup OMNIA Flex Concentrator (smart grid platform)
* Van der Laan LANMCU (food storage)
* Altesco I6P (vehicle inspection stations)
* PHYTEC phyBOARD-Segin/phyCORE-i.MX6UL baseboard
- DH electronics STM32MP157C DHCOM, a PicoITX carrier board for the
aleady supported DHCOM module
- Three new Allwinner SoC based single-board computers:
* NanoPi R1 (H3 based)
* FriendlyArm ZeroPi (H3 based)
* Elimo Initium SBC (S3 based)
- Ouya Game Console based on Nvidia Tegra 3
- Version 5 of the already supported Zynq Z-Turn MYIR Board
- LX2162AQDS, a reference platform for NXP Layerscape LX2162A, which
is a repackaged 16-core LX2160A
- A series of Kontron i.MX8M Mini baseboard/SoM versions
- Espressobin Ultra, a new variant of the popular Armada 3700 based
board,
- IEI Puzzle-M801, a rackmount network appliance based on Marvell
Armada 8040
- Microsoft Lumia 950 XL, a phone
- HDK855 and HDK865 Hardware development kits for Qualcomm sm8250 and
sm8150, respectively
- Three new board variants of the "Trogdor" Chromebook (sc7180)
- New board variants of the Renesas based "Kingfisher" and "HiHope"
reference boards
- Kobol Helios64, an open source NAS appliance based on Rockchips
RK3399
- Engicam PX30.Core, a SoM based on Rockchip PX30, along with a few
carrier boards"
* tag 'arm-soc-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (679 commits)
arm64: dts: sparx5: Add SGPIO devices
arm64: dts: sparx5: Add reset support
dt-bindings: gpio: Add a binding header for the MSC313 GPIO driver
ARM: mstar: SMP support
ARM: mstar: Wire up smpctrl for SSD201/SSD202D
ARM: mstar: Add smp ctrl registers to infinity2m dtsi
ARM: mstar: Add dts for Honestar ssd201htv2
ARM: mstar: Add chip level dtsi for SSD202D
ARM: mstar: Add common dtsi for SSD201/SSD202D
ARM: mstar: Add infinity2m support
dt-bindings: mstar: Add Honestar SSD201_HT_V2 to mstar boards
dt-bindings: vendor-prefixes: Add honestar vendor prefix
dt-bindings: mstar: Add binding details for mstar,smpctrl
ARM: mstar: Fill in GPIO controller properties for infinity
ARM: mstar: Add gpio controller to MStar base dtsi
ARM: zynq: Fix incorrect reference to XM013 instead of XM011
ARM: zynq: Convert at25 binding to new description on zc770-xm013
ARM: zynq: Fix OCM mapping to be aligned with binding on zc702
ARM: zynq: Fix leds subnode name for zc702/zybo-z7
ARM: zynq: Rename bus to be align with simple-bus yaml
...
Qualcomm ARM64 DT updates for 5.11
For SM8250 the recently introduced support for handling boot-loader
stream mappings in the ARM SMMU allow us to enable this, and thereby USB
controller and PHY, SDHCI controller and FastRPC, as well as support for
the SM8250 HDK board has been added. Additionally PRNG and RTC is
enabled.
Similarly for SM8150, the ARM SMMU could be added which allows the
secondary USB controller and PHYs, as well as WiFi to be added and
support for the SM8150 HDK board to be introduced. Additionally
Coresight and support for the last-level cache controller was added.
MSM8916 finally has VDDCX and VDDMX removed as regulators and are now
handled by the rpmpd driver for the devices controlling them. The
Longsheer L8150 gains touchscreen, sensors, vibrator and LED support.
MSM8992 gains USB and SDHCI support as well as an I2C controller and the
associated RMI4 based touchscreen for the Lumia 950.
MSM8994 also gains USB and SDHCI support, as well as VADC and temp-alarm
support. Then support for the Lumia 950 XL is added.
SDM845 gains interconnect properties for a number of devices and the
GENI wrappers gains iommu stream configuration, which means DMA
operations on e.g. I2C now works. The Lenovo Yoga C630 finally has the
SMMU enabled, a few fixes and the description of the eDP bridge and
panel means that the laptop can now boot mainline with working display,
GPU, WiFi and audio.
SC7180 gains a slew of smaller improvements and fixes.
* tag 'qcom-arm64-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (93 commits)
arm64: dts: qcom: c630: Define eDP bridge and panel
arm64: dts: qcom: c630: Fix pinctrl pins properties
arm64: dts: qcom: c630: Polish i2c-hid devices
arm64: dts: qcom: sc7180: Add lpass cpu node for I2S driver
arm64: dts: sdm845: Add interconnect properties for QUP
interconnect: qcom: sdm845: Add the missing nodes for QUP
dt-bindings: interconnect: sdm845: Add IDs for the QUP ports
arm64: dts: qcom: c630: Expose LID events
arm64: dts: qcom: c630: Re-enable apps_smmu
dts: qcom: sdm845: Add dt entries to support crypto engine.
arm64: dts: qcom: qrb5165-rb5: Add support for MCP2518FD
arm64: dts: qcom: sdm845: use GIC_SPI for IPA interrupts
arm64: dts: qcom: sc7180: use GIC_SPI for IPA interrupts
arm64: dts: qcom: sc7180: limit IPA iommu streams
arm64: dts: qcom: sm8150: Add Coresight support
arm64: dts: qcom: sc7180-trogdor: Make pp3300_a the default supply for pp3300_hub
arm64: dts: qcom: sc7180: Add DDR/L3 votes for the pro variant
arm64: dts: qcom: sc7180-lite: Tweak DDR/L3 scaling on SC7180-lite
arm64: dts: qcom: sc7180-trogdor: add "pen-insert" label for trogdor
arm64: qcom: sc7180: trogdor: Add ADC nodes and thermal zone for charger thermistor
...
Link: https://lore.kernel.org/r/20201130190131.345187-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Georgi writes:
interconnect changes for 5.11
Here are the interconnect changes for the 5.10-rc1 merge window
consisting of new driver and a cleanup.
Driver changes:
- New driver for Samsung Exynos SoCs
- Misc cleanups
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
* tag 'icc-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc:
MAINTAINERS: Add entry for Samsung interconnect drivers
interconnect: Add generic interconnect driver for Exynos SoCs
interconnect: qcom: Simplify the vcd compare function
This patch adds a generic interconnect driver for Exynos SoCs in order
to provide interconnect functionality for each "samsung,exynos-bus"
compatible device.
The SoC topology is a graph (or more specifically, a tree) and its
edges are described by specifying in the 'interconnects' property
the interconnect consumer path for each interconnect provider DT node.
Each bus is now an interconnect provider and an interconnect node as
well (cf. Documentation/interconnect/interconnect.rst), i.e. every bus
registers itself as a node. Node IDs are not hard coded but rather
assigned dynamically at runtime. This approach allows for using this
driver with various Exynos SoCs.
Frequencies requested via the interconnect API for a given node are
propagated to devfreq using dev_pm_qos_update_request(). Please note
that it is not an error when CONFIG_INTERCONNECT is 'n', in which
case all interconnect API functions are no-op.
The samsung,data-clk-ratio DT property is used to specify the ratio
of the interconect bandwidth to the minimum data clock frequency
for each bus.
Due to unspecified relative probing order, -EPROBE_DEFER may be
propagated to ensure that the parent is probed before its children.
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Artur Świgoń <a.swigon@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Link: https://lore.kernel.org/r/20201112140931.31139-3-s.nawrocki@samsung.com
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
of_count_icc_providers() function uses for_each_available_child_of_node()
helper to recursively check all the available nodes. This helper already
properly handles child nodes' reference count, so there is no need to do
it explicitly. Remove the excessive call to of_node_put(). This fixes
memory trashing when CONFIG_OF_DYNAMIC is enabled (for example
arm/multi_v7_defconfig).
Fixes: b1d681d8d3 ("interconnect: Add sync state support")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20201119103746.32564-1-m.szyprowski@samsung.com
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
The following errors are noticed during boot on a QCS404 board:
[ 2.926647] qcom_icc_rpm_smd_send mas 6 error -6
[ 2.934573] qcom_icc_rpm_smd_send mas 8 error -6
These errors show when we try to configure the GPU and display nodes.
Since these particular nodes aren't supported on RPM and are purely
local, we should just change their mas_rpm_id to -1 to avoid any
requests being sent for these master IDs.
Reviewed-by: Mike Tipton <mdtipton@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20201118111044.26056-1-georgi.djakov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Some nodes are incorrectly marked as RPM-controlled (they have RPM
master and slave ids assigned), but are actually controlled by the
application CPU instead. The RPM complains when we send requests for
resources that it can't control. Let's fix this by replacing the IDs,
with the default "-1" in which case no requests are sent.
Reviewed-by: Mike Tipton <mdtipton@codeaurora.org>
Link: https://lore.kernel.org/r/20201112105140.10092-1-georgi.djakov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
When sync_state support got introduced recently, by default we try to
set the NoCs to run initially at maximum rate. But as these values are
aggregated, we may end with a really big clock rate value, which is
then converted from "u64" to "long" during the clock rate rounding.
But on 32bit platforms this may result an overflow. Fix it by making
sure that the rate is within range.
Reported-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Brian Masney <masneyb@onstation.org>
Link: https://lore.kernel.org/r/20201106144847.7726-1-georgi.djakov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
In addition to the rest of Qcom interconnect drivers use icc_sync_state
for SM8150/SM8250 interconnect drivers to notify the interconnect
framework when all consumers are probed and there is no need to keep the
bandwidth set to maximum anymore.
Also move the BCM initialization before creating the nodes to set the
max bandwidth in hardware for the initialization/probing stage.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fixes: 7d3b0b0d81 ("interconnect: qcom: Use icc_sync_state")
Link: https://lore.kernel.org/r/20201027133418.976687-1-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
After enabling interconnect scaling for display on the db845c board,
in certain configurations the board hangs, while the following errors
are observed on the console:
Error sending AMC RPMH requests (-110)
qcom_rpmh TCS Busy, retrying RPMH message send: addr=0x50000
qcom_rpmh TCS Busy, retrying RPMH message send: addr=0x50000
qcom_rpmh TCS Busy, retrying RPMH message send: addr=0x50000
...
In this specific case, the above is related to one of the sequencers
being stuck, while client drivers are returning from probe and trying
to disable the currently unused clock and interconnect resources.
Generally we want to keep the multimedia NoC enabled like the rest of
the NoCs, so let's set the keepalive flag on it too.
Fixes: aae57773fb ("interconnect: qcom: sdm845: Split qnodes into their respective NoCs")
Reported-by: Amit Pundir <amit.pundir@linaro.org>
Reviewed-by: Mike Tipton <mdtipton@codeaurora.org>
Tested-by: John Stultz <john.stultz@linaro.org>
Link: https://lore.kernel.org/r/20201012194034.26944-1-georgi.djakov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
* icc-syncstate:
interconnect: Add get_bw() callback
interconnect: Add sync state support
interconnect: qcom: Use icc_sync_state
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Lowering the bandwidth on the bus might have negative consequences if
it's done before all consumers had a chance to cast their vote. Now by
default the framework sets the bandwidth to maximum during boot. We need
to use the icc_sync_state callback to notify the framework when all
consumers are probed and there is no need to keep the bandwidth set to
maximum anymore.
Link: https://lore.kernel.org/r/20200825170152.6434-4-georgi.djakov@linaro.org
Reviewed-by: Saravana Kannan <saravanak@google.com>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
The bootloaders often do some initial configuration of the interconnects
in the system and we want to keep this configuration until all consumers
have probed and expressed their bandwidth needs. This is because we don't
want to change the configuration by starting to disable unused paths until
every user had a chance to request the amount of bandwidth it needs.
To accomplish this we will implement an interconnect specific sync_state
callback which will synchronize (aggregate and set) the current bandwidth
settings when all consumers have been probed.
Link: https://lore.kernel.org/r/20200825170152.6434-3-georgi.djakov@linaro.org
Reviewed-by: Saravana Kannan <saravanak@google.com>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Change the default TCS wait behavior to only wait for completion in AMC
and WAKE. Waiting isn't necessary in the SLEEP TCS, since votes are only
being removed in this case. Resources can be safely disabled
asynchronously in parallel with the rest of the power collapse sequence.
This reduces the sleep entry latency.
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
Link: https://lore.kernel.org/r/20200903192149.30385-6-mdtipton@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Currently, all bcm-voters set tcs_cmd::wait=true for the last VCD
command in each TCS (AMC, WAKE, and SLEEP). However, some bcm-voters
don't need the completion and instead need to optimize for latency. For
instance, disabling wait-for-completion in the WAKE set can decrease
resume latency and allow for certain operations to occur in parallel
with the WAKE TCS triggering. This is only safe in very specific
situations. Keep the default behavior of always waiting, but allow it to
be overridden in devicetree.
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
Link: https://lore.kernel.org/r/20200903192149.30385-5-mdtipton@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Add driver for the Qualcomm interconnect buses found in SM8250 based
platforms. The topology consists of several NoCs that are controlled by
a remote processor that collects the aggregated bandwidth for each
master-slave pairs.
Based on SC7180 driver and generated from downstream dts.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200728023811.5607-6-jonathan@marek.ca
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Add driver for the Qualcomm interconnect buses found in SM8150 based
platforms. The topology consists of several NoCs that are controlled by
a remote processor that collects the aggregated bandwidth for each
master-slave pairs.
Based on SC7180 driver and generated from downstream dts.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200728023811.5607-5-jonathan@marek.ca
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
There are drivers which just need to get multiple interconnect paths,
request some predefined amounts of bandwidth and then just toggle the
paths between enabled/disabled state.
The aim of this patch is simplify the above and to allow drivers to put
all the path names and bandwidth data into a single static icc_bulk_data
table and call the icc_bulk_* functions on that table in order to scale
all the interconnect paths in parallel.
Suggested-by: Evan Green <evgreen@chromium.org>
Suggested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200729123439.9961-1-georgi.djakov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
