263 Commits

Author SHA1 Message Date
Linus Torvalds
b869e9f499 Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull more clk updates from Stephen Boyd:
 "Another set of clk driver updates and fixes for the merge window. The
  driver updates needed more time to bake in linux-next.

  Updates:
   - Support for more clk controllers in Qualcomm SoCs such as SM8350,
     SM8450, SDX75, SC8280XP, and IPQ9574
   - Runtime PM enablement of some more Qualcomm clk controllers
   - Various fixes to Qualcomm clk driver data to use correct clk_ops
     and to check halt bits properly
   - AT91 updates to modernize with clk_parent_data structures

  Fixes:
   - Remove 'syscon' from dt binding fix for ti,j721e-system-controller
   - Fix determine rate in the Tegra driver that got wrecked by the
     refactorting of muxes this merge window"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (69 commits)
  clk: tegra: Avoid calling an uninitialized function
  dt-bindings: mfd: ti,j721e-system-controller: Remove syscon from example
  clk: at91: sama7g5: s/ep_chg_chg_id/ep_chg_id
  clk: at91: sama7g5: switch to parent_hw and parent_data
  clk: at91: sckc: switch to parent_data/parent_hw
  clk: at91: clk-sam9x60-pll: add support for parent_hw
  clk: at91: clk-utmi: add support for parent_hw
  clk: at91: clk-system: add support for parent_hw
  clk: at91: clk-programmable: add support for parent_hw
  clk: at91: clk-peripheral: add support for parent_hw
  clk: at91: clk-master: add support for parent_hw
  clk: at91: clk-generated: add support for parent_hw
  clk: at91: clk-main: add support for parent_data/parent_hw
  clk: qcom: gcc-sc8280xp: Add runtime PM
  clk: qcom: gpucc-sc8280xp: Add runtime PM
  clk: qcom: mmcc-msm8974: fix MDSS_GDSC power flags
  clk: qcom: gpucc-sm6375: Enable runtime pm
  dt-bindings: clock: sm6375-gpucc: Add VDD_GX
  clk: qcom: gcc-sm6115: Add missing PLL config properties
  clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi)
  ...
2023-07-04 11:07:45 -07:00
Linus Torvalds
a9025a5f16 Merge tag 'soc-newsoc-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull new ARM SoC support from Arnd Bergmann:
 "There are two new SoC families this time, and both appear fairly
  similar: The Nuvoton MA35D1 and the STMicroelectronics STM32MP2 are
  both dual-core Cortex-A35 based chips for the low-power industrial
  embedded market, and they mark the first 64-bit product in a widely
  used family of 32-bit Arm MCUs and SoCs.

  The way into the kernel is completely different here: The team at ST
  has a long history of working upstream with their STM32MP1 and other
  SoCs, and they produced a complete port to arm64 together with the
  initial announcement. Nuvoton also has multiple SoC product lines with
  current or previous upstream support, but those are maintained by
  third parties and are unrelated. The patch series from Nuvoton's Jacky
  Huang had to go through many revisisions to get to this point and is
  still missing a few drivers including the serial port for the moment.

  The branch contains the devicetree files as well as all the code
  changes, in order to have something that can be tested standalone"

* tag 'soc-newsoc-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits)
  clk: nuvoton: Use clk_parent_data instead of string for parent clock
  clk: nuvoton: Update all constant hex values to lowercase
  clk: nuvoton: Add clk-ma35d1.h for driver extern functions
  remoteproc: stm32: use correct format strings on 64-bit
  MAINTAINERS: add entry for ARM/STM32 ARCHITECTURE
  arm64: defconfig: enable ARCH_STM32 and STM32 serial driver
  arm64: dts: st: add stm32mp257f-ev1 board support
  dt-bindings: stm32: document stm32mp257f-ev1 board
  arm64: dts: st: introduce stm32mp25 pinctrl files
  arm64: dts: st: introduce stm32mp25 SoCs family
  arm64: introduce STM32 family on Armv8 architecture
  dt-bindings: stm32: add st,stm32mp25-syscfg compatible for syscon
  pinctrl: stm32: add stm32mp257 pinctrl support
  dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packages
  Documentation/process: add soc maintainer handbook
  reset: RESET_NUVOTON_MA35D1 should depend on ARCH_MA35
  reset: Add Nuvoton ma35d1 reset driver support
  clk: nuvoton: Add clock driver for ma35d1 clock controller
  arm64: dts: nuvoton: Add initial ma35d1 device tree
  dt-bindings: serial: Document ma35d1 uart controller
  ...
2023-06-29 15:11:17 -07:00
Linus Torvalds
6c1561fb90 Merge tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC devicetree updates from Arnd Bergmann:
 "The biggest change this time is for the 32-bit devicetree files, which
  are all moved to a new location, using separate subdirectories for
  each SoC vendor, following the same scheme that is used on arm64, mips
  and riscv. This has been discussed for many years, but so far we never
  did this as there was a plan to move the files out of the kernel
  entirely, which has never happened.

  The impact of this will be that all external patches no longer apply,
  and anything depending on the location of the dtb files in the build
  directory will have to change. The installed files after 'make
  dtbs_install' keep the current location.

  There are six added SoCs here that are largely variants of previously
  added chips. Two other chips are added in a separate branch along with
  their device drivers.

   - The Samsung Exynos 4212 makes its return after the Samsung Galaxy
     Express phone is addded at last. The SoC support was originally
     added in 2012 but removed again in 2017 as it was unused at the
     time.

   - Amlogic C3 is a Cortex-A35 based smart IP camera chip

   - Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of
     the still common MSM8916 (Snapdragon 410) phone chip that has been
     supported for a long time.

   - Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end
     laptop chips, used in the Lenovo Flex 5G, which is added along with
     the reference board.

   - Qualcomm SDX75 is the latest generation modem chip that is used as
     a peripherial in phones but can also run a standalone Linux. Unlike
     the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55.

   - Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the
     Xuantie C910 core, a step up from all previously added rv64 chips.

  All of the above come with reference board implementations, those
  included there are 39 new board files, but only five more 32-bit this
  time, probably a new low:

   - Marantec Maveo board based on dhcor imx6ull module

   - Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip

   - Epson Moverio BT-200 AR glasses based on TI OMAP4

   - PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM

   - ICnova ADB4006 board based on Allwinner A20

  On the 64-bit side, there are also fewer addded machines than we had
  in the recent releases:

   - Three boards based on NXP i.MX8: Emtop SoM & Baseboard, NXP i.MX8MM
     EVKB board and i.MX8MP based Gateworks Venice gw7905-2x device.

   - NVIDIA IGX Orin and Jetson Orin Nano boards, both based on tegra234

   - Qualcomm gains support for 6 reference boards on various members of
     their IPQ networking SoC series, as well as the Sony Xperia M4 Aqua
     phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board on top
     of the various reference platforms for their new chips.

   - Rockchips support for several newer boards: Indiedroid Nova
     (rk3588), Edgeble Neural Compute Module 6B (rk3588), FriendlyARM
     NanoPi R2C Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn
     Fastrhino R66S/R68S (rk3568)

   - TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex
     Verdin family with AM62 COM, carrier and dev boards

  Other changes to existing boards contain the usual minor improvements
  along with

   - continued updates to clean up dts files based on dtc warnings and
     binding checks, in particular cache properties and node names

   - support for devicetree overlays on at91, bcm283x

   - significant additions to existing SoC support on mediatek,
     qualcomm, ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST
     STM32MP1

  As usual, a lot more detail is available in the individual merge
  commits"

* tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (926 commits)
  ARM: mvebu: fix unit address on armada-390-db flash
  ARM: dts: Move .dts files to vendor sub-directories
  kbuild: Support flat DTBs install
  ARM: dts: Add .dts files missing from the build
  ARM: dts: allwinner: Use quoted #include
  ARM: dts: lan966x: kontron-d10: add PHY interrupts
  ARM: dts: lan966x: kontron-d10: fix SPI CS
  ARM: dts: lan966x: kontron-d10: fix board reset
  ARM: dts: at91: Enable device-tree overlay support for AT91 boards
  arm: dts: Enable device-tree overlay support for AT91 boards
  arm64: dts: exynos: Remove clock from Exynos850 pmu_system_controller
  ARM: dts: at91: use generic name for shutdown controller
  ARM: dts: BCM5301X: Add cells sizes to PCIe nodes
  dt-bindings: firmware: brcm,kona-smc: convert to YAML
  riscv: dts: sort makefile entries by directory
  riscv: defconfig: enable T-HEAD SoC
  MAINTAINERS: add entry for T-HEAD RISC-V SoC
  riscv: dts: thead: add sipeed Lichee Pi 4A board device tree
  riscv: dts: add initial T-HEAD TH1520 SoC device tree
  riscv: Add the T-HEAD SoC family Kconfig option
  ...
2023-06-29 15:07:06 -07:00
Stephen Boyd
82e58e69d7 Merge branches 'clk-qcom' and 'clk-microchip' into clk-next
* clk-qcom: (63 commits)
  clk: qcom: gcc-sc8280xp: Add runtime PM
  clk: qcom: gpucc-sc8280xp: Add runtime PM
  clk: qcom: mmcc-msm8974: fix MDSS_GDSC power flags
  clk: qcom: gpucc-sm6375: Enable runtime pm
  dt-bindings: clock: sm6375-gpucc: Add VDD_GX
  clk: qcom: gcc-sm6115: Add missing PLL config properties
  clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi)
  clk: qcom: gcc-ipq6018: remove duplicate initializers
  clk: qcom: gcc-ipq9574: Enable crypto clocks
  dt-bindings: clock: Add crypto clock and reset definitions
  clk: qcom: Add lpass audio clock controller driver for SC8280XP
  clk: qcom: Add lpass clock controller driver for SC8280XP
  dt-bindings: clock: Add LPASS AUDIOCC and reset controller for SC8280XP
  dt-bindings: clock: Add LPASSCC and reset controller for SC8280XP
  dt-bindings: clock: qcom,mmcc: define clocks/clock-names for MSM8226
  clk: qcom: gpucc-sm8550: Add support for graphics clock controller
  clk: qcom: Add support for SM8450 GPUCC
  clk: qcom: gcc-sm8450: Enable hw_clk_ctrl
  clk: qcom: rcg2: Make hw_clk_ctrl toggleable
  dt-bindings: clock: qcom: Add SM8550 graphics clock controller
  ...

* clk-microchip:
  clk: at91: sama7g5: s/ep_chg_chg_id/ep_chg_id
  clk: at91: sama7g5: switch to parent_hw and parent_data
  clk: at91: sckc: switch to parent_data/parent_hw
  clk: at91: clk-sam9x60-pll: add support for parent_hw
  clk: at91: clk-utmi: add support for parent_hw
  clk: at91: clk-system: add support for parent_hw
  clk: at91: clk-programmable: add support for parent_hw
  clk: at91: clk-peripheral: add support for parent_hw
  clk: at91: clk-master: add support for parent_hw
  clk: at91: clk-generated: add support for parent_hw
  clk: at91: clk-main: add support for parent_data/parent_hw
2023-06-26 16:36:14 -07:00
Stephen Boyd
b9a40506a2 Merge branches 'clk-imx', 'clk-microchip', 'clk-cleanup', 'clk-bindings', 'clk-ti' and 'clk-kasprintf' into clk-next
- Handle allocation failures from kasprintf() and friends

* clk-imx:
  clk: imx: clk-imx8mp: improve error handling in imx8mp_clocks_probe()
  clk: imx93: fix memory leak and missing unwind goto in imx93_clocks_probe
  clk: imx: clk-imx8mn: fix memory leak in imx8mn_clocks_probe
  dt-bindings: clock: imx8m: Add missing interrupt property
  clk: imx: clk-imxrt1050: fix memory leak in imxrt1050_clocks_probe
  clk: imx: composite-8m: Add imx8m_divider_determine_rate
  clk: imx: scu: use _safe list iterator to avoid a use after free
  clk: imx: drop imx_unregister_clocks
  clk: imx6ul: retain early UART clocks during kernel init
  clk: imx: imx6sx: Remove CLK_SET_RATE_PARENT from the LDB clocks

* clk-microchip:
  dt-bindings: clocks: at91sam9x5-sckc: convert to yaml
  dt-bindings: clocks: atmel,at91rm9200-pmc: convert to yaml
  clk: microchip: Use of_property_read_bool() for boolean properties
  clk: microchip: convert SOC_MICROCHIP_POLARFIRE to ARCH_MICROCHIP_POLARFIRE

* clk-cleanup:
  clk: fix typo in clk_hw_register_fixed_rate_parent_data() macro
  clk: Fix memory leak in devm_clk_notifier_register()
  clk: mvebu: Iterate over possible CPUs instead of DT CPU nodes
  clk: mvebu: Use of_get_cpu_hwid() to read CPU ID
  MAINTAINERS: Add Marvell mvebu clock drivers
  clk: mvebu: Use of_address_to_resource()
  clk: tegra: tegra124-emc: Fix potential memory leak
  clk: clocking-wizard: Fix Oops in clk_wzrd_register_divider()
  clk: bcm: rpi: Fix off by one in raspberrypi_discover_clocks()
  clk: sifive: Use devm_platform_ioremap_resource()

* clk-bindings:
  dt-bindings: clock: drop unneeded quotes and use absolute /schemas path
  dt-bindings: rcc: stm32: Sync with u-boot copy for STM32MP13 SoC

* clk-ti:
  clk: keystone: syscon-clk: Add support for audio refclk
  dt-bindings: clock: Add binding documentation for TI Audio REFCLK
  dt-bindings: clock: ehrpwm: Remove unneeded syscon compatible
  clk: keystone: syscon-clk: Allow the clock node to not be of type syscon

* clk-kasprintf:
  clk: clocking-wizard: check return value of devm_kasprintf()
  clk: ti: clkctrl: check return value of kasprintf()
  clk: keystone: sci-clk: check return value of kasprintf()
  clk: si5341: free unused memory on probe failure
  clk: si5341: check return value of {devm_}kasprintf()
  clk: si5341: return error if one synth clock registration fails
  clk: cdce925: check return value of kasprintf()
  clk: vc5: check memory returned by kasprintf()
2023-06-26 08:55:22 -07:00
Patrick Delaunay
94ec3d8b20 dt-bindings: rcc: stm32: Sync with u-boot copy for STM32MP13 SoC
Minor cosmetic change, aligned with files in U-Boot:
- change obsolete SPDX id : GPL-2.0+ and use the same license
  GPL-2.0-only for the 2 files
- use correct mail address gabriel.fernandez@foss.st.com
- remove extra space

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20230510184305.v2.1.I417093ddcea282be479f10a37147d1935a9050b7@changeid
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-06-14 18:06:22 -07:00
Bjorn Andersson
004823da9b Merge branch '20230526161129.1454-2-quic_anusha@quicinc.com' into clk-for-6.5
Merge the DeviceTree binding updates for IPQ9574 GCC adding clocks and
resets related to Crypto Engine, through a topic branch in order to make
them available in the DeviceTree source tree as well.
2023-06-13 15:19:18 -07:00
Bjorn Andersson
e5d57e7c94 Merge branch '20230526161129.1454-2-quic_anusha@quicinc.com' into arm64-for-6.5
Merge IPQ9574 Crypto Engine-related DeviceTree bindings, to gain the
additional clock defines needed to add the related nodes.
2023-06-13 15:17:30 -07:00
Anusha Rao
35e237b3d5 dt-bindings: clock: Add crypto clock and reset definitions
Add crypto clock and reset ID definitions for ipq9574.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526161129.1454-2-quic_anusha@quicinc.com
2023-06-13 15:17:22 -07:00
Runyang Chen
2cf4ec5344 dt-bindings: reset: mt8188: add thermal reset control bit
To support reset of infra_ao, add the index of infra_ao reset of thermal
for MT8188.

Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230525075011.7032-2-runyang.chen@mediatek.com
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-06-12 18:21:01 -07:00
Jacky Huang
476650a64b dt-bindings: reset: nuvoton: Document ma35d1 reset control
Add the dt-bindings header for Nuvoton ma35d1, that gets shared
between the reset controller and reset references in the dts.
Add documentation to describe nuvoton ma35d1 reset driver.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-05 13:18:08 +02:00
Bjorn Andersson
6de1bd7405 Merge branch 'sm8450-sm8550-gpucc-binding' into clk-for-6.5
Bring GPUCC DeviceTree bindings for SM8450 and SM8550 in through a topic
branch to allow sharing it with the DeviceTree source tree as well.
2023-05-26 18:22:17 -07:00
Konrad Dybcio
63f4e4b6f5 dt-bindings: clock: Add Qcom SM8450 GPUCC
Add device tree bindings for the graphics clock controller on Qualcomm
Technology Inc's SM8450 SoCs.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230517-topic-waipio-gpucc-v1-1-4f40e282af1d@linaro.org
2023-05-26 18:22:04 -07:00
Konrad Dybcio
2aae5eaa94 dt-bindings: clock: Add SM8350 VIDEOCC
SM8350, like most recent higher-end chips has a separate clock
controller block just for the Venus IP. Document it.

The binding was separated as the driver, unlike the earlier ones, doesn't
expect clock-names to keep it easier to maintain.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230413-topic-lahaina_vidcc-v4-1-86c714a66a81@linaro.org
2023-05-24 21:46:09 -07:00
Linus Torvalds
78b421b6a7 Merge tag 'linux-watchdog-6.4-rc1' of git://www.linux-watchdog.org/linux-watchdog
Pull watchdog updates from Wim Van Sebroeck:

 - Add watchdog driver for StarFive JH7100 and JH7110 Soc

 - Add Rockchip RK3588 devices

 - Add Qualcom IPQ5332 APSS, QCM2290 KPSS and SM6115 SoC devices

 - Add Mediatke MT8365 and MT6735 devices

 - Watchdog-core: Always set WDOG_HW_RUNNING when starting watchdog

 - Convert watchdog platform drivers to return void on the remove
   callback

 - Convert to devm_clk_get_enabled() helpers

 - ... and other small fixes and improvements

* tag 'linux-watchdog-6.4-rc1' of git://www.linux-watchdog.org/linux-watchdog: (72 commits)
  watchdog: dw_wdt: Simplify clk management
  watchdog: dw_wdt: Fix the error handling path of dw_wdt_drv_probe()
  watchdog: starfive: Fix the warning of starfive_wdt_match
  watchdog: starfive: Fix the probe return error if PM and early_enable are both disabled
  MAINTAINERS: Add fragment for Xilinx watchdog driver
  watchdog: menz069_wdt: fix timeout setting
  watchdog: menz069_wdt: fix watchdog initialisation
  dt-bindings: watchdog: alphascale-asm9260: convert to DT schema
  watchdog: loongson1_wdt: Implement restart handler
  dt-bindings: watchdog: Document Qualcomm SM6115 watchdog
  dt-bindings: watchdog: realtek,otto-wdt: simplify requiring interrupt-names
  dt-bindings: watchdog: toshiba,visconti-wdt: simplify with unevaluatedProperties
  dt-bindings: watchdog: fsl-imx7ulp-wdt: simplify with unevaluatedProperties
  dt-bindings: watchdog: arm,sp805: drop unneeded minItems
  dt-bindings: watchdog: drop duplicated GPIO watchdog bindings
  dt-bindings: reset: Add binding for MediaTek MT6735 TOPRGU/WDT
  drivers: watchdog: Add StarFive Watchdog driver
  dt-bindings: watchdog: Add watchdog for StarFive JH7100 and JH7110
  dt-bindings: watchdog: indentation, quotes and white-space cleanup
  watchdog: ebc-c384_wdt: Mark status as orphaned
  ...
2023-05-04 18:33:56 -07:00
Linus Torvalds
e81507acdc Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
 "Nothing looks out of the ordinary in this batch of clk driver updates.

  There are a couple patches to the core clk framework, but they're all
  basically cleanups or debugging aids. The driver updates and new
  additions are dominated in the diffstat by Qualcomm and MediaTek
  drivers. Qualcomm gained a handful of new drivers for various SoCs,
  and MediaTek gained a bunch of drivers for MT8188. The MediaTek
  drivers are being modernized as well, so there are updates all over
  that vendor's clk drivers. There's also a couple other new clk drivers
  in here, for example the Starfive JH7110 SoC support is added.

  Outside of the two major SoC vendors though, we have the usual
  collection of non-critical fixes and cleanups to various clk drivers.
  It's good to see that we're getting more cleanups and modernization
  patches. Maybe one day we'll be able to properly split clk providers
  from clk consumers.

  Core:
   - Print an informational message before disabling unused clks

  New Drivers:
   - BCM63268 timer clock and reset controller
   - Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and
     MT8195 SoCs
   - Mediatek MT8188 SoC clk drivers
   - Clock driver for Sunplus SP7021 SoC
   - Clk driver support for Loongson-2 SoCs
   - Clock driver for Skyworks Si521xx I2C PCIe clock generators
   - Initial Starfive JH7110 clk/reset support
   - Global clock controller drivers for Qualcomm SM7150, IPQ9574,
     MSM8917 and IPQ5332 SoCs
   - GPU clock controller drivers for SM6115, SM6125, SM6375 and SA8775P
     SoCs

  Updates:
   - Shrink size of clk_fractional_divider a little
   - Convert various clk drivers to devm_of_clk_add_hw_provider()
   - Convert platform clk drivers to remove_new()
   - Converted most Mediatek clock drivers to struct platform_driver
   - MediaTek clock drivers can be built as modules
   - Reimplement Loongson-1 clk driver with DT support
   - Migrate socfpga clk driver to of_clk_add_hw_provider()
   - Support for i3c clks on Aspeed ast2600 SoCs
   - Add clock generic devm_clk_hw_register_gate_parent_data
   - Add audiomix block control for i.MX8MP
   - Add support for determine_rate to i.MX composite-8m
   - Let the LCDIF Pixel clock of i.MX8MM and i.MX8MN set parent rate
   - Provide clock name in error message for clk-gpr-mux on get parent
     failure
   - Drop duplicate imx_clk_mux_flags macro
   - Register the i.MX8MP Media Disp2 Pix clock as bus clock
   - Add Media LDB root clock to i.MX8MP
   - Make i.MX8MP nand_usdhc_bus clock as non-critical
   - Fix the rate table for i.MX fracn-gppll
   - Disable HW control for the fracn-gppll in order to be controlled by
     register write
   - Add support for interger PLL in fracn-gppll
   - Add mcore_booted module parameter to i.MX93 provider
   - Add NIC, A55 and ARM PLL clocks to i.MX93
   - Fix i.MX8ULP XBAR_DIVBUS and AD_SLOW clock parents
   - Use "divider closest" clock type for PLL4_PFD dividers on i.MX8ULP
     to get more accurate clock rates
   - Mark the MU0_Bi and TPM5 clocks on i.MX8ULP as critical
   - Update some of the i.MX critical clocks flags to allow glitchless
     on-the-fly rate change.
   - Add I2C5 clock on Renesas R-Car V3H
   - Exynos850: Add CMU_G3D clock controller for the Mali GPU
   - Extract Exynos5433 (ARM64) clock controller power management code
     to common driver parts
   - Exynos850: make PMU_ALIVE_PCLK clock critical
   - Add Audio, thermal, camera (CSI-2), Image Signal Processor/Channel
     Selector (ISPCS), and video capture (VIN) clocks on Renesas R-Car
     V4H
   - Add video capture (VIN) clocks on Renesas R-Car V3H
   - Add Cortex-A53 System CPU (Z2) clocks on Renesas R-Car V3M and V3H
   - Support for Stromer Plus PLL on Qualcomm IPQ5332
   - Add a missing reset to Qualcomm QCM2290
   - Migrate Qualcomm IPQ4019 to clk_parent_data
   - Make USB GDSCs enter retention state when disabled on Qualcomm
     SM6375, MSM8996 and MSM8998 SoCs
   - Set floor rounding clk_ops for Qualcomm QCM2290 SDCC2 clk
   - Add two EMAC GDSCs on Qualcomm SC8280XP
   - Use shared rcg clk ops in Qualcomm SM6115 GCC
   - Park Qualcomm SM8350 PCIe PIPE clks when disabled
   - Add GDSCs to Qualcomm SC7280 LPASS audio clock controller
   - Add missing XO clocks to Qualcomm MSM8226 and MSM8974
   - Convert some Qualcomm clk DT bindings to YAML
   - Reparenting fix for the clock supplying camera modules on Rockchip
     rk3399
   - Mark more critical (bus-)clocks on Rockchip rk3588"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (290 commits)
  clk: qcom: gcc-sc8280xp: Add EMAC GDSCs
  clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers
  clk: rockchip: rk3588: make gate linked clocks critical
  clk: qcom: dispcc-qcm2290: Remove inexistent DSI1PHY clk
  clk: qcom: add the GPUCC driver for sa8775p
  dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P
  clk: qcom: gcc-sm8350: fix PCIe PIPE clocks handling
  clk: qcom: lpassaudiocc-sc7280: Add required gdsc power domain clks in lpass_cc_sc7280_desc
  clk: qcom: lpasscc-sc7280: Skip qdsp6ss clock registration
  dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode property
  clk: starfive: Avoid casting iomem pointers
  clk: microchip: fix potential UAF in auxdev release callback
  clk: qcom: rpm: Use managed `of_clk_add_hw_provider()`
  clk: mediatek: fhctl: Mark local variables static
  clk: sifive: make SiFive clk drivers depend on ARCH_ symbols
  clk: uniphier: Use managed `of_clk_add_hw_provider()`
  clk: si5351: Use managed `of_clk_add_hw_provider()`
  clk: si570: Use managed `of_clk_add_hw_provider()`
  clk: si514: Use managed `of_clk_add_hw_provider()`
  clk: lmk04832: Use managed `of_clk_add_hw_provider()`
  ...
2023-04-29 17:29:39 -07:00
Linus Torvalds
d42b1c4757 Merge tag 'devicetree-for-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
 "Bindings:

   - Convert Qcom IOMMU, Amlogic timer, Freescale sec-v4.0, Toshiba
     TC358764 display bridge, Parade PS8622 display bridge, and Xilinx
     FPGA bindings to DT schema format

   - Add qdu1000 and sa8775p SoC support to Qcom PDC interrupt
     controller

   - Add MediaTek MT8365 UART and SYSIRQ bindings

   - Add Arm Cortex-A78C and X1C core compatibles

   - Add vendor prefix for Novatek

   - Remove bindings for stih415, sti416, stid127 platforms

   - Drop uneeded quotes in schema files. This is preparation for
     yamllint checking quoting for us.

   - Add missing (unevaluated|additional)Properties constraints on child
     node schemas

   - Clean-up schema comments formatting

   - Fix I2C and SPI node bus names in schema examples

   - Clean-up some display compatibles schema syntax

   - Fix incorrect references to lvds.yaml

   - Gather all cache controller bindings in a common directory

  DT core:

   - Convert unittest to new void .remove platform device hook

   - kerneldoc fixes for DT address of_pci_range_to_resource/
     of_address_to_resource functions"

* tag 'devicetree-for-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (46 commits)
  dt-bindings: rng: Drop unneeded quotes
  dt-bindings: arm/soc: mediatek: Drop unneeded quotes
  dt-bindings: soc: qcom: Drop unneeded quotes
  dt-bindings: i2c: samsung: Fix 'deprecated' value
  dt-bindings: display: Fix lvds.yaml references
  dt-bindings: display: simplify compatibles syntax
  dt-bindings: display: mediatek: simplify compatibles syntax
  dt-bindings: drm/bridge: ti-sn65dsi86: Fix the video-interfaces.yaml references
  dt-bindings: timer: Drop unneeded quotes
  dt-bindings: interrupt-controller: qcom,pdc: document qcom,qdu1000-pdc
  dt-bindings: interrupt-controller: qcom-pdc: add compatible for sa8775p
  dt-bindings: reset: remove stih415/stih416 reset
  dt-bindings: net: dwmac: sti: remove stih415/sti416/stid127
  dt-bindings: irqchip: sti: remove stih415/stih416 and stid127
  dt-bindings: iommu: Convert QCOM IOMMU to YAML
  dt-bindings: irqchip: ti,sci-inta: Add optional power-domains property
  dt-bindings: Add missing (unevaluated|additional)Properties on child node schemas
  of: address: Reshuffle to remove forward declarations
  of: address: Fix documented return value of of_pci_range_to_resource()
  of: address: Document return value of of_address_to_resource()
  ...
2023-04-27 09:23:57 -07:00
Stephen Boyd
c19c6c7b44 Merge branches 'clk-of', 'clk-samsung', 'clk-rockchip' and 'clk-qcom' into clk-next
* clk-of:
  clk: add missing of_node_put() in "assigned-clocks" property parsing

* clk-samsung:
  clk: samsung: exynos850: Make PMU_ALIVE_PCLK critical
  clk: samsung: Convert to platform remove callback returning void
  clk: samsung: exynos5433: Extract PM support to common ARM64 layer
  clk: samsung: Extract parent clock enabling to common function
  clk: samsung: Extract clocks registration to common function
  clk: samsung: exynos850: Add AUD and HSI main gate clocks
  clk: samsung: exynos850: Implement CMU_G3D domain
  clk: samsung: clk-pll: Implement pll0818x PLL type
  clk: samsung: Set dev in samsung_clk_init()
  clk: samsung: Don't pass reg_base to samsung_clk_register_pll()
  clk: samsung: Remove np argument from samsung_clk_init()
  dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks
  dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D

* clk-rockchip:
  clk: rockchip: rk3588: make gate linked clocks critical
  clk: rockchip: rk3399: allow clk_cifout to force clk_cifout_src to reparent

* clk-qcom: (57 commits)
  clk: qcom: gcc-sc8280xp: Add EMAC GDSCs
  clk: qcom: dispcc-qcm2290: Remove inexistent DSI1PHY clk
  clk: qcom: add the GPUCC driver for sa8775p
  dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P
  clk: qcom: gcc-sm8350: fix PCIe PIPE clocks handling
  clk: qcom: lpassaudiocc-sc7280: Add required gdsc power domain clks in lpass_cc_sc7280_desc
  clk: qcom: lpasscc-sc7280: Skip qdsp6ss clock registration
  dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode property
  clk: qcom: rpm: Use managed `of_clk_add_hw_provider()`
  clk: qcom: Add Global Clock Controller driver for IPQ9574
  dt-bindings: clock: Add ipq9574 clock and reset definitions
  clk: qcom: gpucc-sm6375: Configure CX_GDSC disable wait value
  clk: qcom: gcc-sm6115: Mark RCGs shared where applicable
  clk: qcom: dispcc-qcm2290: Add MDSS_CORE reset
  dt-bindings: clock: dispcc-qcm2290: Add MDSS_CORE reset
  clk: qcom: apss-ipq-pll: add support for IPQ5332
  dt-bindings: clock: qcom,a53pll: add IPQ5332 compatible
  clk: qcom: apss-ipq-pll: refactor the driver to accommodate different PLL types
  dt-bindings: mailbox: qcom,apcs-kpss-global: fix SDX55 'if' match
  dt-bindings: mailbox: qcom,apcs-kpss-global: correct SDX55 clocks
  ...
2023-04-25 11:52:25 -07:00
Stephen Boyd
1a86e99fa0 Merge branches 'clk-starfive', 'clk-fractional' and 'clk-devmof' into clk-next
- Shrink size of clk_fractional_divider a little
 - Convert various clk drivers to devm_of_clk_add_hw_provider()

* clk-starfive:
  clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers
  clk: starfive: Avoid casting iomem pointers
  MAINTAINERS: generalise StarFive clk/reset entries
  reset: starfive: Add StarFive JH7110 reset driver
  clk: starfive: Add StarFive JH7110 always-on clock driver
  clk: starfive: Add StarFive JH7110 system clock driver
  reset: starfive: jh71x0: Use 32bit I/O on 32bit registers
  reset: starfive: Rename "jh7100" to "jh71x0" for the common code
  reset: starfive: Extract the common JH71X0 reset code
  reset: starfive: Factor out common JH71X0 reset code
  reset: Create subdirectory for StarFive drivers
  reset: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE
  clk: starfive: Rename "jh7100" to "jh71x0" for the common code
  clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h
  clk: starfive: Factor out common JH7100 and JH7110 code
  clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE
  dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator
  dt-bindings: clock: Add StarFive JH7110 system clock and reset generator

* clk-fractional:
  clk: Remove mmask and nmask fields in struct clk_fractional_divider
  clk: rockchip: Remove values for mmask and nmask in struct clk_fractional_divider
  clk: imx: Remove values for mmask and nmask in struct clk_fractional_divider
  clk: Compute masks for fractional_divider clk when needed.

* clk-devmof:
  clk: uniphier: Use managed `of_clk_add_hw_provider()`
  clk: si5351: Use managed `of_clk_add_hw_provider()`
  clk: si570: Use managed `of_clk_add_hw_provider()`
  clk: si514: Use managed `of_clk_add_hw_provider()`
  clk: lmk04832: Use managed `of_clk_add_hw_provider()`
  clk: hsdk-pll: Use managed `of_clk_add_hw_provider()`
  clk: cdce706: Use managed `of_clk_add_hw_provider()`
  clk: axs10x: Use managed `of_clk_add_hw_provider()`
  clk: axm5516: Use managed `of_clk_add_hw_provider()`
  clk: axi-clkgen: Use managed `of_clk_add_hw_provider()`
2023-04-25 11:50:49 -07:00
Yassine Oudjana
edb10ace4d dt-bindings: reset: Add binding for MediaTek MT6735 TOPRGU/WDT
Add a DT binding for the MT6735 top reset generation unit/watchdog timer.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20230302124015.75546-2-y.oudjana@protonmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2023-04-22 16:01:48 +02:00
Alain Volmat
5c899820ba dt-bindings: reset: remove stih415/stih416 reset
Remove the stih415 and stih416 reset dt-bindings since those
two platforms are no more supported.

Signed-off-by: Alain Volmat <avolmat@me.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230416200442.61554-1-avolmat@me.com
Signed-off-by: Rob Herring <robh@kernel.org>
2023-04-18 12:48:50 -05:00
Arnd Bergmann
718acce6f0 Merge tag 'qcom-arm64-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
More Qualcomm ARM64 Devicetree updated for v6.4

Devicetree for the QCM2210/QCM2290 is introduced. Support for the RB1
board is introduced on QRB2210, RB2 on QRB4210, the AL02 board on
IPQ9574, the MI01.6 board is introduced on IPQ5332 and initial support
for Xiaomi Mi A3 is introduced on SM6125.

Support for the output-enable/disable flag is introduced in the
pinctrl-msm driver, and the non-standard "input-enable" is dropped from
a range of platforms.

A wide range of smaller fixes are introduced, based on Devicetree
validation.

MSM8953 gains LPASS, MPSS and Wireless subsystem support.

The iommus property is removed from PCIe nodes in all platforms, as the
only the child devices should be associated with iommu groups, through
the existing iommu-map property.

A few QUP instances are introduced on the IPQ5332 platform, and support
for the MI01.6 board is introduced.

The reserved-memory map on Huawei Nexus 6P is updated with the addition
of splash screen framebuffer memory and adjustment to the reserved
memory region overlapping the smem region.

Regulators are introduces for the SA8775P Ride platform.

A regulator is marked always-on, for correctness, on Trogdor. Pinconf
fixes are introduced to both sc7180 and sc7280 devices. A dedicated
reviewers list is added for boards relevant to the Chromebook engineers.

A set of pinconf fixes are introduced for sc8280xp, labels are
introduced for Soundwire nodes.

The sensor core remoteproc and FastRPC thereon, is introduce in SDM845
and enabled for OnePlus 6/6T and Shift Shift6mq.

RMTFS, remoteprocs, ath10k and ramoops is introduced for the Lenovo Tab
P11.

UFS support is introduced on SM6125.

SM8150 no longer defines the GPU to be in headless mode by default, GPU
speedbins are introduced.

GPU speedbins are introduced for SM8250 as well, as is support for
display on Xiaomi Mi Pad 5 Pro, with two different panels supported.

Soundwire controllers, ADSP audio codec macros and the Inline Crypto
Engine support is added to the SM8550 platform.

* tag 'qcom-arm64-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (85 commits)
  arm64: dts: qcom: Add base qrb4210-rb2 board dts
  arm64: dts: qcom: sm8550: add Soundwire controllers
  arm64: dts: qcom: sm8250: Add GPU speedbin support
  arm64: dts: qcom: sm8150: Add GPU speedbin support
  arm64: dts: qcom: sm8150: Don't start Adreno in headless mode
  arm64: dts: qcom: ipq5332: add support for the RDP468 variant
  arm64: dts: qcom: sdm630: move DSI opp-table out of DSI node
  arm64: dts: qcom: sm6115p-j606f: Enable ATH10K WiFi
  arm64: dts: qcom: sm6115p-j606f: Enable remoteprocs
  arm64: dts: qcom: sm6115: Add RMTFS
  arm64: dts: qcom: sm6115-j606f: Add ramoops node
  arm64: dts: qcom: msm8916-thwc-ufi001c: add function to pin config
  arm64: dts: qcom: sm8550: Add the Inline Crypto Engine node
  arm64: dts: MSM8953: Add lpass nodes
  arm64: dts: MSM8953: Add mpss nodes
  arm64: dts: MSM8953: Add wcnss nodes
  arm64: dts: qcom: sm8350: remove superfluous "input-enable"
  arm64: dts: qcom: sm8150: remove superfluous "input-enable"
  arm64: dts: qcom: apq8016: remove superfluous "input-enable"
  arm64: dts: qcom: sc8280xp-lenovo-thinkpad: correct pin drive-strength
  ...

Link: https://lore.kernel.org/r/20230414031550.2412379-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14 18:01:50 +02:00
Devi Priya
b065b23d3c dt-bindings: clock: Add ipq9574 clock and reset definitions
Add clock and reset ID definitions for ipq9574

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Co-developed-by: Anusha Rao <quic_anusha@quicinc.com>
Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230316072940.29137-2-quic_devipriy@quicinc.com
2023-04-07 10:27:16 -07:00
Emil Renner Berthing
3de0c91032 dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator
Add bindings for the always-on clock and reset generator (AONCRG) on the
JH7110 RISC-V SoC by StarFive Ltd.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-05 15:43:24 +01:00
Emil Renner Berthing
7fce1e39f0 dt-bindings: clock: Add StarFive JH7110 system clock and reset generator
Add bindings for the system clock and reset generator (SYSCRG) on the
JH7110 RISC-V SoC by StarFive Ltd.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-05 15:43:15 +01:00
Álvaro Fernández Rojas
2a67e196bb dt-bindings: reset: add BCM63268 timer reset definitions
Add missing timer reset definitions for BCM63268.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230322171515.120353-3-noltari@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-27 12:23:51 -07:00
Linus Torvalds
11c7052998 Merge tag 'soc-drivers-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
 "As usual, there are lots of minor driver changes across SoC platforms
  from NXP, Amlogic, AMD Zynq, Mediatek, Qualcomm, Apple and Samsung.
  These usually add support for additional chip variations in existing
  drivers, but also add features or bugfixes.

  The SCMI firmware subsystem gains a unified raw userspace interface
  through debugfs, which can be used for validation purposes.

  Newly added drivers include:

   - New power management drivers for StarFive JH7110, Allwinner D1 and
     Renesas RZ/V2M

   - A driver for Qualcomm battery and power supply status

   - A SoC device driver for identifying Nuvoton WPCM450 chips

   - A regulator coupler driver for Mediatek MT81xxv"

* tag 'soc-drivers-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (165 commits)
  power: supply: Introduce Qualcomm PMIC GLINK power supply
  soc: apple: rtkit: Do not copy the reg state structure to the stack
  soc: sunxi: SUN20I_PPU should depend on PM
  memory: renesas-rpc-if: Remove redundant division of dummy
  soc: qcom: socinfo: Add IDs for IPQ5332 and its variant
  dt-bindings: arm: qcom,ids: Add IDs for IPQ5332 and its variant
  dt-bindings: power: qcom,rpmpd: add RPMH_REGULATOR_LEVEL_LOW_SVS_L1
  firmware: qcom_scm: Move qcom_scm.h to include/linux/firmware/qcom/
  MAINTAINERS: Update qcom CPR maintainer entry
  dt-bindings: firmware: document Qualcomm SM8550 SCM
  dt-bindings: firmware: qcom,scm: add qcom,scm-sa8775p compatible
  soc: qcom: socinfo: Add Soc IDs for IPQ8064 and variants
  dt-bindings: arm: qcom,ids: Add Soc IDs for IPQ8064 and variants
  soc: qcom: socinfo: Add support for new field in revision 17
  soc: qcom: smd-rpm: Add IPQ9574 compatible
  soc: qcom: pmic_glink: remove redundant calculation of svid
  soc: qcom: stats: Populate all subsystem debugfs files
  dt-bindings: soc: qcom,rpmh-rsc: Update to allow for generic nodes
  soc: qcom: pmic_glink: add CONFIG_NET/CONFIG_OF dependencies
  soc: qcom: pmic_glink: Introduce altmode support
  ...
2023-02-27 10:04:49 -08:00
Linus Torvalds
1ec35eadc3 Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
 "We have one small patch to the clk core this time around. It fixes a
  corner case with the CLK_OPS_PARENT_ENABLE flag combined with
  clk_core_is_enabled() where it hangs the system. We'll simply assume
  the clk is disabled if the parent is disabled and the flag is set.
  Trying to turn on the parent to check the enable state of the clk runs
  into system hangs at boot. We let this bake in -next for a couple
  weeks to make sure there aren't any more issues because the last
  attempt to fix this ran into hangs and had to be reverted.

  Note: There were some more patches to the core framework around
  sync_state and disabling unused clks, but I asked for that to be
  reverted from the qcom PR because it isn't ready and we're still
  discussing the best solution on the list.

  Outside of the core clk framework, we have the usual collection of clk
  driver updates and support for new SoCs (which seems to never stop).
  The dirstat is dominated by Qualcomm because they added support for
  quite a few SoCs this time around and also migrated quite a few of
  their drivers to clk_parent_data. The other big diff is in the
  Mediatek clk drivers that saw a significant rework this cycle to
  similarly modernize the code, and we'll see that work continue in the
  next cycle as well. Nothing really jumps out as scary here, except
  that the significant churn in parent data descriptions can have typos
  that go unnoticed. More details below.

  Core:
   - Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled()

  New Drivers:
   - Add a new clk-gpr-mux clock type and use it on i.MX6Q to add ENET
     ref clocks
   - Support for Mediatek MT7891 SoC clks
   - Support for many Qualcomm clk controllers:
      - QDU1000/QRU1000 global clock controller
      - SA8775P global clock controller
      - SM8550 TCSR and display clock controller
      - SM6350 clock controller
      - MSM8996 CBF and APCS clock controllers

  Updates:
   - Various cleanups and improvements to Mediatek clk drivers to reduce
     code size and modernize the drivers
   - Support for Versa 5P49V60 clks
   - Disable R-Car H3 ES1.*, as it was only available to an internal
     development group and needed a lot of quirks and workarounds
   - Add PWM, Compare-Match Timer (TIM), USB, SDHI, and eMMC clocks and
     resets on Renesas RZ/V2M
   - Add display clocks on Renesas R-Car V4H
   - Add Camera Receiving Unit (CRU) clocks and resets on Renesas RZ/G2L
   - Free the imx_uart_clocks even if imx_register_uart_clocks returns
     early
   - Get the stdout clocks count from device tree on i.MX
   - Drop the clock count argument from imx_register_uart_clocks()
   - Keep the uart clocks on i.MX93 for when earlycon is used
   - Fix SPDX comment in i.MX6SLL clocks bindings header
   - Drop some unnecessary spaces from i.MX8ULP clocks bindings header
   - Add imx_obtain_fixed_of_clock() for allowing to add a clock that is
     not configured via devicetree
   - Fix the ENET1 gate configuration for i.MX6UL according to the
     reference manual
   - Add ENET refclock mux support for i.MX6UL
   - Add support for USB host/device configuration on Renesas RZ/N1
   - Add PLL2 programming support, and CAN-FD clocks on Renesas R-Car
     V4H
   - Add D1 CAN bus gates and resets for Allwinner
   - Mark D1 CPUX clock as critical on Allwinner
   - Reuse D1 driver for Allwinner R528/T113
   - Cleanup sunxi-ng Kconfig
   - Fix sunxi-ng kernel-doc issues
   - Model Allwinner H3/H5 DRAM clock as fixed clock
   - Use .determine_rate() instead of .round_rate() for the dualdiv,
     mpll, sclk-div and cpu-dyn-div amlogic clock drivers
   - DDR clocks were marked as critical in the proper clock driver for
     each AT91 SoC such that drivers/memory/atmel-sdramc.c to be deleted
     in the next releases as it only does clock enablement
   - Patch to avoid compiling dt-compat.o for all AT91 SoCs as only some
     of them may use it
   - Support synchronous power_off requests in the qcom GDSC driver for
     proper GPU power collapse
   - Drop test clocks from various Qualcomm clk drivers
   - Update parent references to use clk_parent_data/clk_hw in various
     Qualcomm clk drivers
   - Fixes for the Qualcomm MSM8996 CPU clock controller
   - Transition Qualcomm MSM8974 GCC off the externally defined
     sleep_clk
   - Add GDSCs in the global clock controller for Qualcomm QCS404
   - The SDCC core clocks on Qualcomm SM6115 are moved to floor_ops
   - Programming of clk_dis_wait for GPU CX GDSC on Qualcomm SC7180 and
     SDM845 are moved to use the recently introduced properties in the
     GDSC struct
   - Qualcomm's RPMh clock driver gains SM8550 and SA8775P clocks, and
     the IPA clock is added on a variety of platforms
   - De-duplicate identical clks in Qualcomm SMD RPM clk driver
   - Add a few missing clocks across msm8998, msm8992, msm8916, qcs404
     to Qualcomm SDM RPM clk driver
   - Various Qualcomm clk drivers use devm_pm_runtime_enable() to
     simplify"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (228 commits)
  clk: qcom: apcs-msm8986: Include bitfield.h for FIELD_PREP
  clk: qcom: Revert sync_state based clk_disable_unused
  clk: imx: pll14xx: fix recalc_rate for negative kdiv
  clk: rs9: Drop unused pin_xin field
  MAINTAINERS: clk: imx: Add Peng Fan as reviewer
  clk: sprd: Add dependency for SPRD_UMS512_CLK
  clk: ralink: fix 'mt7621_gate_is_enabled()' function
  clk: mediatek: clk-mtk: Remove unneeded semicolon
  dt-bindings: clock: remove stih416 bindings
  dt-bindings: clock: add loongson-2 clock
  dt-bindings: clock: add loongson-2 clock include file
  clk: imx: fix compile testing imxrt1050
  clk: Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled()
  clk: imx: set imx_clk_gpr_mux_ops storage-class-specifier to static
  clk: renesas: rcar-gen3: Disable R-Car H3 ES1.*
  dt-bindings: clock: Merge qcom,gpucc-sm8350 into qcom,gpucc.yaml
  clk: qcom: gpucc-sdm845: fix clk_dis_wait being programmed for CX GDSC
  clk: qcom: gpucc-sc7180: fix clk_dis_wait being programmed for CX GDSC
  dt-bindings: clock: qcom,sa8775p-gcc: add the power-domains property
  clk: qcom: cpu-8996: add missing cputype include
  ...
2023-02-25 15:16:23 -08:00
Arnd Bergmann
426082a214 Merge tag 'v6.2-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into soc/drivers
Introduce MediaTek regulator coupler driver to ensure that the SRAM
voltage in par with the GPU voltage. This allows for a stable use of the
GPU.

mtk-mutex:
- add support for MT8188 vdosys0 path
- allow it to be build as module
- add support for MT8195 vdosys1 path

mmsys:
- add MT8188 vdosys0 path
- allow to be build as a module
- add MT8195 vdosys1 path
- add support for CMDQ
- allow for up to 64 reset bits
- add supprot for the MT8195 vppsys[0,1] pathes

pm-domains:
- keep power for the MT8186 ADSP on by default
- add support for MT8188
- add support for buck isolation needed in specific pm-domains for
  MT8188 and MT8192

mtk-svs:
- enable IRQ later to allow using kexec
- several improvments on the code base
- fix modalias

pmic wrapper:
- convert binding to yaml. As this is thightly coupled to the MT6357
  PMIC, I took patches regarding it as well.

* tag 'v6.2-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (41 commits)
  soc: mediatek: mtk-svs: add missing MODULE_DEVICE_TABLE
  soc: mediatek: mtk-devapc: Switch to devm_clk_get_enabled()
  soc: mtk-svs: mt8183: refactor o_slope calculation
  soc: mediatek: mtk-svs: delete superfluous platform data entries
  soc: mediatek: mtk-svs: move svs_platform_probe into probe
  soc: mediatek: mtk-svs: improve readability of platform_probe
  soc: mediatek: mtk-svs: clean up platform probing
  soc: mediatek: mtk-svs: keep svs alive if CONFIG_DEBUG_FS not supported
  soc: mediatek: mtk-svs: Use pm_runtime_resume_and_get() in svs_init01()
  soc: mediatek: mtk-svs: reset svs when svs_resume() fail
  soc: mediatek: mtk-svs: restore default voltages when svs_init02() fail
  soc: mediatek: mmsys: add support for MT8195 VPPSYS
  dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS
  soc: mediatek: Introduce mediatek-regulator-coupler driver
  soc: mediatek: mtk-svs: Enable the IRQ later
  soc: mediatek: add mtk-mutex support for mt8195 vdosys1
  soc: mediatek: add mtk-mutex component - dp_intf1
  soc: mediatek: mmsys: add reset control for MT8195 vdosys1
  soc: mediatek: mmsys: add mmsys for support 64 reset bits
  soc: mediatek: add cmdq support of mtk-mmsys config API for mt8195 vdosys1
  ...

Link: https://lore.kernel.org/r/396d51fc-81f3-4a2b-d7a7-b966bfe3002a@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-02-03 14:22:19 +01:00
Nancy.Lin
664a39b8e7 dt-bindings: reset: mt8195: add vdosys1 reset control bit
Add vdosys1 reset control bit for MT8195 platform.

Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230113104434.28023-3-nancy.lin@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-25 16:05:14 +01:00
Samuel Holland
925b61ba2d dt-bindings: clock: Add D1 CAN bus gates and resets
The D1 CCU contains gates and resets for two CAN buses. While the CAN
bus controllers are only documented for the T113 SoC, the CCU is the
same across all SoC variants.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221231231429.18357-6-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-01-08 22:06:10 +01:00
Tomeu Vizoso
a439267609 dt-bindings: reset: meson-g12a: Add missing NNA reset
Doesn't appear in the TRM I have, but it is used by the downstream
galcore driver.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20221202115223.39051-2-tomeu.vizoso@collabora.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-02 11:29:38 +01:00
Linus Torvalds
b611996ef2 Merge tag 'linux-watchdog-6.2-rc1' of git://www.linux-watchdog.org/linux-watchdog
Pull watchdog updates from Wim Van Sebroeck:

 - Add Advantech EC watchdog driver

 - Add support for MT6795 Helio X10 watchdog and toprgu

 - Add support for MT8188 watchdog device

 - Remove #ifdef guards for PM related functions

 - Other fixes and improvements

* tag 'linux-watchdog-6.2-rc1' of git://www.linux-watchdog.org/linux-watchdog:
  watchdog: aspeed: Enable pre-timeout interrupt
  watchdog: iTCO_wdt: Set NO_REBOOT if the watchdog is not already running
  watchdog: rn5t618: add support for read out bootstatus
  watchdog: kempld: Remove #ifdef guards for PM related functions
  watchdog: omap: Remove #ifdef guards for PM related functions
  watchdog: twl4030: Remove #ifdef guards for PM related functions
  watchdog: at91rm9200: Remove #ifdef guards for PM related functions
  watchdog: Add Advantech EC watchdog driver
  dt-bindings: watchdog: mediatek,mtk-wdt: Add compatible for MT8173
  dt-bindings: watchdog: mediatek,mtk-wdt: Add compatible for MT6795
  dt-bindings: watchdog: mediatek: Convert mtk-wdt to json-schema
  watchdog: mediatek: mt8188: add wdt support
  dt-bindings: reset: mt8188: add toprgu reset-controller header file
  dt-bindings: watchdog: Add compatible for MediaTek MT8188
  watchdog: mtk_wdt: Add support for MT6795 Helio X10 watchdog and toprgu
2022-12-17 08:34:01 -06:00
Linus Torvalds
0015edd6f6 Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk driver updates from Stephen Boyd:
 "A pile of clk driver updates with a small tracepoint patch to the clk
  core this time around.

  The core framework is effectively unchanged, with the majority of the
  diff going to the Qualcomm clk driver directory because they added two
  3k line files that are almost all clk data (Abel Vesa from Linaro
  tried to shrink the number of lines down, but it doesn't seem to be
  possible without sacrificing readability).

  The second big driver this time around is the Rockchip rk3588 clk and
  reset unit, at _only_ 2.5k lines.

  Ignoring the big clk drivers from the familiar SoC vendors, there's
  just a bunch of little clk driver updates and fixes throughout here.

  It's the usual set of clk data fixups to describe proper parents, or
  add frequencies to frequency tables, or plug memory leaks when
  function calls fail. Also, some drivers are converted to use modern
  clk_hw APIs, which is always nice to see. And data is deduplicated,
  leading to a smaller kernel Image.

  Overall this batch has a larger collection of cleanups than it
  typically does. Maybe that means there are less new SoCs right now
  that need supporting, and the focus has shifted to quality and
  reliability. I can dream.

  New Drivers:
   - Frequency hopping controller hardware on MediaTek MT8186
   - Global clock controller for Qualcomm SM8550
   - Display clock controller for Qualcomm SC8280XP
   - RPMh clock controller for Qualcomm QDU1000 and QRU1000 SoCs
   - CPU PLL on MStar/SigmaStar SoCs
   - Support for the clock and reset unit of the Rockchip rk3588

  Updates:
   - Tracepoints for clk_rate_request structures
   - Debugfs support for fractional divider clk
   - Make MxL's CGU driver secure compatible
   - Ingenic JZ4755 SoC clk support
   - Support audio clks on X1000 SoCs
   - Remove flags from univ/main/syspll child fixed factor clocks across
     MediaTek platforms
   - Fix clock dependency for ADC on MediaTek MT7986
   - Fix parent for FlexSPI clock for i.MX93
   - Add USB suspend clock on i.MX8MP
   - Unmap anatop base on error for i.MX93 driver
   - Change enet clock parent to wakeup_axi_root for i.MX93
   - Drop LPIT1, LPIT2, TPM1 and TPM3 clocks for i.MX93
   - Mark HSIO bus clock and SYS_CNT clock as critical on i.MX93
   - Add 320MHz and 640MHz entries to PLL146x
   - Add audio shared gate and SAI clocks for i.MX8MP
   - Fix a possible memory leak in the error path of rockchip PLL
     creation
   - Fix header guard for V3S clocks
   - Add IR module clock for f1c100s
   - Correct the parent clocks for the (High Speed) Serial Communication
     Interfaces with FIFO ((H)SCIF) modules and the mixed-up Ethernet
     Switch clocks on Renesas R-Car S4-8
   - Add timer (TMU, CMT) and Cortex-A76 CPU core (Z0) clocks on Renesas
     R-Car V4H
   - Two PLL driver fixups for the Amlogic clk driver
   - Round SD clock rate to improve parent clock selection
   - Add Ethernet Switch and internal SASYNCPER clocks on Renesas R-Car
     S4-8
   - Add DMA (SYS-DMAC), SPI (MSIOF), external interrupt (INTC-EX)
     serial (SCIF), PWM (PWM and TPU), SDHI, and HyperFLASH/QSPI
     (RPC-IF) clocks on Renesas R-Car V4H
   - Add Multi-Function Timer Pulse Unit (MTU3a) clock and reset on
     Renesas RZ/G2L
   - Fix endless loop on Renesas RZ/N1
   - Correct the parent clocks for the High Speed Serial Communication
     Interfaces with FIFO (HSCIF) modules on the Renesas R-Car V4H SoC
     Note: HSCIF0 is used for the serial console on the White-Hawk
     development board
   - Various clk DT binding improvements and conversions to YAML
   - Qualcomm SM8150/SM8250 display clock controller cleaned up
   - Some missing clocks for Qualcomm SM8350 added
   - Qualcomm MSM8974 Global and Multimedia clock controllers
     transitioned to parent_data and parent_hws
   - Use parent_data and add network resets for Qualcomm IPQ8074
   - Qualcomm Krait clock controller modernized
   - Fix pm_runtime usage in Qualcomm SC7180 and SC7280 LPASS clock
     controllers
   - Enable retention mode on Qualcomm SM8250 USB GDSCs
   - Cleanup Qualcomm RPM and RPMh clock drivers to avoid duplicating
     clocks which definition could be shared between platforms
   - Various NULL pointer checks added for allocations"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (188 commits)
  clk: nomadik: correct struct name kernel-doc warning
  clk: lmk04832: fix kernel-doc warnings
  clk: lmk04832: drop superfluous #include
  clk: lmk04832: drop unnecessary semicolons
  clk: lmk04832: declare variables as const when possible
  clk: socfpga: Fix memory leak in socfpga_gate_init()
  clk: microchip: enable the MPFS clk driver by default if SOC_MICROCHIP_POLARFIRE
  clk: st: Fix memory leak in st_of_quadfs_setup()
  clk: samsung: Fix memory leak in _samsung_clk_register_pll()
  clk: Add trace events for rate requests
  clk: Store clk_core for clk_rate_request
  clk: qcom: rpmh: add support for SM6350 rpmh IPA clock
  clk: qcom: mmcc-msm8974: use parent_hws/_data instead of parent_names
  clk: qcom: mmcc-msm8974: move clock parent tables down
  clk: qcom: mmcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-msm8974: use parent_hws/_data instead of parent_names
  clk: qcom: gcc-msm8974: move clock parent tables down
  clk: qcom: gcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
  dt-bindings: clocks: qcom,mmcc: define clocks/clock-names for MSM8974
  dt-bindings: clock: split qcom,gcc-msm8974,-msm8226 to the separate file
  ...
2022-12-13 13:46:07 -08:00
Jon Hunter
41155b6f6d dt-bindings: tegra: Update headers for Tegra234
Update the device-tree clock, memory, power and reset headers for
Tegra234 by adding the definitions for all the various devices.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-21 13:27:17 +01:00
Runyang Chen
fea58041af dt-bindings: reset: mt8188: add toprgu reset-controller header file
Add toprgu reset-controller header file for MT8188

Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20221026063327.20037-3-Runyang.Chen@mediatek.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2022-11-19 15:30:35 +01:00
Sebastian Reichel
0a8eb7dae6 dt-bindings: reset: add rk3588 reset definitions
Add reset ID defines for rk3588.

Compared to the downstream bindings and previous rockchip
generations this uses continous gapless reset IDs starting
at 0 instead of register offsets as IDs. Thus all numbers
are different between upstream and downstream, but I kept
the names exactly the same.

Co-Developed-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20221018151407.63395-3-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-11-14 15:28:47 +01:00
Mikko Perttunen
0e2b014eeb dt-bindings: Add headers for NVDEC on Tegra234
Add clock, memory controller, powergate and reset dt-binding headers
necessary for NVDEC.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-10-24 14:53:35 +02:00
Stephen Boyd
f9efefdba9 Merge branches 'clk-baikal', 'clk-broadcom', 'clk-vc5' and 'clk-versaclock' into clk-next
- Convert Baikal-T1 CCU driver to platform driver
 - Split reset support out of primary Baikal-T1 CCU driver
 - Add some missing clks required for RPiVid Video Decoder on RaspberryPi
 - Mark PLLC critical on bcm2835
 - Support for Renesas VersaClock7 clock generator family

* clk-baikal:
  clk: baikal-t1: Convert to platform device driver
  clk: baikal-t1: Add DDR/PCIe directly controlled resets support
  dt-bindings: clk: baikal-t1: Add DDR/PCIe reset IDs
  clk: baikal-t1: Move reset-controls code into a dedicated module
  clk: baikal-t1: Add SATA internal ref clock buffer
  clk: baikal-t1: Add shared xGMAC ref/ptp clocks internal parent
  clk: baikal-t1: Fix invalid xGMAC PTP clock divider
  clk: vc5: Fix 5P49V6901 outputs disabling when enabling FOD

* clk-broadcom:
  clk: bcm: rpi: Add support for VEC clock
  clk: bcm: rpi: Handle pixel clock in firmware
  clk: bcm: rpi: Add support HEVC clock
  clk: bcm2835: fix bcm2835_clock_rate_from_divisor declaration
  clk: bcm2835: Round UART input clock up
  clk: bcm2835: Make peripheral PLLC critical

* clk-vc5:
  clk: vc5: Add support for IDT/Renesas VersaClock 5P49V6975
  dt-bindings: clock: vc5: Add 5P49V6975
  clk: vc5: Use regmap_{set,clear}_bits() where appropriate
  clk: vc5: Check IO access results

* clk-versaclock:
  clk: Renesas versaclock7 ccf device driver
  dt-bindings: Renesas versaclock7 device tree bindings
2022-10-04 10:54:34 -07:00
Serge Semin
c0cd3b1790 dt-bindings: clk: baikal-t1: Add DDR/PCIe reset IDs
Aside with a set of the trigger-like resets Baikal-T1 CCU provides
additional directly controlled reset signals for the DDR and PCIe
controllers. As a preparation before adding these resets support to the
kernel let's extent the Baikal-T1 CCU IDs list with the new IDs, which
will be used to access the corresponding reset controls.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220929225402.9696-7-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 14:19:37 -07:00
AngeloGioacchino Del Regno
f098c088f9 dt-bindings: reset: Add bindings for MT6795 Helio X10 reset controllers
Add the reset controller bindings for MT6795.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220921091455.41327-4-angelogioacchino.delregno@collabora.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
2022-09-26 11:13:09 +08:00
AngeloGioacchino Del Regno
697b551e29 dt-bindings: reset: mt8195: Add resets for USB/PCIe t-phy port 1
Add the reset index for USBSIF P1 (T-PHY port 1), used as either USB
or PCI-Express PHY reset.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220720102817.237483-2-angelogioacchino.delregno@collabora.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-08-31 18:16:45 -07:00
AngeloGioacchino Del Regno
7e5073a74f dt-bindings: reset: mt8195: Add resets for PCIE controllers
Add the reset index for PCIe P0 and P1 (PCIe0, PCIe1) on MT8195.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220629105205.173471-2-angelogioacchino.delregno@collabora.com
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-08-31 18:13:53 -07:00
Linus Torvalds
f7cdaeeab8 Merge tag 'for-v6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply
Pull power supply and reset updates from Sebastian Reichel:
 "No core patches, only driver updates:

   - pwr-mlxbf: new reset driver for Mellanox BlueField

   - at91-reset: SAMA7G5 support

   - ab8500: continue refurbishing

   - misc minor fixes"

* tag 'for-v6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply: (29 commits)
  power: supply: olpc_battery: Hold the reference returned by of_find_compatible_node
  power: supply: ab8500: add missing destroy_workqueue in ab8500_charger_bind
  power: supply: ab8500: Remove flush_scheduled_work() call.
  power: supply: ab8500_fg: drop duplicated 'is' in comment
  power: supply: ab8500: Drop external charger leftovers
  power: supply: ab8500: Add MAINTAINERS entry
  dt-bindings: power: reset: qcom,pshold: convert to dtschema
  power: supply: Fix typo in power_supply_check_supplies
  power: reset: pwr-mlxbf: change rst_pwr_hid and low_pwr_hid from global to local variables
  power: reset: pwr-mlxbf: add missing include
  power: reset: at91-reset: add support for SAMA7G5
  power: reset: at91-reset: add reset_controller_dev support
  power: reset: at91-reset: add at91_reset_data
  power: reset: at91-reset: document structures and enums
  dt-bindings: reset: add sama7g5 definitions
  dt-bindings: reset: atmel,at91sam9260-reset: add sama7g5 bindings
  dt-bindings: reset: convert Atmel/Microchip reset controller to YAML
  power: reset: pwr-mlxbf: add BlueField SoC power control driver
  power: supply: ab8500: Exit maintenance if too low voltage
  power: supply: ab8500: Respect charge_restart_voltage_uv
  ...
2022-08-12 09:37:33 -07:00
Linus Torvalds
36001a2fa6 Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
 "The clk core gains a new set of APIs that allow drivers to both
  acquire clks and prepare and enable them at the same time. This also
  comes with devm support so that drivers can make a single call to get
  and prepare and enable the clk and have that all undone when their
  driver is removed.

  Many folks have requested this feature over the years, but we've had
  disagreements about how to implement it and if it was worthwhile to
  encourage drivers to use such an API.

  Now it's here, so let's see how it goes.

  I hope that by introducing this API we can identify drivers that would
  benefit from further consolidation of clk API usage, possibly by
  moving such logic to the bus layer and out of drivers altogether.

  Outside of that major API update, we have the usual collection of
  driver updates. A few new SoCs are supported, mostly Qualcomm and
  Renesas this time around. Then we have the long tail of non-critical
  fixes and minor feature additions to various clk drivers.

  And finally more clk provider migration to struct clk_parent_data,
  reducing boot times in the process.

  Summary:

  Core:

   - devm helpers for clk_get() + clk_prepare() and clk_enable()

  New Drivers:

   - Support for the camera clock controller in Qualcomm SM8450 and the
     display and gpu clock controllers in Qualcomm SM8350

   - Add support for the Renesas RZ/Five SoC

  Updates:

   - Various fixes, new clocks and USB GDSCs are introduced for Qualcomm
     IPQ8074

   - Fixes to Qualcomm MSM8939 for issues introduced by inheriting the
     MSM8916 GCC driver

   - Support for a new type of voteable GDSCs used by Qualcomm SC8280XP
     PCIe GDSCs

   - Qualcomm SC8280XP pipe clocks transitioned to the new phy-mux
     implementation

   - Qualcomm MSM8996 GCC, RPM clock driver and some clocks in MSM8994
     GCC are migrated to use clk_parent_data

   - Corrected the topology for Titan (camera) GDSCs on Qualcomm SDM845
     and SM8250

   - Qualcomm MSM8916 gains more possible frequencies for its GP clocks.

   - The GCC and tsens handling on Qualcomm MSM8960 is reworked to mimic
     the design in IPQ8074 to allow the GCC driver to probe earlier.

   - The regulator based mmcx supply for Qualcomm dispcc and videocc is
     dropped, as the only upstream target that adapted this interface
     was transitioned several kernel versions ago

   - Qualcomm GDSCs found to be enabled at boot will now reflect in the
     enable count of the supply, as was done with the regulator supplies
     previously

   - Correct adc1, nic_media and edma1's parents for NXP i.MX93

   - rdiv, mfd values, the return rate in recalc_rate and add more
     frequencies in the table for fracn-gppll on i.MX

   - Remove Allwinner workaround logic/compatible in fixed factor code

   - MediaTek clk driver cleanups

   - Add reset support to more MediaTek clk drivers

   - deduplicate Allwinner ccu_clks arrays

   - Allwinner H6 GPU DFS support

   - Adjust Allwinner Kconfig to limit choice

   - Fix initconst confusion on Renesas R-Car Gen4

   - Add GPT/POEG (PWM) clocks and resets on Renesas RZ/G2L

   - Add PFC and WDT clocks and resets on Renesas RZ/V2M

   - Add thermal, SDHI, Z (CPU core), PCIe, and HSCIF (serial) clocks on
     Renesas R-Car S4-8"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (124 commits)
  clk: fixed-factor: Introduce *clk_hw_register_fixed_factor_parent_hw()
  clk: mux: Introduce devm_clk_hw_register_mux_parent_hws()
  clk: divider: Introduce devm_clk_hw_register_divider_parent_hw()
  clk: qcom: gcc-msm8994: use parent_hws for gpll0/4
  clk: qcom: clk-rpm: convert to parent_data API
  dt-bindings: clock: fix wrong clock documentation for qcom,rpmcc
  clk: qcom: gcc-msm8939: Add missing USB HS system clock frequencies
  clk: qcom: gcc-msm8939: Add missing MDSS MDP clock frequencies
  clk: qcom: gcc-msm8939: Add missing CAMSS CPP clock frequencies
  clk: qcom: gcc-msm8939: Fix venus0_vcodec0_clk frequency definitions
  clk: qcom: gcc-msm8939: Add missing CAMSS CCI bus clock
  clk: qcom: gcc-msm8939: Fix weird field spacing in ftbl_gcc_camss_cci_clk
  clk: qcom: gdsc: Bump parent usage count when GDSC is found enabled
  clk: qcom: Drop mmcx gdsc supply for dispcc and videocc
  clk: qcom: fix build error initializer element is not constant
  clk: sprd: Add dt-bindings include file for UMS512
  dt-bindings: clk: sprd: Add bindings for ums512 clock controller
  clk: sunxi-ng: sun50i: h6: Modify GPU clock configuration to support DFS
  dt-bindings: clock: qcom,gcc-msm8996: add more GCC clock sources
  clk: qcom: add support for SM8350 DISPCC
  ...
2022-08-04 18:40:08 -07:00
Linus Torvalds
dd65b96492 Merge tag 'arm-newsoc-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM new SoC support from Arnd Bergmann:
 "This adds initial support for two SoC families that have been under
  review for a while. In both cases, the origonal idea was to have a
  minimally functional version, but we ended up leaving out the clk
  drivers that are still under review and will be merged through the
  corresponding subsystem tree.

  The Nuvoton NPCM8xx is a 64-bit Baseboard Management Controller and
  based on the 32-bit NPCM7xx family but is now getting added to
  arch/arm64 as well.

  Sunplus SP7021, also known as Plus1, is a general-purpose
  System-in-Package design based on the 32-bit Cortex-A7 SoC on the main
  chip, plus an I/O chip and memory in the same"

* tag 'arm-newsoc-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits)
  MAINTAINERS: rectify entry for ARM/NUVOTON NPCM ARCHITECTURE
  arm64: defconfig: Add Nuvoton NPCM family support
  arm64: dts: nuvoton: Add initial NPCM845 EVB device tree
  arm64: dts: nuvoton: Add initial NPCM8XX device tree
  arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC
  dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string
  dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string
  dt-bindings: arm: npcm: Add maintainer
  reset: npcm: Add NPCM8XX support
  dt-bindings: reset: npcm: Add support for NPCM8XX
  reset: npcm: using syscon instead of device data
  ARM: dts: nuvoton: add reset syscon property
  dt-bindings: reset: npcm: add GCR syscon property
  dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock
  dt-bindings: watchdog: npcm: Add npcm845 compatible string
  dt-bindings: timer: npcm: Add npcm845 compatible string
  ARM: dts: Add Sunplus SP7021-Demo-V3 board device tree
  ARM: sp7021_defconfig: Add Sunplus SP7021 defconfig
  ARM: sunplus: Add initial support for Sunplus SP7021 SoC
  irqchip: Add Sunplus SP7021 interrupt controller driver
  ...
2022-08-02 08:29:18 -07:00
Mikko Perttunen
63a6ef2360 dt-bindings: Add headers for Host1x and VIC on Tegra234
Add clock, memory controller, powergate and reset dt-binding headers
for Host1x and VIC on Tegra234.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08 16:17:04 +02:00
Qin Jian
55bfc376b8 dt-bindings: reset: Add bindings for SP7021 reset driver
Add documentation to describe Sunplus SP7021 reset driver bindings.

Signed-off-by: Qin Jian <qinjian@cqplus1.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-08 14:23:39 +02:00
Thierry Reding
b0aedf342b dt-bindings: Add Tegra234 MGBE clocks and resets
Add the clocks and resets used by the MGBE Ethernet hardware found on
Tegra234 SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08 10:20:59 +02:00
Claudiu Beznea
5994f58977 dt-bindings: reset: add sama7g5 definitions
Add reset bindings for SAMA7G5. At the moment only USB PHYs are
included.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2022-06-17 17:20:00 +02:00