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Merge tag 'iommu-updates-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull iommu updates from Joerg Roedel: - ARM SMMU and Mediatek updates from Will Deacon: - Support for MT8192 IOMMU from Mediatek - Arm v7s io-pgtable extensions for MT8192 - Removal of TLBI_ON_MAP quirk - New Qualcomm compatible strings - Allow SVA without hardware broadcast TLB maintenance on SMMUv3 - Virtualization Host Extension support for SMMUv3 (SVA) - Allow SMMUv3 PMU perf driver to be built independently from IOMMU - Some tidy-up in IOVA and core code - Conversion of the AMD IOMMU code to use the generic IO-page-table framework - Intel VT-d updates from Lu Baolu: - Audit capability consistency among different IOMMUs - Add SATC reporting structure support - Add iotlb_sync_map callback support - SDHI support for Renesas IOMMU driver - Misc cleanups and other small improvments * tag 'iommu-updates-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (94 commits) iommu/amd: Fix performance counter initialization MAINTAINERS: repair file pattern in MEDIATEK IOMMU DRIVER iommu/mediatek: Fix error code in probe() iommu/mediatek: Fix unsigned domid comparison with less than zero iommu/vt-d: Parse SATC reporting structure iommu/vt-d: Add new enum value and structure for SATC iommu/vt-d: Add iotlb_sync_map callback iommu/vt-d: Move capability check code to cap_audit files iommu/vt-d: Audit IOMMU Capabilities and add helper functions iommu/vt-d: Fix 'physical' typos iommu: Properly pass gfp_t in _iommu_map() to avoid atomic sleeping iommu/vt-d: Fix compile error [-Werror=implicit-function-declaration] driver/perf: Remove ARM_SMMU_V3_PMU dependency on ARM_SMMU_V3 MAINTAINERS: Add entry for MediaTek IOMMU iommu/mediatek: Add mt8192 support iommu/mediatek: Remove unnecessary check in attach_device iommu/mediatek: Support master use iova over 32bit iommu/mediatek: Add iova reserved function iommu/mediatek: Support for multi domains iommu/mediatek: Add get_domain_id from dev->dma_range_map ...
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@@ -15,6 +15,7 @@
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#include <linux/pm_runtime.h>
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#include <soc/mediatek/smi.h>
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#include <dt-bindings/memory/mt2701-larb-port.h>
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#include <dt-bindings/memory/mtk-memory-port.h>
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/* mt8173 */
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#define SMI_LARB_MMU_EN 0xf00
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@@ -43,6 +44,10 @@
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/* mt2712 */
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#define SMI_LARB_NONSEC_CON(id) (0x380 + ((id) * 4))
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#define F_MMU_EN BIT(0)
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#define BANK_SEL(id) ({ \
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u32 _id = (id) & 0x3; \
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(_id << 8 | _id << 10 | _id << 12 | _id << 14); \
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})
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/* SMI COMMON */
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#define SMI_BUS_SEL 0x220
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@@ -87,6 +92,7 @@ struct mtk_smi_larb { /* larb: local arbiter */
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const struct mtk_smi_larb_gen *larb_gen;
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int larbid;
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u32 *mmu;
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unsigned char *bank;
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};
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static int mtk_smi_clk_enable(const struct mtk_smi *smi)
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@@ -153,6 +159,7 @@ mtk_smi_larb_bind(struct device *dev, struct device *master, void *data)
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if (dev == larb_mmu[i].dev) {
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larb->larbid = i;
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larb->mmu = &larb_mmu[i].mmu;
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larb->bank = larb_mmu[i].bank;
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return 0;
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}
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}
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@@ -171,6 +178,7 @@ static void mtk_smi_larb_config_port_gen2_general(struct device *dev)
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for_each_set_bit(i, (unsigned long *)larb->mmu, 32) {
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reg = readl_relaxed(larb->base + SMI_LARB_NONSEC_CON(i));
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reg |= F_MMU_EN;
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reg |= BANK_SEL(larb->bank[i]);
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writel(reg, larb->base + SMI_LARB_NONSEC_CON(i));
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}
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}
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