media: dvb: symbol fixup for dvb_attach()

In commit 9011e49d54dc ("modules: only allow symbol_get of
EXPORT_SYMBOL_GPL modules") the use of symbol_get is properly restricted
to GPL-only marked symbols.  This interacts oddly with the DVB logic
which only uses dvb_attach() to load the dvb driver which then uses
symbol_get().

Fix this up by properly marking all of the dvb_attach attach symbols as
EXPORT_SYMBOL_GPL().
This commit is contained in:
CrazyCat
2023-09-24 18:34:16 +03:00
parent 71da1b12a9
commit bfcdb6fc52
8 changed files with 9 additions and 854 deletions

View File

@@ -1514,850 +1514,9 @@ err1:
err:
return NULL;
}
EXPORT_SYMBOL(avl6882_attach);
EXPORT_SYMBOL_GPL(avl6882_attach);
MODULE_DESCRIPTION("Availink AVL6882 DVB demodulator driver");
MODULE_AUTHOR("Luis Alves (ljalvs@gmail.com)");
MODULE_LICENSE("GPL");
MODULE_FIRMWARE(AVL6882_FIRMWARE);
#if 0
static int DVBSx_GetSignalQuality_Demod(struct avl6882_priv *priv, AVL_puint16 puiQuality )
{
int r = AVL_EC_OK;
u32 uiTemp = 0;
r = DVBSx_GetSNR_Demod(priv,&uiTemp);
if(uiTemp > 2500) {
*puiQuality = 100;
} else {
*puiQuality = uiTemp*100/2500;
}
return r;
}
int AVL_Demod_GetSQI ( struct avl6882_priv *priv,AVL_puint16 pusSQI)
{
int r = AVL_EC_OK;
*pusSQI = 0;
r=DVBSx_GetSignalQuality_Demod(priv,pusSQI);
return (r);
}
#endif
#if 0
static int AVL_LockChannel_T2(struct avl6882_priv *priv, u32 Freq_Khz, u32 BandWidth_Khz, u8 T2_Profile, AVL_int32 PLP_ID)
{
int ret;
AVL_DVBTxBandWidth nBand = AVL_DVBTx_BW_8M;
AVL_DVBTx_LockMode eDVBTxLockMode;
AVL_DVBT2_PROFILE eDVTB2Profile = (AVL_DVBT2_PROFILE) T2_Profile;
printk("[AVL_LockChannel_T2] Freq:%d Mhz,sym:%d Khz\n",Freq_Khz,BandWidth_Khz);
//return_code = r848_lock_n_wait(priv, Freq_Khz, BandWidth_Khz);
//AVL_Demod_DVBT2AutoLock(priv, nBand, , PLP_ID);
ret = AVL6882_WR_REG8(priv, 0xa00 + rc_DVBTx_l1_proc_only_caddr_offset, 0);
if (eDVTB2Profile == AVL_DVBT2_PROFILE_BASE) {
eDVBTxLockMode = AVL_DVBTx_LockMode_T2BASE;
} else if (eDVTB2Profile == AVL_DVBT2_PROFILE_LITE) {
eDVBTxLockMode = AVL_DVBTx_LockMode_T2LITE;
} else {
eDVBTxLockMode = AVL_DVBTx_LockMode_ALL;
}
nBand = Convert2DemodBand(BandWidth_Khz);
ret |= DVBTx_SetBandWidth_Demod(priv, nBand);
ret |= AVL6882_WR_REG8(priv, 0xa00 + rc_DVBTx_acquire_mode_caddr_offset, (u8) eDVBTxLockMode);
ret |= AVL6882_WR_REG8(priv, 0xa00 + rc_DVBTx_spectrum_invert_caddr_offset, AVL_SPECTRUM_AUTO);
ret |= AVL6882_WR_REG8(priv, 0xa00 + rc_DVBTx_data_PLP_ID_caddr_offset, PLP_ID);
ret |= AVL6882_WR_REG8(priv, 0xa00 + rc_DVBTx_common_PLP_ID_caddr_offset, 0);
ret |= AVL6882_WR_REG8(priv, 0xa00 + rc_DVBTx_common_PLP_present_caddr_offset, 2);
ret |= avl6882_exec_n_wait(priv,AVL_FW_CMD_ACQUIRE);
if (ret)
printk("[AVL_LockChannel_DVBT2] Failed to lock the channel!\n");
return ret;
}
static int AVL_LockChannel_T(struct avl6882_priv *priv,u32 Freq_Khz,u16 BandWidth_Khz, AVL_int32 DVBT_layer_info)
{
int ret;
AVL_DVBTxBandWidth nBand = AVL_DVBTx_BW_8M;
printk("[AVL_LockChannel_T] Freq is %d MHz, Bandwide is %d MHz, Layer Info is %d (0 : LP; 1 : HP)\n",
Freq_Khz/1000, BandWidth_Khz/1000, DVBT_layer_info);
//ret = r848_lock_n_wait(priv, Freq_Khz, BandWidth_Khz);
nBand = Convert2DemodBand(BandWidth_Khz);
//AVL_Demod_DVBTAutoLock
ret = AVL6882_WR_REG8(priv, 0xa00 + rc_DVBTx_l1_proc_only_caddr_offset, 0);
ret |= DVBTx_SetBandWidth_Demod(priv, nBand);
ret |= AVL6882_WR_REG8(priv, 0xa00 + rc_DVBTx_acquire_mode_caddr_offset, (u8) AVL_DVBTx_LockMode_T_ONLY);
ret |= AVL6882_WR_REG8(priv, 0xa00 + rc_DVBTx_spectrum_invert_caddr_offset, AVL_SPECTRUM_AUTO);
ret |= AVL6882_WR_REG8(priv, 0xa00 + rc_DVBTx_dvbt_layer_select_caddr_offset, DVBT_layer_info);
ret |= AVL6882_WR_REG8(priv, 0xa00 + rc_DVBTx_data_PLP_ID_caddr_offset, 0);
ret |= AVL6882_WR_REG8(priv, 0xa00 + rc_DVBTx_common_PLP_ID_caddr_offset, 0);
ret |= AVL6882_WR_REG8(priv, 0xa00 + rc_DVBTx_common_PLP_present_caddr_offset, 0);
ret |= avl6882_exec_n_wait(priv, AVL_FW_CMD_ACQUIRE);
if(ret)
printk("[AVL_LockChannel_T] Failed to lock the channel!\n");
return ret;
}
static int IBase_SendRxOP_Demod(struct avl6882_priv *priv,u8 cmd)
{
int ret = avl6882_wait_demod(priv);
if (ret)
return ret;
return AVL6882_WR_REG16(priv, 0x200 + rc_fw_command_saddr_offset, (u32) cmd);
}
int TestSDRAM_Demod( struct avl6882_priv *priv,AVL_puint32 puiTestResult, AVL_puint32 puiTestPattern)
{
int r = AVL_EC_OK;
u16 uiTimeDelay = 100;
u16 uiMaxRetries = 200;
u32 i=0;
r = IBase_SendRxOP_Demod(priv,AVL_FW_CMD_SDRAM_TEST);
if(AVL_EC_OK == r )
{
r |= avl6882_wait_demod(priv);
/* while (AVL_EC_OK != IBase_GetRxOPStatus_Demod(priv))
{
if (uiMaxRetries < i++)
{
r |= AVL_EC_RUNNING;
break;
}
msleep(uiTimeDelay);
}*/
r |= AVL6882_RD_REG32(priv,0x0a4 + rc_sdram_test_return_iaddr_offset, puiTestPattern);
r |= AVL6882_RD_REG32(priv,0x0a4 + rc_sdram_test_result_iaddr_offset, puiTestResult);
}
return r;
}
static int avl6882_demod_lock_wait(struct avl6882_priv *priv, u8 *lock_flag)
{
int ret, retry = 50;
enum fe_status locked;
do {
ret = avl6882_read_status(&priv->frontend, &locked);
if (ret) {
*lock_flag = 0;
break;
}
if (locked) {
*lock_flag = 1;
break;
}
msleep(20);
} while (--retry);
return ret;
}
int AVL_Demod_DVBTxChannelScan(struct avl6882_priv *priv, AVL_DVBTxBandWidth eBandWidth, AVL_DVBTx_LockMode eLockMode)
{
int r = AVL_EC_OK;
r = DVBTx_SetBandWidth_Demod(priv,eBandWidth);
r |= AVL6882_WR_REG8(priv,0xa00 + rc_DVBTx_acquire_mode_caddr_offset, eLockMode);
r |= AVL6882_WR_REG8(priv, 0xa00 + rc_DVBTx_l1_proc_only_caddr_offset, 1);
r |= avl6882_exec_n_wait(priv,AVL_FW_CMD_ACQUIRE);
return r;
}
int AVL_Demod_DVBTxGetScanInfo(struct avl6882_priv *priv, AVL_DVBTxScanInfo* pstDVBTxScanInfo)
{
int r = AVL_EC_OK;
u32 ucTemp0 = 0;
u32 ucTemp1 = 0;
enum fe_status ucDemodLockStatus;
r = avl6882_read_status(&priv->frontend, &ucDemodLockStatus);
if(ucDemodLockStatus == 0)
return r;
r |= AVL6882_RD_REG8(priv, 0x800 + rs_DVBTx_rx_mode_caddr_offset,
&ucTemp0);
pstDVBTxScanInfo->eTxStandard = (AVL_DVBTx_Standard)ucTemp0;
if(AVL_DVBTx_Standard_T == pstDVBTxScanInfo->eTxStandard)
{
r |= AVL6882_RD_REG8(priv, 0x8f0 + rs_DVBTx_hierarchy_caddr_offset,&ucTemp0);
}
else if(AVL_DVBTx_Standard_T2 == pstDVBTxScanInfo->eTxStandard)
{
r |= AVL6882_RD_REG8(priv,0x800 + rs_DVBTx_P1_S2_field_2_caddr_offset, &ucTemp1);
r |= AVL6882_RD_REG8(priv, 0x800 + rs_DVBTx_T2_profile_caddr_offset, &ucTemp0);
}
pstDVBTxScanInfo->ucTxInfo = ucTemp0;
pstDVBTxScanInfo->ucFEFInfo = ucTemp1;
return r;
}
static int AVL_Demod_DVBT2GetPLPList(struct avl6882_priv *priv, AVL_puchar pucPLPIndexArray, AVL_puchar pucPLPNumber)
{
int r = AVL_EC_OK;
u32 ucTemp = 0;
u32 uiPLPBuffer = 0x2912b4;
u32 ucPLPID = 0;
u32 ucPLPType = 0;
u32 ucPLPGroupID = 0;
u32 i = 0;
u8 ucDataPLPNum = 0;
u32 uiDelayMS = 20;
u32 uiTimes = 10; //time-out window 10*20 = 200ms
enum fe_status ucDemodLockStatus = 0;
r = avl6882_read_status(&priv->frontend, &ucDemodLockStatus);
if (ucDemodLockStatus == 0) {
*pucPLPNumber = 0;
return r;
}
for(i = 0; i < uiTimes; i++)
{
msleep(uiDelayMS);
r |= AVL6882_RD_REG8(priv,0x800 + rs_DVBTx_plp_list_request_caddr_offset, &ucTemp);
if(ucTemp == 0)
{
break;
}
}
if(i == uiTimes)
{
r |= AVL_EC_GENERAL_FAIL;
return (r);
}
r |= AVL6882_RD_REG8(priv,0x830 + rs_DVBTx_NUM_PLP_caddr_offset, &ucTemp);
for(i = 0; i<ucTemp; i++)
{
r |= AVL6882_RD_REG8(priv,uiPLPBuffer++, &ucPLPID);
r |= AVL6882_RD_REG8(priv,uiPLPBuffer++, &ucPLPType);
r |= AVL6882_RD_REG8(priv,uiPLPBuffer++, &ucPLPGroupID);
if(ucPLPType != 0)
{
*(pucPLPIndexArray + ucDataPLPNum) = ucPLPID;
ucDataPLPNum++;
}
}
*pucPLPNumber = ucDataPLPNum;
return (r);
}
static int avl6882_set_dvbt(struct dvb_frontend *fe)
{
u32 Freq_Khz = c->frequency/1000;
u16 BandWidth_Khz = c->bandwidth_hz/1000;
int return_code = AVL_EC_OK;
AVL_DVBTxScanInfo stDVBTxScanInfo;
AVL_DVBTxBandWidth nBand = AVL_DVBTx_BW_8M;
u16 cur_index = 0;
u8 ucLockFlag = 0;
AVL_DVBT2_PROFILE ucT2Profile = AVL_DVBT2_PROFILE_UNKNOWN;
u8 ucDataPLPArray[255] = {0};
u8 ucDataPLPNumber = 0;
u16 i;
printk("[AVL_ChannelScan_Tx] Freq is %d MHz BW is %d MHz \n",
Freq_Khz/1000, BandWidth_Khz/1000);
priv->g_nChannel_ts_total = 0;
//=====Tuner Lock=====//
return_code = r848_lock_n_wait(priv, Freq_Khz, c->bandwidth_hz);
//=====Demod Lock=====//
nBand = Convert2DemodBand(BandWidth_Khz);
return_code = AVL_Demod_DVBTxChannelScan(priv, nBand, AVL_DVBTx_LockMode_ALL);
//=====Check Lock Status =====//
avl6882_demod_lock_wait(priv, &ucLockFlag);
if(ucLockFlag == 1) { //DVBTx is locked
return_code |= AVL_Demod_DVBTxGetScanInfo(priv, &stDVBTxScanInfo);
if(stDVBTxScanInfo.eTxStandard == AVL_DVBTx_Standard_T2) {
//get PLP ID list only for DVBT2 signal, not for DVBT
cur_index = priv->g_nChannel_ts_total;
return_code = AVL_Demod_DVBT2GetPLPList(priv, ucDataPLPArray, &ucDataPLPNumber);
for (i = 0; i < ucDataPLPNumber; i++) {
printk("[DVB-T2_Scan_Info] DATA PLP ID is %d, profile = %d\n",
ucDataPLPArray[i], stDVBTxScanInfo.ucTxInfo);
//save channel RF frequency
priv->global_channel_ts_table[cur_index].channel_freq_khz = Freq_Khz;
// save channel bandwidth
priv->global_channel_ts_table[cur_index].channel_bandwith_khz = BandWidth_Khz;
// save data plp id
priv->global_channel_ts_table[cur_index].data_plp_id = ucDataPLPArray[i];
// 0 - DVBT; 1 - DVBT2.
priv->global_channel_ts_table[cur_index].channel_type = AVL_DVBTx_Standard_T2;
// 0 - Base profile; 1 - Lite profile.
priv->global_channel_ts_table[cur_index].channel_profile = (AVL_DVBT2_PROFILE)stDVBTxScanInfo.ucTxInfo;
cur_index++;
}
priv->g_nChannel_ts_total = cur_index % MAX_CHANNEL_INFO;
if (stDVBTxScanInfo.ucFEFInfo == 1) {
ucT2Profile = (AVL_DVBT2_PROFILE) stDVBTxScanInfo.ucTxInfo;
if (ucT2Profile == AVL_DVBT2_PROFILE_BASE) {
//profile is base
//If T2 base is locked, try to lock T2 lite
AVL_Demod_DVBTxChannelScan(priv, nBand, AVL_DVBTx_LockMode_T2LITE);
ucT2Profile = AVL_DVBT2_PROFILE_LITE;
} else {
//If T2 lite is locked, try to lock T2 base
AVL_Demod_DVBTxChannelScan(priv, nBand, AVL_DVBTx_LockMode_T2BASE);
ucT2Profile = AVL_DVBT2_PROFILE_BASE;
}
avl6882_demod_lock_wait(priv, &ucLockFlag);
if (ucLockFlag == 1) {
//DVBTx is locked
cur_index = priv->g_nChannel_ts_total;
ucDataPLPNumber = 0;
return_code = AVL_Demod_DVBT2GetPLPList(priv, ucDataPLPArray, &ucDataPLPNumber);
// data PLP ID and common PLP ID pairing
for (i = 0; i < ucDataPLPNumber; i++) {
printk("[DVB-T2_Scan_Info] DATA PLP ID is %d, profile = %d\n",
ucDataPLPArray[i], ucT2Profile);
//save channel RF frequency
priv->global_channel_ts_table[cur_index].channel_freq_khz = Freq_Khz;
// save channel bandwidth
priv->global_channel_ts_table[cur_index].channel_bandwith_khz = BandWidth_Khz;
// save data plp id
priv->global_channel_ts_table[cur_index].data_plp_id = ucDataPLPArray[i];
// 0 - DVBT; 1 - DVBT2.
priv->global_channel_ts_table[cur_index].channel_type = AVL_DVBTx_Standard_T2;
// 0 - Base profile; 1 - Lite profile.
priv->global_channel_ts_table[cur_index].channel_profile = ucT2Profile;
cur_index++;
}
priv->g_nChannel_ts_total = cur_index % MAX_CHANNEL_INFO;
}
} else {
printk("Lock DVB-T2: No FEFInfo\n");
}
} else {
// DVBT
cur_index = priv->g_nChannel_ts_total;
// save channel RF frequency
priv->global_channel_ts_table[cur_index].channel_freq_khz = Freq_Khz;
// save channel bandwidth
priv->global_channel_ts_table[cur_index].channel_bandwith_khz = BandWidth_Khz;
// save data plp id(not used for DVBT, set to 0xff)
priv->global_channel_ts_table[cur_index].data_plp_id = 0;
// 0 - DVBT; 1 - DVBT2.
priv->global_channel_ts_table[cur_index].channel_type = AVL_DVBTx_Standard_T;
// 0 - Low priority layer, 1 - High priority layer
priv->global_channel_ts_table[cur_index].dvbt_hierarchy_layer = 1;
cur_index++;
if(stDVBTxScanInfo.ucTxInfo == 1) {
// for hierarchy
// save channel RF frequency
priv->global_channel_ts_table[cur_index].channel_freq_khz = Freq_Khz;
// save channel bandwidth
priv->global_channel_ts_table[cur_index].channel_bandwith_khz = BandWidth_Khz;
// save data plp id(not used for DVBT, set to 0xff)
priv->global_channel_ts_table[cur_index].data_plp_id = 0;
// 0 - DVBT; 1 - DVBT2.
priv->global_channel_ts_table[cur_index].channel_type = AVL_DVBTx_Standard_T;
// 0 - Low priority layer, 1 - High priority layer
priv->global_channel_ts_table[cur_index].dvbt_hierarchy_layer = 0;
cur_index++;
}
priv->g_nChannel_ts_total = cur_index % MAX_CHANNEL_INFO;
}
} else {
// return for unlock
printk("[DVBTx_ScanChannel_Tx] DVBTx channel scan is fail,Err.\n");
}
/* lock channel */
for(i = 0; i < priv->g_nChannel_ts_total; i++) {
ucLockFlag = 0;
if(priv->global_channel_ts_table[i].channel_type == AVL_DVBTx_Standard_T) {
//DVB-T signal..
AVL_LockChannel_T(priv, Freq_Khz, BandWidth_Khz, priv->global_channel_ts_table[i].dvbt_hierarchy_layer);
} else if (priv->global_channel_ts_table[i].channel_type == AVL_DVBTx_Standard_T2) {
//DVB-T2 signal, do not process FEF...
AVL_LockChannel_T2(priv, Freq_Khz, BandWidth_Khz,priv->global_channel_ts_table[i].channel_profile, priv->global_channel_ts_table[i].data_plp_id);
}
avl6882_demod_lock_wait(priv, &ucLockFlag);
}
return return_code;
}
int AVL_Demod_DVBSx_Diseqc_SendTone( struct avl6882_priv *priv,u8 ucTone, u8 ucCount)
{
int r = 0;
u32 i1 = 0;
u32 i2 = 0;
//u8 pucBuffTemp[8] = {0};
u8 Continuousflag = 0;
u16 uiTempOutTh = 0;
if( ucCount>8 )
{
r = AVL_EC_WARNING;
}
else
{
if (priv->config->eDiseqcStatus == AVL_DOS_InContinuous)
{
r |= AVL6882_RD_REG32(priv,0x16c000 + hw_diseqc_tx_cntrl_offset, &i1);
if ((i1>>10) & 0x01)
{
Continuousflag = 1;
i1 &= 0xfffff3ff;
r |= AVL6882_WR_REG32(priv,0x16c000 + hw_diseqc_tx_cntrl_offset, i1);
msleep(Diseqc_delay); //delay 20ms
}
}
//No data in the FIFO.
r |= AVL6882_RD_REG32(priv,0x16c000 + hw_diseqc_tx_cntrl_offset, &i1);
i1 &= 0xfffffff8; //put it into the FIFO load mode.
if( 0 == ucTone )
{
i1 |= 0x01;
}
else
{
i1 |= 0x02;
}
r |= AVL6882_WR_REG32(priv,0x16c000 + hw_diseqc_tx_cntrl_offset, i1);
for (i2 = 0; i2 < ucCount; i2++) {
r |= AVL6882_WR_REG32(priv, 0x16c000 + hw_tx_fifo_map_offset, 1);
}
#if 0
//trunk address
ChunkAddr_Demod(0x16c000 + hw_tx_fifo_map_offset, pucBuffTemp);
pucBuffTemp[3] = 0;
pucBuffTemp[4] = 0;
pucBuffTemp[5] = 0;
pucBuffTemp[6] = 1;
for( i2=0; i2<ucCount; i2++ )
{
r |= II2C_Write_Demod(priv, pucBuffTemp, 7);
}
#endif
i1 |= (1<<2); //start fifo transmit.
r |= AVL6882_WR_REG32(priv,0x16c000 + hw_diseqc_tx_cntrl_offset, i1);
if( AVL_EC_OK == r )
{
priv->config->eDiseqcStatus = AVL_DOS_InTone;
}
do
{
msleep(1);
if (++uiTempOutTh > 500)
{
r |= AVL_EC_TIMEOUT;
return(r);
}
r = AVL6882_RD_REG32(priv,0x16c000 + hw_diseqc_tx_st_offset, &i1);
} while ( 1 != ((i1 & 0x00000040) >> 6) );
msleep(Diseqc_delay); //delay 20ms
if (Continuousflag == 1) //resume to send out wave
{
//No data in FIFO
r |= AVL6882_RD_REG32(priv,0x16c000 + hw_diseqc_tx_cntrl_offset, &i1);
i1 &= 0xfffffff8;
i1 |= 0x03; //switch to continuous mode
r |= AVL6882_WR_REG32(priv,0x16c000 + hw_diseqc_tx_cntrl_offset, i1);
//start to send out wave
i1 |= (1<<10);
r |= AVL6882_WR_REG32(priv,0x16c000 + hw_diseqc_tx_cntrl_offset, i1);
}
}
return (r);
}
#endif
#if 0
int AVL_Demod_DVBSxManualLock( struct avl6882_priv *priv,AVL_DVBSxManualLockInfo *pstManualLockInfo)
{
int r = AVL_EC_OK;
AVL_FunctionalMode eFuncMode = AVL_FuncMode_BlindScan;
r = AVL_Demod_DVBSx_GetFunctionalMode(priv,&eFuncMode);
if(eFuncMode == AVL_FuncMode_Demod)
{
r |= AVL6882_WR_REG16(priv,0xc00 + rs_DVBSx_fec_lock_saddr_offset, 0);
r |= AVL6882_WR_REG16(priv,0xe00 + rc_DVBSx_fec_bypass_coderate_saddr_offset, 1);//DVBS manual lock
if (pstManualLockInfo->eDVBSxStandard == AVL_DVBS )
{
r |= AVL6882_WR_REG32(priv, 0xe00 + rc_DVBSx_dvbs_fec_coderate_iaddr_offset, pstManualLockInfo->eDVBSCodeRate);
}
else if(pstManualLockInfo->eDVBSxStandard == AVL_DVBS2 )
{
r |= AVL6882_WR_REG16(priv, 0xe00 + rc_DVBSx_dvbs2_code_rate_saddr_offset, pstManualLockInfo->eDVBS2CodeRate);
r |= AVL6882_WR_REG16(priv, 0xe00 + rc_DVBSx_dvbs2_modulation_saddr_offset, pstManualLockInfo->eDVBSxModulationMode);
}
else
{
return AVL_EC_NOT_SUPPORTED;
}
r |= AVL6882_WR_REG16(priv, 0xe00 + rc_DVBSx_decode_mode_saddr_offset, pstManualLockInfo->eDVBSxStandard);
if(pstManualLockInfo->eDVBSxSpecInversion == AVL_SPECTRUM_AUTO)
{
r |= AVL6882_WR_REG16(priv, 0xe00 + rc_DVBSx_iq_mode_saddr_offset, 1);//enable spectrum auto detection
}
else
{
r |= AVL6882_WR_REG32(priv, 0xe00 + rc_DVBSx_specinv_iaddr_offset, pstManualLockInfo->eDVBSxSpecInversion);
r |= AVL6882_WR_REG16(priv, 0xe00 + rc_DVBSx_iq_mode_saddr_offset, 0);
}
r |= AVL6882_WR_REG32(priv, 0xe00 + rc_DVBSx_int_sym_rate_MHz_iaddr_offset, pstManualLockInfo->uiDVBSxSymbolRateSps);
r |= avl6882_exec_n_wait(priv,AVL_FW_CMD_ACQUIRE );
}
else if(eFuncMode == AVL_FuncMode_BlindScan)
{
return AVL_EC_NOT_SUPPORTED;
}
return (r);
}
int AVL_Demod_DVBSxGetModulationInfo( struct avl6882_priv *priv,AVL_DVBSxModulationInfo *pstModulationInfo)
{
int r = AVL_EC_OK;
u32 uiTemp = 0;
u32 temp_uchar = 0;
r = AVL6882_RD_REG32(priv, 0xc00 + rs_DVBSx_pilot_iaddr_offset, &uiTemp);
pstModulationInfo->eDVBSxPilot = (AVL_DVBSx_Pilot)(uiTemp);
r |= AVL6882_RD_REG32(priv, 0xe00 + rc_DVBSx_internal_decode_mode_iaddr_offset,&uiTemp);
pstModulationInfo->eDVBSxStandard = (AVL_DVBSx_Standard)uiTemp;
if(AVL_DVBS == (AVL_DVBSx_Standard)uiTemp)
{
r |= AVL6882_RD_REG32(priv, 0xe00 + rc_DVBSx_dvbs_fec_coderate_iaddr_offset,&uiTemp);
pstModulationInfo->eDVBSCodeRate = (AVL_DVBS_CodeRate)(uiTemp);
}
else
{
r |= AVL6882_RD_REG8(priv, 0xe00 + rc_DVBSx_dvbs2_fec_coderate_caddr_offset,&temp_uchar);
pstModulationInfo->eDVBS2CodeRate = (AVL_DVBS2_CodeRate)(temp_uchar);
}
r |= AVL6882_RD_REG32(priv, 0xc00 + rs_DVBSx_modulation_iaddr_offset, &uiTemp);
pstModulationInfo->eDVBSxModulationMode = (AVL_DVBSx_ModulationMode)(uiTemp);
r |= AVL6882_RD_REG32(priv, 0xc00 + rs_DVBSx_detected_alpha_iaddr_offset, &uiTemp);
pstModulationInfo->eDVBSxRollOff = (AVL_DVBSx_RollOff)(uiTemp);
return (r);
}
int AVL_Demod_DVBSx_BlindScan_Start( struct avl6882_priv *priv,AVL_BlindScanPara * pBSPara, u16 uiTunerLPF_100kHz)
{
int r = AVL_EC_OK;
u16 uiCarrierFreq_100kHz = 0;
u16 uiMinSymRate = 0;
AVL_FunctionalMode enumFunctionalMode = AVL_FuncMode_Demod;
r = AVL_Demod_DVBSx_GetFunctionalMode(priv,&enumFunctionalMode);
if (enumFunctionalMode == AVL_FuncMode_BlindScan) {
r |= AVL6882_WR_REG16(priv,0xe00 + rc_DVBSx_tuner_LPF_100kHz_saddr_offset, uiTunerLPF_100kHz);
r |= AVL6882_WR_REG16(priv,0xe00 + rc_DVBSx_blind_scan_tuner_spectrum_inversion_saddr_offset, pBSPara->m_enumBSSpectrumPolarity);
uiMinSymRate = pBSPara->m_uiMinSymRate_kHz - 200; // give some tolerance
if (uiMinSymRate < 800) //Blind scan doesn't support symbol rate less then 1M, give 200K margin
{
uiMinSymRate = 800;
}
if( pBSPara->m_uiStartFreq_100kHz < pBSPara->m_uiStopFreq_100kHz )
{
if( AVL_EC_OK == r )
{
uiCarrierFreq_100kHz = ((pBSPara->m_uiStopFreq_100kHz)+(pBSPara->m_uiStartFreq_100kHz))>>1;
r |= AVL6882_WR_REG16(priv,0xe00 + rc_DVBSx_tuner_frequency_100kHz_saddr_offset, uiCarrierFreq_100kHz);
r |= AVL6882_WR_REG16(priv,0xe00 + rc_DVBSx_blind_scan_min_sym_rate_kHz_saddr_offset, uiMinSymRate);
r |= AVL6882_WR_REG16(priv,0xe00 + rc_DVBSx_blind_scan_max_sym_rate_kHz_saddr_offset, (pBSPara->m_uiMaxSymRate_kHz)+200);
r |= AVL6882_WR_REG16(priv,0xe00 + rc_DVBSx_blind_scan_start_freq_100kHz_saddr_offset, (pBSPara->m_uiStartFreq_100kHz));
r |= AVL6882_WR_REG16(priv,0xe00 + rc_DVBSx_blind_scan_end_freq_100kHz_saddr_offset, (pBSPara->m_uiStopFreq_100kHz));
if( AVL_EC_OK == r )
{
r = avl6882_exec_n_wait(priv,AVL_FW_CMD_BLIND_SCAN);
}
}
}
else
{
r = AVL_EC_GENERAL_FAIL;
}
}
else
{
r = AVL_EC_GENERAL_FAIL;
}
return (r);
}
#endif
#if 0
// need fix read data size
int AVL_Demod_DVBSx_BlindScan_GetStatus( struct avl6882_priv *priv,AVL_BSInfo * pBSInfo)
{
int r = AVL_EC_OK;
r = AVL6882_RD_REG16(priv,0xc00 + rs_DVBSx_blind_scan_progress_saddr_offset, &(pBSInfo->m_uiProgress));
r |= AVL6882_RD_REG16(priv,0xc00 + rs_DVBSx_blind_scan_channel_count_saddr_offset, &(pBSInfo->m_uiChannelCount));
r |= AVL6882_RD_REG16(priv,0xe00 + rc_DVBSx_blind_scan_start_freq_100kHz_saddr_offset, &(pBSInfo->m_uiNextStartFreq_100kHz));
r |= AVL6882_RD_REG16(priv,0xc00 + rs_DVBSx_blind_scan_error_code_saddr_offset, &(pBSInfo->m_uiResultCode));
if( pBSInfo->m_uiProgress > 100 )
{
pBSInfo->m_uiProgress = 0;
}
return(r);
}
int AVL_Demod_DVBSx_BlindScan_Cancel( struct avl6882_priv *priv )
{
int r;
enum AVL_FunctionalMode enumFunctionalMode = AVL_FuncMode_Demod;
r = AVL_Demod_DVBSx_GetFunctionalMode(priv,&enumFunctionalMode);
if(enumFunctionalMode == AVL_FuncMode_BlindScan)
{
r |= avl6882_exec_n_wait(priv,AVL_FW_CMD_HALT);
}
else
{
r = AVL_EC_GENERAL_FAIL;
}
return(r);
}
int AVL_Demod_DVBSx_BlindScan_ReadChannelInfo( struct avl6882_priv *priv,u16 uiStartIndex, AVL_puint16 pChannelCount, AVL_ChannelInfo * pChannel)
{
int r = 0;
u32 channel_addr = 0;
u16 i1 = 0;
u16 i2 = 0;
u32 uiMinFreq = 0;
u16 iMinIdx = 0;
AVL_ChannelInfo sTempChannel;
r = AVL6882_RD_REG16(priv,0xc00 + rs_DVBSx_blind_scan_channel_count_saddr_offset, &i1);
if( (uiStartIndex + (*pChannelCount)) > (i1) )
{
*pChannelCount = i1-uiStartIndex;
}
r |= AVL6882_RD_REG16(priv,0xe00 + rc_DVBSx_blind_scan_channel_info_offset_saddr_offset, &i1);
channel_addr = 0x200C00 + uiStartIndex*sizeof(AVL_ChannelInfo);
for( i1=0; i1<(*pChannelCount); i1++ )
{
#if 1 //for some processors which can not read 12 bytes
//dump the channel information
r |= AVL6882_RD_REG32(priv, channel_addr, &(pChannel[i1].m_uiFrequency_kHz));
channel_addr += 4;
r |= AVL6882_RD_REG32(priv, channel_addr, &(pChannel[i1].m_uiSymbolRate_Hz));
channel_addr += 4;
r |= AVL6882_RD_REG32(priv, channel_addr, &(pChannel[i1].m_Flags));
channel_addr += 4;
#endif
}
// Sort the results
for(i1=0; i1<(*pChannelCount); i1++)
{
iMinIdx = i1;
uiMinFreq = pChannel[i1].m_uiFrequency_kHz;
for(i2=(i1+1); i2<(*pChannelCount); i2++)
{
if(pChannel[i2].m_uiFrequency_kHz < uiMinFreq)
{
uiMinFreq = pChannel[i2].m_uiFrequency_kHz;
iMinIdx = i2;
}
}
sTempChannel = pChannel[iMinIdx];
pChannel[iMinIdx] = pChannel[i1];
pChannel[i1] = sTempChannel;
}
return(r);
}
int AVL_Demod_DVBSx_BlindScan_Reset( struct avl6882_priv *priv )
{
return AVL6882_WR_REG16(priv,0xe00 + rc_DVBSx_blind_scan_reset_saddr_offset, 1);
}
int AVL_Demod_DVBSx_SetFunctionalMode( struct avl6882_priv *priv,AVL_FunctionalMode enumFunctionalMode )
{
int r = AVL_EC_OK;
r = AVL6882_WR_REG16(priv,0xe00 + rc_DVBSx_functional_mode_saddr_offset, (u16)enumFunctionalMode);
r |= AVL6882_WR_REG16(priv,0xe00 + rc_DVBSx_iq_mode_saddr_offset,0);
return(r);
}
int AVL_Demod_DVBSx_SetDishPointingMode( struct avl6882_priv *priv,AVL_Switch enumOn_Off)
{
int r = AVL_EC_OK;
AVL_FunctionalMode enumFunctionalMode = AVL_FuncMode_BlindScan;
r |= AVL_Demod_DVBSx_GetFunctionalMode(priv,&enumFunctionalMode);
if(enumFunctionalMode == AVL_FuncMode_Demod)
{
if(enumOn_Off == AVL_ON)
{
r |= AVL6882_WR_REG16(priv,0xe00 + rc_DVBSx_aagc_acq_gain_saddr_offset, 12);
r |= AVL6882_WR_REG16(priv,0xe00 + rc_DVBSx_dishpoint_mode_saddr_offset, 1);
}
else
{
r |= AVL6882_WR_REG16(priv,0xe00 + rc_DVBSx_aagc_acq_gain_saddr_offset, 10);
r |= AVL6882_WR_REG16(priv,0xe00 + rc_DVBSx_dishpoint_mode_saddr_offset, 0);
}
}
else
{
r = AVL_EC_GENERAL_FAIL;
}
return(r);
}
#endif
#if 0
int AVL_Demod_GetVersion( struct avl6882_priv *priv,AVL_DemodVersion *pstDemodVersion)
{
int r = AVL_EC_OK;
u32 uiTemp = 0;
u8 ucBuff[4] = {0};
r = AVL6882_RD_REG32(priv,0x40000, &uiTemp);
if( AVL_EC_OK == r )
{
pstDemodVersion->uiChip = uiTemp;
}
r |= AVL6882_RD_REG32(priv,0x0a4 + rs_patch_ver_iaddr_offset, &uiTemp);
if( AVL_EC_OK == r )
{
Chunk32_Demod(uiTemp, ucBuff);
pstDemodVersion->stPatch.ucMajor = ucBuff[0];
pstDemodVersion->stPatch.ucMinor = ucBuff[1];
pstDemodVersion->stPatch.usBuild = ucBuff[2];
pstDemodVersion->stPatch.usBuild = ((u16)((pstDemodVersion->stPatch.usBuild)<<8)) + ucBuff[3];
}
return r;
}
#endif

View File

@@ -3219,7 +3219,7 @@ struct dvb_frontend* mndmd_attach(struct mndmd_config* config,
return &state->frontend;
}
EXPORT_SYMBOL(mndmd_attach);
EXPORT_SYMBOL_GPL(mndmd_attach);
MODULE_DESCRIPTION("mn88436 qamb atsc demodulator driver");
MODULE_AUTHOR("Georg Acher, Bob Liu, Igor liplianin");
MODULE_LICENSE("GPL");

View File

@@ -473,4 +473,3 @@ MODULE_DESCRIPTION("DVB Frontend module for Tmax TAS2101");
MODULE_AUTHOR("Luis Alves (ljalvs@gmail.com)");
MODULE_LICENSE("GPL");
MODULE_VERSION("1.0");

View File

@@ -178,7 +178,6 @@ static struct dvb_frontend_ops tbs_ops = {
};
struct dvb_frontend *tbs_attach(struct i2c_adapter*i2c,
struct tbs_cfg*cfg,
u32 demod)
@@ -210,10 +209,8 @@ struct dvb_frontend *tbs_attach(struct i2c_adapter*i2c,
return &state->fe;
}
EXPORT_SYMBOL_GPL(tbs_attach);
MODULE_DESCRIPTION("TBS private virtual demodulator driver");
MODULE_AUTHOR("Davin zhang(Davin@tbsdtv.com)");
MODULE_LICENSE("GPL");
EXPORT_SYMBOL(tbs_attach);

View File

@@ -295,7 +295,7 @@ struct dvb_frontend *av201x_attach(struct dvb_frontend *fe,
fe->tuner_priv = priv;
return fe;
}
EXPORT_SYMBOL(av201x_attach);
EXPORT_SYMBOL_GPL(av201x_attach);
MODULE_DESCRIPTION("Airoha Technology AV201x silicon tuner driver");
MODULE_AUTHOR("Luis Alves <ljalvs@gmail.com>");

View File

@@ -3529,7 +3529,8 @@ struct dvb_frontend *r848_attach(struct dvb_frontend *fe,
fe->tuner_priv = priv;
return fe;
}
EXPORT_SYMBOL(r848_attach);
EXPORT_SYMBOL_GPL(r848_attach);
MODULE_DESCRIPTION("Rafael R848 silicon tuner driver");
MODULE_AUTHOR("Luis Alves <ljalvs@gmail.com>");

View File

@@ -501,8 +501,7 @@ struct dvb_frontend *rda5816_attach(struct dvb_frontend *fe,
return fe;
}
EXPORT_SYMBOL(rda5816_attach);
EXPORT_SYMBOL_GPL(rda5816_attach);
MODULE_DESCRIPTION("RDA 5816 tuner driver");
MODULE_AUTHOR("Davin<smiledavin@gmail.com>");

View File

@@ -2175,7 +2175,7 @@ err:
kfree(tda18273);
return NULL;
}
EXPORT_SYMBOL(tda18273_attach);
EXPORT_SYMBOL_GPL(tda18273_attach);
MODULE_AUTHOR("Manu Abraham");
MODULE_DESCRIPTION("TDA18273 Silicon tuner");