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Merge tag 'vfio-v6.5-rc1' of https://github.com/awilliam/linux-vfio
Pull VFIO updates from Alex Williamson: - Adjust log levels for common messages (Oleksandr Natalenko, Alex Williamson) - Support for dynamic MSI-X allocation (Reinette Chatre) - Enable and report PCIe AtomicOp Completer capabilities (Alex Williamson) - Cleanup Kconfigs for vfio bus drivers (Alex Williamson) - Add support for CDX bus based devices (Nipun Gupta) - Fix race with concurrent mdev initialization (Eric Farman) * tag 'vfio-v6.5-rc1' of https://github.com/awilliam/linux-vfio: vfio/mdev: Move the compat_class initialization to module init vfio/cdx: add support for CDX bus vfio/fsl: Create Kconfig sub-menu vfio/platform: Cleanup Kconfig vfio/pci: Cleanup Kconfig vfio/pci-core: Add capability for AtomicOp completer support vfio/pci: Also demote hiding standard cap messages vfio/pci: Clear VFIO_IRQ_INFO_NORESIZE for MSI-X vfio/pci: Support dynamic MSI-X vfio/pci: Probe and store ability to support dynamic MSI-X vfio/pci: Use bitfield for struct vfio_pci_core_device flags vfio/pci: Update stale comment vfio/pci: Remove interrupt context counter vfio/pci: Use xarray for interrupt context storage vfio/pci: Move to single error path vfio/pci: Prepare for dynamic interrupt context storage vfio/pci: Remove negative check on unsigned vector vfio/pci: Consolidate irq cleanup on MSI/MSI-X disable vfio/pci: demote hiding ecap messages to debug level
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@@ -213,6 +213,7 @@ struct vfio_device_info {
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#define VFIO_DEVICE_FLAGS_AP (1 << 5) /* vfio-ap device */
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#define VFIO_DEVICE_FLAGS_FSL_MC (1 << 6) /* vfio-fsl-mc device */
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#define VFIO_DEVICE_FLAGS_CAPS (1 << 7) /* Info supports caps */
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#define VFIO_DEVICE_FLAGS_CDX (1 << 8) /* vfio-cdx device */
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__u32 num_regions; /* Max region index + 1 */
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__u32 num_irqs; /* Max IRQ index + 1 */
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__u32 cap_offset; /* Offset within info struct of first cap */
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@@ -240,6 +241,20 @@ struct vfio_device_info {
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#define VFIO_DEVICE_INFO_CAP_ZPCI_UTIL 3
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#define VFIO_DEVICE_INFO_CAP_ZPCI_PFIP 4
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/*
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* The following VFIO_DEVICE_INFO capability reports support for PCIe AtomicOp
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* completion to the root bus with supported widths provided via flags.
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*/
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#define VFIO_DEVICE_INFO_CAP_PCI_ATOMIC_COMP 5
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struct vfio_device_info_cap_pci_atomic_comp {
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struct vfio_info_cap_header header;
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__u32 flags;
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#define VFIO_PCI_ATOMIC_COMP32 (1 << 0)
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#define VFIO_PCI_ATOMIC_COMP64 (1 << 1)
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#define VFIO_PCI_ATOMIC_COMP128 (1 << 2)
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__u32 reserved;
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};
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/**
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* VFIO_DEVICE_GET_REGION_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 8,
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* struct vfio_region_info)
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@@ -511,6 +526,9 @@ struct vfio_region_info_cap_nvlink2_lnkspd {
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* then add and unmask vectors, it's up to userspace to make the decision
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* whether to allocate the maximum supported number of vectors or tear
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* down setup and incrementally increase the vectors as each is enabled.
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* Absence of the NORESIZE flag indicates that vectors can be enabled
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* and disabled dynamically without impacting other vectors within the
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* index.
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*/
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struct vfio_irq_info {
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__u32 argsz;
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