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drm/i915: Add RPL-U sub platform

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Separate out RPLU device ids and add them to both RPL and
newly created RPL-U subplatforms.

v2: (Matt)
    - Sort PCI-IDs numerically
    - Name the sub-platform to accurately depict what it is for
    - Make RPL-U part of RPL subplatform

v3: revert to RPL-U subplatform (Jani)

v4: (Jani)
    - Add RPL-U ids to RPL-P platform
    - Remove redundant comment

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230130100806.1373883-2-chaitanya.kumar.borah@intel.com
This commit is contained in:
Chaitanya Kumar Borah
2023-01-30 15:38:05 +05:30
committed by Jani Nikula
parent c50ad291e4
commit 61b795a9c3
4 changed files with 18 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/i915/i915_drv.h
View File

@@ -580,6 +580,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_N) IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_N)
#define IS_ADLP_RPLP(dev_priv) \ #define IS_ADLP_RPLP(dev_priv) \
IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL) IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
#define IS_ADLP_RPLU(dev_priv) \
IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPLU)
#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \ #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
(INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00) (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
#define IS_BDW_ULT(dev_priv) \ #define IS_BDW_ULT(dev_priv) \

7
drivers/gpu/drm/i915/intel_device_info.c
View File

@@ -207,6 +207,10 @@ static const u16 subplatform_rpl_ids[] = {
INTEL_RPLP_IDS(0), INTEL_RPLP_IDS(0),
}; };
static const u16 subplatform_rplu_ids[] = {
INTEL_RPLU_IDS(0),
};
static const u16 subplatform_g10_ids[] = { static const u16 subplatform_g10_ids[] = {
INTEL_DG2_G10_IDS(0), INTEL_DG2_G10_IDS(0),
INTEL_ATS_M150_IDS(0), INTEL_ATS_M150_IDS(0),
@@ -274,6 +278,9 @@ static void intel_device_info_subplatform_init(struct drm_i915_private *i915)
} else if (find_devid(devid, subplatform_rpl_ids, } else if (find_devid(devid, subplatform_rpl_ids,
ARRAY_SIZE(subplatform_rpl_ids))) { ARRAY_SIZE(subplatform_rpl_ids))) {
mask = BIT(INTEL_SUBPLATFORM_RPL); mask = BIT(INTEL_SUBPLATFORM_RPL);
if (find_devid(devid, subplatform_rplu_ids,
ARRAY_SIZE(subplatform_rplu_ids)))
mask |= BIT(INTEL_SUBPLATFORM_RPLU);
} else if (find_devid(devid, subplatform_g10_ids, } else if (find_devid(devid, subplatform_g10_ids,
ARRAY_SIZE(subplatform_g10_ids))) { ARRAY_SIZE(subplatform_g10_ids))) {
mask = BIT(INTEL_SUBPLATFORM_G10); mask = BIT(INTEL_SUBPLATFORM_G10);

1
drivers/gpu/drm/i915/intel_device_info.h
View File

@@ -127,6 +127,7 @@ enum intel_platform {
* bit set * bit set
*/ */
#define INTEL_SUBPLATFORM_N 1 #define INTEL_SUBPLATFORM_N 1
#define INTEL_SUBPLATFORM_RPLU 2
/* MTL */ /* MTL */
#define INTEL_SUBPLATFORM_M 0 #define INTEL_SUBPLATFORM_M 0

12
include/drm/i915_pciids.h
View File

@@ -685,14 +685,18 @@
INTEL_VGA_DEVICE(0xA78A, info), \ INTEL_VGA_DEVICE(0xA78A, info), \
INTEL_VGA_DEVICE(0xA78B, info) INTEL_VGA_DEVICE(0xA78B, info)
/* RPL-U */
#define INTEL_RPLU_IDS(info) \
INTEL_VGA_DEVICE(0xA721, info), \
INTEL_VGA_DEVICE(0xA7A1, info), \
INTEL_VGA_DEVICE(0xA7A9, info)
/* RPL-P */ /* RPL-P */
#define INTEL_RPLP_IDS(info) \ #define INTEL_RPLP_IDS(info) \
INTEL_RPLU_IDS(info), \
INTEL_VGA_DEVICE(0xA720, info), \ INTEL_VGA_DEVICE(0xA720, info), \
INTEL_VGA_DEVICE(0xA721, info), \
INTEL_VGA_DEVICE(0xA7A0, info), \ INTEL_VGA_DEVICE(0xA7A0, info), \
INTEL_VGA_DEVICE(0xA7A1, info), \ INTEL_VGA_DEVICE(0xA7A8, info)
INTEL_VGA_DEVICE(0xA7A8, info), \
INTEL_VGA_DEVICE(0xA7A9, info)
/* DG2 */ /* DG2 */
#define INTEL_DG2_G10_IDS(info) \ #define INTEL_DG2_G10_IDS(info) \