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Merge tag 'kvmarm-fixes-5.12-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/arm64 fixes for 5.12, take #3 - Fix GICv3 MMIO compatibility probing - Prevent guests from using the ARMv8.4 self-hosted tracing extension
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@@ -278,6 +278,7 @@
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#define CPTR_EL2_DEFAULT CPTR_EL2_RES1
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#define CPTR_EL2_DEFAULT CPTR_EL2_RES1
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/* Hyp Debug Configuration Register bits */
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/* Hyp Debug Configuration Register bits */
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#define MDCR_EL2_TTRF (1 << 19)
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#define MDCR_EL2_TPMS (1 << 14)
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#define MDCR_EL2_TPMS (1 << 14)
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#define MDCR_EL2_E2PB_MASK (UL(0x3))
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#define MDCR_EL2_E2PB_MASK (UL(0x3))
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#define MDCR_EL2_E2PB_SHIFT (UL(12))
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#define MDCR_EL2_E2PB_SHIFT (UL(12))
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@@ -383,7 +383,6 @@ static const struct arm64_ftr_bits ftr_id_aa64dfr0[] = {
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* of support.
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* of support.
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*/
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*/
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S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_EXACT, ID_AA64DFR0_PMUVER_SHIFT, 4, 0),
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S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_EXACT, ID_AA64DFR0_PMUVER_SHIFT, 4, 0),
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ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_EXACT, ID_AA64DFR0_TRACEVER_SHIFT, 4, 0),
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ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_EXACT, ID_AA64DFR0_DEBUGVER_SHIFT, 4, 0x6),
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ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_EXACT, ID_AA64DFR0_DEBUGVER_SHIFT, 4, 0x6),
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ARM64_FTR_END,
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ARM64_FTR_END,
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};
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};
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@@ -89,6 +89,7 @@ void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu)
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* - Debug ROM Address (MDCR_EL2_TDRA)
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* - Debug ROM Address (MDCR_EL2_TDRA)
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* - OS related registers (MDCR_EL2_TDOSA)
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* - OS related registers (MDCR_EL2_TDOSA)
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* - Statistical profiler (MDCR_EL2_TPMS/MDCR_EL2_E2PB)
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* - Statistical profiler (MDCR_EL2_TPMS/MDCR_EL2_E2PB)
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* - Self-hosted Trace Filter controls (MDCR_EL2_TTRF)
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*
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*
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* Additionally, KVM only traps guest accesses to the debug registers if
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* Additionally, KVM only traps guest accesses to the debug registers if
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* the guest is not actively using them (see the KVM_ARM64_DEBUG_DIRTY
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* the guest is not actively using them (see the KVM_ARM64_DEBUG_DIRTY
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@@ -112,6 +113,7 @@ void kvm_arm_setup_debug(struct kvm_vcpu *vcpu)
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vcpu->arch.mdcr_el2 = __this_cpu_read(mdcr_el2) & MDCR_EL2_HPMN_MASK;
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vcpu->arch.mdcr_el2 = __this_cpu_read(mdcr_el2) & MDCR_EL2_HPMN_MASK;
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vcpu->arch.mdcr_el2 |= (MDCR_EL2_TPM |
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vcpu->arch.mdcr_el2 |= (MDCR_EL2_TPM |
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MDCR_EL2_TPMS |
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MDCR_EL2_TPMS |
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MDCR_EL2_TTRF |
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MDCR_EL2_TPMCR |
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MDCR_EL2_TPMCR |
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MDCR_EL2_TDRA |
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MDCR_EL2_TDRA |
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MDCR_EL2_TDOSA);
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MDCR_EL2_TDOSA);
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@@ -429,6 +429,13 @@ u64 __vgic_v3_get_gic_config(void)
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if (has_vhe())
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if (has_vhe())
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flags = local_daif_save();
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flags = local_daif_save();
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/*
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* Table 11-2 "Permitted ICC_SRE_ELx.SRE settings" indicates
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* that to be able to set ICC_SRE_EL1.SRE to 0, all the
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* interrupt overrides must be set. You've got to love this.
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*/
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sysreg_clear_set(hcr_el2, 0, HCR_AMO | HCR_FMO | HCR_IMO);
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isb();
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write_gicreg(0, ICC_SRE_EL1);
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write_gicreg(0, ICC_SRE_EL1);
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isb();
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isb();
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@@ -436,6 +443,8 @@ u64 __vgic_v3_get_gic_config(void)
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write_gicreg(sre, ICC_SRE_EL1);
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write_gicreg(sre, ICC_SRE_EL1);
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isb();
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isb();
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sysreg_clear_set(hcr_el2, HCR_AMO | HCR_FMO | HCR_IMO, 0);
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isb();
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if (has_vhe())
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if (has_vhe())
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local_daif_restore(flags);
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local_daif_restore(flags);
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