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clk: qcom: gcc-sm8350: add gdsc

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Add the GDSC found in GCC for SM8350 SoC

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210210161649.431741-1-vkoul@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Vinod Koul
2021-02-10 21:46:49 +05:30
committed by Stephen Boyd
parent e16831bf40
commit 3fade948fb
2 changed files with 112 additions and 0 deletions
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12
include/dt-bindings/clock/qcom,gcc-sm8350.h
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@@ -251,4 +251,16 @@
#define GCC_VIDEO_AXI1_CLK_ARES 36
#define GCC_VIDEO_BCR 37
/* GCC power domains */
#define PCIE_0_GDSC 0
#define PCIE_1_GDSC 1
#define UFS_CARD_GDSC 2
#define UFS_PHY_GDSC 3
#define USB30_PRIM_GDSC 4
#define USB30_SEC_GDSC 5
#define HLOS1_VOTE_MMNOC_MMU_TBU_HF0_GDSC 6
#define HLOS1_VOTE_MMNOC_MMU_TBU_HF1_GDSC 7
#define HLOS1_VOTE_MMNOC_MMU_TBU_SF0_GDSC 8
#define HLOS1_VOTE_MMNOC_MMU_TBU_SF1_GDSC 9
#endif