virt: acrn: Introduce interfaces to query C-states and P-states allowed by hypervisor

The C-states and P-states data are used to support CPU power management.
The hypervisor controls C-states and P-states for a User VM.

ACRN userspace need to query the data from the hypervisor to build ACPI
tables for a User VM.

HSM provides ioctls for ACRN userspace to query C-states and P-states
data obtained from the hypervisor.

Cc: Zhi Wang <zhi.a.wang@intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Yu Wang <yu1.wang@intel.com>
Cc: Reinette Chatre <reinette.chatre@intel.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
Signed-off-by: Shuo Liu <shuo.a.liu@intel.com>
Link: https://lore.kernel.org/r/20210207031040.49576-14-shuo.a.liu@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Shuo Liu
2021-02-07 11:10:35 +08:00
committed by Greg Kroah-Hartman
parent c7cf8d2724
commit 3d679d5aec
3 changed files with 136 additions and 0 deletions

View File

@@ -427,6 +427,58 @@ struct acrn_msi_entry {
__u64 msi_data;
};
struct acrn_acpi_generic_address {
__u8 space_id;
__u8 bit_width;
__u8 bit_offset;
__u8 access_size;
__u64 address;
} __attribute__ ((__packed__));
/**
* struct acrn_cstate_data - A C state package defined in ACPI
* @cx_reg: Register of the C state object
* @type: Type of the C state object
* @latency: The worst-case latency to enter and exit this C state
* @power: The average power consumption when in this C state
*/
struct acrn_cstate_data {
struct acrn_acpi_generic_address cx_reg;
__u8 type;
__u32 latency;
__u64 power;
};
/**
* struct acrn_pstate_data - A P state package defined in ACPI
* @core_frequency: CPU frequency (in MHz).
* @power: Power dissipation (in milliwatts).
* @transition_latency: The worst-case latency in microseconds that CPU is
* unavailable during a transition from any P state to
* this P state.
* @bus_master_latency: The worst-case latency in microseconds that Bus Masters
* are prevented from accessing memory during a transition
* from any P state to this P state.
* @control: The value to be written to Performance Control Register
* @status: Transition status.
*/
struct acrn_pstate_data {
__u64 core_frequency;
__u64 power;
__u64 transition_latency;
__u64 bus_master_latency;
__u64 control;
__u64 status;
};
#define PMCMD_TYPE_MASK 0x000000ff
enum acrn_pm_cmd_type {
ACRN_PMCMD_GET_PX_CNT,
ACRN_PMCMD_GET_PX_DATA,
ACRN_PMCMD_GET_CX_CNT,
ACRN_PMCMD_GET_CX_DATA,
};
/* The ioctl type, documented in ioctl-number.rst */
#define ACRN_IOCTL_TYPE 0xA2
@@ -478,4 +530,7 @@ struct acrn_msi_entry {
#define ACRN_IOCTL_DEASSIGN_PCIDEV \
_IOW(ACRN_IOCTL_TYPE, 0x56, struct acrn_pcidev)
#define ACRN_IOCTL_PM_GET_CPU_STATE \
_IOWR(ACRN_IOCTL_TYPE, 0x60, __u64)
#endif /* _UAPI_ACRN_H */