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Merge tag 'pwm/for-5.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

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Pull pwm updates from Thierry Reding:
 "The ZTE ZX platform is being removed, so the PWM driver is no longer
  needed and removed as well.

  Other than that this contains a small set of fixes and cleanups across
  a couple of drivers"

* tag 'pwm/for-5.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
  pwm: lpc18xx-sct: remove unneeded semicolon
  pwm: iqs620a: Correct a stale state variable
  pwm: iqs620a: Fix overflow and optimize calculations
  pwm: rockchip: Enable clock before calling clk_get_rate()
  pwm: rockchip: Eliminate potential race condition when probing
  pwm: rockchip: Replace "bus clk" with "PWM clk"
  pwm: rockchip: rockchip_pwm_probe(): Remove superfluous clk_unprepare()
  pwm: rockchip: Enable APB clock during register access while probing
  pwm: Remove ZTE ZX driver
This commit is contained in:
Linus Torvalds
2021-02-25 12:23:49 -08:00
parent ffc1759676 9a9dd7e473
commit 2c87f7a38f
7 changed files with 65 additions and 374 deletions
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22
Documentation/devicetree/bindings/pwm/pwm-zx.txt
View File

@@ -1,22 +0,0 @@
ZTE ZX PWM controller
Required properties:
- compatible: Should be "zte,zx296718-pwm".
- reg: Physical base address and length of the controller's registers.
- clocks : The phandle and specifier referencing the controller's clocks.
- clock-names: "pclk" for PCLK, "wclk" for WCLK to the PWM controller. The
PCLK is for register access, while WCLK is the reference clock for
calculating period and duty cycles.
- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
the cells format.
Example:
pwm: pwm@1439000 {
compatible = "zte,zx296718-pwm";
reg = <0x1439000 0x1000>;
clocks = <&lsp1crm LSP1_PWM_PCLK>,
<&lsp1crm LSP1_PWM_WCLK>;
clock-names = "pclk", "wclk";
#pwm-cells = <3>;
};