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x86,amd_iommu: Replace cmpxchg_double()

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Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Vasant Hegde <vasant.hegde@amd.com>
Tested-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20230531132323.788955257@infradead.org
This commit is contained in:
Peter Zijlstra
2023-05-31 15:08:41 +02:00
parent 8664645ade
commit 0a0a6800b0
2 changed files with 11 additions and 8 deletions
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5
drivers/iommu/amd/amd_iommu_types.h
View File

@@ -986,9 +986,14 @@ union irte_ga_hi {
};
struct irte_ga {
union {
struct {
union irte_ga_lo lo;
union irte_ga_hi hi;
};
u128 irte;
};
};
struct irq_2_irte {
u16 devid; /* Device ID for IRTE table */

10
drivers/iommu/amd/iommu.c
View File

@@ -3003,10 +3003,10 @@ out:
static int modify_irte_ga(struct amd_iommu *iommu, u16 devid, int index,
struct irte_ga *irte, struct amd_ir_data *data)
{
bool ret;
struct irq_remap_table *table;
unsigned long flags;
struct irte_ga *entry;
unsigned long flags;
u128 old;
table = get_irq_table(iommu, devid);
if (!table)
@@ -3017,16 +3017,14 @@ static int modify_irte_ga(struct amd_iommu *iommu, u16 devid, int index,
entry = (struct irte_ga *)table->table;
entry = &entry[index];
ret = cmpxchg_double(&entry->lo.val, &entry->hi.val,
entry->lo.val, entry->hi.val,
irte->lo.val, irte->hi.val);
/*
* We use cmpxchg16 to atomically update the 128-bit IRTE,
* and it cannot be updated by the hardware or other processors
* behind us, so the return value of cmpxchg16 should be the
* same as the old value.
*/
WARN_ON(!ret);
old = entry->irte;
WARN_ON(!try_cmpxchg128(&entry->irte, &old, irte->irte));
if (data)
data->ref = entry;