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[AMD][Zen][UMC] Computes DIMM ranks based on DDR type

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CyrIng
2025-05-12 17:13:28 +02:00
parent 347045ed17
commit fcc0e0f70e
1 changed files with 3 additions and 1 deletions
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4
x86_64/corefreqd.c
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@@ -6604,9 +6604,11 @@ void AMD_17h_UMC(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc))
+ RO(Proc)->Uncore.MC[mc].Channel[cha].DIMM[slot].AMD17h.DAC.NumCol); + RO(Proc)->Uncore.MC[mc].Channel[cha].DIMM[slot].AMD17h.DAC.NumCol);
RO(Shm)->Uncore.MC[mc].Channel[cha].DIMM[slot].Ranks = \ RO(Shm)->Uncore.MC[mc].Channel[cha].DIMM[slot].Ranks = \
RO(Proc)->Uncore.MC[mc].Channel[cha].AMD17h.CONFIG.DdrType == 0 ?
RO(Proc)->Uncore.MC[mc].Channel[cha].DIMM[ RO(Proc)->Uncore.MC[mc].Channel[cha].DIMM[
slot slot
].AMD17h.CFG.OnDimmMirror ? 2 : 1; ].AMD17h.CFG.OnDimmMirror ? 2 : 1
: 2; /* DDR5 */
DIMM_Size = 8LLU; DIMM_Size = 8LLU;
DIMM_Size *= RO(Shm)->Uncore.MC[mc].Channel[cha].DIMM[slot].Banks; DIMM_Size *= RO(Shm)->Uncore.MC[mc].Channel[cha].DIMM[slot].Banks;