ich777/CoreFreq
1
0
Fork 0
mirror of https://github.com/cyring/CoreFreq.git synced 2025-07-23 20:20:40 +02:00
Code Issues Packages Projects Releases Wiki Activity

[Build] Changed some inline function prototypes

Browse Source
This commit is contained in:
CyrIng
2025-02-23 08:05:03 +01:00
parent cb9fc92098
commit f314201943
3 changed files with 19 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
Makefile
View File

@@ -4,7 +4,7 @@
COREFREQ_MAJOR = 2 COREFREQ_MAJOR = 2
COREFREQ_MINOR = 0 COREFREQ_MINOR = 0
COREFREQ_REV = 1 COREFREQ_REV = 2
HW = $(shell uname -m) HW = $(shell uname -m)
CC ?= cc CC ?= cc
WARNING ?= -Wall -Wfatal-errors WARNING ?= -Wall -Wfatal-errors

12
aarch64/corefreqk.c
View File

@@ -2464,7 +2464,7 @@ static void Compute_ACPI_CPPC_Bounds(unsigned int cpu)
} }
} }
inline signed int Disable_ACPI_CPPC(unsigned int cpu, void *arg) static signed int Disable_ACPI_CPPC(unsigned int cpu, void *arg)
{ {
#if defined(CONFIG_ACPI_CPPC_LIB) \ #if defined(CONFIG_ACPI_CPPC_LIB) \
&& LINUX_VERSION_CODE >= KERNEL_VERSION(5, 17, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 17, 0)
@@ -2483,7 +2483,7 @@ inline signed int Disable_ACPI_CPPC(unsigned int cpu, void *arg)
return rc; return rc;
} }
inline signed int Enable_ACPI_CPPC(unsigned int cpu, void *arg) static signed int Enable_ACPI_CPPC(unsigned int cpu, void *arg)
{ {
#if defined(CONFIG_ACPI_CPPC_LIB) \ #if defined(CONFIG_ACPI_CPPC_LIB) \
&& LINUX_VERSION_CODE >= KERNEL_VERSION(5, 17, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 17, 0)
@@ -3657,7 +3657,7 @@ static void Generic_Core_Counters_Clear(union SAVE_AREA_CORE *Save,
}) })
#ifdef CONFIG_CPU_FREQ #ifdef CONFIG_CPU_FREQ
inline COF_ST Compute_COF_From_CPU_Freq(struct cpufreq_policy *pFreqPolicy) static COF_ST Compute_COF_From_CPU_Freq(struct cpufreq_policy *pFreqPolicy)
{ {
COF_ST ratio; COF_ST ratio;
FREQ2COF(pFreqPolicy->cur, ratio); FREQ2COF(pFreqPolicy->cur, ratio);
@@ -3665,7 +3665,7 @@ inline COF_ST Compute_COF_From_CPU_Freq(struct cpufreq_policy *pFreqPolicy)
} }
#endif /* CONFIG_CPU_FREQ */ #endif /* CONFIG_CPU_FREQ */
inline COF_ST Compute_COF_From_PMU_Counter( unsigned long long deltaCounter, static COF_ST Compute_COF_From_PMU_Counter( unsigned long long deltaCounter,
CLOCK clk, CLOCK clk,
COF_ST lowestRatio ) COF_ST lowestRatio )
{ {
@@ -5474,7 +5474,7 @@ static struct file_operations CoreFreqK_fops = {
}; };
#ifdef CONFIG_PM_SLEEP #ifdef CONFIG_PM_SLEEP
inline void Print_SuspendResume(void) static void Print_SuspendResume(void)
{ {
pr_notice("CoreFreq: %s(%u:%d:%d)\n", pr_notice("CoreFreq: %s(%u:%d:%d)\n",
CoreFreqK.ResumeFromSuspend ? "Suspend" : "Resume", CoreFreqK.ResumeFromSuspend ? "Suspend" : "Resume",
@@ -5816,7 +5816,7 @@ static void SMBIOS_Entries(const struct dmi_header *dh, void *priv)
#undef safe_strim #undef safe_strim
#endif /* CONFIG_DMI */ #endif /* CONFIG_DMI */
inline void SMBIOS_Decoder(void) static void SMBIOS_Decoder(void)
{ {
#ifdef CONFIG_DMI #ifdef CONFIG_DMI
size_t count = 0; size_t count = 0;

24
x86_64/corefreqk.c
View File

@@ -4143,7 +4143,7 @@ static void Compute_ACPI_CPPC_Bounds(unsigned int cpu)
} }
} }
inline signed int Disable_ACPI_CPPC(unsigned int cpu, void *arg) static signed int Disable_ACPI_CPPC(unsigned int cpu, void *arg)
{ {
#if defined(CONFIG_ACPI_CPPC_LIB) \ #if defined(CONFIG_ACPI_CPPC_LIB) \
&& LINUX_VERSION_CODE >= KERNEL_VERSION(5, 17, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 17, 0)
@@ -4162,7 +4162,7 @@ inline signed int Disable_ACPI_CPPC(unsigned int cpu, void *arg)
return rc; return rc;
} }
inline signed int Enable_ACPI_CPPC(unsigned int cpu, void *arg) static signed int Enable_ACPI_CPPC(unsigned int cpu, void *arg)
{ {
#if defined(CONFIG_ACPI_CPPC_LIB) \ #if defined(CONFIG_ACPI_CPPC_LIB) \
&& LINUX_VERSION_CODE >= KERNEL_VERSION(5, 17, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 17, 0)
@@ -7999,7 +7999,7 @@ static void Query_AMD_Family_14h(unsigned int cpu)
HyperThreading_Technology(); HyperThreading_Technology();
} }
inline unsigned int AMD_F15h_CoreCOF(unsigned int FID, unsigned int DID) static unsigned int AMD_F15h_CoreCOF(unsigned int FID, unsigned int DID)
{/* CoreCOF (MHz) = 100 * (CpuFid[5:0] + 10h) / (2 ^ CpuDid) */ {/* CoreCOF (MHz) = 100 * (CpuFid[5:0] + 10h) / (2 ^ CpuDid) */
unsigned int COF = (FID + 0x10) / (1 << DID); unsigned int COF = (FID + 0x10) / (1 << DID);
@@ -8098,7 +8098,7 @@ static void Query_AMD_Family_15h(unsigned int cpu)
Default_Unlock_Reset(); Default_Unlock_Reset();
} }
inline COF_ST AMD_Zen_CoreCOF(PSTATEDEF PStateDef) static COF_ST AMD_Zen_CoreCOF(PSTATEDEF PStateDef)
{ {
unsigned long remainder; unsigned long remainder;
COF_ST COF; COF_ST COF;
@@ -8133,7 +8133,7 @@ inline COF_ST AMD_Zen_CoreCOF(PSTATEDEF PStateDef)
return COF; return COF;
} }
inline unsigned short AMD_Zen_Compute_FID_DID( unsigned int COF, static unsigned short AMD_Zen_Compute_FID_DID( unsigned int COF,
unsigned int *FID, unsigned int *FID,
unsigned int *DID ) unsigned int *DID )
{ {
@@ -8151,7 +8151,7 @@ inline unsigned short AMD_Zen_Compute_FID_DID( unsigned int COF,
} }
} }
inline unsigned short AMD_Zen5_Compute_FID( unsigned int COF, static unsigned short AMD_Zen5_Compute_FID( unsigned int COF,
unsigned int *FID ) unsigned int *FID )
{ {
unsigned int tmp = (COF << 1) * 10; unsigned int tmp = (COF << 1) * 10;
@@ -8478,7 +8478,7 @@ OutOfMemory:
} }
} }
inline unsigned short CPPC_AMD_Zen_ScaleRatio( CORE_RO *Core, static unsigned short CPPC_AMD_Zen_ScaleRatio( CORE_RO *Core,
unsigned int scale, unsigned int scale,
unsigned short hint, unsigned short hint,
unsigned short CPB ) unsigned short CPB )
@@ -8499,7 +8499,7 @@ inline unsigned short CPPC_AMD_Zen_ScaleRatio( CORE_RO *Core,
return scaled; return scaled;
} }
inline unsigned int CPPC_AMD_Zen_ScaleHint( CORE_RO *Core, static unsigned int CPPC_AMD_Zen_ScaleHint( CORE_RO *Core,
unsigned int scale, unsigned int scale,
signed int ratio, signed int ratio,
unsigned short CPB ) unsigned short CPB )
@@ -11672,7 +11672,7 @@ struct CSTATES_ENCODING_ST {
}; };
#define MAKE_TOGGLE_CSTATE_FUNC( _type, _feature, _parameter ) \ #define MAKE_TOGGLE_CSTATE_FUNC( _type, _feature, _parameter ) \
inline unsigned int Toggle_CState_##_feature( _type *pConfigRegister, \ static unsigned int Toggle_CState_##_feature( _type *pConfigRegister, \
typeof(_parameter) _parameter) \ typeof(_parameter) _parameter) \
{ \ { \
switch ( _parameter ) \ switch ( _parameter ) \
@@ -20136,7 +20136,7 @@ static void Cycle_AMD_Family_17h(CORE_RO *Core,
BITSET(LOCKLESS, PUBLIC(RW(Core, AT(Core->Bind)))->Sync.V, NTFY); BITSET(LOCKLESS, PUBLIC(RW(Core, AT(Core->Bind)))->Sync.V, NTFY);
} }
inline void SoC_RAPL(AMD_17_SVI SVI, const unsigned long long factor) static void SoC_RAPL(AMD_17_SVI SVI, const unsigned long long factor)
{ {
unsigned long long VCC, ICC, ACCU; unsigned long long VCC, ICC, ACCU;
/* PLATFORM RAPL workaround to provide the SoC power */ /* PLATFORM RAPL workaround to provide the SoC power */
@@ -23687,7 +23687,7 @@ static struct file_operations CoreFreqK_fops = {
}; };
#ifdef CONFIG_PM_SLEEP #ifdef CONFIG_PM_SLEEP
inline void Print_SuspendResume(void) static void Print_SuspendResume(void)
{ {
pr_notice("CoreFreq: %s(%u:%d:%d)\n", pr_notice("CoreFreq: %s(%u:%d:%d)\n",
CoreFreqK.ResumeFromSuspend ? "Suspend" : "Resume", CoreFreqK.ResumeFromSuspend ? "Suspend" : "Resume",
@@ -24037,7 +24037,7 @@ static void SMBIOS_Entries(const struct dmi_header *dh, void *priv)
#undef safe_strim #undef safe_strim
#endif /* CONFIG_DMI */ #endif /* CONFIG_DMI */
inline void SMBIOS_Decoder(void) static void SMBIOS_Decoder(void)
{ {
#ifdef CONFIG_DMI #ifdef CONFIG_DMI
size_t count = 0; size_t count = 0;