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[aarch64] Drop Experimental guard to safely read ID_AA64MMFR3_EL1

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CyrIng
2025-06-14 08:43:01 +02:00
parent f16141f14c
commit efb383dd5a
1 changed files with 12 additions and 7 deletions
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19
aarch64/corefreqk.c
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@@ -3047,13 +3047,6 @@ static void SystemRegisters(CORE_RO *Core)
} else { } else {
BITCLR_CC(BUS_LOCK, PUBLIC(RW(Proc))->VM, Core->Bind); BITCLR_CC(BUS_LOCK, PUBLIC(RW(Proc))->VM, Core->Bind);
} }
Core->Query.SCTLRX = 0;
if (Experimental) {
volatile AA64MMFR3 mmfr3 = {.value = SysRegRead(ID_AA64MMFR3_EL1)};
if ((Core->Query.SCTLRX = mmfr3.SCTLRX) == 0b0001) {
Core->SystemRegister.SCTLR2 = SysRegRead(SCTLR2_EL1);
}
}
if (PUBLIC(RO(Proc))->Features.DIT) { if (PUBLIC(RO(Proc))->Features.DIT) {
Core->SystemRegister.FLAGS |= ( Core->SystemRegister.FLAGS |= (
SysRegRead(MRS_DIT) & (1LLU << FLAG_DIT) SysRegRead(MRS_DIT) & (1LLU << FLAG_DIT)
@@ -3173,6 +3166,18 @@ static void SystemRegisters(CORE_RO *Core)
: :
: "cc", "memory" : "cc", "memory"
); );
Core->Query.SCTLRX = 0;
if ((PUBLIC(RO(Proc))->Features.FGT == 0)
&& (BITEXTRZ(Core->SystemRegister.HCR, HYPCR_TID3, 1) == 0))
{
volatile AA64MMFR3 mmfr3 = {
.value = SysRegRead(ID_AA64MMFR3_EL1)
};
if ((Core->Query.SCTLRX = mmfr3.SCTLRX) == 0b0001) {
Core->SystemRegister.SCTLR2 = SysRegRead(SCTLR2_EL1);
}
}
} }
__asm__ __volatile__( __asm__ __volatile__(
"mrs %[cpacr], cpacr_el1" "mrs %[cpacr], cpacr_el1"