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[AMD] Add missing DCU and XPROC_LEAK bitmasks on legacy processors

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CyrIng
2025-06-23 19:36:46 +02:00
parent 396c8dc7ce
commit deb3da7f00
2 changed files with 9 additions and 3 deletions
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6
x86_64/corefreq-api.h
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@@ -929,9 +929,9 @@ typedef struct
BitCC TM_Mask __attribute__ ((aligned (16)));
BitCC ODCM_Mask __attribute__ ((aligned (16)));
BitCC DCU_Mask __attribute__ ((aligned (16)));
BitCC L1_Scrub_Mask __attribute__ ((aligned (16)));
BitCC L2_AMP_Mask __attribute__ ((aligned (16)));
BitCC ECORE_Mask __attribute__ ((aligned (16)));
BitCC /* Intel */ L1_Scrub_Mask __attribute__ ((aligned (16)));
BitCC /* Intel */ L2_AMP_Mask __attribute__ ((aligned (16)));
BitCC /* Intel */ ECORE_Mask __attribute__ ((aligned (16)));
BitCC PowerMgmt_Mask __attribute__ ((aligned (16)));
BitCC SpeedStep_Mask __attribute__ ((aligned (16)));
BitCC TurboBoost_Mask __attribute__ ((aligned (16)));

6
x86_64/corefreqk.c
View File

@@ -13154,6 +13154,7 @@ static void PerCore_AuthenticAMD_Query(void *arg)
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->TM_Mask , Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->ODCM_Mask , Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->DCU_Mask , Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->PowerMgmt_Mask, Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->SpeedStep_Mask, Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->TurboBoost_Mask,Core->Bind);
@@ -13171,6 +13172,7 @@ static void PerCore_AuthenticAMD_Query(void *arg)
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->ARCH_CAP_Mask , Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->BTC_NOBR_Mask , Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->WDT_Mask, Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->XPROC_LEAK_Mask, Core->Bind);
}
static void PerCore_Core2_Query(void *arg)
@@ -14089,6 +14091,7 @@ static void PerCore_AMD_Family_0Fh_Query(void *arg)
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->TM_Mask , Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->ODCM_Mask , Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->DCU_Mask , Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->PowerMgmt_Mask, Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->SpeedStep_Mask, Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->TurboBoost_Mask,Core->Bind);
@@ -14105,6 +14108,7 @@ static void PerCore_AMD_Family_0Fh_Query(void *arg)
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->ARCH_CAP_Mask , Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->BTC_NOBR_Mask , Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->WDT_Mask, Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->XPROC_LEAK_Mask, Core->Bind);
}
static void PerCore_AMD_Family_Same_Query(void *arg)
@@ -14125,6 +14129,7 @@ static void PerCore_AMD_Family_Same_Query(void *arg)
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->TM_Mask , Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->ODCM_Mask , Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->DCU_Mask , Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->PowerMgmt_Mask, Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->SpeedStep_Mask, Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->TurboBoost_Mask,Core->Bind);
@@ -14141,6 +14146,7 @@ static void PerCore_AMD_Family_Same_Query(void *arg)
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->ARCH_CAP_Mask , Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->BTC_NOBR_Mask , Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->WDT_Mask, Core->Bind);
BITSET_CC(BUS_LOCK, PUBLIC(RO(Proc))->XPROC_LEAK_Mask, Core->Bind);
}
static void PerCore_AMD_Family_10h_Query(void *arg)