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[aarch64] Display the presence of the DynamIQ Shared Unit (DSU)

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CyrIng
2025-06-07 16:29:25 +02:00
parent a0dd03153f
commit 4cdca0e8f1
7 changed files with 22 additions and 5 deletions
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3
aarch64/corefreq-cli-rsc-en.h
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@@ -541,7 +541,8 @@
#define RSC_LAYOUT_FOOTER_TECH_ARM_CODE_EN \ #define RSC_LAYOUT_FOOTER_TECH_ARM_CODE_EN \
{ \ { \
'T','e','c','h',' ','[',' ',' ','T','S','C',' ',' ',',', \ 'T','e','c','h',' ','[',' ',' ','T','S','C',' ',' ',',', \
'S','M','T',',','b','i','g','.','L','I','T','T','L','E',']' \ 'S','M','T',',','b','i','g','.','L','I','T','T','L','E',',', \
'D','S','U',',','C','M','N',']' \
} }
#define RSC_LAYOUT_FOOTER_VOLT_TEMP_CODE_EN \ #define RSC_LAYOUT_FOOTER_VOLT_TEMP_CODE_EN \

3
aarch64/corefreq-cli-rsc-theme-dflt.h
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@@ -1201,7 +1201,8 @@
#define RSC_LAYOUT_FOOTER_TECH_ARM_THM_DFLT_ATTR \ #define RSC_LAYOUT_FOOTER_TECH_ARM_THM_DFLT_ATTR \
{ \ { \
LWK,LWK,LWK,LWK,LWK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,LWK, \ LWK,LWK,LWK,LWK,LWK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,LWK, \
HDK,HDK,HDK,LWK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK \ HDK,HDK,HDK,LWK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,LWK, \
HDK,HDK,HDK,LWK,HDK,HDK,HDK,HDK \
} }
#define RSC_LAYOUT_FOOTER_VOLT_TEMP_THM_DFLT_ATTR \ #define RSC_LAYOUT_FOOTER_VOLT_TEMP_THM_DFLT_ATTR \

3
aarch64/corefreq-cli-rsc-theme-usr1.h
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@@ -1201,7 +1201,8 @@
#define RSC_LAYOUT_FOOTER_TECH_ARM_THM_USR1_ATTR \ #define RSC_LAYOUT_FOOTER_TECH_ARM_THM_USR1_ATTR \
{ \ { \
HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW, \ HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW, \
HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW \ HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW, \
HKW,HKW,HKW,HKW,HKW,HKW,HKW,HKW \
} }
#define RSC_LAYOUT_FOOTER_VOLT_TEMP_THM_USR1_ATTR \ #define RSC_LAYOUT_FOOTER_VOLT_TEMP_THM_USR1_ATTR \

3
aarch64/corefreq-cli-rsc-theme-usr2.h
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@@ -1201,7 +1201,8 @@
#define RSC_LAYOUT_FOOTER_TECH_ARM_THM_USR2_ATTR \ #define RSC_LAYOUT_FOOTER_TECH_ARM_THM_USR2_ATTR \
{ \ { \
LWK,LWK,LWK,LWK,LWK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,LWK, \ LWK,LWK,LWK,LWK,LWK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,LWK, \
HDK,HDK,HDK,LWK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK \ HDK,HDK,HDK,LWK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,HDK,LWK, \
HDK,HDK,HDK,LWK,HDK,HDK,HDK,HDK \
} }
#define RSC_LAYOUT_FOOTER_VOLT_TEMP_THM_USR2_ATTR \ #define RSC_LAYOUT_FOOTER_VOLT_TEMP_THM_USR2_ATTR \

6
aarch64/corefreq-cli.c
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@@ -14263,6 +14263,12 @@ void Layout_Footer(Layer *layer, CUINT row)
hTech0.attr[22] = hTech0.attr[23] = hTech0.attr[24] = hTech0.attr[25] =\ hTech0.attr[22] = hTech0.attr[23] = hTech0.attr[24] = hTech0.attr[25] =\
/* L E */ /* L E */
hTech0.attr[26] = hTech0.attr[27] = EN[RO(Shm)->Proc.Features.Hybrid]; hTech0.attr[26] = hTech0.attr[27] = EN[RO(Shm)->Proc.Features.Hybrid];
/* D S U */
hTech0.attr[29] = hTech0.attr[30] = hTech0.attr[31] = \
EN[RO(Shm)->Proc.Features.DSU];
/* C M N */
hTech0.attr[33] = hTech0.attr[34] = hTech0.attr[35] = \
EN[RO(Shm)->Proc.Features.CMN];
LayerCopyAt( layer, hTech0.origin.col, hTech0.origin.row, LayerCopyAt( layer, hTech0.origin.col, hTech0.origin.row,
hTech0.length, hTech0.attr, hTech0.code ); hTech0.length, hTech0.attr, hTech0.code );

5
aarch64/corefreqd.c
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@@ -766,6 +766,11 @@ void Uncore_Update( RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc),
memcpy( RO(Shm)->Uncore.Boost, memcpy( RO(Shm)->Uncore.Boost,
RO(Proc)->Uncore.Boost, RO(Proc)->Uncore.Boost,
(UNCORE_BOOST(SIZE)) * sizeof(COF_ST) ); (UNCORE_BOOST(SIZE)) * sizeof(COF_ST) );
/* If both cluster registers are implemented then DSU is present */
if (RO(Proc)->Uncore.ClusterCfg.value != 0
&& RO(Proc)->Uncore.ClusterRev.value != 0) {
RO(Shm)->Proc.Features.DSU = 1;
}
} }
void Topology(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc), RO(CORE) **RO(Core), void Topology(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc), RO(CORE) **RO(Core),

4
aarch64/coretypes.h
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@@ -1065,7 +1065,9 @@ typedef struct /* BSP features. */
OSPM_EPP : 55-54, OSPM_EPP : 55-54,
ACPI_CST_CAP : 56-55, ACPI_CST_CAP : 56-55,
ACPI_CST : 60-56, /* 15 CState sub-packages */ ACPI_CST : 60-56, /* 15 CState sub-packages */
_Unused2_ : 64-60; DSU : 61-60,
CMN : 62-61,
_Unused2_ : 64-62;
}; };
struct struct
{ {