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[AMD][Zen5/Strix Halo] Probe Memory Controller from DID 0x12b8

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This commit is contained in:
CyrIng
2025-07-10 11:21:01 +02:00
parent d0775f73c2
commit 1a7d0751b0
3 changed files with 8 additions and 0 deletions
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2
x86_64/corefreq-api.h
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@@ -1646,3 +1646,5 @@ typedef struct
/* Source: lspci - Ryzen AI 9 HX 370 */ /* Source: lspci - Ryzen AI 9 HX 370 */
#define DID_AMD_1AH_ZEN5_STX_IOMMU 0x1508 /* Strix Point */ #define DID_AMD_1AH_ZEN5_STX_IOMMU 0x1508 /* Strix Point */
#define DID_AMD_1AH_STX_DF_UMC 0x16f8 /* Strix Point */ #define DID_AMD_1AH_STX_DF_UMC 0x16f8 /* Strix Point */
/* Source: lspci - RYZEN AI MAX+ 395 */
#define DID_AMD_1AH_STXH_DF_UMC 0x12b8 /* Strix Halo */

1
x86_64/corefreqd.c
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@@ -7711,6 +7711,7 @@ void PCI_AMD(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc), RO(CORE) *RO(Core),
case DID_AMD_19H_PHOENIX_DF_UMC: case DID_AMD_19H_PHOENIX_DF_UMC:
case DID_AMD_1AH_TURIN_DF_UMC: case DID_AMD_1AH_TURIN_DF_UMC:
case DID_AMD_1AH_STX_DF_UMC: case DID_AMD_1AH_STX_DF_UMC:
case DID_AMD_1AH_STXH_DF_UMC:
AMD_17h_UMC(RO(Shm), RO(Proc)); AMD_17h_UMC(RO(Shm), RO(Proc));
AMD_17h_CAP(RO(Shm), RO(Proc), RO(Core)); AMD_17h_CAP(RO(Shm), RO(Proc), RO(Core));
SET_CHIPSET(IC_ZEN); SET_CHIPSET(IC_ZEN);

5
x86_64/corefreqk.h
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@@ -3517,6 +3517,11 @@ static struct pci_device_id PCI_AMD_17h_ids[] = {
PCI_VDEVICE(AMD, DID_AMD_1AH_STX_DF_UMC), PCI_VDEVICE(AMD, DID_AMD_1AH_STX_DF_UMC),
.driver_data = (kernel_ulong_t) AMD_DataFabric_Strix_Point .driver_data = (kernel_ulong_t) AMD_DataFabric_Strix_Point
}, },
/* Strix Halo */
{
PCI_VDEVICE(AMD, DID_AMD_1AH_STXH_DF_UMC),
.driver_data = (kernel_ulong_t) AMD_DataFabric_Strix_Point
},
{0, } {0, }
}; };