ich777/CoreFreq
1
0
Fork 0
mirror of https://github.com/cyring/CoreFreq.git synced 2025-07-23 20:20:40 +02:00
Code Issues Packages Projects Releases Wiki Activity

[aarch64] Assign DSU-RTL version according to detected ARM arch.

Browse Source
This commit is contained in:
CyrIng
2025-06-09 21:48:10 +02:00
parent 63b9b9c8f4
commit 0f682fef43
2 changed files with 18 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
aarch64/corefreqd.c
View File

@@ -683,9 +683,7 @@ void Technology_Update( RO(SHM_STRUCT) *RO(Shm),
RW(Proc)->VM,
RO(Proc)->CR_Mask) != 0;
/* If both cluster registers are implemented then DSU is present */
if ((RO(Proc)->Uncore.ClusterCfg.value != 0
&& RO(Proc)->Uncore.ClusterRev.value != 0)
|| RO(Proc)->Uncore.DSU_Type != DSU_NONE) {
if (RO(Proc)->Uncore.DSU_Type != DSU_NONE) {
RO(Shm)->Proc.Technology.DSU = 1;
}
if (RO(Proc)->Uncore.CMN_Type != CMN_NONE) {

19
aarch64/corefreqk.c
View File

@@ -2871,13 +2871,28 @@ static void Query_DynamIQ(unsigned int cpu)
{
Query_GenericMachine(cpu);
if (PUBLIC(RO(Proc))->HypervisorID == BARE_METAL) {
if (PUBLIC(RO(Proc))->HypervisorID == BARE_METAL) {
/* Query the Cluster Configuration on Bare Metal only */
PUBLIC(RO(Proc))->Uncore.ClusterCfg.value = SysRegRead(CLUSTERCFR_EL1);
PUBLIC(RO(Proc))->Uncore.ClusterRev.value = SysRegRead(CLUSTERIDR_EL1);
PUBLIC(RO(Proc))->Uncore.DSU_Type = DSU_100;
if (PUBLIC(RO(Proc))->Uncore.ClusterCfg.value != 0
&& PUBLIC(RO(Proc))->Uncore.ClusterRev.value != 0)
{
if (Arch[PUBLIC(RO(Proc))->ArchID].Architecture.CN > ARMv9_A)
{
PUBLIC(RO(Proc))->Uncore.DSU_Type = DSU_120;
}
else if (Arch[PUBLIC(RO(Proc))->ArchID].Architecture.CN > ARMv8_2_A)
{
PUBLIC(RO(Proc))->Uncore.DSU_Type = DSU_110;
} else {
PUBLIC(RO(Proc))->Uncore.DSU_Type = DSU_100;
}
} else {
PUBLIC(RO(Proc))->Uncore.DSU_Type = DSU_NONE;
}
} else {
enum DSU_TYPE DSU_Type[2] = {DSU_NONE, DSU_NONE};
#if defined(CONFIG_OF)